Multilayer substrate, multilayer substrate module, and electronic device
By designing the first and second interlayer connection conductors with different thermal conductivity areas in a multilayer substrate, the problem of heat transfer to the lower surface of the laminated substrate is solved, and more efficient heat dissipation performance is achieved.
Patent Information
- Application Number
- CN202380049456.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2022-06-24
- Filing Date
- 2023-05-18
- Publication Date
- 2025-02-18
AI Technical Summary
During the heat dissipation process, existing multi-layer substrates tend to cause heat transfer to the lower surface of the laminated substrate, thereby affecting the heat dissipation performance.
The first interlayer connecting conductor and the second interlayer connecting conductor with different thermal conductivity areas are adopted. Through the design of these conductor layers, heat transfer to the lower surface of the laminated body is suppressed and heat dissipation performance is improved.
The degradation of heat dissipation performance is effectively suppressed and heat is prevented from being transferred to the lower surface of the laminated body, thereby improving the heat dissipation efficiency of the multi-layer substrate.
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Figure CN119487983A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a multi-layer substrate, a multi-layer substrate module and an electronic device having an interlayer connection conductor. Background Art
[0002] As a previous invention regarding a multilayer substrate, for example, a power amplifier module described in Patent Document 1 is known. The power amplifier module includes a stacked substrate and an electronic component. The stacked substrate has a structure in which a core substrate and a substrate constituting a base material are stacked in an up-down direction. The stacked substrate has a plate shape, and the plate shape has an upper main surface and a lower main surface. The stacked substrate has a plurality of heat dissipation vias that penetrate the core substrate and the substrate constituting the base material in the up-down direction. The electronic component is mounted on the upper main surface of the stacked substrate. As a result, the heat generated by the electronic component is transferred to the lower main surface of the stacked substrate via the plurality of heat dissipation vias.
[0003] Prior Art Literature
[0004] Patent Literature
[0005] Patent Document 1: Japanese Patent Application Publication No. 2005-191435 Summary of the invention
[0006] Problem that the invention aims to solve
[0007] However, in the field of the power amplifier module described in Patent Document 1, it is sometimes undesirable to transfer heat to the lower surface of the laminate substrate.
[0008] Therefore, an object of the present invention is to provide a multilayer substrate, a multilayer substrate module, and an electronic device that can suppress a decrease in heat dissipation performance and suppress heat transfer to the lower surface of a stacked body.
[0009] Technical solutions to solve problems
[0010] A multilayer substrate according to one embodiment of the present invention includes:
[0011] A laminate having a structure in which a plurality of insulating layers having a positive main surface located in the positive direction of the Z axis and a negative main surface located in the negative direction of the Z axis are laminated in the Z axis direction;
[0012] a plurality of conductor layers provided in the laminate, including a first conductor layer having a mounting electrode located on a front main surface of an insulating layer located closest to the positive direction of the Z axis among the plurality of insulating layers;
[0013] one or more first interlayer connection conductors that penetrate a first insulating layer, one of the plurality of insulating layers, in the Z-axis direction and connect the two conductor layers located on the front main surface and the negative main surface of the first insulating layer; and
[0014] The second interlayer connection conductor penetrates one of the plurality of insulating layers in the Z-axis direction.
[0015] Each of the one or more first interlayer connection conductors includes:
[0016] Region 1; and
[0017] The second region has a thermal conductivity lower than that of the first region and is located in the negative direction of the Z axis relative to the first region.
[0018] When viewed in the Z-axis direction, the area of the large-area first interlayer connection conductor, which is at least one of the one or more first interlayer connection conductors, is larger than the area of the second interlayer connection conductor.
[0019] Effects of the Invention
[0020] According to the multi-layer substrate of the present invention, it is possible to suppress a decrease in heat dissipation performance and to suppress heat transfer to the lower surface of the stacked body. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] Figure 1 is a cross-sectional view of the electronic device 1 .
[0022] Figure 2 It is a plan view of the multi-layer substrate 11 and the electronic component 100 .
[0023] Figure 3 2 is a cross-sectional view of the multi-layer substrate module 10 a .
[0024] Figure 4 2 is a cross-sectional view of the multi-layer substrate module 10 b.
[0025] Figure 5 2 is a cross-sectional view of the multi-layer substrate module 10 c .
[0026] Figure 6 It is a cross-sectional view of the multi-layer substrate module 10d.
[0027] Figure 7 It is a cross-sectional view of the multi-layer substrate module 10e.
[0028] Figure 8 It is a cross-sectional view of the multi-layer substrate module 10f.
[0029] Fig. 9 It is a cross-sectional view of the multi-layer substrate module 10g.
[0030] Fig.10 is a cross-sectional view of the multi-layer substrate module 10h.
[0031] Fig.11 2 is a cross-sectional view of the multi-layer substrate module 10i.
[0032] Fig.12 2 is a cross-sectional view of the multi-layer substrate module 10 j.
[0033] Fig.13 2 is a cross-sectional view of the multi-layer substrate module 10 k.
[0034] Fig.14 is a cross-sectional view of the multi-layer substrate module 101.
[0035] Fig.15 is a top view of the multi-layer substrate 111.
[0036] Fig.16 It is a top view of the multi-layer substrate 11m.
[0037] Fig.17 is a cross-sectional view of the electronic device 1n. DETAILED DESCRIPTION
[0038] (Implementation Method)
[0039] [Structure of electronic equipment]
[0040] Hereinafter, the structure of the electronic device 1 according to the embodiment of the present invention will be described with reference to the drawings. Figure 1 is a cross-sectional view of the electronic device 1 . Figure 2 FIG. 1 is a top view of the multilayer substrate 11 and the electronic component 100. Figure 2 In the embodiment, the protective layer 16 is omitted.
[0041] In this specification, directions are defined as follows. The stacking direction of the stacked body 12 of the multi-layer substrate 11 is defined as the up-down direction. In addition, the up-down direction coincides with the Z-axis direction. The upper direction is the positive direction of the Z-axis. The lower direction is the negative direction of the Z-axis. In addition, directions orthogonal to the up-down direction are defined as the left-right direction and the front-back direction. The left-right direction is orthogonal to the front-back direction. In addition, the upper direction and the lower direction of the up-down direction may be swapped, the left direction and the right direction of the left-right direction may be swapped, and the front direction and the rear direction of the front-back direction may be swapped.
[0042] The electronic device 1 is, for example, a wireless communication terminal such as a smartphone. The electronic device 1 includes a multi-layer substrate module 10 and a housing 120. The multi-layer substrate module 10 includes a multi-layer substrate 11 and an electronic component 100. The housing 120 accommodates the multi-layer substrate module 10.
[0043] The multi-layer substrate 11 transmits high-frequency signals. Figure 1 as well as Figure 2As shown, the multilayer substrate 11 includes a laminate 12 , a protective layer 16 , conductor layers 18 a to 18 h and 19 a to 19 f , first interlayer connection conductors V1 , v1 a and v1 b , and second interlayer connection conductors v2 a to v2 f .
[0044] like Figure 1 As shown, the laminate 12 has a plate shape having an upper main surface and a lower main surface. When viewed in the up-down direction, the laminate 12 has a rectangular shape. The laminate 12 has a structure in which insulating layers 14a to 14c having an upper main surface (a positive main surface located in the positive direction of the Z axis) and a lower main surface (a negative main surface located in the negative direction of the Z axis) are stacked in the up-down direction (Z axis direction). The insulating layers 14a to 14c are arranged in sequence from top to bottom. When viewed in the up-down direction, the insulating layers 14a to 14c have a rectangular shape. The material of the insulating layers 14a to 14c is a resin. The material of the insulating layers 14a to 14c is, for example, a thermoplastic resin. The thermoplastic resin is, for example, a liquid crystal polymer. As a result, the laminate 12 has flexibility. A surface located in the center of the laminate 12 in the up-down direction (Z axis direction) and orthogonal to the up-down direction (Z axis direction) is set as an intermediate surface S.
[0045] like Figure 1 as well as Figure 2 As shown in FIG. 1 , conductor layers 18a to 18h and 19a to 19f are provided in the laminate 12. The conductor layers 18a to 18h are located on the upper main surface of the insulating layer 14a. Figure 2 As shown, the conductor layers 18a to 18h have mounting electrodes E1 to E9. The mounting electrodes E1 to E9 are located on the upper main surface (positive main surface) of the insulating layer 14a, which is located most upward (most in the positive direction of the Z axis) among the insulating layers 14a to 14c. The mounting electrodes E1 to E9 are portions of the conductor layers 18a to 18h that are exposed from the protective layer 16 described later. When viewed in the vertical direction, the mounting electrodes E1 to E9 are arranged in a 3×3 matrix. When viewed in the vertical direction, the mounting electrodes E1 to E9 have a rectangular shape.
[0046] like Figure 2 As shown, the conductor layers 18a to 18c are arranged in sequence from left to right. The conductor layer 18a extends in the left-right direction. The mounting electrodes E1 and E4 are arranged in sequence from front to back at the right end of the conductor layer 18a. The conductor layer 18b has a square shape. The mounting electrode E5 is located in the center of the conductor layer 18b. The conductor layer 18c extends in the left-right direction. The mounting electrode E6 is located at the left end of the conductor layer 18c.
[0047] like Figure 1 As shown, the conductor layers 19a to 19c are located on the upper main surface of the insulating layer 14b. The conductor layers 19a to 19c are arranged in order from left to right. The conductor layers 19a to 19c extend in the left-right direction.
[0048] like Figure 1 As shown, the conductor layers 19d to 19f are located on the lower main surface of the insulating layer 14c. The conductor layers 19d to 19f are arranged in order from left to right. The conductor layers 19d to 19f have a rectangular shape when viewed in the vertical direction. The conductor layers 19d to 19f are, for example, external electrodes.
[0049] The conductor layers 18a to 18c and 19a to 19f as described above are formed by patterning metal foil bonded to the upper main surfaces of the insulating layers 14a and 14b and the lower main surface of the insulating layer 14c. The metal foil is, for example, copper foil.
[0050] like Figure 1 As shown, the protective layer 16 covers substantially the entire upper main surface of the insulating layer 14a. Thus, the protective layer 16 protects the conductor layers 18a to 18h. However, the mounting electrodes E1 to E9 are not covered by the protective layer 16. In addition, the protective layer 16 is not a part of the laminate 12. No conductor layer is provided on the upper main surface of the protective layer 16. The protective layer 16 as described above is, for example, a barrier layer.
[0051] The first interlayer connection conductor V1, v1a, and v1b penetrate the insulator layer 14a (first insulator layer) which is one of the insulator layers 14a to 14c in the vertical direction (Z-axis direction). The first interlayer connection conductor V1 (large-area first interlayer connection conductor) and the first interlayer connection conductors v1a and v1b are located above the intermediate plane S (positive direction of the Z-axis). The first interlayer connection conductors V1, v1a, and v1b have a shape in which the area of the cross section orthogonal to the vertical direction decreases as it progresses from bottom to top. Specifically, the first interlayer connection conductor V1 has a quadrangular pyramid shape. The first interlayer connection conductors v1a and v1b have a truncated cone shape. Moreover, the area of the upper end of the first interlayer connection conductors V1, v1a, and v1b is smaller than the area of the lower end of the first interlayer connection conductors V1, v1a, and v1b.
[0052] The first interlayer connection conductor V1 connects the conductor layer 18a and the conductor layer 19a (two conductor layers) located on the upper main surface (positive main surface) and the lower main surface (negative main surface) of the insulating layer 14a (first insulating layer). The first interlayer connection conductor v1a connects the conductor layer 18b and the conductor layer 19b (two conductor layers) located on the upper main surface (positive main surface) and the lower main surface (negative main surface) of the insulating layer 14a (first insulating layer). The first interlayer connection conductor v1b connects the conductor layer 18c and the conductor layer 19c (two conductor layers) located on the upper main surface (positive main surface) and the lower main surface (negative main surface) of the insulating layer 14a (first insulating layer).
[0053] The first interlayer connection conductors V1, v1a, and v1b each include a first region A1 and a second region A2. The first region A1 and the second region A2 are arranged in order from top to bottom. The second region A2 is located below the first region A1 (in the negative direction of the Z axis). The second region A2 has a thermal conductivity lower than that of the first region A1. The material of such a first region A1 is the same as that of the conductor layers 18a to 18c. Therefore, the material of the first region A1 is, for example, copper. The material of the second region A2 is, for example, an alloy of tin and copper, or an alloy of tin and silver. The second region A2 is formed by sintering a conductive paste that is a mixture of metal powder and resin.
[0054] The second interlayer connection conductors v2a to v2c penetrate the insulating layer 14b (one of the plurality of insulating layers) in the vertical direction (Z-axis direction). The second interlayer connection conductors v2a to v2c have a shape in which the area of the cross section perpendicular to the vertical direction decreases as it advances from bottom to top. Specifically, the second interlayer connection conductors v2a to v2c have a truncated cone shape. Moreover, the area of the upper end of the second interlayer connection conductors v2a to v2c is smaller than the area of the lower end of the second interlayer connection conductors v2a to v2c.
[0055] The upper end of the second interlayer connection conductor v2a is connected to the left end of the conductor layer 19a. The upper end of the second interlayer connection conductor v2b is connected to the right end of the conductor layer 19b. The upper end of the second interlayer connection conductor v2c is connected to the right end of the conductor layer 19c.
[0056] Each of the second interlayer connection conductors v2a to v2c includes a first region A1 and a second region A2. The first region A1 and the second region A2 are arranged in this order from top to bottom.
[0057] The second interlayer connection conductors v2d to v2f penetrate the insulating layer 14c (one of the plurality of insulating layers) in the up-down direction (Z-axis direction). The second interlayer connection conductors v2d to v2f are located below the intermediate plane S (negative direction of the Z-axis). The second interlayer connection conductors v2d to v2f have a shape in which the area of a cross section orthogonal to the up-down direction decreases as it progresses from top to bottom. Specifically, the second interlayer connection conductors v2d to v2f have a truncated cone shape. Moreover, the area of the upper end of the second interlayer connection conductors v2d to v2f is smaller than the area of the lower end of the second interlayer connection conductors v2d to v2f.
[0058] The second interlayer connection conductor v2d connects the second interlayer connection conductor v2a and the conductor layer 19d. The second interlayer connection conductor v2e connects the second interlayer connection conductor v2b and the conductor layer 19e. The second interlayer connection conductor v2f connects the second interlayer connection conductor v2c and the conductor layer 19f.
[0059] Each of the second interlayer connection conductors v2d to v2f includes a first region A1 and a second region A2. The first region A1 and the second region A2 are arranged in this order from bottom to top.
[0060] The first region A1 is formed by plating a through hole that vertically penetrates the insulating layers 14a to 14c with a metal. The metal is, for example, copper. The second region A2 is formed by filling the through hole plated with a conductive paste and firing the conductive paste.
[0061] The electronic component 100 is mounted on the mounting electrodes E1 to E9 of the multilayer substrate 11. The electronic component 100 is an element that generates heat when working. The electronic component 100 is, for example, an IC (Integrated Circuit). The electronic component 100 is, for example, an RFIC (Radio Frequency Integrated Circuit), a CPU (Central Processing Unit), or a power IC. The electronic component 100 includes a component body 102 and external electrodes B1 to B9. The component body 102 has a rectangular parallelepiped shape. The external electrodes B1 to B9 are located on the lower surface of the component body 102. The external electrodes B1 to B9 are arranged in a 3×3 matrix. The external electrodes B1 to B9 are connected to the mounting electrodes E1 to E9, respectively. The external electrodes B1 to B9 are electrodes connected to a power supply voltage or a ground potential or electrodes for inputting and outputting high-frequency signals. In the present embodiment, the external electrode B4 is an electrode connected to a power supply voltage or a ground potential.
[0062] Here, the first interlayer connection conductor V1 is a large-area first interlayer connection conductor. When viewed in the up-down direction (Z-axis direction), the area of the first interlayer connection conductor V1 (large-area first interlayer connection conductor) is larger than the areas of the first interlayer connection conductors v1a, v1b, and the second interlayer connection conductors v2a to v2f. Moreover, the first interlayer connection conductor V1 (large-area first interlayer connection conductor) is directly connected to the conductor layer 18a (first conductor layer). Therefore, the upper end of the first interlayer connection conductor V1 is in contact with the conductor layer 18a. Moreover, the first interlayer connection conductor V1 (large-area first interlayer connection conductor) has an overlapping portion P1 that overlaps with the electronic component 100 when viewed in the up-down direction (Z-axis direction) and a non-overlapping portion P2 that does not overlap with the electronic component 100.
[0063] The first interlayer connection conductor V1 is electrically connected to the external electrode B4 via the conductor layer 18a. The external electrode B4 is an electrode connected to a power supply voltage or a ground potential. Therefore, the first interlayer connection conductor V1 (large-area first interlayer connection conductor) is connected to a power supply voltage or a ground potential.
[0064] [Effect]
[0065] (a) According to the multilayer substrate 11, it is possible to suppress the reduction in heat dissipation performance and suppress the transfer of heat to the lower surface of the stacked body 12. More specifically, the first interlayer connection conductor V1 (large-area first interlayer connection conductor) is directly connected to the conductor layer 18a (first conductor layer). As a result, the heat generated by the electronic component 100 is transferred to the first interlayer connection conductor V1 via the conductor layer 18a. Here, the first interlayer connection conductor V1 (large-area first interlayer connection conductor) includes a first region A1 and a second region A2, and the second region A2 has a lower thermal conductivity than the first region A1 and is located below the first region A1. As a result, the heat transferred to the first interlayer connection conductor V1 can be suppressed from being transferred from the first region A1 to the second region A2. Therefore, the heat generated by the electronic component 100 can be suppressed from being transferred to the lower surface of the stacked body 12.
[0066] Furthermore, when viewed in the vertical direction, the area of the first interlayer connection conductor V1 (large-area first interlayer connection conductor) is larger than the area of the second interlayer connection conductors v2a to v2c. Therefore, when the heat generated by the electronic component 100 is transferred to the first interlayer connection conductor V1, the heat is transferred in the front-back direction and the left-right direction in the first area A1. As a result, in the multilayer substrate 11, it is possible to suppress a decrease in heat dissipation performance.
[0067] (b) In the multilayer substrate 11 , the second interlayer connection conductors v2a to v2f have a smaller area than the first interlayer connection conductor V1 (large-area first interlayer connection conductor). By using small second interlayer connection conductors v2a to v2f in this way, the wiring density in the multilayer substrate 11 can be increased.
[0068] (c) The multilayer substrate 11 has flexibility. Thus, the multilayer substrate 11 can be bent and arranged along the components in the electronic device 1. Thus, the heat generated by the electronic component 100 is transferred from the multilayer substrate 11 to the components in the electronic device 1. As a result, the heat dissipation of the multilayer substrate 11 is improved.
[0069] (d) According to the multilayer substrate 11, the heat dissipation of the multilayer substrate 11 is also improved for the following reasons. More specifically, the first interlayer connection conductor V1 (large-area first interlayer connection conductor) has an overlapping portion P1 that overlaps with the electronic component 100 when viewed in the vertical direction, and a non-overlapping portion P2 that does not overlap with the electronic component 100. As a result, the heat transferred to the first interlayer connection conductor V1 is transferred to the portion of the stacked body 12 that does not overlap with the electronic component 100 when viewed in the vertical direction. Therefore, it becomes less likely that the electronic component 100 will prevent the heat from being radiated from the stacked body 12 to the atmosphere.
[0070] (e) In the multilayer substrate 11, the first interlayer connection conductor V1 is connected to, for example, a power supply voltage or a ground potential. The first interlayer connection conductor V1 has a low resistance value, so that the heat generation of the first interlayer connection conductor V1 can be suppressed. In addition, in the conductor connected to the power supply voltage or the ground potential, it is not necessary to make the characteristic impedance consistent with the desired characteristic impedance (for example, 50Ω). Therefore, it is easy to apply the first interlayer connection conductor V1 having a large area to the conductor connected to the power supply voltage or the ground potential.
[0071] (First Modification)
[0072] Hereinafter, a multilayer substrate 11 a according to a first modification will be described with reference to the drawings. Figure 3 2 is a cross-sectional view of the multi-layer substrate module 10 a .
[0073] The multi-layer substrate 11 a is different from the multi-layer substrate 11 in the following respects.
[0074] ・The second interlayer connection conductors v2a to v2c have a thermal conductivity lower than the thermal conductivity of the first area A1.
[0075] The multilayer substrate 11a includes third interlayer connection conductors v3a to v3c instead of the second interlayer connection conductors v2d to v2e. The third interlayer connection conductors v3a to v3c have a thermal conductivity lower than that of the first area A1.
[0076] The material of the second interlayer connection conductors v2a to v2c and the material of the third interlayer connection conductors v3a to v3c are, for example, an alloy of tin and copper, or an alloy of tin and silver. The second interlayer connection conductors v2a to v2c and the third interlayer connection conductors v3a to v3c are formed by filling a conductive paste in the through-holes and firing the conductive paste. The other structures of the multilayer substrate 11a are the same as those of the multilayer substrate 11, so the description is omitted. The multilayer substrate 11a can achieve the effects (a) to (e).
[0077] (f) According to the multilayer substrate 11a, it is possible to suppress heat transfer to the lower surface of the stacked body 12. More specifically, the third interlayer connection conductors v3a to v3c are located below the intermediate surface S (in the negative direction of the Z axis). Moreover, the third interlayer connection conductors v3a to v3c have a thermal conductivity lower than the thermal conductivity of the first area A1. As a result, heat is not easily transferred to the lower surface of the stacked body 12 via the third interlayer connection conductors v3a to v3c.
[0078] (Second modification)
[0079] Hereinafter, a multilayer substrate 11 b according to a second modification will be described with reference to the drawings. Figure 4 2 is a cross-sectional view of the multi-layer substrate module 10 b.
[0080] The multilayer substrate 11b is different from the multilayer substrate 11a in that the second interlayer connection conductors v2g and v2h are provided instead of the first interlayer connection conductors v1a and v1b. The thermal conductivity of the second interlayer connection conductors v2g and v2h is different from that of the first interlayer connection conductors v1a and v1b. Specifically, the second interlayer connection conductors v2g and v2h have a thermal conductivity lower than that of the first area A1. The material of the second interlayer connection conductors v2g and v2h is, for example, an alloy of tin and copper or an alloy of tin and silver. The second interlayer connection conductors v2g and v2h are formed by filling a conductive paste in a through hole and firing the conductive paste. The other structures of the multilayer substrate 11b are the same as those of the multilayer substrate 11a, so the description is omitted. The multilayer substrate 11a can achieve the effects (a) to (f).
[0081] (Third Modification)
[0082] Hereinafter, a multilayer substrate 11c according to a third modification will be described with reference to the drawings. Figure 5 2 is a cross-sectional view of the multi-layer substrate module 10 c .
[0083] The multi-layer substrate 11 c differs from the multi-layer substrate 11 in the following respects.
[0084] The multilayer substrate 11c includes fourth interlayer connection conductors v4a to v4f instead of the second interlayer connection conductors v2a to v2f.
[0085] The laminated body 12 further includes an insulating layer 14d located below the insulating layer 14c.
[0086] The multilayer substrate 11c further includes fifth interlayer connection conductors v5a to v5c.
[0087] Here, the regions obtained by dividing the laminate 12 into three equal parts in the up-down direction (Z-axis direction) are defined as the positive region A11, the middle region A12, and the negative region A13. The positive region A11, the middle region A12, and the negative region A13 are arranged in the downward direction (negative direction of the Z-axis). The first interlayer connection conductor V1 (large-area first interlayer connection conductor) is located in the positive region A11. More precisely, the entire first interlayer connection conductor V1 (large-area first interlayer connection conductor) is located in the positive region A11.
[0088] The fourth interlayer connection conductors v4a to v4c penetrate the insulating layer 14b (one of the plurality of insulating layers) in the vertical direction (Z-axis direction). The fourth interlayer connection conductors v4d to v4f penetrate the insulating layer 14c (one of the plurality of insulating layers) in the vertical direction (Z-axis direction). The fourth interlayer connection conductors v4a to v4f are located in the middle area A12. More precisely, a portion of the fourth interlayer connection conductors v4a to v4f is located in the middle area A12. The fourth interlayer connection conductors v4a to v4f have a thermal conductivity lower than that of the first area A1.
[0089] The fifth interlayer connection conductors v5a to v5c penetrate the insulating layer 14d (one of the plurality of insulating layers) in the vertical direction (Z-axis direction). The fifth interlayer connection conductors v5a to v5c are located in the negative region A13. More precisely, the entirety of the fifth interlayer connection conductors v5a to v5c are located in the negative region A13. The fifth interlayer connection conductors v5a to v5c have a thermal conductivity higher than that of the second region A2. The fifth interlayer connection conductors v5a to v5c each include the first region A1 and the second region A2. The other structures of the multilayer substrate 11c are the same as those of the multilayer substrate 11, and therefore the description thereof is omitted. The multilayer substrate 11c can achieve the effects of (a) to (f).
[0090] (g) According to the multilayer substrate 11c, when the lower main surface of the multilayer substrate 11c is in contact with a heat source, heat is diffused into the multilayer substrate 11c through the fifth interlayer connecting conductors v5a to v5c. This improves the heat dissipation performance of the multilayer substrate 11c.
[0091] (h) According to the multilayer substrate 11c, the fifth interlayer connection conductors v5a to v5c have a structure that is vertically symmetrical with the first interlayer connection conductors v1a and v1b. Thus, the overall structure of the multilayer substrate 11c is close to a vertically symmetrical structure. As a result, the warping of the multilayer substrate 11c can be suppressed.
[0092] (Fourth Modification)
[0093] Hereinafter, a multilayer substrate 11d according to a fourth modification will be described with reference to the drawings. Figure 6 It is a cross-sectional view of the multi-layer substrate module 10d.
[0094] The multilayer substrate 11d includes a laminate 12, a protective layer 16, and first interlayer connection conductors V1, v1a, v1b, V2, v2a, and v2b. The laminate 12 has a structure in which insulating layers 14a and 14b are stacked in the vertical direction. The first interlayer connection conductors V1, v1a, and v1b penetrate the insulating layer 14a in the vertical direction.
[0095] The second interlayer connection conductors V2, v2a, and v2b penetrate the insulating layer 14b in the vertical direction. The second interlayer connection conductors V2, v2a, and v2b have a structure symmetrical to the first interlayer connection conductors V1, v1a, and v1b in the vertical direction. The second interlayer connection conductors V2, v2a, and v2b are electrically connected to the first interlayer connection conductors V1, v1a, and v1b, respectively.
[0096] The multilayer substrate 11d described above can achieve the effects (a) to (e). In addition, the multilayer substrate 11d can achieve the effects (g) and (h) with a smaller number of layers than the multilayer substrate 11c.
[0097] (Fifth Modification)
[0098] Hereinafter, a multilayer substrate 11 e according to a fifth modification will be described with reference to the drawings. Figure 7 It is a cross-sectional view of the multi-layer substrate module 10e.
[0099] The multi-layer substrate 11e is different from the multi-layer substrate 11a in the following respects.
[0100] The multilayer substrate 11e includes a second interlayer connection conductor V2 instead of the second interlayer connection conductor v2a.
[0101] ・The thermal conductivity of the second interlayer connection conductors v2b and v2c is higher than the thermal conductivity of the second area A2.
[0102] The second interlayer connection conductor V2 has the same structure as the first interlayer connection conductor V1. Therefore, the second interlayer connection conductor V2 includes the first area A1 and the second area A2. The upper end of the second interlayer connection conductor V2 is connected to the conductor layer 19a. The second interlayer connection conductor V2 includes a portion overlapping with the first interlayer connection conductor V1 when viewed in the vertical direction and a portion not overlapping with the first interlayer connection conductor V1 when viewed in the vertical direction.
[0103] Each of the second interlayer connection conductors v2b and v2c includes a first region A1 and a second region A2. The other structures of the multilayer substrate 11e are the same as those of the multilayer substrate 11a, and thus description thereof is omitted. The multilayer substrate 11e can achieve the effects (a) to (f).
[0104] In addition, the multilayer substrate 11e includes the second interlayer connection conductor V2 having a large area when viewed in the vertical direction, so the heat dissipation of the multilayer substrate 11e is improved. In addition, in the multilayer substrate 11e, the second interlayer connection conductor V2 includes a portion overlapping with the first interlayer connection conductor V1 when viewed in the vertical direction and a portion not overlapping with the first interlayer connection conductor V1 when viewed in the vertical direction. Thus, heat is transferred from the first interlayer connection conductor V1 to the portion of the second interlayer connection conductor V2 that overlaps with the first interlayer connection conductor V1 when viewed in the vertical direction. Furthermore, heat is transferred from the portion of the second interlayer connection conductor V2 that overlaps with the first interlayer connection conductor V1 when viewed in the vertical direction to the portion of the second interlayer connection conductor V2 that does not overlap with the first interlayer connection conductor V1 when viewed in the vertical direction. That is, heat is transferred in the left-right direction and the front-back direction in the stacked body 12. Thus, the heat dissipation of the multilayer substrate 11e is improved.
[0105] (Sixth Modification)
[0106] Hereinafter, a multilayer substrate 11f according to a sixth modification will be described with reference to the drawings. Figure 8 It is a cross-sectional view of the multi-layer substrate module 10f.
[0107] The multilayer substrate 11f is different from the multilayer substrate 11e in that the entire second interlayer connection conductor V2 overlaps the entire first interlayer connection conductor V1 when viewed in the vertical direction. The other structures of the multilayer substrate 11f are the same as those of the multilayer substrate 11, so the description is omitted. The multilayer substrate 11f can achieve the effects (a) to (f). In addition, the multilayer substrate 11f includes the second interlayer connection conductor V2 having a large area when viewed in the vertical direction, so the heat dissipation of the multilayer substrate 11f is improved.
[0108] (Seventh Modification)
[0109] Hereinafter, a multilayer substrate 11g according to a seventh modification will be described with reference to the drawings. Fig. 9 It is a cross-sectional view of the multi-layer substrate module 10g.
[0110] As in the multilayer substrate 11g, the entire first interlayer connection conductor V1 (large-area first interlayer connection conductor) may overlap the electronic component 100 when viewed in the vertical direction. Such a multilayer substrate 11g can achieve the effects (a) to (f).
[0111] (Variant 8)
[0112] Hereinafter, a multi-layer substrate 11h according to an eighth modification will be described with reference to the drawings. Fig.10 is a cross-sectional view of the multi-layer substrate module 10h.
[0113] As in the multilayer substrate 11h, the first interlayer connection conductor V1 (large-area first interlayer connection conductor) may not be directly connected to the conductor layer 18b (first conductor layer). Therefore, the first interlayer connection conductor V1 (large-area first interlayer connection conductor) may be connected to the conductor layer 18b (first conductor layer) via a conductor. The conductors are the conductor layer 19a and the interlayer connection conductors v0a and v0b. The interlayer connection conductors v0a and v0b penetrate the insulating layer 14a in the vertical direction and connect the conductor layer 18b and the conductor layer 19a. Such a multilayer substrate 11h can achieve the effects of (a) to (f).
[0114] (9th Modification)
[0115] Hereinafter, a multi-layer substrate 11h according to an eighth modification will be described with reference to the drawings. Fig.11 2 is a cross-sectional view of the multi-layer substrate module 10i.
[0116] As in the case of the multilayer substrate 11i, the first interlayer connection conductor V1 (large-area first interlayer connection conductor) may not overlap with the electronic component 100 when viewed in the vertical direction. As a result, heat is diffused to a position away from the electronic component 100 through the first interlayer connection conductor V1. As a result, the heat dissipation of the multilayer substrate 11i is improved. In addition, the multilayer substrate 11i can achieve the effects (a) to (f).
[0117] (10th variant)
[0118] Hereinafter, a multilayer substrate 11j according to a tenth modification will be described with reference to the drawings. Fig.12 2 is a cross-sectional view of the multi-layer substrate module 10 j.
[0119] As in the multilayer substrate 11j, the first interlayer connection conductor V1 (large-area first interlayer connection conductor) may not be directly connected to the conductor layer 18a (first conductor layer). Therefore, the first interlayer connection conductor V1 (large-area first interlayer connection conductor) may be connected to the conductor layer 18a (first conductor layer) via a conductor. The conductors are the conductor layer 19a and the interlayer connection conductor v0a. The interlayer connection conductor v0a penetrates the insulating layer 14a in the up-down direction and connects the first interlayer connection conductor V1 (large-area first interlayer connection conductor) and the conductor layer 19a. Such a multilayer substrate 11h can achieve the effects of (a) to (f).
[0120] (11th variant)
[0121] Hereinafter, a multi-layer substrate 11 k according to an eleventh modified example will be described with reference to the drawings. Fig.13 2 is a cross-sectional view of the multi-layer substrate module 10 k.
[0122] The multilayer substrate 11k is different from the multilayer substrate 11j in that the thermal conductivity of the interlayer connection conductors v0a to v0c is higher than that of the second area A2. The material of the interlayer connection conductors v0a to v0c is, for example, copper. As a result, the heat generated by the electronic component 100 is efficiently transferred to the first interlayer connection conductor V1 (large-area first interlayer connection conductor) via the interlayer connection conductors v0a to v0c. Such a multilayer substrate 11k can achieve the effects (a) to (f).
[0123] (12th Modification)
[0124] Hereinafter, a multilayer substrate 111 according to a twelfth modification will be described with reference to the drawings. Fig.14 is a cross-sectional view of the multi-layer substrate module 101. Fig.15 is a top view of the multi-layer substrate 111.
[0125] The conductor layer 18a may also have an antenna ANT as in the multilayer substrate 111. The first interlayer connection conductor V1 (large-area first interlayer connection conductor) is connected to the conductor layer 18a. The first interlayer connection conductor V1 is located in the current path between the electronic component 100 and the antenna ANT. Therefore, the resistance value of the current path between the electronic component 100 and the antenna ANT decreases. As a result, the heat generation in the current path between the electronic component 100 and the antenna ANT can be suppressed. Such a multilayer substrate 111 can achieve the effects (a) to (f).
[0126] Furthermore, since the area of the antenna ANT is large, heat can be radiated efficiently from the antenna ANT.
[0127] (Variant 13)
[0128] Hereinafter, a multilayer substrate 11m according to a thirteenth modification will be described with reference to the drawings. Fig.16 It is a top view of the multi-layer substrate module 10m.
[0129] The multilayer substrate 11m is different from the multilayer substrate 111 in the shape of the first interlayer connection conductor V1. More specifically, in the multilayer substrate 111, the first interlayer connection conductor V1 has a rectangular shape having a long side extending in the left-right direction when viewed in the up-down direction. On the other hand, in the multilayer substrate 11m, the first interlayer connection conductor V1 has a shape in which a plurality of circles are connected in a row in the left-right direction when viewed in the up-down direction. Such a first interlayer connection conductor V1 can be formed by forming a plurality of circular holes by irradiation with a drill or a laser beam. The multilayer substrate 11m can achieve the same effects as the multilayer substrate 111.
[0130] (14th variant)
[0131] Hereinafter, a multilayer substrate 11n according to a fourteenth modification will be described with reference to the drawings. Fig.17 is a cross-sectional view of the electronic device 1n.
[0132] The multilayer substrate 11n is different from the multilayer substrate 11 in that the plurality of conductor layers include antenna conductor layers 50a and 50b. The distance from the lower main surface (negative main surface) of the laminate 12 to the antenna conductor layers 50a and 50b is shorter than the distance from the upper main surface (positive main surface) of the laminate 12 to the antenna conductor layers 50a and 50b. Furthermore, the distance from the lower main surface of the laminate 12 to the housing 120 is longer than the distance from the upper main surface of the laminate 12 to the housing 120.
[0133] Furthermore, the distance from case 120 to the lower main surface (negative main surface) of stacked body 12 is shorter than the distance from case 120 to the upper main surface (positive main surface) of stacked body 12. Thus, the heat generated by electronic component 100 is prevented from being transferred to case 120.
[0134] (Other Implementations)
[0135] The multilayer substrate according to the present invention is not limited to the multilayer substrates 11 and 11a to 11n, and can be modified within the scope of the gist thereof. In addition, the structures of the multilayer substrates 11 and 11a to 11n can be arbitrarily combined.
[0136] In addition, the multilayer substrate has a large-area first interlayer connection conductor. However, the multilayer substrate may also have a plurality of large-area first interlayer connection conductors. In this case, the plurality of large-area first interlayer connection conductors may also be located in the positive area A11. In addition, all of the plurality of large-area first interlayer connection conductors may be connected to the first conductor layer, or at least one of the plurality of large-area first interlayer connection conductors may be connected to the first conductor layer.
[0137] Furthermore, the multilayer substrate includes three third interlayer connecting conductors. However, the multilayer substrate may include one or more third interlayer connecting conductors.
[0138] In addition, the multilayer substrate includes six fourth interlayer connecting conductors. However, the multilayer substrate may include one or more fourth interlayer connecting conductors.
[0139] In addition, the multilayer substrate includes three fifth interlayer connecting conductors. However, the multilayer substrate may include one or more fifth interlayer connecting conductors.
[0140] Alternatively, a plurality of conductor layers may include antennas.
[0141] In addition, like Figure 2As shown in FIG. 1 , the first interlayer connection conductor V1 has a rectangular shape when viewed in the vertical direction. However, the first interlayer connection conductor V1 may have a shape other than a rectangular shape when viewed in the vertical direction. The first interlayer connection conductor V1 may have a polygonal shape, a circular shape, or a shape having a concave-convex shape on the outer edge when viewed in the vertical direction.
[0142] In addition, the antenna ANT may be a patch antenna, a dipole antenna, a monopole antenna, or a slot antenna.
[0143] Alternatively, the second interlayer connecting conductor may be provided on the first insulating layer on which the first interlayer connecting conductor is provided.
[0144] In addition, the multilayer substrate may further include a protective layer covering the lower main surface of the laminate 12 . (1)
[0146] A multi-layer substrate comprising:
[0147] A laminate having a structure in which a plurality of insulating layers having a positive main surface located in the positive direction of the Z axis and a negative main surface located in the negative direction of the Z axis are laminated in the Z axis direction;
[0148] a plurality of conductor layers provided in the laminate, including a first conductor layer having a mounting electrode located on a front main surface of an insulating layer located closest to the positive direction of the Z axis among the plurality of insulating layers;
[0149] one or more first interlayer connection conductors that penetrate a first insulating layer, one of the plurality of insulating layers, in the Z-axis direction and connect the two conductor layers located on the front main surface and the negative main surface of the first insulating layer; and
[0150] The second interlayer connection conductor penetrates one of the plurality of insulating layers in the Z-axis direction.
[0151] Each of the one or more first interlayer connection conductors includes:
[0152] Region 1; and
[0153] The second region has a thermal conductivity lower than that of the first region and is located in the negative direction of the Z axis relative to the first region.
[0154] When viewed in the Z-axis direction, the area of the large-area first interlayer connection conductor, which is at least one of the one or more first interlayer connection conductors, is larger than the area of the second interlayer connection conductor. (2)
[0156] The multi-layer substrate according to (1), wherein
[0157] One or more of the large-area first interlayer connection conductors are connected to the first conductor layer via a conductor, or are directly connected to the first conductor layer. (3)
[0159] The multilayer substrate according to (1) or (2), wherein:
[0160] A plane located at the center of the stack in the Z-axis direction and perpendicular to the Z-axis direction is defined as an intermediate plane,
[0161] The one or more large-area first interlayer connection conductors are located in the positive direction of the Z axis relative to the intermediate plane. (4)
[0163] The multilayer substrate according to any one of (1) to (3), wherein:
[0164] A plane located at the center of the stack in the Z-axis direction and perpendicular to the Z-axis direction is defined as an intermediate plane,
[0165] The multilayer substrate further comprises: one or more third interlayer connection conductors penetrating one of the plurality of insulating layers in the Z-axis direction and located in the negative direction of the Z-axis relative to the intermediate surface;
[0166] The one or more third interlayer connecting conductors have a thermal conductivity lower than a thermal conductivity of the first region. (5)
[0168] The multi-layer substrate according to (1), wherein
[0169] The regions obtained by dividing the stack into three equal parts in the Z-axis direction are defined as a positive region, a middle region, and a negative region.
[0170] The positive region, the middle region, and the negative region are arranged in sequence toward the negative direction of the Z axis,
[0171] The one or more large-area first interlayer connection conductors are located in the positive region. (6)
[0173] The multi-layer substrate according to (5), wherein
[0174] The multilayer substrate further comprises: one or more fourth interlayer connection conductors penetrating one of the plurality of insulating layers in the Z-axis direction and located in the middle region;
[0175] The one or more fourth interlayer connecting conductors have a thermal conductivity lower than a thermal conductivity of the first region. (7)
[0177] The multi-layer substrate according to (6), wherein
[0178] The multilayer substrate further comprises: one or more fifth interlayer connection conductors penetrating one of the plurality of insulating layers in the Z-axis direction and located in the negative region;
[0179] The one or more fifth interlayer connecting conductors have a thermal conductivity higher than a thermal conductivity of the second region. (8)
[0181] The multilayer substrate according to any one of (1) to (7), wherein:
[0182] At least one of the conductor layers connected to the one or more large-area first interlayer connecting conductors has an antenna. (9)
[0184] The multilayer substrate according to any one of (1) to (8), wherein:
[0185] The laminate has flexibility. (10)
[0187] The multilayer substrate according to any one of (1) to (7) and (9), wherein:
[0188] The plurality of conductor layers include an antenna conductor layer,
[0189] A distance from the negative main surface to the antenna conductor layer is shorter than a distance from the positive main surface to the antenna conductor layer. (11)
[0191] The multilayer substrate according to any one of (1) to (10), wherein:
[0192] At least one of the one or more large-area first interlayer connecting conductors is directly connected to the first conductor layer. (12)
[0194] The multilayer substrate according to any one of (1) to (11), wherein:
[0195] A power supply voltage or a ground potential is connected to the one or more large-area first interlayer connection conductors. (13)
[0197] A multi-layer substrate module, comprising:
[0198] The multilayer substrate according to any one of (1) to (12); and
[0199] Electronic components are mounted on the mounting electrodes. (14)
[0201] The multi-layer substrate module according to (13), wherein:
[0202] At least one of the one or more large-area first interlayer connection conductors has an overlapping portion overlapping with the electronic component as viewed in the Z-axis direction and a non-overlapping portion not overlapping with the electronic component. (15)
[0204] The multi-layer substrate module according to (13) or (14), wherein:
[0205] The electronic component is a RFIC. (16)
[0207] An electronic device comprises the multi-layer substrate module described in (13) to (15). (17)
[0209] The electronic device according to (16), wherein:
[0210] The electronic device further comprises a housing for accommodating the multi-layer substrate module.
[0211] A distance from the housing to the negative main surface is shorter than a distance from the housing to the positive main surface.
[0212] Description of Reference Numerals
[0213] 1. 1n: electronic equipment;
[0214] 10, 10a~10n: multi-layer substrate module;
[0215] 11, 11a~11n: Multilayer substrate
[0216] 12: Laminated body
[0217] 14a-14d: insulator layer;
[0218] 16: protective layer;
[0219] 18a~18h, 19a~19f: conductor layer;
[0220] 50a, 50b: antenna conductor layer;
[0221] 100: electronic components;
[0222] 102: Component body;
[0223] 120: housing;
[0224] A1: Area 1;
[0225] A11: positive area;
[0226] A12: middle area;
[0227] A13: negative area;
[0228] A2: Area 2;
[0229] ANT: Antenna;
[0230] B1~B9: external electrodes;
[0231] E1~E9: Install electrodes;
[0232] P1: repeated part;
[0233] P2: non-repeating part;
[0234] S: middle surface;
[0235] V1, v1a, v1b: 1st layer connecting conductor;
[0236] V2, v2a~v2f: 2nd layer connecting conductor;
[0237] v3a: 3rd layer connecting conductor;
[0238] v4a, v4d: 4th layer connecting conductor;
[0239] v5a: 5th layer connecting conductor.
Claims
1. A multi-layer substrate comprising: A laminate having a structure in which a plurality of insulating layers having a positive main surface located in the positive direction of the Z axis and a negative main surface located in the negative direction of the Z axis are laminated in the Z axis direction; a plurality of conductor layers provided in the laminate, including a first conductor layer having a mounting electrode located on a front main surface of an insulating layer located closest to the positive direction of the Z axis among the plurality of insulating layers; one or more first interlayer connection conductors that penetrate a first insulating layer, one of the plurality of insulating layers, in the Z-axis direction and connect the two conductor layers located on the front main surface and the negative main surface of the first insulating layer; as well as The second interlayer connection conductor penetrates one of the plurality of insulating layers in the Z-axis direction. Each of the one or more first interlayer connection conductors includes: Region 1; and The second region has a thermal conductivity lower than that of the first region and is located in the negative direction of the Z axis relative to the first region. When viewed in the Z-axis direction, the area of the large-area first interlayer connection conductor, which is at least one of the one or more first interlayer connection conductors, is larger than the area of the second interlayer connection conductor.
2. The multi-layer substrate according to claim 1, wherein One or more of the large-area first interlayer connection conductors are connected to the first conductor layer via a conductor, or are directly connected to the first conductor layer.
3. The multi-layer substrate according to claim 1 or claim 2, wherein: A plane located at the center of the stack in the Z-axis direction and perpendicular to the Z-axis direction is defined as an intermediate plane, The one or more large-area first interlayer connection conductors are located in the positive direction of the Z axis relative to the intermediate plane.
4. The multilayer substrate according to any one of claims 1 to 3, wherein: A plane located at the center of the stack in the Z-axis direction and perpendicular to the Z-axis direction is defined as an intermediate plane, The multilayer substrate further comprises: one or more third interlayer connection conductors penetrating one of the plurality of insulating layers in the Z-axis direction and located in the negative direction of the Z-axis relative to the intermediate surface; The one or more third interlayer connecting conductors have a thermal conductivity lower than a thermal conductivity of the first region.
5. The multi-layer substrate according to claim 1, wherein The regions obtained by dividing the stack into three equal parts in the Z-axis direction are defined as a positive region, a middle region, and a negative region. The positive region, the middle region, and the negative region are arranged in sequence toward the negative direction of the Z axis, The one or more large-area first interlayer connection conductors are located in the positive region.
6. The multi-layer substrate according to claim 5, wherein: The multilayer substrate further comprises: one or more fourth interlayer connection conductors penetrating one of the plurality of insulating layers in the Z-axis direction and located in the middle region; The one or more fourth interlayer connecting conductors have a thermal conductivity lower than a thermal conductivity of the first region.
7. The multi-layer substrate according to claim 6, wherein: The multilayer substrate further comprises: one or more fifth interlayer connection conductors penetrating one of the plurality of insulating layers in the Z-axis direction and located in the negative region; The one or more fifth interlayer connecting conductors have a thermal conductivity higher than a thermal conductivity of the second region.
8. The multi-layer substrate according to any one of claims 1 to 7, wherein: At least one of the conductor layers connected to the one or more large-area first interlayer connecting conductors has an antenna.
9. The multi-layer substrate according to any one of claims 1 to 8, wherein: The laminate has flexibility.
10. The multi-layer substrate according to any one of claims 1 to 7 and claim 9, wherein: The plurality of conductor layers include an antenna conductor layer, A distance from the negative main surface to the antenna conductor layer is shorter than a distance from the positive main surface to the antenna conductor layer.
11. The multi-layer substrate according to any one of claims 1 to 10, wherein: At least one of the one or more large-area first interlayer connecting conductors is directly connected to the first conductor layer.
12. The multi-layer substrate according to any one of claims 1 to 11, wherein: A power supply voltage or a ground potential is connected to the one or more large-area first interlayer connection conductors.
13. A multi-layer substrate module, comprising: The multilayer substrate according to any one of claims 1 to 12; and Electronic components are mounted on the mounting electrodes.
14. The multi-layer substrate module according to claim 13, wherein: At least one of the one or more large-area first interlayer connection conductors has an overlapping portion overlapping with the electronic component as viewed in the Z-axis direction and a non-overlapping portion not overlapping with the electronic component.
15. The multi-layer substrate module according to claim 13 or claim 14, wherein: The electronic component is a RFIC. 16 . An electronic device comprising the multi-layer substrate module according to claim 13 .
17. The electronic device according to claim 16, wherein: The electronic device further comprises a housing for accommodating the multi-layer substrate module. A distance from the housing to the negative main surface is shorter than a distance from the housing to the positive main surface.
Citation Information
Patent Citations
Board with heat dissipating via, and power amplifier module
JP2005191435A