Semiconductor device and method for manufacturing semiconductor device

Abstract

A semiconductor device (10) is provided with: a substrate (12) made of silicon carbide; and a semiconductor layer of a first conductivity type provided on the first surface (12a) of the substrate (12). A high-concentration hydrogen region (40) having a hydrogen concentration of more than 1015 / cm3 is formed over a thickness of 1 [mu] m or more by irradiation with hydrogen ions. At least a part of the high-concentration hydrogen region (40) is formed in the first conductivity-type semiconductor layer.

Description

Technical Field

[0001] The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device. Background Art

[0002] Silicon carbide (SiC) has attracted attention as a material used in next-generation power semiconductor devices. For example, an epitaxial layer is formed on a SiC substrate, and a transistor structure is formed in the epitaxial layer. In SiC semiconductor devices, it is known that when current is applied, injected carriers are captured by stacking defects in the epitaxial layer, thereby reducing the stacking defect energy and causing the stacking defect to expand. Since the expansion of stacking defects can lead to an increase in forward voltage, it is considered a problem.

[0003] In order to suppress the expansion of stacking defects, a technology has been proposed in which protons are irradiated into the epitaxial layer to generate a life time killer, thereby promoting the recombination of injected carriers before they are captured by stacking defects.

[0004] Prior art literature

[0005] Patent Literature

[0006] Patent Document 1: Japanese Patent Application Publication No. 2019-102493 Summary of the invention

[0007] Technical issues to be solved by the invention

[0008] When attempting to suppress the expansion of stacking defects by generating lifetime control bodies, lifetime control bodies need to be generated over a wide range in the depth direction to promote sufficient recombination of carriers. This requires increasing the thickness of the epitaxial layer or irradiating protons over a wide range in the depth direction, which increases manufacturing costs.

[0009] One of the exemplary purposes of one embodiment of the present invention is to provide a technology for suppressing the expansion of stacking defects in a SiC semiconductor device when current is applied.

[0010] Means for solving technical problems

[0011] A method for manufacturing a semiconductor device according to an embodiment of the present invention comprises the steps of: irradiating a semiconductor device comprising a substrate made of silicon carbide and a semiconductor layer of a first conductivity type on a first surface of the substrate with hydrogen ions, thereby forming a semiconductor layer having a hydrogen concentration exceeding 10 over a thickness of 1 μm or more. 15 / cm 3 At least a portion of the high-concentration hydrogen region is formed in the first conductivity type semiconductor layer.

[0012] Another embodiment of the present invention is a semiconductor device. The semiconductor device comprises: a substrate made of silicon carbide; a first conductive type semiconductor layer provided on the substrate; and a high concentration hydrogen region having a thickness of more than 1 μm and a hydrogen concentration of more than 10 15 / cm 3 At least a portion of the high-hydrogen concentration region is formed in the first conductivity type semiconductor layer.

[0013] In addition, any combination of the above-mentioned constituent elements, constituent elements, and expressions of the present invention may be replaced with each other among methods, apparatuses, systems, etc., and may also be effective as embodiments of the present invention.

[0014] Effects of the Invention

[0015] According to one embodiment of the present invention, it is possible to suppress the expansion of stacking defects in a SiC semiconductor device when current is applied. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a cross-sectional view schematically showing a structural example of a semiconductor device according to an embodiment.

[0017] Figure 2 This is a graph showing an example of the hydrogen concentration of a semiconductor device after hydrogen ion irradiation.

[0018] Figure 3 This is a table showing the thickness of the high-hydrogen concentration region and the presence or absence of expansion of stacking defects in Comparative Examples and Examples.

[0019] Figure 4 This is a diagram schematically showing another example of the formation position of the high-concentration hydrogen region.

[0020] Figure 5 It is a cross-sectional view schematically showing the manufacturing process of the semiconductor device.

[0021] Figure 6 It is a cross-sectional view schematically showing the manufacturing process of the semiconductor device.

[0022] Figure 7 It is a cross-sectional view schematically showing the manufacturing process of the semiconductor device.

[0023] Figure 8 It is a cross-sectional view schematically showing the manufacturing process of the semiconductor device.

[0024] Fig. 9 It is a cross-sectional view schematically showing the manufacturing process of the semiconductor device.

[0025] Fig.10 It is a cross-sectional view schematically showing the manufacturing process of the semiconductor device.

[0026] Fig.11 It is a cross-sectional view schematically showing the manufacturing process of the semiconductor device.

[0027] Fig.12 This is a flowchart showing an example of a method for manufacturing a semiconductor device according to an embodiment. DETAILED DESCRIPTION

[0028] Hereinafter, the mode for implementing the present invention will be described in detail. In addition, the structure described below is for illustration only and does not limit the scope of the present invention in any way. Furthermore, in the description of the drawings, the same elements are marked with the same symbols, and repeated descriptions are appropriately omitted. Furthermore, in the drawings referenced in the following description, the size and thickness of each component are set for the convenience of description and do not necessarily represent actual dimensions or ratios.

[0029] The present embodiment is briefly described. The present embodiment relates to a SiC semiconductor device, which includes a substrate made of silicon carbide (SiC) and a first conductive type semiconductor layer provided on a first surface of the substrate. In such a SiC semiconductor device, there is a problem that stacking defects existing near the interface between the substrate and the semiconductor layer expand when current is applied, resulting in an increase in forward voltage.

[0030] In this embodiment, hydrogen ions are irradiated near the interface between the substrate and the semiconductor layer to fix hydrogen in local dislocations surrounding the stacking defect, thereby suppressing the expansion of the stacking defect when current is applied. By fixing hydrogen in local dislocations, it is possible to suppress the injection of carriers from being captured by the stacking defect and reduce the stacking defect energy.

[0031] According to the findings of the present inventors, by irradiating with hydrogen ions, a layer having a hydrogen concentration exceeding 10 15 / cm 3 By forming a high concentration hydrogen region over a thickness of 1 μm or more, a sufficient amount of hydrogen can be fixed in the local dislocations surrounding the stacking defects near the interface between the substrate and the semiconductor layer, thereby effectively suppressing the expansion of the stacking defects.

[0032] Figure 1 1 is a cross-sectional view schematically showing a structural example of a semiconductor device 10 according to an embodiment. The semiconductor device 10 is a SiC semiconductor device, and is a metal oxide semiconductor field effect transistor (MOSFET). The semiconductor device 10 includes a substrate 12, a buffer layer 14, a drift layer 16, a base region 18, a source region 20, a base contact region 22, a gate insulating film 24, a gate electrode 26, an interlayer insulating film 28, a source electrode 30, and a drain electrode 32.

[0033] The substrate 12 is a SiC substrate made of silicon carbide (SiC) of a first conductivity type (e.g., n-type) or a second conductivity type (e.g., p-type). The substrate 12 is, for example, an n-type SiC substrate, and is doped with nitrogen (N) as an n-type impurity. The impurity concentration of the first conductivity type or the second conductivity type of the substrate 12 is 1.0×10 18 / cm 3 Above, for example, 2.0×10 18 / cm 3 Above and 5.0×10 19 / cm 3 The substrate 12 includes a first surface 12a and a second surface 12b opposite to the first surface 12a. The first surface 12a is, for example, a (0001) Si surface.

[0034] The buffer layer 14 is a first conductivity type SiC semiconductor layer epitaxially grown on the first surface 12a of the substrate 12. The buffer layer 14 is, for example, an n-type SiC layer, and is doped with, for example, nitrogen (N) as an n-type impurity. The first conductivity type impurity concentration of the buffer layer 14 is lower than the first conductivity type or second conductivity type impurity concentration of the substrate 12, and higher than the first conductivity type impurity concentration of the drift layer 16. The first conductivity type impurity concentration of the buffer layer 14 is, for example, 1.0×10 16 / cm 3 Above and 1.0×10 18 / cm 3 The thickness of the buffer layer 14 is greater than or equal to 1.0 μm and less than or equal to 5.0 μm, for example, greater than or equal to 1.5 μm and less than or equal to 3.0 μm, for example, 2.0 μm.

[0035] The drift layer 16 is a first conductivity type SiC semiconductor layer epitaxially grown on the buffer layer 14. The drift layer 16 is, for example, an n-type SiC layer, and is doped with, for example, nitrogen (N) as an n-type impurity. The first conductivity type impurity concentration of the drift layer 16 is lower than the first conductivity type impurity concentration of the buffer layer 14. The first conductivity type impurity concentration of the drift layer 16 is, for example, 1.0×10 15 / cm 3 Above and 1.0×10 17 / cm 3 The thickness of the drift layer 16 is greater than that of the buffer layer 14. The thickness of the drift layer 16 is greater than or equal to 5.0 μm and less than or equal to 50 μm, for example, greater than or equal to 7.5 μm and less than or equal to 15 μm, for example, 10 μm.

[0036] The base region 18 is a second conductivity type SiC semiconductor region provided on the drift layer 16. The base region 18 is, for example, p-type and is doped with, for example, aluminum (Al) as a p-type impurity. The base region 18 is formed, for example, by irradiating the drift layer 16 with second conductivity type impurity ions. The second conductivity type impurity concentration of the base region 18 is greater than the first conductivity type impurity concentration of the drift layer 16. The second conductivity type impurity concentration of the base region 18 is, for example, 1.0×10 16 / cm 3 Above and 1.0×10 18 / cm 3 the following.

[0037] The source region 20 is a SiC semiconductor region of the first conductivity type provided on the base region 18. The source region 20 is provided adjacent to the gate insulating film 24. The source region 20 is, for example, of n-type, and is doped with nitrogen (N) as an n-type impurity. The source region 20 is formed, for example, by irradiating the drift layer 16 with impurity ions of the first conductivity type. The impurity concentration of the first conductivity type in the source region 20 is greater than that in the drift layer 16. The impurity concentration of the first conductivity type in the source region 20 is 1.0×10 18 / cm 3 Above, for example, 2.0×10 18 / cm 3 Above and 5.0×10 19 / cm 3 the following.

[0038] The base contact region 22 is a second conductivity type SiC semiconductor region provided on the base region 18. The base contact region 22 is provided away from the gate insulating film 24. The base contact region 22 is, for example, p-type, and is doped with, for example, aluminum (Al) as a p-type impurity. The base contact region 22 is formed, for example, by irradiating the drift layer 16 with impurity ions of the second conductivity type. The second conductivity type impurity concentration of the base contact region 22 is greater than the second conductivity type impurity concentration of the base region 18. The second conductivity type impurity concentration of the base contact region 22 is, for example, 1.0×10 17 / cm 3 Above and 1.0×10 19 / cm 3 the following.

[0039] The gate insulating film 24 is provided on the inner wall surface of the gate trench 34. The gate insulating film 24 is provided adjacent to the drift layer 16, the base region 18, and the source region 20. The gate trench 34 is formed to be dug from the upper surface 20a of the source region 20 toward the substrate 12. The gate trench 34 is formed to penetrate the source region 20 and the base region 18 and reach the upper part of the drift layer 16. The gate insulating film 24 is formed using an oxide material, for example, SiO2.

[0040] The gate electrode 26 is provided so as to fill the inner side of the gate insulating film 24 (gate trench 34). The gate electrode 26 is formed of, for example, polysilicon doped with n-type impurities such as phosphorus (P) and nitrogen (N).

[0041] The interlayer insulating film 28 is provided on the gate insulating film 24 and the gate electrode 26. The interlayer insulating film 28 is formed using any insulating material.

[0042] The source electrode 30 is provided on the source region 20, the base contact region 22 and the interlayer insulating film 28. The source electrode 30 is in contact with the upper surface 20a of the source region 20 and the upper surface 22a of the base contact region 22. The source electrode 30 is formed of a metal material such as chromium (Cr) or nickel (Ni). The source electrode 30 can be formed of a metal multilayer film formed by stacking a plurality of metal layers of different metal materials. The source electrode 30 is a surface metal electrode layer formed on the surface of the semiconductor device 10.

[0043] The drain electrode 32 is provided on the second surface 12b of the substrate 12. The drain electrode 32 is in contact with the second surface 12b of the substrate 12. The drain electrode 32 is formed of a metal material such as chromium (Cr) or nickel (Ni). The drain electrode 32 can be formed of a metal multilayer film formed by stacking a plurality of metal layers of different metal materials. The drain electrode 32 is a back metal electrode layer formed on the back side of the semiconductor device 10.

[0044] In the manufacturing process of the semiconductor device 10, the semiconductor device 10 is irradiated with hydrogen ions to form a layer having a hydrogen concentration exceeding 10 μm over a thickness of 1 μm or more. 15 / cm 3 The high-concentration hydrogen region 40 is formed at least partially in the buffer layer 14 or the drift layer 16 which is a semiconductor layer of the first conductivity type. Figure 1 In the example, the high-concentration hydrogen region 40 is entirely formed in the buffer layer 14 , and the upper end 42 and the lower end 44 of the high-concentration hydrogen region 40 are located in the buffer layer 14 .

[0045] Figure 2 : is a graph showing an example of the hydrogen concentration of the semiconductor device 10 after hydrogen ion irradiation. Figure 2 This means that the energy of hydrogen ion irradiation is set to 960 keV and the dose is set to 1.0×10 13 / cm 2 In the case of Figure 2 In the example, the hydrogen concentration exceeds 10 15 / cm 3 The thickness of the high-concentration hydrogen region 40 is in the range of about 1.9 μm. Figure 2 In the example, the high-concentration hydrogen region 40 has a hydrogen concentration of more than 10 in a thickness range 46 of about 1.1 μm.16 / cm 3 .exist Figure 2 In the example shown in FIG. 1 , the peak value of the hydrogen concentration in the high-concentration hydrogen region 40 is 1.1×10 17 / cm 3 By forming such a high-concentration hydrogen region 40 in the buffer layer 14 , it is possible to suppress the expansion of stacking defects in the semiconductor device 10 when current is applied.

[0046] The presence or absence of stacking defect expansion can be confirmed by X-ray topography or photoluminescence. First, the position of the stacking defect existing in the semiconductor device 10 before current application can be confirmed by X-ray topography or photoluminescence, and whether the stacking defect expands after current application can be observed by X-ray topography or photoluminescence. In addition, instead of generating injected carriers by applying current, carriers can be generated by irradiating ultraviolet light, and the presence or absence of stacking defect expansion can be confirmed.

[0047] Figure 3 This is a table showing the thickness of the high-concentration hydrogen region 40 and the presence or absence of stacking defect expansion in the comparative example and the example. Figure 3 The hydrogen ion dose was 1.0×10 10 / cm 2 ~1.0×10 16 / cm 2 The presence or absence of stacking defect expansion when the thickness of the high-concentration hydrogen region 40 changes within a range of. In Comparative Examples 1 and 2 where the thickness of the high-concentration hydrogen region 40 is less than 1 μm, stacking defect expansion is confirmed. On the other hand, in Examples 1 to 5 where the thickness of the high-concentration hydrogen region 40 is 1 μm or more, stacking defect expansion is not confirmed, so it can be seen that stacking defect expansion can be suppressed.

[0048] In addition, it is believed that even if the dose is higher than 1.0×10 16 / cm 2 However, when the dose is more than 1.0×10 16 / cm 2 This is not preferred from the viewpoint of productivity.

[0049] Figure 4 (a)~ Figure 4 (d) is a diagram schematically showing another example of the formation positions of the high-concentration hydrogen regions 40a to 40d.

[0050] Figure 4The high-concentration hydrogen region 40a shown in (a) is formed throughout the substrate 12 and the buffer layer 14, and is formed across the first surface 12a which is the interface between the substrate 12 and the buffer layer 14. The upper end 42a of the high-concentration hydrogen region 40a is located in the buffer layer 14, and the lower end 44a of the high-concentration hydrogen region 40a is located in the substrate 12. At least a portion of the high-concentration hydrogen region 40a is formed on the substrate 12 and the buffer layer 14.

[0051] Figure 4 The high-concentration hydrogen region 40b shown in (b) is formed over the substrate 12, the buffer layer 14, and the drift layer 16. The high-concentration hydrogen region 40b is formed across the first surface 12a which is the interface between the substrate 12 and the buffer layer 14, and is formed across the interface 36 between the buffer layer 14 and the drift layer 16. The upper end 42b of the high-concentration hydrogen region 40b is located in the drift layer 16, and the lower end 44b of the high-concentration hydrogen region 40b is located in the substrate 12. At least a portion of the high-concentration hydrogen region 40b is formed in the substrate 12, the buffer layer 14, and the drift layer 16.

[0052] Figure 4 The high concentration hydrogen region 40c shown in (c) is formed throughout the buffer layer 14 and the drift layer 16. The high concentration hydrogen region 40c is formed across the interface 36 between the buffer layer 14 and the drift layer 16. The upper end 42c of the high concentration hydrogen region 40c is located in the drift layer 16, and the lower end 44c of the high concentration hydrogen region 40c is located in the buffer layer 14. At least a portion of the high concentration hydrogen region 40b is formed in the buffer layer 14 and the drift layer 16.

[0053] Figure 4 The high-concentration hydrogen region 40 d shown in (d) is formed only in the drift layer 16 . An upper end 42 d and a lower end 44 d of the high-concentration hydrogen region 40 d are located in the drift layer 16 .

[0054] The high-concentration hydrogen regions 40, 40a to 40d are preferably formed at positions close to the first surface 12a of the substrate 12. At least a portion of the high-concentration hydrogen regions 40, 40a to 40d is preferably formed at positions within 5 μm from the first surface 12a of the substrate 12. The upper ends 42, 42a to 42d or the lower ends 44, 44a to 44d of the high-concentration hydrogen regions 40, 40a to 40d are preferably located within 5 μm from the first surface 12a of the substrate 12. The upper ends 42, 42a to 42d or the lower ends 44, 44a to 44d of the high-concentration hydrogen regions 40, 40a to 40d may also be formed at positions within 4 μm, within 3 μm, or within 2 μm from the first surface 12a of the substrate 12.

[0055] The hydrogen concentration of the high-concentration hydrogen regions 40, 40a to 40d may be reduced afterwards by an annealing process included in the manufacturing process of the semiconductor device 10. For example, when the annealing process is performed after the irradiation of hydrogen ions, the hydrogen concentration can be reduced by diffusing hydrogen through the annealing process. In this case, the hydrogen fixed to the local dislocation surrounding the stacking defect remains fixed even after the annealing process. In other words, it can be considered that the hydrogen diffused by the annealing process is not fixed to the local dislocation surrounding the stacking defect and does not contribute to the expansion suppression of the stacking defect. According to this embodiment, even if the hydrogen concentration in the buffer layer 14 or the drift layer 16 when the semiconductor device 10 is completed is 1.0×10 15 / cm 2 In the following, as long as the hydrogen concentration in the buffer layer 14 or the drift layer 16 after hydrogen ion irradiation exceeds 1.0×10 15 / cm 2 , the expansion of stacking defects can be suppressed.

[0056] In addition, if no annealing process is performed after hydrogen ion irradiation, the hydrogen concentration in the buffer layer 14 or the drift layer 16 of the semiconductor device 10 may be maintained at more than 1.0×10 15 / cm 2 In this case, the high-concentration hydrogen regions 40, 40a to 40d can be formed by irradiation with hydrogen ions, so that the expansion of stacking defects can be suppressed.

[0057] Next, a method for manufacturing the semiconductor device 10 will be described. Figures 5 to 11 The diagram is a cross-sectional view schematically showing a manufacturing process of a semiconductor device.

[0058] First, if Figure 5 As shown, a buffer layer 14 is formed on the first surface 12a of the substrate 12, and a drift layer 16 is formed on the buffer layer 14. The buffer layer 14 and the drift layer 16 can be formed using any epitaxial growth method such as chemical vapor deposition (CVD). The growth temperature of the buffer layer 14 and the drift layer 16 is, for example, 1500° C. or higher and 1700° C. or lower.

[0059] Then, if Figure 6 As shown, hydrogen ions 50 are irradiated from above the drift layer 16 to form a high-concentration hydrogen region 40 in the buffer layer 14. The irradiation of hydrogen ions 50 can be performed using any ion irradiation device. For example, a cyclotron type or Van de Graaff type ion irradiation device can be used to irradiate hydrogen ions 50. The hydrogen ions 50 can also be irradiated from the second surface 12b (back surface) of the substrate 12.

[0060] Then, if Figure 7As shown, the second impurity ions 52 that become the second conductive type impurities are irradiated from above the drift layer 16 to form the base region 18 and the base contact region 22. The second impurity ions 52 are, for example, aluminum ions. The base region 18 can be formed by irradiating the entire surface of the drift layer 16 with the second impurity ions 52. The base contact region 22 can be formed by irradiating the second impurity ions 52 in a state where the area other than the area to be the base contact region 22 is shielded.

[0061] Then, if Figure 8 As shown, the first impurity ions 54 of the first conductive type are irradiated from above the drift layer 16 to form the source region 20. The first impurity ions 54 are, for example, nitrogen ions. The source region 20 can be formed by irradiating the first impurity ions 54 while shielding the region other than the source region 20 (for example, the base contact region 22).

[0062] Next, in order to activate the first conductivity type or second conductivity type impurities injected into the base region 18, the source region 20, and the base contact region 22, an annealing treatment is performed at a first temperature. The first temperature is 1500° C. or higher, for example, 1600° C. or higher and 1800° C. or lower. By performing the annealing treatment at the first temperature, the lattice defects formed in the buffer layer 14 by the irradiation of the hydrogen ions 50 can be restored. Furthermore, by performing the annealing treatment at the first temperature, the hydrogen that is not fixed to the local dislocation surrounding the extension defect diffuses, and the hydrogen concentration of the high-concentration hydrogen region 40 can be reduced to 1×10 15 / cm 3 the following.

[0063] Then, if Fig. 9 As shown, the gate trench 34 is formed. For example, the gate trench 34 can be formed by forming a mask outside the region where the gate trench 34 is formed and dry etching the source region 20, the base region 18, and the drift layer 16 in the opening region of the mask.

[0064] Next, a gate insulating film 24 is formed on the inner wall surface of the gate trench 34. The gate insulating film 24 can be formed, for example, by thermally oxidizing the inner wall surface of the gate trench 34 at a temperature of about 700° C. to 1000° C. Next, a gate electrode 26 is formed inside the gate insulating film 24. The gate electrode 26 can be formed using any technique such as CVD.

[0065] Then, if Fig.10As shown, an interlayer insulating film 28 is formed on the source region 20, the base contact region 22, the gate insulating film 24, and the gate electrode 26. The interlayer insulating film 28 can be formed using any technique such as CVD. Next, a drain electrode 32 (back metal electrode layer) is formed on the second surface 12b of the substrate 12. The drain electrode 32 can be formed using any film forming technique such as sputtering or evaporation.

[0066] After the drain electrode 32 is formed, the drain electrode 32 is annealed at a second temperature to make ohmic contact between the drain electrode 32 and the second surface 12b of the substrate 12. The second temperature is 450°C or higher, for example, 600°C or higher and 800°C or lower.

[0067] Then, if Fig.11 As shown in FIG. 1 , a portion of the interlayer insulating film 28 is removed to expose the upper surface 20a of the source region 20 and the upper surface 22a of the base contact region 22. Next, a Figure 1 The source electrode 30 (surface metal electrode layer) shown in FIG. 3 can be formed using any film forming technique such as sputtering or vapor deposition.

[0068] After forming the source electrode 30, the source electrode 30 is annealed at a third temperature to make ohmic contact with the source region 20 and the base contact region 22. The third temperature is 300°C or higher, for example, 350°C or higher and 500°C or lower.

[0069] Through the above process, Figure 1 A semiconductor device 10 is provided.

[0070] Fig.12 1 is a flowchart showing an example of a method for manufacturing a semiconductor device 10 according to an embodiment. First, a semiconductor layer of a first conductivity type (e.g., a buffer layer 14 and a drift layer 16) is formed on the first surface 12a of the substrate 12 (S10). Next, hydrogen ions 50 are irradiated to form a semiconductor layer having a hydrogen concentration exceeding 10 μm over a thickness of 1 μm or more. 15 / cm 3 The high-concentration hydrogen region 40 is formed by irradiating the second conductivity type impurity ions 52 to form the base region 18 and the base contact region 22 (S14), and the first conductivity type impurity ions 54 are irradiated to form the source region 20 (S16).

[0071] Next, the semiconductor device 10 is annealed at a first temperature of 1500° C. or higher (S18), and the impurities in the base region 18, the source region 20, and the base contact region 22 are activated. Next, a gate trench 34 is formed, and a gate insulating film 24 and a gate electrode 26 are formed in the gate trench 34 (S20). Next, an interlayer insulating film 28 is formed on the gate electrode 26 (S22).

[0072] Next, a back metal electrode layer (drain electrode 32) is formed on the second surface 12b of the substrate 12, and annealing is performed at a second temperature of 450°C or higher (S24). Next, a portion of the interlayer insulating film 28 is removed (S26), and a surface metal electrode layer (source electrode 30) is formed on the interlayer insulating film 28, and annealing is performed at a third temperature of 300°C or higher (S28).

[0073] According to this embodiment, by forming a layer having a hydrogen concentration exceeding 10 15 / cm 3 By irradiating the high-concentration hydrogen region 40 with hydrogen ions 50, the expansion of stacking defects can be suppressed. In particular, the stacking defects existing in the buffer layer 14 and the drift layer 16 can be suppressed from expanding upward, and the stacking defects can be suppressed from reaching the base region 18, the source region 20, and the base contact region 22. Thus, the performance degradation of the semiconductor device 10 accompanying power-on use can be suppressed.

[0074] According to the present embodiment, by performing an annealing process at a first temperature of 1500° C. or higher after irradiation with hydrogen ions 50, lattice defects formed in the buffer layer 14, the drift layer 16, etc. due to irradiation with hydrogen ions 50 can be restored. Thus, a reduction in the lifetime of carriers due to lattice defects can be suppressed, and the influence on device characteristics can be suppressed.

[0075] exist Fig.12 In the process of S12 to S16, the order of the steps S12 to S16 can be replaced. For example, the irradiation of hydrogen ions 50 in S12 can be performed after the irradiation of the second impurity ions 52 in S14, or the irradiation of hydrogen ions 50 in S12 can be performed after the irradiation of the first impurity ions 54 in S16. Furthermore, the irradiation of the second impurity ions 52 in S14 can also be performed after the irradiation of the first impurity ions 54 in S16.

[0076] exist Fig.12 In the process of S12, the irradiation of hydrogen ions 50 can be performed after the annealing treatment at the first temperature of S18. In this case, the annealing treatment at the second temperature of S24 can restore the lattice defects caused by the irradiation of hydrogen ions 50. The irradiation step of hydrogen ions 50 in S12 can be performed between S18 and S20, between S20 and S22, or between S22 and S24.

[0077] exist Fig.12In the process of S12, the irradiation of hydrogen ions 50 can be performed after the annealing process at the second temperature of S24. In this case, the irradiation process of hydrogen ions 50 in S12 can be performed between S24 and S26, or between S26 and S28. In this case, since the third temperature of the annealing process in S28 is low, the diffusion of hydrogen injected into the high-concentration hydrogen region 40 is suppressed. In this case, when the semiconductor device 10 is completed, the hydrogen concentration in the high-concentration hydrogen region 40 can also be maintained at more than 1.0×10 15 / cm 2 status.

[0078] exist Fig.12 In the process of S22 to S28, the order of the steps S22 to S28 can be replaced. For example, the formation of the interlayer insulating film 28 of S22 can be performed after the formation of the back metal electrode layer (drain electrode 32) of S24. In addition, the formation step of the back metal electrode layer (drain electrode 32) of S24 can be after the step S26 or after the step S28.

[0079] In the above-mentioned embodiment, the case where the semiconductor device 10 is a MOSFET is shown. In this embodiment, as long as it has a stacked structure of a substrate, a buffer layer, and a drift layer, it can also be applied to SiC semiconductor devices other than MOSFET. For example, the semiconductor device 10 can be a transistor such as a junction field effect transistor (JFET), a bipolar transistor (BJT), an insulated gate bipolar transistor (IGBT), or a diode such as a Schottky barrier diode and a PIN diode.

[0080] The present invention has been described above based on the embodiments. It should be understood by those skilled in the art that the present invention is not limited to the above-mentioned embodiments, and various design changes and modifications are possible, and such modifications are also within the scope of the present invention.

[0081] Industrial Applicability

[0082] According to one embodiment of the present invention, it is possible to suppress the expansion of stacking defects in a SiC semiconductor device when current is applied.

[0083] Explanation of symbols

[0084] 10 - semiconductor device, 12 - substrate, 12a - first surface, 12b - second surface, 14 - buffer layer, 16 - drift layer, 40 - high concentration hydrogen region.

Claims

1. A method for manufacturing a semiconductor device, characterized in that: The method comprises the steps of irradiating a semiconductor device comprising a substrate made of silicon carbide and a semiconductor layer of a first conductivity type on a first surface of the substrate with hydrogen ions, thereby forming a semiconductor layer having a hydrogen concentration exceeding 10 over a thickness of 1 μm or more. 15 / cm 3 The high hydrogen concentration area step, At least a portion of the high-concentration hydrogen region is formed in the first conductivity type semiconductor layer.

2. The method for manufacturing a semiconductor device according to claim 1, wherein: At least a portion of the high-concentration hydrogen region is formed within 5 μm from the first surface.

3. The method for manufacturing a semiconductor device according to claim 1, wherein: The first conductive type semiconductor layer comprises: a buffer layer on the substrate, and a first conductive type drift layer on the buffer layer having an impurity concentration lower than that of the buffer layer; At least a portion of the high-concentration hydrogen region is formed in the buffer layer.

4. The method for manufacturing a semiconductor device according to claim 3, wherein: At least a portion of the high-concentration hydrogen region is formed at an interface between the substrate and the buffer layer.

5. The method for manufacturing a semiconductor device according to claim 1, wherein: The first conductive type semiconductor layer comprises: a buffer layer on the substrate, and a first conductive type drift layer on the buffer layer having an impurity concentration lower than that of the buffer layer; At least a portion of the high-concentration hydrogen region is formed in the drift layer.

6. The method for manufacturing a semiconductor device according to claim 1, wherein: The first conductive type semiconductor layer comprises: a buffer layer on the substrate, and a first conductive type drift layer on the buffer layer having an impurity concentration lower than that of the buffer layer; The high-concentration hydrogen region is formed over the buffer layer and the drift layer.

7. The method for manufacturing a semiconductor device according to any one of claims 1 to 6, characterized in that: The peak value of the hydrogen concentration in the high-concentration hydrogen region is 10 16 / cm 3 above.

8. The method for manufacturing a semiconductor device according to any one of claims 1 to 7, characterized in that: The hydrogen concentration in the high-concentration hydrogen region is 10 20 / cm 3 the following.

9. The method for manufacturing a semiconductor device according to any one of claims 1 to 8, characterized in that: The hydrogen ion dose is 10 12 / cm 2 above.

10. The method for manufacturing a semiconductor device according to claim 9, wherein: The hydrogen ion dose is 10 16 / cm 2 the following.

11. The method for manufacturing a semiconductor device according to any one of claims 1 to 10, characterized in that: The following steps are also included: a step of irradiating the semiconductor layer with ions of impurities of a second conductivity type different from the first conductivity type; and a step of performing annealing at a temperature of 1500° C. or higher in order to activate the second conductivity type impurities; The irradiation with hydrogen ions is performed before the annealing is performed at a temperature of 1500° C. or higher.

12. The method for manufacturing a semiconductor device according to any one of claims 1 to 11, characterized in that: The following steps are also included: forming a metal electrode layer on a second surface of the substrate opposite to the first surface; and The step of annealing the metal electrode layer at a temperature of 450° C. or more and 800° C. or less, The irradiation with hydrogen ions is performed before the annealing is performed at a temperature of 450° C. or higher and 800° C. or lower.

13. A semiconductor device, characterized in that: have: A substrate made of silicon carbide; a semiconductor layer of the first conductivity type disposed on the substrate; and The high concentration hydrogen region has a thickness of more than 1 μm and a hydrogen concentration of more than 10 15 / cm 3 , At least a portion of the high-concentration hydrogen region is formed in the first conductivity type semiconductor layer.

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