Method for producing piezoelectric or semiconductor structure

By performing chemical mechanical polishing and removal of peripheral substances on the surfaces of the donor substrate and acceptor substrate, the problem of edge binding voids in the active layer type structure on the insulator is solved, and the binding quality and the integrity of the multi-layer structure are improved.

CN119488008APending Publication Date: 2025-02-18SOITEC SA
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Patent Information

Application Number
CN202380052110.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2022-07-07
Filing Date
2023-07-07
Publication Date
2025-02-18

AI Technical Summary

Technical Problem

When manufacturing the active layer type structure on the insulator, there are edge binding voids during the bonding process between the donor substrate and the acceptor substrate, which affects the binding quality.

Method used

The surface flatness and binding quality are improved by chemical mechanical polishing on the surfaces of the donor substrate and acceptor substrate and the substance in the peripheral region is removed after polishing.

Benefits of technology

It effectively reduces the gap at the binding interface, improves the binding quality between the donor substrate and the acceptor substrate, and ensures the integrity and performance of the multi-layer structure.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to a method for manufacturing a piezoelectric or semiconductor structure, comprising the following consecutive steps: (a) providing a donor substrate (11) comprising a piezoelectric or semiconductor layer (5), (b) providing a receptor substrate (12), (c) treating a free surface (7) of the donor substrate (11) and / or a free surface (9) of the receptor substrate (12), (d) bonding the donor substrate (11) to the receptor substrate (12), the at least one treated surface (7, 9) is at an interface between the donor substrate (11) and the acceptor substrate (12), and (e) transferring a portion (3) of the piezoelectric or semiconductor layer (5) from the donor substrate (11) to the acceptor substrate (12), treating the free surface (7) of the donor substrate (11) and / or the free surface (9) of the acceptor substrate (12) comprising the following consecutive steps: (c1) chemical mechanical polishing, (c2) removing material from a peripheral region of the polished surface (7, 9).
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Description

Technical Field

[0001] The invention relates to a method for producing a semiconductor or piezoelectric structure. Background Art

[0002] The transfer of active layers, ie layers intended to form a component of an electronic, optical or optoelectronic device, to a carrier substrate by means of an electrically insulating layer is widely used in the microelectronics industry.

[0003] In some cases, the active layer is obtained by thinning the donor substrate by removing material, such as by grinding. In order to improve the surface finish of the active layer before bonding, chemical mechanical polishing (CMP) is usually required.

[0004] This is particularly true for fabricating radio frequency (RF) devices such as resonators or filters on substrates, which comprise, from base to surface, a carrier substrate (usually made of a semiconductor material such as silicon), an electrically insulating layer, and a piezoelectric layer.

[0005] The piezoelectric layer is usually obtained by transferring a thick substrate made of piezoelectric material to a carrier substrate.

[0006] Transfer of the piezoelectric layer requires bonding a thick piezoelectric substrate to a carrier substrate, followed by thinning of the thick piezoelectric substrate to leave only a thin piezoelectric layer on the carrier substrate, the thin piezoelectric layer having the thickness required for fabricating RF devices.

[0007] In order to obtain good adhesion of the piezoelectric substrate to the carrier substrate, a layer of oxide (eg, silicon oxide) is usually formed on each of the two substrates, and the substrates are bonded via the oxide layers.

[0008] The oxide layer formed at the surface of the carrier substrate can be formed by thermal oxidation. For example, if it is a silicon substrate, a silicon oxide layer can be formed. However, thermal oxidation has many disadvantages. It may be incompatible with certain materials, for example, with a charge trapping layer made of polycrystalline silicon. In addition, thermal oxidation produces an oxide layer that is not conducive to good diffusion of, for example, lithium or hydrogen.

[0009] Therefore, depositing the oxide layer by PECVD is generally preferred over thermal oxidation. The oxide layer can then be polished by, for example, chemical mechanical polishing.

[0010] In order to strengthen the oxide-oxide bond between the piezoelectric substrate and the carrier substrate, it is known to perform a consolidation annealing after bonding. The consolidation annealing is usually performed at a temperature between 100°C and 300°C.

[0011] However, since the piezoelectric material and the material of the carrier substrate have very different thermal expansion coefficients, carrying out such an annealing may result in severe deformation of the assembly.

[0012] In order to overcome such problems, it is known to use a pseudo-donor substrate, ie a heterostructure in which a piezoelectric substrate is bonded to a handle substrate.

[0013] The method for manufacturing a pseudo donor substrate generally comprises several steps. Thus, a thick layer made of piezoelectric material is bonded to a handling substrate. Next, the layer made of piezoelectric material is thinned and optionally trimmed. Finally, the free surface of the thinned piezoelectric material layer is polished, for example, in a chemical mechanical polishing (CMP) process, and optionally covered with a thin oxide layer in order to perform the above-mentioned oxide-oxide bonding.

[0014] After bonding the dummy donor substrate and the carrier substrate, the piezoelectric substrate is held between the handling substrate and the carrier substrate. The materials and thicknesses of the handling substrate and the carrier substrate are selected to ensure a certain symmetry of the thermal expansion coefficients, thereby minimizing deformation of the assembly during heat treatment.

[0015] However, when implementing the manufacturing method of such a piezoelectric-on-insulator type structure, the applicant observed defects in the bonding between the pseudo-donor substrate and the carrier substrate in the form of voids, referred to as "edge bonding voids", in which no bonding occurs at the periphery of the substrate. Summary of the invention

[0016] The object of the present invention is to improve the bonding process between a donor substrate and an acceptor substrate during the production of an active-layer-on-insulator type structure, before which the surface to be bonded of the donor substrate and / or the surface to be bonded of the acceptor substrate has been polished.

[0017] To this end, the invention proposes a method for producing a semiconductor or piezoelectric structure, said method comprising the following consecutive steps:

[0018] (a) providing a donor substrate, the donor substrate comprising a semiconductor or a piezoelectric layer,

[0019] (b) providing a receptor substrate,

[0020] (c) treating the free surface of the donor substrate and / or the free surface of the acceptor substrate,

[0021] (d) bonding the donor substrate to the acceptor substrate, the at least one treated surface being at an interface between the donor substrate and the acceptor substrate, and

[0022] (e) transferring a portion of the semiconductor or piezoelectric layer (5) from the donor substrate to the acceptor substrate,

[0023] The step of treating the free surface of the donor substrate and / or the free surface of the acceptor substrate comprises the following consecutive steps:

[0024] (c1) Chemical mechanical polishing,

[0025] (c2) Removing material from the peripheral region of the polished surface.

[0026] Removing material in the peripheral region of the surface to be bonded of one and / or the other of the polished substrates makes it possible to improve the flatness of the surface before bonding, thereby improving the bonding quality.

[0027] According to other features of the present invention, these features are optional and can be implemented individually or in combination when technically feasible:

[0028] - at the end of the step (c1) of chemical mechanical polishing of the donor substrate and / or the acceptor substrate, the polished surface has protrusions at the periphery of the substrate, and therefore a step (c2) of removing material in the peripheral area of ​​the surface is performed in order to flatten the protrusions,

[0029] - the step of removing the peripheral material is performed by milling with an ion beam focused on the area of ​​the periphery of the semiconductor or piezoelectric layer being polished, said ion beam scanning over said periphery,

[0030] - the step of removing the peripheral material is performed after recording the surface topography of the polished surface by profilometry and is performed in such a way that the modified topography after the material removal has only one maximum value, and the maximum value is the point closest to the center of the polished surface of the modified topography,

[0031] the portion of the semiconductor or piezoelectric layer of the donor substrate to be transferred to the acceptor substrate is defined by forming a weakened area prior to step (d) of bonding the donor substrate to the acceptor substrate, so that the step of transferring the portion to the acceptor substrate comprises separating the donor substrate along the weakened area,

[0032] - said weakened area in said donor substrate is formed by implanting hydrogen and / or helium,

[0033] - the donor substrate comprises a piezoelectric layer, the surface of the donor substrate to be treated and bonded is a free surface of the piezoelectric layer, and the portion of the donor substrate to be transferred is a portion of the piezoelectric layer,

[0034] - The step of providing a donor substrate comprises the following consecutive steps:

[0035] (a1) bonding a thick piezoelectric layer to a handling substrate,

[0036] (a2) thinning the thick piezoelectric layer from a side of the thick piezoelectric layer opposite to the handling substrate,

[0037] The chemical mechanical polishing (c1) is performed on the free surface of the thinned piezoelectric layer opposite to the operating substrate,

[0038] - the thickness of the thick piezoelectric layer is between 100 μm and 2 mm, preferably between 200 μm and 1 mm, and the thickness of the thinned and polished piezoelectric layer is between 1 μm and 100 μm, preferably between 5 μm and 50 μm,

[0039] - the step of providing a donor substrate further comprises a step (a3) ​​of removing a peripheral portion of the donor substrate before the chemical mechanical polishing (c1) of the free surface of the thinned piezoelectric layer,

[0040] - the donor substrate comprises a semiconductor layer, the surface of the donor substrate to be processed and bonded is a free surface of the semiconductor layer, and the portion of the donor substrate to be transferred is a portion of the semiconductor layer,

[0041] - the method further comprises the step of forming an oxide layer on the free surface of the semiconductor or piezoelectric layer, so that the step (d) of bonding the donor substrate to the acceptor substrate is performed via the electrically insulating layer,

[0042] - the oxide layer formed at the surface of the polished semiconductor or piezoelectric layer has a thickness between 10 nm and 10 μm, preferably between 30 nm and 5 μm,

[0043] - step (c) comprises a treatment of the free surface of the semiconductor or piezoelectric layer of the donor substrate, and a step of forming an oxide layer on the free surface is performed after the treatment step (c) and before the bonding step (d),

[0044] - step (b) of providing a receptor substrate comprises forming an electrically insulating layer, preferably an oxide layer, the surface of the receptor substrate to be treated and bonded being the free surface of the electrically insulating layer,

[0045] - the electrically insulating layer formed at the surface of the receptor substrate has a thickness between 10 nm and 10 μm, preferably between 30 nm and 5 μm,

[0046] - the electrically insulating layer is formed by plasma enhanced chemical vapor deposition (PECVD),

[0047] - the step of removing substances (c2) is carried out over the entire polished surface of the receptor substrate,

[0048] During the step of removing substance at the surface of the electrically insulating layer, the amount of substance to be locally removed at the surface of the electrically insulating layer is determined based on measurements of the thickness of the electrically insulating layer by ellipsometry and / or reflectometry. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] Other features and advantages of the present invention will be more apparent from the following detailed description with reference to the accompanying drawings, in which:

[0050] - Figure 1 A cross-sectional view of a multilayer structure of the piezoelectric-on-insulator type prepared according to an embodiment of the method of the present invention, the method comprising bonding a donor substrate to a receptor substrate,

[0051] - Figure 2 showing a cross-sectional view of a donor substrate,

[0052] - Figure 3 A cross-sectional view showing the steps of preparing a donor substrate, including the bonding of a thick piezoelectric layer to a handling substrate,

[0053] - Figure 4 A cross-sectional view showing the steps of donor substrate preparation, which includes thinning a thick piezoelectric layer bonded to a handling substrate,

[0054] - Figure 5 shows peripheral protrusions observed on the surface of the thinned piezoelectric layer opposite the handling substrate after an additional chemical mechanical polishing step,

[0055] - Figure 6 A cross-sectional view of a receptor substrate is shown,

[0056] - Figure 7 A cross-sectional view showing the steps of preparing a receptor substrate, including bonding of an electrically insulating layer to a carrier substrate,

[0057] - Figure 8 A cross-sectional view showing the formation of a weakened region in the piezoelectric layer after thinning of the donor substrate,

[0058] - Fig. 9 A cross-sectional view showing the bonding of a donor substrate to an acceptor substrate,

[0059] - Fig.10 A cross-sectional view showing the formation of a weakened region in a thinned piezoelectric layer of a donor substrate, the donor substrate further comprising an oxide layer preformed on a free surface of the thinned piezoelectric layer, the free surface optionally being polished and planarized,

[0060] - Fig.11 A cross-sectional view showing the bonding of a donor substrate to an acceptor substrate, wherein the donor substrate further comprises an oxide layer on the thinned piezoelectric layer on the side opposite the handle substrate.

[0061] For purposes of illustration, the drawings are not necessarily drawn to scale. DETAILED DESCRIPTION

[0062] The invention relates to a method for producing a multilayer assembly, which comprises transferring an active layer from a donor substrate to a receiver substrate.

[0063] In order to improve the quality of the bond between the donor substrate and the acceptor substrate during the transfer, it may be advantageous to subject at least one of the two surfaces forming the bonding interface to chemical mechanical polishing prior to the bonding, if the surfaces are too rough to facilitate good bonding. This is the case, for example, if one of the bonding surfaces has been formed during layer thinning by grinding. Nevertheless, the multilayer structure produced by this method has many voids at its periphery, at its bonding interface, which are detrimental to the quality of the bond between the transferred active layer and the acceptor substrate.

[0064] The inventors have found that during the manufacture of such multilayer structures, when the substrates are bonded, condensed water microdroplets are trapped at the periphery of the substrates at the propagation limit of the bonding wave. The inventors suspect that these condensed water microdroplets are responsible for the visible voids that appear in the final multilayer structure.

[0065] The inventors also found that the free surface of the substrate polished by chemical mechanical polishing has a protrusion in the form of overthickness on its periphery. The inventors believe that it is this peripheral protrusion that traps condensed water at the periphery of the substrate during bonding, thereby generating the voids observed in the final multilayer structure.

[0066] In this respect, the invention relates to a method for manufacturing a multilayer structure, which comprises transferring an active layer from a donor substrate to an acceptor substrate, before the two substrates are bonded, at least one of the two bonding interfaces has been polished, the method also comprising a step of removing peripheral material on at least one of the two polished surfaces.

[0067] A specific embodiment of the present invention is described below, in which Figure 1The piezoelectric-on-insulator multilayer structure 10 shown comprises, in order from its back side to its front side:

[0068] - a carrier substrate 1,

[0069] - an electrically insulating layer 2, preferably an oxide layer,

[0070] - Piezoelectric layer 3.

[0071] For example, the piezoelectric layer 3 is made of materials such as lithium tantalate (LiTaO3), lithium niobate (LiNbO3), barium titanate (BaTiO3) and / or lead zirconate titanate (PZT). The piezoelectric layer 3 has a thickness between 50nm and 20μm, preferably between 100nm and 10μm.

[0072] The electrically insulating layer 2 may include silicon oxide, silicon nitride and / or silicon carbide (SiO x 、SiO x N y 、SiN x 、SiC x 、SiO x C y ), wherein x and y are real numbers between 0 and 2, and / or polymers. The electrically insulating layer has a thickness between 10 nm and 10 μm, preferably between 30 nm and 5 μm.

[0073] Finally, the carrier substrate 1 is a substrate made of, for example, silicon (Si), sapphire, aluminum oxide (Al2O3), aluminum nitride (AlN), glass, quartz, mullite, molybdenum (Mo), tungsten (W), indium phosphide (InP), gallium arsenide (GaAs) and / or silicon carbide (SiC). The carrier substrate 1 has a thickness between 10 μm and 2 mm, preferably between 200 μm and 1 mm.

[0074] Such a piezoelectric-on-insulator type structure 10 is used in the field of radio frequency components and filters.

[0075] In this particular embodiment, the method according to the invention comprises providing a donor substrate 11 comprising a piezoelectric layer 3 to be transferred, providing an acceptor substrate 12 comprising a carrier substrate 1 and an electrically insulating layer 2, and transferring the piezoelectric layer 3 to be transferred from the donor substrate 11 to the acceptor substrate 12, the electrically insulating layer 2 being located at the bonding interface (see Fig. 9 ).

[0076] According to this embodiment, Figure 2 The donor substrate 11 shown is a heterostructure generally referred to as a virtual donor substrate, which comprises, from the back side to the front side:

[0077] - a handle substrate 4,

[0078] - thinning of the piezoelectric layer 5, which will define the piezoelectric layer 3 to be transferred to the receptor substrate 12,

[0079] - Optionally, an electrically insulating layer 6, preferably an oxide layer.

[0080] The piezoelectric material of the piezoelectric layer 3 and the material of the carrier substrate 1 have very different thermal expansion coefficients. If a layer made of piezoelectric material is deposited on a carrier substrate (which has an electrically insulating layer at the interface) without using a handling substrate, the resulting multilayer structure will be exposed to considerable deformations when thermal annealing is performed (for example in order to strengthen the bonding interface between the layer made of piezoelectric material and the carrier substrate).

[0081] Therefore, the handling substrate 4 is made of a material having a thermal expansion coefficient close to that of the carrier substrate 1 to which the piezoelectric layer 3 is intended to be transferred. The term "close" is understood to mean that the difference in thermal expansion coefficient between the material of the handling substrate 4 and the material of the carrier substrate 1 is less than or equal to 5%, preferably equal to or close to 0%. Suitable materials are, for example, silicon, sapphire, polycrystalline aluminum nitride or gallium arsenide. Preferably, the handling substrate 4 is made of the same material as the carrier substrate 1. In the present invention, the thermal expansion coefficient in a plane parallel to the main surface of the substrate is of interest. The handling substrate 4 has a thickness between 100 μm and 2 mm, preferably between 200 μm and 1 mm. Preferably, the thickness of the handling substrate 4 is close to that of the carrier substrate 1, so that the structure obtained after the combination of the donor substrate 11 and the acceptor substrate 12 is as symmetrical as possible and as balanced as possible in terms of mechanical and thermal behavior. The thermal expansion coefficient and thickness of the handling substrate 4, which are close to those of the carrier substrate 1, respectively, make it possible to minimize the stresses on the multilayer structure and its deformation under the effects of temperature fluctuations.

[0082] The electrically insulating layer 6 is, for example, silicon oxide, silicon nitride and / or silicon carbide (SiO x 、SiO x N y 、SiN x 、SiC x 、SiO x C y ) layer, x and y are real numbers between 0 and 2, and / or polymer. The electrically insulating layer 6 has a thickness between 10 nm and 10 μm, preferably between 30 nm and 5 μm.

[0083] Providing a donor substrate and optional treatment of the free surface of the donor substrate

[0084] like Figure 3 As shown, the formation of the donor substrate 11 includes the bonding of the thick piezoelectric layer 8 to the handling substrate 4 .

[0085] The thick piezoelectric layer 8 has a thickness between 100 μm and 2 mm, preferably between 200 μm and 1 mm. The thick piezoelectric layer 8 is formed of a piezoelectric material that constitutes the piezoelectric layer 3 in the final piezoelectric-on-insulator structure 10. Therefore, the thick piezoelectric layer 8 may include LiTaO3, LiNbO3, BaTiO3 and / or PZT.

[0086] The bonding of the thick piezoelectric layer 8 to the handling substrate 4 can be carried out, for example, by means of a photo-polymerizable adhesive layer previously deposited on the exposed surface of the handling substrate 4 or the thick piezoelectric layer 8. The photo-polymerizable adhesive layer can advantageously be deposited by spin coating. The advantage of bonding via a photo-polymerizable adhesive layer is that it involves fewer manufacturing steps than molecular bonding. In addition, the polymer (which is initially liquid) will smooth out planar defects and partially compensate for the lower edges resulting from chamfering of the substrate. Therefore, bonding via a photo-polymerizable adhesive layer makes it possible to bond the substrate closer to its periphery than molecular bonding.

[0087] Alternatively, the bonding of the thick piezoelectric layer 8 to the handling substrate 4 is performed by molecular bonding, bonding by molecular milling under ultra-high vacuum, or metal / metal bonding by hot pressing.

[0088] After the thick piezoelectric layer 8 is combined with the operating substrate 4, the thick piezoelectric layer 8 is thinned from the side opposite to the operating substrate, such as Figure 4 As shown, the piezoelectric layer 5 has a thickness between 1 μm and 100 μm after thinning, and preferably between 5 μm and 50 μm.

[0089] The thinning of the thick piezoelectric layer 8 is performed by, for example, coarse grinding, which can quickly reduce the thickness of the donor substrate 11. Next, finer grinding can be performed to continue reducing the thickness of the donor substrate 11 while reducing the surface roughness of the donor substrate 11.

[0090] Finally, chemical mechanical polishing (CMP) is performed to smooth the free surface 7 of the thinned piezoelectric layer 5 opposite to the handling substrate 4 so as to achieve the roughness required for bonding the dummy donor substrate 11 to the carrier substrate 12, thereby improving the bonding quality.

[0091] Prior to chemical mechanical polishing, the method may also include a trimming step of the piezoelectric layer 8, 5. The trimming step may be implemented before, during (e.g. between two grinding operations of different degrees of fineness) or after the thinning step of the piezoelectric layer 8, 5. Trimming includes removing peripheral material at least over the thickness of the piezoelectric layer 8, 5.

[0092] The thick piezoelectric layer 8 has a peripheral chamfer C (not shown in the figure) on each of its main faces. The purpose of the trimming step is to eliminate the sharp angle generated at the chamfer due to the thinning of the donor substrate 11 and generate a right angle (or obtuse angle) when the thickness e of the piezoelectric layer 5 after thinning is smaller than the thickness of the chamfer C of the piezoelectric layer 5 after thinning. Specifically, such a sharp angle is likely to break during the handling of the donor substrate 11, resulting in peeling, and the fragments contaminate the production line.

[0093] The dressing may be performed with the aid of a grinding wheel (eg a diamond wheel) rotating about the Y-axis, the donor substrate 11 itself being attached to a support rotating about the X-axis, wherein the Y-axis may be parallel or perpendicular to the X-axis.

[0094] Regardless of the technique used, trimming may create defects that chemical mechanical polishing can partially correct.

[0095] Chemical mechanical polishing allows obtaining a free surface 7 of the thinned piezoelectric layer 5 having a roughness compatible with bonding to the receptor substrate 12. However, at the end of this chemical mechanical polishing step, the inventors noticed that the polished surface 7 of the thinned piezoelectric layer 5 has a peripheral relief. Figure 5 1 shows a profilometry analysis of the surface 7. The profilometry analysis is performed with the aid of a probe, the vertical movement of which is recorded during the scanning of the surface 7, in such a way that the topographical profile of the surface along the path taken by the probe is obtained. Thus, the profilometry of the surface 7 can reveal the above-mentioned peripheral protrusions ( Figure 5 ).

[0096] The less flat the topography, the greater the negative impact on binding. Therefore, the method according to the invention comprises removing material in the peripheral region of the surface.

[0097] Preferably, a step of removing material from the peripheral region of the polished surface 7 of the thinned piezoelectric layer 5 is performed in order to flatten the peripheral protrusions formed during the chemical mechanical polishing step. The purpose is to prevent said protrusions from trapping condensed water during bonding to the receptor substrate 12 and to prevent the removal of condensed water from being hindered by bonding wave propagation effects.

[0098] The inventors have observed that the peripheral protrusions can be several micrometers thick and several millimeters wide, and that the size of said protrusions depends on the grinding parameters (such as the rotation speed of the grinder and the grinding plate, the lowering speed and the inclination of the grinder) and the chemical mechanical polishing parameters (such as the pressure distribution applied to the plate, the fluid dynamics of the colloidal slurry used, the relative rotation speed of the polishing head and the platen). In fact, it is difficult to de-correlate the influence of each of these parameters on the characteristics of the resulting peripheral protrusions, so as to identify the parameter values ​​that do not lead to the formation of such protrusions. The removal of the peripheral material according to the invention provides a solution that is independent of the thinning and polishing methods, which makes it possible to eliminate the peripheral protrusions regardless of the grinding parameters and chemical mechanical polishing parameters used.

[0099] The removal of the peripheral material can be performed by milling with an ion beam focused on the peripheral area of ​​the surface 7 of the thinned and polished piezoelectric layer 5, the ion beam scanning over said periphery. When using ion beam milling, it is possible to set a number of parameters, such as beam width, angle of incidence, current (corresponding to the ion current constituting the beam), scanning speed (defining the time for which the surface area is under the beam) and milling speed (corresponding to the speed of material removal), in order to control said removal of the peripheral material very precisely. In fact, it is possible to adjust the milling speed down to very low values ​​(about 10 -3 m 3 / s). The combined control of milling speed and scanning speed can achieve surface topography accuracy within nanometers.

[0100] Ion-beam milling is a technique conventionally used to adjust the thickness of piezoelectric substrates to improve their performance. The present invention proposes to use this technique to correct the topology of the substrate surface and improve its flatness. The advantage of ion beam milling is that the surface topography can be corrected with sufficient accuracy to prevent excessive material from being removed and recesses from being formed. In fact, such recesses will also affect the bonding quality between the donor substrate and the acceptor substrate, because the recesses will increase the width of the peripheral surface of the substrates that are not properly bonded, which is usually formed during the bonding of the two substrates, especially due to the chamfers of the two substrates.

[0101] In practice, the surface topography is first recorded using profilometry. Next, the thickness to be removed is determined so that the modified topography has only one maximum, the zero deviation point, which is the point closest to the center of the substrate ( Figure 5 the rightmost point of the midline).

[0102] Finally, optionally, forming Figure 2The donor substrate 11 shown also comprises a step of forming an electrically insulating layer 6 on the free surface 7 of the thinned piezoelectric layer 5, on the side opposite to the handling substrate 4. In the case where the peripheral portion of said surface 7 is removed after chemical mechanical polishing, the electrically insulating layer 6 is preferably formed on the thinned piezoelectric layer 5, which has been polished and planarized, after these treatments.

[0103] Preferably, the electrically insulating layer 6 is formed by plasma enhanced chemical vapor deposition (PECVD) or physical vapor deposition (PVD).

[0104] According to an alternative embodiment not described in detail herein, the donor substrate comprises a semiconductor layer, the surface of the donor substrate to be processed (chemical mechanical polishing and peripheral material removal) and to be bonded is a free surface of the semiconductor layer, and the transferred portion of the donor substrate is a portion of the semiconductor layer. Also, in this embodiment, laser beam milling ensures that peripheral material is removed with extremely high precision.

[0105] At the same time, according to this embodiment, an oxide layer may be formed on the free surface of the semiconductor layer, which layer may have been previously processed by chemical mechanical polishing to remove peripheral substances.

[0106] According to this embodiment, the method of the invention makes it possible to obtain a multilayer structure of the semiconductor-on-insulator type by transferring the semiconductor layer to a receptor substrate such as the substrate 12 .

[0107] Providing optional treatment of the acceptor substrate and the free surface of the acceptor substrate

[0108] According to the implementation method described in detail herein, Figure 6 The receptor substrate 12 shown includes, from the back side to the front side, the following:

[0109] a carrier substrate, which forms the carrier substrate 1 in the final piezoelectric-on-insulator structure 10,

[0110] An electrically insulating layer, which forms the electrically insulating layer 2 in the final piezoelectric-on-insulator structure 10 .

[0111] Therefore, the carrier substrate 1 is made of a material such as silicon (Si), sapphire, aluminum oxide (Al2O3), aluminum nitride (AlN), glass, quartz, mullite, molybdenum (Mo), tungsten (W), indium phosphide (InP), gallium arsenide (GaAs) and / or silicon carbide (SiC). The carrier substrate 1 has a thickness between 10 μm and 2 mm, preferably between 200 μm and 1 mm.

[0112] The electrically insulating layer 2 comprises, for example, silicon oxide, silicon nitride and / or silicon carbide (SiO x 、SiO x Ny 、SiN x 、SiC x 、SiO x C y ), x and y are real numbers between 0 and 2, and / or polymers. The electrically insulating layer 2 of the acceptor substrate has a thickness between 10 nm and 10 μm, preferably between 30 nm and 5 μm.

[0113] Providing the acceptor substrate 12 comprises forming an electrically insulating layer 2 on the free surface of the carrier substrate 1 so as to obtain the acceptor substrate 12. The electrically insulating layer 2 is preferably formed by plasma enhanced chemical vapor deposition (PECVD). Such deposition is Figure 7 PECVD produces significant non-uniformity and roughness, which is incompatible with good bonding quality. Moreover, even if other deposition methods can provide better results in terms of uniformity and roughness, the free surface of the carrier substrate may also lead to excessive roughness of the electrically insulating layer, for example when the carrier substrate comprises a layer of polysilicon at its surface that has not been planarized.

[0114] Therefore, a chemical-mechanical polishing of the free surface 9 of the electrically insulating layer 2 opposite the carrier substrate 1 is performed.

[0115] Also in this case, the inventors observed that, at the end of polishing, peripheral protrusions are formed on the free surface 9 of the electrically insulating layer 2, said protrusions being up to several hundred nanometers thick and several millimeters wide. The inventors further observed that the variation of these dimensions depends on the parameters used when implementing chemical mechanical polishing, such as the fluid dynamics of the colloidal slurry used, the pressure distribution applied to the plate and the relative rotation speed of the chemical mechanical polishing head and the platen. Therefore, in addition to chemical mechanical polishing, the method according to the invention also includes the removal of substances in the peripheral area.

[0116] Regardless of the parameters used to implement chemical mechanical polishing, the removal of material from the peripheral region of the surface is preferably performed to planarize the protrusions.

[0117] As already mentioned above, the removal of the peripheral material is preferably performed by milling with an ion beam focused on the peripheral area of ​​the polished surface 9 of the electrically insulating layer 2, the ion beam scanning the entire periphery. In practice, for the flattening of the surface 7 of the thinned and polished piezoelectric layer 5, the surface topography of the polished surface 9 of the electrically insulating layer 2 is first recorded by profilometry. Next, the thickness to be removed is determined so that the modified topography has only one maximum, i.e. the zero deviation point, and this point is the point closest to the center of the substrate.

[0118] Optionally, the removal step is performed on the entire polished surface 9 of the acceptor substrate 12 in order to improve the uniformity of the electrically insulating layer 2. In this case, during the step of removing the substance on the surface 9, the amount of substance to be locally removed at the surface 9 of the electrically insulating layer 2 can be determined based on the measurement results of the local thickness of the electrically insulating layer 2 by ellipsometry and / or reflectometry.

[0119] Transferring a portion of the donor substrate to the acceptor substrate

[0120] Next, a portion 3 of the thinned piezoelectric layer 5 of the donor substrate 11 is transferred to the acceptor substrate 12 .

[0121] For example, the transfer may include forming a weakened region in the thinned piezoelectric layer 5 to define the piezoelectric layer 3 to be transferred; bonding the donor substrate 11 and the acceptor substrate 12, with the piezoelectric layer 3 to be transferred located at the bonding interface; and separating the donor substrate 11 along the weakened region.

[0122] according to Figure 8 In the preferred embodiment shown, the weakened region is formed by implanting atomic substances in the thinned piezoelectric layer 5. Figure 8 The implantation of the atomic species is carried out through the free surface 7 of the layer 5 (arrow ). The atomic species are implanted to a predetermined depth, which determines the thickness of the piezoelectric layer 3 to be transferred. The implanted atomic species are preferably hydrogen and / or helium.

[0123] Next, if Fig. 9 As shown, the donor substrate 11 and the acceptor substrate 12 are bonded between the free surface 7 of the thinned piezoelectric layer 5 that has undergone implantation and the free surface 9 of the electrically insulating layer 2 of the acceptor substrate 12, and at least one of the two bonding surfaces 7, 9 has previously undergone the above-mentioned surface treatment, which includes removing peripheral substances after chemical mechanical polishing.

[0124] The bonding of the donor substrate 11 to the acceptor substrate 12 is preferably carried out by molecular adhesion, since it can obtain a mechanically strong and stable bond at a temperature above 400° C. TM Such bonding properties are particularly advantageous when transferring a portion 3 of a thinned piezoelectric layer 5 of a donor substrate 11 to a receptor substrate 12 by a process that includes forming a weakened region by implanting atomic species. TM The process creates defects in the substrate that can be repaired by high temperature thermal annealing. Such bonding properties cannot be achieved by bonding with polymers or by metal / metal bonding. Most polymers completely decompose above 300°C. As for metal / metal bonding, it changes with temperature (increase in grain size) and in most cases leads to deformation of the substrate, not to mention that the diffusion of metal atoms in the layers destroys the electrical properties of the starting stack.

[0125] Molecular bonding requires extremely flat surfaces, as any lack of flatness will prevent intimate contact between the two substrates, resulting in bonding defects and subsequent loss of parts in the transferred surface. Therefore, the present invention provides unique advantages in this embodiment and in any embodiment where molecular adhesion is preferred for bonding between the donor substrate and the acceptor substrate.

[0126] In this embodiment, the inventors did not observe the formation of water droplets at the end of the bonding wave, ie, at the periphery of the substrate, during bonding.

[0127] After bonding, the donor substrate 11 is separated along the weakened area. The separation along the weakened area can be triggered by a mechanical action and / or the supply of thermal energy.

[0128] So you get Figure 1 The final piezoelectric-on-insulator structure 10 shown comprises, from the back side to the front side, a carrier substrate 1 , an electrically insulating layer 2 and a transferred piezoelectric layer 3 .

[0129] In the case where the oxide layer 6 has been formed at the surface of the donor substrate 10, Fig.10 The atomic species implantation shown is performed through the oxide layer 6, and Fig.11 The bonding shown is performed between the free surface 13 of the oxide layer 6 and the free surface 9 of the electrically insulating layer 2 of the acceptor substrate 12, so that the oxide layer 6 is transferred simultaneously with the piezoelectric layer 3 to be transferred. In this embodiment, the electrically insulating layer of the final structure includes the oxide layer 6 formed on the donor substrate 11 before bonding.

[0130] Therefore, the formation of the electrically insulating layer 6 at the surface of the donor substrate 11 advantageously allows oxide-oxide bonding. In the case of bonding by molecular adhesion, the bonding between the two oxide layers can be easily strengthened simply by making the bonding temperature higher than 200° C. In addition, in an atmosphere with a certain humidity, the oxide layer allows the absorption of water naturally present at its surface, so that when the bond is annealed at higher than 200° C., this water is prevented from forming bubbles at the bonding interface, thereby increasing the bonding strength.

[0131] As the above Smart Cut TM As an alternative to the process, the layer transfer can be achieved by thinning the donor substrate starting from the side of the donor substrate opposite to the side bonded to the handling substrate until the desired thickness of the first semiconductor layer is obtained. TM The process is more suitable for transferring layers with a thickness of less than one micron.

[0132] Laser scanning defect detection analysis shows that the final piezoelectric-on-insulator structure 10 has almost no voids between the piezoelectric layer 2 and the electrical insulating layer 3 at its periphery. In particular, when molecular bonding is performed, each particle at the bonding interface generates voids. Since the periphery is more sensitive to the presence of particles, the small amount of voids still detected at the periphery after implementing the method of the present invention cannot be attributed to the water droplets at the end of the bonding wave when the two layers are bonded (these water droplets are not observed in addition), but should be attributed to the particles present at the bonding interface.

[0133] The inventors believe that removing peripheral material from the polished bonding surface makes it possible to eliminate protrusions generated at the edge during the polishing before bonding the surfaces, so that condensed water does not remain at the periphery of the substrate during bonding wave propagation, thereby preventing droplet generation. Since the number of voids in the final structure is greatly reduced, the bonding quality is improved.

[0134] The method according to the invention thus makes it possible to improve the bonding quality between two substrates in a process wherein chemical mechanical polishing of at least one of the two bonding surfaces is necessary prior to said bonding.

Claims

1. A method for manufacturing a semiconductor or piezoelectric structure (10), the method comprising the following consecutive steps: (a) providing a donor substrate (11), said donor substrate comprising a semiconductor or piezoelectric layer (5), (b) providing a receptor substrate (12), (c) treating the free surface (7) of the donor substrate (11) and / or the free surface (9) of the acceptor substrate (12), (d) bonding the donor substrate (11) to the acceptor substrate (12), the at least one treated surface (7, 9) being at the interface between the donor substrate (11) and the acceptor substrate (12), and (e) transferring a portion (3) of the semiconductor or piezoelectric layer (5) from the donor substrate (11) to the acceptor substrate (12), The step of treating the free surface (7) of the donor substrate (11) and / or the free surface (9) of the acceptor substrate (12) comprises the following consecutive steps: (c1) Chemical mechanical polishing, (c2) Removing material from the peripheral region of the polished surface (7, 9).

2. The method according to claim 1, wherein: At the end of the chemical mechanical polishing step (c1) of the donor substrate (11) and / or the acceptor substrate (12), the polished surface (7, 9) has protrusions at the periphery of the substrate (11, 12), so a step (c2) of removing substances in the peripheral area of ​​the surface (7, 9) is performed to flatten the protrusions.

3. The method according to any one of claims 1 and 2, wherein: The step of removing peripheral material is performed by milling using an ion beam focused on an area of ​​the periphery of the polished semiconductor or piezoelectric layer (5), said ion beam scanning across said periphery.

4. The method according to claims 1 to 3, wherein: The step of removing peripheral material is performed after recording the surface topography of the polished surface (7, 9) by profilometry and is performed in such a way that the modified topography after the material removal has only one maximum value, and the maximum value is the point closest to the center of the polished surface (7, 9) of the modified topography.

5. The method according to claim 1, wherein: The portion (3) of the semiconductor or piezoelectric layer (5) of the donor substrate (11) to be transferred to the acceptor substrate (12) is defined by forming a weakened area before the step (d) of bonding the donor substrate (11) to the acceptor substrate (12), so that the step of transferring the portion (3) to the acceptor substrate (12) includes separating the donor substrate (11) along the weakened area.

6. The method according to claim 5, wherein: The weakened region in the donor substrate (11) is formed by implanting hydrogen and / or helium.

7. The method according to claim 1, wherein: The donor substrate (11) comprises a piezoelectric layer (5), the surface of the donor substrate to be processed and bonded is the free surface (7) of the piezoelectric layer (5), and the transferred portion of the donor substrate is a portion (3) of the piezoelectric layer (5).

8. The method according to claim 7, wherein: The step of providing a donor substrate (11) comprises the following consecutive steps: (a1) bonding the thick piezoelectric layer (8) to the handling substrate (4), (a2) thinning the thick piezoelectric layer (8) from the side of the thick piezoelectric layer (8) opposite to the handling substrate (4), The chemical mechanical polishing (c1) is performed on the free surface (7) of the thinned piezoelectric layer (5) opposite to the handling substrate (4).

9. The method according to claim 8, characterized in that The thick piezoelectric layer (8) has a thickness between 100 μm and 2 mm, preferably between 200 μm and 1 mm, and the thinned and polished piezoelectric layer (5) has a thickness between 1 μm and 100 μm, preferably between 5 μm and 50 μm.

10. The method according to any one of claims 8 and 9, wherein: The step of providing a donor substrate (11) further comprises a step (a3) ​​of removing a peripheral portion of the donor substrate (11) prior to the chemical mechanical polishing (c1) of the free surface (7) of the thinned piezoelectric layer (5).

11. The method according to claim 1, wherein: The donor substrate (11) comprises a semiconductor layer, the surface of the donor substrate to be processed and bonded is a free surface of the semiconductor layer, and the transferred portion of the donor substrate is a part of the semiconductor layer.

12. The method according to one of claims 7 to 11, characterized in that The method further comprises the step of forming an electrically insulating layer (6) on the free surface of the semiconductor or piezoelectric layer (5), so that the step (d) of bonding the donor substrate (11) to the acceptor substrate (12) is performed via the electrically insulating layer (6).

13. The method according to claim 12, characterized in that The electrically insulating layer (6) formed at the surface of the polished semiconductor or piezoelectric layer (5) has a thickness between 10 nm and 10 μm, preferably between 30 nm and 5 μm.

14. The method according to any one of claims 12 and 13, wherein: Step (c) comprises processing of the free surface (7) of the semiconductor or piezoelectric layer (5) of the donor substrate (11), and wherein a step of forming an electrically insulating layer (6) on the free surface (7) is performed after the processing step (c) and before the bonding step (d).

15. The method according to one of claims 1 to 14, wherein: The step (b) of providing an acceptor substrate (12) comprises forming an electrically insulating layer (2), which is preferably an oxide layer, and the surface of the acceptor substrate (12) to be treated and bonded is the free surface (9) of the electrically insulating layer (2).

16. The method according to claim 15, characterized in that The electrically insulating layer (2) formed at the surface of the receptor substrate (12) has a thickness between 10 nm and 10 μm, preferably between 30 nm and 5 μm.

17. The method according to any one of claims 15 and 16, wherein: The electrical insulating layer (2) is formed by plasma enhanced chemical vapor deposition (PECVD).

18. The method according to one of claims 15 to 17, wherein: The step (c2) of removing substances is performed on the entire polished surface (9) of the receptor substrate (12).

19. The method according to claim 18, wherein: During the step of removing material at the surface (9) of the electrically insulating layer (2), the amount of material to be locally removed at the surface of the electrically insulating layer (2) is determined based on the measurement results of the thickness of the electrically insulating layer (9) by ellipsometry and / or reflectometry.