Cylinder head, transfer and bonding system including same, and method for driving same

Abstract

A cylinder head, a transfer and bonding system, and a method of driving the same to produce a display device including a light emitting element that provides uniform pressure to the light emitting element during a transfer and bonding process. The cylinder head may include: a first transmissive portion including at least one first air path extending to an air layer; a first holder accommodating the first transmissive portion; a second transmissive portion spaced apart from the first transmissive portion in one direction by the air layer; a second holder accommodating the second transmissive portion; and an elastic member surrounding a side surface of the first bracket and a side surface of the second bracket, where one of the first bracket and the second bracket includes an air path extending to the air layer.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the priority of Korean Patent Application No. 10-2023-0099017 filed in the Korean Intellectual Property Office on July 28, 2023, the entire contents of which are incorporated herein by reference. Technical Field

[0003] Embodiments of the present disclosure relate to a cylinder head, a transfer and coupling system including the same, and a method for driving the same. Background Art

[0004] With the development of information technology, the importance of display devices, which can be a connecting medium between users and information, has emerged. Therefore, the use of display devices such as liquid crystal display devices, organic light emitting display devices, etc. has increased.

[0005] For example, a display panel may be formed by transferring a light emitting element onto a substrate on which a thin film transistor is formed, and a display device including the display panel formed as above may be used.

[0006] As described above, in the process of manufacturing the display panel, a process of bonding the light emitting element may be performed to reduce resistance in a region in which the thin film transistor and the light emitting element may extend. Summary of the invention

[0007] The present disclosure is directed to providing a cylinder head that can provide uniform pressure to a light emitting element during a transfer and bonding process of the light emitting element, a transfer and bonding system including the same, and a method for driving the same.

[0008] An embodiment of the present disclosure provides a cylinder head, which may include: a first transmission part including at least one first air path extending to an air layer; a first bracket accommodating the first transmission part; a second transmission part spaced apart from the first transmission part in a direction by the air layer; a second bracket accommodating the second transmission part; and an elastic member surrounding a side surface of the first bracket and a side surface of the second bracket, wherein one of the first bracket and the second bracket includes a second air path extending to the air layer.

[0009] The elastic member may be stretched in the one direction by the air introduced through the second air path.

[0010] In a case where air is exhausted from the cylinder head through the second air path, the elastic member may contract in the one direction.

[0011] The cylinder head may further include: a first fastening portion configured to surround the elastic member and fix the elastic member to a side surface of the first bracket; and a second fastening portion configured to surround the elastic member and fix the elastic member to a side surface of the second bracket.

[0012] The cylinder head may further include: a first buffer member disposed between the first transmission portion and the first bracket and surrounding a side surface of the first transmission portion; and a second buffer member disposed between the second transmission portion and the second bracket and surrounding a side surface of the second transmission portion.

[0013] The first bracket may include an alignment mark overlapping the first and second transmissive portions.

[0014] The volume of the air layer can vary.

[0015] The at least one first air path may include a plurality of first air paths; and the plurality of first air paths may be arranged in a grid form.

[0016] The second air path may extend to an air pump configured to inject or exhaust air.

[0017] An embodiment of the present disclosure may provide a transfer and combination system, which may include: a cylinder head; an imaging device configured to obtain an image in one direction; and a heat source configured to apply heat to the cylinder head, wherein the cylinder head may include: a first transmission part including a first air path extending to an air layer; a first bracket accommodating the first transmission part; a second transmission part spaced apart from the first transmission part by the air layer in the one direction; a second bracket accommodating the second transmission part; and an elastic member surrounding a side surface of the first bracket and a side surface of the second bracket, and wherein one of the first bracket and the second bracket includes a second air path extending to the air layer.

[0018] The transfer and bonding system may further include: a transfer substrate including a carrier substrate; and a plurality of light emitting elements coupled to the carrier substrate, wherein the carrier substrate may be in contact with the first transmission portion.

[0019] The transfer and bonding system may further include a thin film transistor substrate including a thin film transistor layer, wherein the position of the cylinder head may be adjusted based on the obtained image of the pattern of the thin film transistor substrate.

[0020] The first bracket may include an alignment mark overlapping the first transmissive portion and the second transmissive portion, and wherein the position of the cylinder head may be adjusted based on the image of the alignment mark obtained by the imaging device.

[0021] In a case where air is discharged from the second air path to the outside, the carrier substrate may be coupled to the cylinder head, and in a case where air is introduced into the second air path from the outside, the carrier substrate may be separated from the cylinder head.

[0022] The heat source may irradiate laser light onto the first transmission portion and the second transmission portion.

[0023] An embodiment of the present disclosure provides a driving method, including: providing a cylinder head, the cylinder head may include: a first transmission portion including a first air path extending to an air layer; a first bracket accommodating the first transmission portion; a second transmission portion spaced apart from the first transmission portion in a direction by the air layer; a second bracket accommodating the second transmission portion; and an elastic member surrounding a side surface of the first bracket and a side surface of the second bracket, and one of the first bracket and the second bracket may include a second air path extending to the air layer; providing a transfer substrate including a carrier substrate coupled to a plurality of light emitting elements; providing a thin film transistor substrate including a thin film transistor layer; moving the cylinder head toward the transfer substrate; discharging air from the cylinder head through the second air path to couple the transfer substrate to the first transmission portion of the cylinder head; moving the cylinder head coupled to the transfer substrate toward the thin film transistor substrate; injecting air into the cylinder head through the second air path to press the first transmission portion of the cylinder head against the transfer substrate; discharging air from the cylinder head through the second air path to couple the carrier substrate to the first transmission portion of the cylinder head; and injecting air into the cylinder head via the second air path to separate the carrier substrate from the first transmission portion of the cylinder head.

[0024] Moving the cylinder head coupled to the transfer substrate toward the thin film transistor substrate may include: obtaining an image of the thin film transistor substrate; detecting a pattern in the thin film transistor substrate from the image; and adjusting a position of the cylinder head based on the detected pattern.

[0025] Moving the cylinder head coupled to the transfer substrate toward the thin film transistor substrate may include: obtaining an image of an alignment mark of the cylinder head; and adjusting a position of the cylinder head based on the image.

[0026] The plurality of light emitting elements may be micro light emitting diodes.

[0027] Injecting air into the cylinder head to press the first transmission portion of the cylinder head against the transfer substrate may include irradiating the thin film transistor substrate with laser light transmitted through the first transmission portion and the second transmission portion. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The above and other aspects, features and advantageous effects of certain embodiments of the present disclosure will become more apparent from the following description in conjunction with the accompanying drawings, in which:

[0029] Figure 1shows a top plan view of a display device according to an embodiment of the present disclosure;

[0030] Figure 2 Shows Figure 1 An example of a pixel of ;

[0031] Figure 3 Shows Figure 1 Another example of a pixel of;

[0032] Figure 4 Shown along Figure 3 A schematic cross-sectional view of an example of a display device taken along line AA';

[0033] Figure 5 A perspective view showing a tiled display device including a plurality of display devices according to an embodiment of the present disclosure;

[0034] Figure 6 Shown in detail Figure 5 An enlarged schematic diagram of area AR1;

[0035] Figure 7 Shown along Figure 6 A schematic cross-sectional view of an example of a tiled display device taken along line BB';

[0036] Figure 8 Shown in detail Figure 5 An enlarged schematic diagram of area AR2;

[0037] Fig. 9 Shown along Figure 8 A schematic cross-sectional view of an example of a tiled display device taken along line FF';

[0038] Fig.10 A schematic block diagram of a tiled display device according to an embodiment of the present disclosure is shown;

[0039] Fig.11 The transfer process of the light emitting element is schematically shown;

[0040] Fig.12 An example of a backplane substrate to which a light emitting element is transferred is shown;

[0041] Fig.13 shows a perspective view of a cylinder head according to an embodiment of the present disclosure;

[0042] Fig.14 Shows a cross section taken along line XX' Fig.13 A schematic cross-sectional view of a cylinder head;

[0043] Fig.15A Shows the air from Fig.13The state of cylinder head emission is taken as an example;

[0044] Fig. 15B shows the air injected into Fig.13 The state in the cylinder head is taken as an example;

[0045] Fig.16 Shows Fig.13 A top view of a cylinder head; and

[0046] Figures 17 to 26 Methods for driving the transfer and bonding systems according to embodiments of the present disclosure are respectively shown. DETAILED DESCRIPTION

[0047] In the following description, for the purpose of illustration, many specific details are set forth in order to provide a thorough understanding of various embodiments or implementations of the present invention. As used herein, "embodiment" and "implementation" are interchangeable words, which are non-limiting examples of the devices or methods disclosed herein. However, it is apparent that various embodiments may be practiced without these specific details or with one or more equivalent arrangements. Here, various embodiments do not have to be exclusive, nor do they limit the present disclosure. For example, the specific shape, configuration, and characteristics of an embodiment may be used or implemented in another embodiment.

[0048] Unless otherwise specified, the embodiments shown will be understood to provide features of the present invention. Therefore, unless otherwise specified, the features, components, modules, layers, films, panels, regions and / or aspects of various embodiments (hereinafter, individually or collectively referred to as "elements") may be combined, separated, interchanged and / or rearranged without departing from the concept of the present invention.

[0049] The use of cross hatching and / or shading in the drawings is generally to make the boundaries between adjacent elements clear. Therefore, unless otherwise specified, the presence or absence of cross hatching or shading does not convey or indicate any preference or requirement for a particular material, material property, size, ratio, commonality between illustrated elements and / or any other characteristics, attributes, properties, etc. of the elements. In addition, in the drawings, the size and relative size of the elements may be exaggerated for the purpose of clarity and / or description. When the embodiments can be implemented differently, the specific processing sequence may be performed differently from the described sequence. For example, two processes described in succession may be performed substantially simultaneously, or in an order opposite to the described order. In addition, the same figure marks and / or reference numerals represent the same elements.

[0050] When an element or layer is referred to as being "on", "connected to" or "coupled to" another element or layer, it may be directly on, directly connected to or coupled to another element or layer, or there may be intervening elements or layers. However, when an element or layer is referred to as being "directly on" another element or layer, "directly connected to" or "directly coupled to" another element or layer, there are no intervening elements or layers. For this reason, the term "connected" may refer to a physical connection, an electrical connection and / or a fluid connection with or without the presence of an intervening element. In addition, the first direction DR1, the second direction DR2 and the third direction DR3 are not limited to the three axes of a rectangular coordinate system (such as, the x-axis, the y-axis and the z-axis), and may be interpreted in a broader sense. For example, the first direction DR1, the second direction DR2 and the third direction DR3 may be perpendicular to each other, or may represent different directions that are not perpendicular to each other.

[0051] For the purpose of this disclosure, "at least one of A and B" may be interpreted as only A, only B, or any combination of A and B. In addition, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" may be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0052] Although the terms "first", "second", etc. can be used in this article to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another element. Therefore, without departing from the teachings of the present disclosure, the first element discussed below can be referred to as the second element.

[0053] Spatially relative terms such as "beneath," "below," "under," "lower," "above," "upper," "over," "higher," "side" (e.g., as in "sidewall"), and the like may be used herein for descriptive purposes, and thereby to describe the relationship of one element to another element(s) as shown in the accompanying drawings. Spatially relative terms are intended to encompass different orientations of the device in use, operation, and / or manufacture in addition to the orientation depicted in the accompanying drawings. For example, if the device in the accompanying drawings is turned over, elements described as being "below" or "beneath" other elements or features would then be oriented to be "above" the other elements or features. Thus, the term "below" may encompass both above and below orientations. Furthermore, the device may be otherwise oriented (e.g., rotated 90 degrees or at other orientations), and the spatially relative descriptors used herein should be interpreted accordingly.

[0054] The terms used herein are for the purpose of describing a particular embodiment, rather than being intended to be limiting. Unless the context clearly indicates otherwise, as used herein, the singular forms "one", "an" and "the" are intended to also include plural forms. In addition, when used in this specification, the terms "comprise", "comprises", "includes" and / or "includes" represent the existence of stated features, integral bodies, steps, operations, elements, parts and / or its groups, but do not exclude the existence or addition of one or more other features, integral bodies, steps, operations, elements, parts and / or its groups. It should also be noted that, as used herein, the terms "substantially", "about" and other similar terms are used as approximate terms and not as degree terms, and are therefore used to allow for the inherent deviations in the measured values, calculated values ​​and / or provided values ​​that will be recognized by those of ordinary skill in the art.

[0055] Various embodiments are described herein with reference to cross-sectional views and / or exploded views, which are schematic representations of embodiments and / or intermediate structures. Therefore, deviations from the illustrated shapes due to, for example, manufacturing techniques and / or tolerances are expected. Therefore, the embodiments disclosed herein should not necessarily be construed as limited to the specific illustrated shapes of the regions, but rather will include deviations in shape due to, for example, manufacturing. In this manner, the regions shown in the drawings may be schematic in nature, and the shapes of these regions may not reflect the actual shapes of the regions of the device, and therefore are not necessarily intended to be limiting.

[0056] According to the convention in the art, for functional blocks, parts and / or modules, some embodiments are described and shown in the drawings. It will be understood by those skilled in the art that these blocks, parts and / or modules are physically implemented by electronic (or optical) circuits (such as logic circuits, discrete components, microprocessors, hard-wired circuits, memory elements, wiring connections, etc.) that can be formed using semiconductor-based preparation technology or other manufacturing technology. In the case where blocks, parts and / or modules are implemented by microprocessors or other similar hardware, software (e.g., microcode) can be used to program and control the blocks, parts and / or modules to perform various functions discussed herein, and optionally, they can be driven by firmware and / or software. It is also considered that each block, part and / or module can be implemented by dedicated hardware, or implemented as a combination of dedicated hardware that performs some functions and processors (e.g., one or more programmed microprocessors and related circuits) that perform other functions. In addition, without departing from the scope of the inventive concept, each block, part and / or module of some embodiments can be physically divided into two or more interactive and discrete blocks, parts and / or modules. Furthermore, without departing from the scope of the inventive concept, the blocks, parts and / or modules of some embodiments may be physically combined into more complex blocks, parts and / or modules.

[0057] Unless otherwise defined or implied herein, all terms (including technical and scientific terms) used herein have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. It will also be understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology and the present disclosure, and should not be interpreted in an idealized or overly formal sense, unless explicitly so defined herein.

[0058] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0059] Figure 1 A top plan view of a display device 10 according to an embodiment of the present disclosure is shown.

[0060] Figure 2 Shows Figure 1 An example of a pixel PX. Figure 3 Shows Figure 1 Another example of a pixel PX.

[0061] refer to Figure 1The display device 10 may be a device for displaying moving images or still images, and may be used as a display screen for portable electronic devices such as mobile phones, smart phones, tablet personal computers (PCs), smart watches, watch phones, mobile communication terminals, electronic notes, electronic books, portable multimedia players (PMPs), navigation devices, and ultra mobile PCs (UMPCs), and may be used as display screens for various products such as televisions, laptop computers, monitors, billboards, and Internet of Things (IOT) devices.

[0062] The display panel 100 may be formed as an approximately flat surface in a rectangular shape having a long side in a first direction DR1 and a short side in a second direction DR2 intersecting the first direction DR1. The corner where the long side in the first direction DR1 and the short side in the second direction DR2 intersect may be rounded to have a curvature (e.g., a predetermined or selectable curvature), or may be formed to have a right angle. The approximately flat shape of the display panel 100 may not be limited to a quadrilateral shape, and may be formed to have another polygonal shape, a circular shape, or an elliptical shape. The display panel 100 may be formed to be approximately flat, but may not be limited thereto. For example, the display panel 100 may include a curved portion that may be formed at the left and right ends and has a constant curvature or a variable curvature. The display panel 100 may be flexibly formed to be bent, curved, folded, or curled.

[0063] The display panel 100 may further include pixels PX, scan lines extending in a first direction DR1, and data lines extending in a second direction DR2 to display an image. The pixels PX may be arranged in a matrix form in the first direction DR1 and the second direction DR2. The first direction DR1 and the second direction DR2 may be directions orthogonal to each other (e.g., an x-axis in a horizontal direction and a y-axis in a vertical direction), but may not be limited thereto.

[0064] The pixel PX can be Figure 2 and Figure 3 As shown in FIG. 1 , a plurality of sub-pixels SPX1 , SPX2 , and SPX3 are included. Figure 2 and Figure 3 It is shown that the pixel PX includes three sub-pixels SPX1 , SPX2 , and SPX3 , ie, a first sub-pixel SPX1 , a second sub-pixel SPX2 , and a third sub-pixel SPX3 , but embodiments of the present disclosure may not be limited thereto.

[0065] Each of the first subpixel SPX1 , the second subpixel SPX2 , and the third subpixel SPX3 may be electrically connected to one of the plurality of data lines, and may be electrically connected to at least one of the plurality of scan lines.

[0066] Each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 may have a rectangular planar shape, a square planar shape, or a diamond planar shape. Figure 2 , and has a rectangular planar shape having short sides in the first direction DR1 and long sides in the second direction DR2. Each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 may have a square planar shape or a diamond planar shape having sides having the same length, for example, as shown in FIG. Figure 3 The schematic diagram shown in FIG. 5 has a square plan shape including sides having the same length in the first direction DR1 and the second direction DR2.

[0067] like Figure 2 As shown in FIG. 1 , the first sub-pixel SPX1 , the second sub-pixel SPX2 , and the third sub-pixel SPX3 may be arranged in the first direction DR1 .

[0068] One of the second subpixel SPX2 and the third subpixel SPX3 and the first subpixel SPX1 may be arranged in the first direction DR1, and the other of the second subpixel SPX2 and the third subpixel SPX3 and the first subpixel SPX1 may be arranged in the second direction DR2. Figure 3 As shown in , the first sub-pixel SPX1 and the second sub-pixel SPX2 may be arranged in the first direction DR1, and the first sub-pixel SPX1 and the third sub-pixel SPX3 may be arranged in the second direction DR2. One of the first sub-pixel SPX1 and the third sub-pixel SPX3 and the second sub-pixel SPX2 may be arranged in the first direction DR1, and the other of the first sub-pixel SPX1 and the third sub-pixel SPX3 and the second sub-pixel SPX2 may be arranged in the second direction DR2. One of the first sub-pixel SPX1 and the second sub-pixel SPX2 and the third sub-pixel SPX3 may be arranged in the first direction DR1, and the other of the first sub-pixel SPX1 and the second sub-pixel SPX2 and the third sub-pixel SPX3 may be arranged in the second direction DR2.

[0069] The first subpixel SPX1 may emit a first light, the second subpixel SPX2 may emit a second light, and the third subpixel SPX3 may emit a third light. Here, the first light may be light of a red wavelength band, the second light may be light of a green wavelength band, and the third light may be light of a blue wavelength band. The red wavelength band may be a wavelength band of about 600nm (nanometers) to 750nm, the green wavelength band may be a wavelength band of about 480nm to 560nm, and the blue wavelength band may be a wavelength band of about 370nm to 460nm, but the embodiments of the present disclosure may not be limited thereto.

[0070] Each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 may be a light-emitting element that emits light, and may include an inorganic light-emitting element including an inorganic semiconductor. For example, the inorganic light-emitting element may be a flip-chip type micro light-emitting diode (micro-LED; hereinafter, also referred to as micro-LED), but the embodiments of the present disclosure may not be limited thereto.

[0071] like Figure 2 and Figure 3 As shown in , the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 may have substantially the same area, but the embodiments of the present disclosure may not be limited thereto. At least one of the area of ​​the first sub-pixel SPX1, the area of ​​the second sub-pixel SPX2, and the area of ​​the third sub-pixel SPX3 may be different from another one thereof. Two of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 may have substantially the same area, and another one thereof may be different from the two. The first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 may have different areas from each other.

[0072] Figure 4 Shown along Figure 3 A schematic cross-sectional view of an example of a display device taken along line AA′.

[0073] refer to Figure 4 The thin film transistor layer TFTL may be disposed on the substrate SUB. The thin film transistor layer TFTL may be a layer in which the thin film transistor TFT may be formed.

[0074] The thin film transistor layer TFTL may include an active layer ACT, a first gate layer GTL1, a second gate layer GTL2, a first data metal layer DTL1, and a second data metal layer DTL2. The thin film transistor layer TFTL may include a buffer film BF, a first gate insulating film 131, a second gate insulating film 132, an interlayer insulating film 140, a first planarizing film 160, a first insulating film 161, a second planarizing film 170, a second insulating film 171, and the like.

[0075] The substrate SUB may be used to support the display device 10 (see Figure 1 ). The substrate SUB may be a rigid substrate made of a glass material. The substrate SUB may be a flexible substrate that is bendable, foldable, or rollable. The substrate SUB may include an insulating material such as a polymer resin such as polyimide (PI).

[0076] The buffer film BF may be provided on the surface of the substrate SUB. The buffer film BF may be a film for preventing air or moisture from penetrating. The buffer film BF may be formed of a plurality of inorganic films that may be alternately stacked with each other. For example, the buffer film BF may be formed as a multi-film in which at least one inorganic film of a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, and an aluminum oxide layer may be alternately stacked with each other. The buffer film BF may be omitted.

[0077] The active layer ACT may be disposed on the buffer film BF. The active layer ACT may include a silicon semiconductor such as polycrystalline silicon, single crystal silicon, low temperature polycrystalline silicon, and amorphous silicon, or may include an oxide semiconductor.

[0078] The active layer ACT may include a channel TCH, a first electrode TS, and a second electrode TD of the thin film transistor TFT. The channel TCH of the thin film transistor TFT may be a region overlapping with the gate electrode TG of the thin film transistor TFT in a third direction DR3 (which may be a thickness direction of the substrate SUB). The first electrode TS of the thin film transistor TFT may be disposed at one side of the channel TCH, and the second electrode TD may be disposed at the other side of the channel TCH. The first electrode TS and the second electrode TD of the thin film transistor TFT may be a region not overlapping with the gate electrode TG in the third direction DR3. The first electrode TS and the second electrode TD of the thin film transistor TFT may be a region in which a semiconductor (e.g., a silicon semiconductor, an oxide semiconductor, etc.) may be doped with ions to have conductivity.

[0079] The first gate insulating film 131 may be disposed on the active layer ACT. The first gate insulating film 131 may be formed as an inorganic film, for example, a silicon nitride layer, a silicon nitride oxide layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0080] The first gate layer GTL1 may be disposed on the first gate insulating film 131. The first gate layer GTL1 may include a gate electrode TG and a first capacitor electrode CAE1 of a capacitor Cst. The first gate layer GTL1 may be formed as a single layer or a multilayer that may be made of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

[0081] The second gate insulating film 132 may be disposed on the first gate layer GTL1. The second gate insulating film 132 may be formed as an inorganic film, for example, a silicon nitride layer, a silicon nitride oxide layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0082] The second gate layer GTL2 may be disposed on the second gate insulating film 132. The second gate layer GTL2 may include a second capacitor electrode CAE2. The second gate layer GTL2 may be formed as a single layer or a multilayer that may be made of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

[0083] The interlayer insulating film 140 may be disposed on the second gate layer GTL2. The interlayer insulating film 140 may be formed as an inorganic film, for example, a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0084] The first data metal layer DTL1 including the first link electrode CE1 may be disposed on the interlayer insulating film 140. The first data metal layer DTL1 may be formed as a single layer or multiple layers, which may be made of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

[0085] The first connection electrode CE1 may be connected (eg, electrically connected) to the active layer ACT (eg, the second electrode TD) through a first contact hole CT1 penetrating the first gate insulating film 131 , the second gate insulating film 132 , and the interlayer insulating film 140 .

[0086] The first planarization film 160 may be formed on the first data metal layer DTL1 to planarize steps caused by the active layer ACT, the first gate layer GTL1, the second gate layer GTL2, and the first data metal layer DTL1. The first planarization film 160 may be formed as an organic film including acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, etc.

[0087] The first insulating film 161 may be disposed on the first planarization film 160. The first insulating film 161 may be formed as an inorganic film, for example, a silicon nitride layer, a silicon nitride oxide layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0088] The second data metal layer DTL2 may be formed on the first insulating film 161. The second data metal layer DTL2 may include a second connection electrode CE2 and a first power wiring VSL. The second connection electrode CE2 may be electrically connected to the first connection electrode CE1 through a second contact hole CT2 penetrating the first insulating film 161 and the first planarizing film 160. The second data metal layer DTL2 may be formed as a single layer or a multilayer that may be made of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

[0089] The second planarization film 170 may be formed on the second data metal layer DTL2 to planarize the step. The second planarization film 170 may be formed as an organic film including acrylic resin, epoxy resin, phenol resin, polyamide resin, polyimide resin, or the like.

[0090] The second insulating film 171 may be disposed on the second planarization film 170. The second insulating film 171 may be formed as an inorganic film, for example, a silicon nitride layer, a silicon nitride oxide layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0091] The light emitting element layer EML may be disposed on the second insulating film 171. The light emitting element layer EML includes a pixel electrode PXE, a common electrode CE, and a light emitting element LE. The third data metal layer DTL3 may include a pixel electrode PXE and a common electrode CE. Each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 described above includes a light emitting element LE electrically connected to the pixel electrode PXE and the common electrode CE. The pixel electrode PXE may be one of an anode electrode and a cathode electrode of the light emitting element LE (for example, may be an anode electrode). The common electrode CE may be the other of an anode electrode and a cathode electrode of the light emitting element LE (for example, may be a cathode electrode).

[0092] The pixel electrode PXE and the common electrode CE may be disposed on the second insulating film 171. The pixel electrode PXE may be connected (e.g., electrically connected) to the second connection electrode CE2 through a third contact hole CT3 penetrating the second insulating film 171 and the second planarizing film 170. Therefore, the pixel electrode PXE may be electrically connected to the first electrode TS or the second electrode TD of the thin film transistor TFT through the first connection electrode CE1 and the second connection electrode CE2. Therefore, a pixel voltage or an anode voltage controlled by the thin film transistor TFT may be applied to the pixel electrode PXE.

[0093] The common electrode CE may be electrically connected to the first power wiring VSL through the fourth contact hole CT4 penetrating the second insulating film 171 and the second planarization film 170. Therefore, the first power voltage of the first power wiring VSL may be applied to the common electrode CE.

[0094] The pixel electrode PXE and the common electrode CE may include a metal material having high reflectivity such as a stack structure (Ti / Al / Ti) of aluminum (Al) and titanium (Ti), a stack structure (ITO / Al / ITO) of aluminum and indium tin oxide (ITO), an Ag-Pd-Cu (APC) alloy, and a stack structure (ITO / APC / ITO) of an APC alloy and ITO. The APC alloy may be an alloy of silver (Ag), palladium (Pd), and copper (Cu).

[0095] Figure 4It is shown that the light emitting element LE may be a flip chip type micro LED in which the first contact electrode CTE1 and the second contact electrode CTE2 may be arranged to face the pixel electrode PXE and the common electrode CE. The light emitting element LE may include an inorganic material such as gallium nitride (GaN). The length of the light emitting element LE in the first direction DR1, the length in the second direction DR2, and the length in the third direction DR3 may be several micrometers to hundreds of micrometers (μm), respectively. For example, the length of the light emitting element LE in the first direction DR1, the length in the second direction DR2, and the length in the third direction DR3 may be about 100 μm or less, respectively.

[0096] The light emitting element LE may be grown and formed on a semiconductor substrate such as a silicon wafer. The light emitting element LE may be transferred (e.g., directly transferred) from the silicon wafer to the pixel electrode PXE and the common electrode CE of the substrate SUB. The light emitting element LE may be transferred to the pixel electrode PXE and the common electrode CE of the substrate SUB by an electrostatic method using an electrostatic head or a stamp method using an elastic polymer material such as polydimethylsiloxane (PDMS) or silicone as a carrier substrate.

[0097] refer to Figure 4 , each of the light emitting elements LE may be a light emitting structure including a base substrate SPUB, an n-type semiconductor NSEM, an active layer MQW, a p-type semiconductor PSEM, a first contact electrode CTE1 and a second contact electrode CTE2.

[0098] The base substrate SPUB may be, for example, a sapphire substrate, but embodiments of the present disclosure may not be limited thereto.

[0099] The n-type semiconductor NSEM may be disposed on the surface of the base substrate SPUB. For example, the n-type semiconductor NSEM may be disposed on the lower surface of the base substrate SPUB (for example, the lower surface disposed in the opposite direction of the third direction DR3). The n-type semiconductor NSEM may be made of, for example, gallium nitride (GaN) doped with an n-type conductive dopant such as silicon (Si), germanium (Ge), selenium (Se), tellurium (Te), or tin (Sn).

[0100] The active layer MQW may be disposed on a portion of the surface of the n-type semiconductor NSEM. The active layer MQW may include a material having a single quantum well structure or a multiple quantum well structure. In the case where the active layer MQW includes a material having a multiple quantum well structure, a plurality of well layers and barrier layers may be alternately stacked with each other. The well layer may be formed of InGaN, and the barrier layer may be formed of GaN or AlGaN, but may not be limited thereto. The active layer MQW may be in a structure in which a semiconductor material having a large energy band gap and a semiconductor material having a small energy band gap may be alternately stacked with each other, or may include Group III to Group V semiconductor materials according to the wavelength band of the emitted light.

[0101] The p-type semiconductor PSEM may be disposed on a surface of the active layer MQW (e.g., a surface disposed in the opposite direction of the third direction DR3). The p-type semiconductor PSEM may be made of, for example, gallium nitride (GaN) doped with a p-type conductive dopant such as magnesium (Mg), zinc (Zn), calcium (Ca), barium (Ba), etc.

[0102] The first contact electrode CTE1 may be disposed on the p-type semiconductor PSEM (e.g., disposed on the p-type semiconductor PSEM in the opposite direction of the third direction DR3), and the second contact electrode CTE2 may be disposed on another portion of the surface of the n-type semiconductor NSEM (e.g., disposed on another portion of the surface of the n-type semiconductor NSEM in the opposite direction of the third direction DR3). Another portion of the surface of the n-type semiconductor NSEM on which the second contact electrode CTE2 may be disposed may be disposed to be spaced apart from a portion of the surface of the n-type semiconductor NSEM on which the active layer MQW may be disposed.

[0103] The first contact electrode CTE1 and the pixel electrode PXE may be bonded to each other through a conductive adhesive member (not shown) such as an anisotropic conductive film (ACF) or anisotropic conductive paste (ACP). The first contact electrode CTE1 and the pixel electrode PXE may be bonded to each other through a welding process.

[0104] A bank 190 covering edges of the pixel electrode PXE and the common electrode CE may be disposed on the second insulating film 171. The bank 190 may be formed as an organic film including acrylic resin, epoxy resin, phenol resin, polyamide resin, polyimide resin, or the like.

[0105] The bank insulating film 191 may be disposed on the bank 190. The bank insulating film 191 may cover edges of the pixel electrode PXE and the common electrode CE. The bank insulating film 191 may be formed as an inorganic film, for example, a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0106] Figure 5A perspective view of a tiled display device TLD including a plurality of display devices 11, 12, 13, and 14 according to an embodiment is shown.

[0107] refer to Figure 5 The tiled display device TLD may include a plurality of display devices 11, 12, 13, and 14 and a seam portion SM. For example, the tiled display device TLD may include a first display device 11, a second display device 12, a third display device 13, and a fourth display device 14.

[0108] The plurality of display devices 11, 12, 13, and 14 may be arranged in a grid form. The display devices 11, 12, 13, and 14 may be arranged in a matrix form of M (M may be an integer greater than or equal to 1) rows and N (N may be an integer greater than or equal to 1) columns. For example, the first display device 11 and the second display device 12 may be adjacent to each other in the first direction DR1. The first display device 11 and the third display device 13 may be adjacent to each other in the second direction DR2. The third display device 13 and the fourth display device 14 may be adjacent to each other in the first direction DR1. The second display device 12 and the fourth display device 14 may be adjacent to each other in the second direction DR2.

[0109] However, the number and arrangement of the display devices 11, 12, 13, and 14 in the tiled display device TLD may not be limited to Figure 5 The number and arrangement of the display devices 11, 12, 13, and 14 included in the tiled display device TLD are differently set depending on the sizes of the display devices 11, 12, 13, 14 and the size of the tiled display device TLD and the shape of the tiled display device TLD.

[0110] refer to Figure 5 , the display devices 11, 12, 13, and 14 may be shown to have the same size, but the present disclosure may not be limited thereto. For example, at least one of the display devices 11, 12, 13, and 14 may have a size different from that of the remaining display devices.

[0111] Each of the display devices 11, 12, 13, and 14 may have a rectangular shape including a long side and a short side. The display devices 11, 12, 13, and 14 may be arranged so that their long sides or short sides may extend to each other. Some or all of the display devices 11, 12, 13, and 14 may be arranged at the edge of the tiled display device TLD, and may form one side of the tiled display device TLD. At least one of the display devices 11, 12, 13, and 14 may be arranged on at least one corner of the tiled display device TLD, and may form two adjacent sides of the tiled display device TLD. At least one of the display devices 11, 12, 13, and 14 may be surrounded by other display devices.

[0112] refer to Figures 1 to 4 The display device 10 described and Figure 5 Each of the display devices 11, 12, 13, and 14 may be substantially the same. Therefore, the description of each of the display devices 11, 12, 13, and 14 may be omitted.

[0113] The seam portion SM may include a coupling member or an adhesive member. The display devices 11, 12, 13, and 14 may extend to each other through the coupling member or adhesive member of the seam portion SM. The seam portion SM may be provided between the first display device 11 and the second display device 12, between the first display device 11 and the third display device 13, between the second display device 12 and the fourth display device 14, and between the third display device 13 and the fourth display device 14.

[0114] Figure 6 Shown in detail Figure 5 An enlarged schematic diagram of area AR1.

[0115] refer to Figure 6 , the seam portion SM may have a planar shape of a cross or a plus sign in a central area of ​​the tiled display device TLD (in which the first display device 11, the second display device 12, the third display device 13, and the fourth display device 14 may be adjacent to each other).

[0116] The first display device 11 may include first pixels PX1 arranged in a matrix form in a first direction DR1 and a second direction DR2 to display an image. The second display device 12 may include second pixels PX2 arranged in a matrix form in the first direction DR1 and the second direction DR2 to display an image. The third display device 13 may include third pixels PX3 arranged in a matrix form in the first direction DR1 and the second direction DR2 to display an image. The fourth display device 14 may include fourth pixels PX4 arranged in a matrix form in the first direction DR1 and the second direction DR2 to display an image.

[0117] A minimum distance between adjacent first pixels PX1 in the first direction DR1 may be defined as a first horizontal separation distance GH1, and a minimum distance between adjacent second pixels PX2 in the first direction DR1 may be defined as a second horizontal separation distance GH2. The first and second horizontal separation distances GH1 and GH2 may be substantially equal.

[0118] The seam portion SM may be disposed between the first pixel PX1 and the second pixel PX2 adjacent in the first direction DR1. The minimum distance G12 between the first pixel PX1 and the second pixel PX2 adjacent in the first direction DR1 may be the sum of a minimum distance GHS1 between the first pixel PX1 and the seam portion SM in the first direction DR1, a minimum distance GHS2 between the second pixel PX2 and the seam portion SM in the first direction DR1, and a width GSM1 of the seam portion SM in the first direction DR1.

[0119] The minimum distance G12, the first horizontal separation distance GH1, and the second horizontal separation distance GH2 between the first pixel PX1 and the second pixel PX2 adjacent in the first direction DR1 may be substantially equal. To this end, the minimum distance GHS1 between the first pixel PX1 and the seam portion SM in the first direction DR1 may be smaller than the first horizontal separation distance GH1, and the minimum distance GHS2 between the second pixel PX2 and the seam portion SM in the first direction DR1 may be smaller than the second horizontal separation distance GH2. The width GSM1 of the seam portion SM in the first direction DR1 may be smaller than the first horizontal separation distance GH1 or the second horizontal separation distance GH2.

[0120] The minimum distance between adjacent third pixels PX3 in the first direction DR1 may be defined as a third horizontal separation distance GH3, and the minimum distance between adjacent fourth pixels PX4 in the first direction DR1 may be defined as a fourth horizontal separation distance GH4. The third and fourth horizontal separation distances GH3 and GH4 may be substantially equal.

[0121] The seam portion SM may be disposed between the third pixel PX3 and the fourth pixel PX4 adjacent in the first direction DR1. The minimum distance G34 between the third pixel PX3 and the fourth pixel PX4 adjacent in the first direction DR1 may be the sum of the minimum distance GHS3 between the third pixel PX3 and the seam portion SM in the first direction DR1, the minimum distance GHS4 between the fourth pixel PX4 and the seam portion SM in the first direction DR1, and the width GSM1 of the seam portion SM in the first direction DR1.

[0122] The minimum distance G34, the third horizontal separation distance GH3, and the fourth horizontal separation distance GH4 between the third pixel PX3 and the fourth pixel PX4 adjacent in the first direction DR1 may be substantially equal. To this end, the minimum distance GHS3 between the third pixel PX3 and the seam portion SM in the first direction DR1 may be smaller than the third horizontal separation distance GH3, and the minimum distance GHS4 between the fourth pixel PX4 and the seam portion SM in the first direction DR1 may be smaller than the fourth horizontal separation distance GH4. The width GSM1 of the seam portion SM in the first direction DR1 may be smaller than the third horizontal separation distance GH3 or the fourth horizontal separation distance GH4.

[0123] A minimum distance between adjacent first pixels PX1 in the second direction DR2 may be defined as a first vertical separation distance GV1, and a minimum distance between adjacent third pixels PX3 in the second direction DR2 may be defined as a third vertical separation distance GV3. The first vertical separation distance GV1 and the third vertical separation distance GV3 may be substantially equal.

[0124] The seam portion SM may be disposed between the first pixel PX1 and the third pixel PX3 adjacent in the second direction DR2. The minimum distance G13 between the first pixel PX1 and the third pixel PX3 adjacent in the second direction DR2 may be the sum of the minimum distance GVS1 between the first pixel PX1 and the seam portion SM in the second direction DR2, the minimum distance GVS3 between the third pixel PX3 and the seam portion SM in the second direction DR2, and the width GSM2 of the seam portion SM in the second direction DR2.

[0125] The minimum distance G13, the first vertical separation distance GV1, and the third vertical separation distance GV3 between the first pixel PX1 and the third pixel PX3 adjacent in the second direction DR2 may be substantially equal. To this end, the minimum distance GVS1 between the first pixel PX1 and the seam portion SM in the second direction DR2 may be smaller than the first vertical separation distance GV1, and the minimum distance GVS3 between the third pixel PX3 and the seam portion SM in the second direction DR2 may be smaller than the third vertical separation distance GV3. The width GSM2 of the seam portion SM in the second direction DR2 may be smaller than the first vertical separation distance GV1 or the third vertical separation distance GV3.

[0126] The minimum distance between adjacent second pixels PX2 in the second direction DR2 may be defined as a second vertical separation distance GV2, and the minimum distance between adjacent fourth pixels PX4 in the second direction DR2 may be defined as a fourth vertical separation distance GV4. The second vertical separation distance GV2 and the fourth vertical separation distance GV4 may be substantially equal.

[0127] The seam portion SM may be disposed between the second pixel PX2 and the fourth pixel PX4 adjacent in the second direction DR2. The minimum distance G24 between the second pixel PX2 and the fourth pixel PX4 adjacent in the second direction DR2 may be the sum of the minimum distance GVS2 between the second pixel PX2 and the seam portion SM in the second direction DR2, the minimum distance GVS4 between the fourth pixel PX4 and the seam portion SM in the second direction DR2, and the width GSM2 of the seam portion SM in the second direction DR2.

[0128] The minimum distance G24, the second vertical separation distance GV2, and the fourth vertical separation distance GV4 between the second pixel PX2 and the fourth pixel PX4 adjacent in the second direction DR2 may be substantially equal. To this end, the minimum distance GVS2 between the second pixel PX2 and the seam portion SM in the second direction DR2 may be smaller than the second vertical separation distance GV2, and the minimum distance GVS4 between the fourth pixel PX4 and the seam portion SM in the second direction DR2 may be smaller than the fourth vertical separation distance GV4. The width GSM2 of the seam portion SM in the second direction DR2 may be smaller than the second vertical separation distance GV2 or the fourth vertical separation distance GV4.

[0129] like Figure 6 As shown in , in order to prevent the seam portion SM between the images displayed by the display devices 11, 12, 13 and 14 from being seen, the minimum distance between pixels of adjacent display devices and the minimum distance between pixels in each of the display devices may be substantially equal.

[0130] Figure 7 Shown along Figure 6 A schematic cross-sectional view of an example of a tiled display device taken along line BB'.

[0131] refer to Figure 7 , the first display device 11 (see Figure 6 ) includes a first display panel 101 and a first front cover COV1. The second display device 12 (see Figure 6 ) includes a second display panel 102 and a second front cover COV2.

[0132] Each of the first display panel 101 and the second display panel 102 includes a substrate SUB, a thin film transistor layer TFTL, and a light emitting element layer EML. Figure 4 The thin film transistor layer TFTL and the light emitting element layer EML are described in detail. Figure 7 In the reference Figure 4 Description given.

[0133] The substrate SUB may include a first surface 41 on which the thin film transistor layer TFTL may be disposed, a second surface 42 facing the first surface 41, and a first side surface 43 disposed between the first surface 41 and the second surface 42. The first surface 41 may be a front surface or an upper surface of the substrate SUB, and the second surface 42 may be a rear surface or a lower surface of the substrate SUB.

[0134] The substrate SUB may further include a chamfered surface 44 that may be disposed between the first surface 41 and the first side surface 43 and between the second surface 42 and the first side surface 43. The thin film transistor layer TFTL and the light emitting element layer EML may not be disposed on the chamfered surface 44. Due to the chamfered surface 44, the substrate SUB of the first display device 11 and the substrate SUB of the second display device 12 may be prevented from colliding and being damaged.

[0135] The chamfered surfaces 44 may be provided between the first surface 41 and another side surface other than the first side surface 43 and between the second surface 42 and another side surface other than the first side surface 43, respectively. Figure 5 In the case of the rectangular planar shape shown in , the substrate SUB may be disposed between the first surface 41 and the second, third and fourth side surfaces, respectively, and between the second surface 42 and the second, third and fourth side surfaces, respectively.

[0136] The first front cover COV1 may be disposed on the chamfered surface 44 of the substrate SUB. For example, the first front cover COV1 may protrude further than the substrate SUB in the first direction DR1 and the second direction DR2. Therefore, a distance GSUB between the substrate SUB of the first display device 11 and the substrate SUB of the second display device 12 may be greater than a distance GCOV between the first front cover COV1 and the second front cover COV2.

[0137] Each of the first front cover COV1 and the second front cover COV2 may include an adhesive member 51 , a transmittance control layer 52 disposed on the adhesive member 51 , and an anti-glare layer 53 disposed on the transmittance control layer 52 .

[0138] Hereinafter, the first front cover COV1 may be taken as an example to describe its components, but the description of the corresponding components may also be applied as is to the description of the second front cover COV2.

[0139] The adhesive member 51 may be configured to attach the first front cover COV1 to the light emitting element layer EML of the first display panel 101. The adhesive member 51 may be a transparent adhesive member capable of transmitting light. For example, the adhesive member 51 may be an optically transparent adhesive film (also referred to as an OCA film) or an optically transparent resin (OCR).

[0140] The transmittance control layer 52 may be configured to reduce the transmittance of external light incident from the outside, or reduce the transmittance of reflected light that may be re-incident after the external light transmitted through the transmittance control layer 52 may be reflected by the first display panel 101 and the second display panel 102. Since the first front cover COV1 includes the transmittance control layer 52, it may be possible to prevent the seam portion SM (see Figure 6 ) can be visually recognized from the outside. Therefore, a seamless tiled display device TLD (see Figure 5 ).

[0141] The anti-glare layer 53 may be configured to reduce the glare caused by the display device 10 (see Figure 1 ) may be visually recognized from the outside. More specifically, the display device 10 may include metal wiring of the thin film transistor layer TFTL or a metal electrode (e.g., a pixel electrode PXE) on the thin film transistor layer TFTL, and external light incident from the outside may be reflected by the metal wiring, etc., so that the reflected light may be visually recognized from the outside. Since excessive reflected light may be a factor that causes the visibility of the image to deteriorate, the anti-glare layer 53 may be designed to diffusely reflect external light and / or reflected light to prevent the visibility of the image from deteriorating. Since the first front cover COV1 includes the anti-glare layer 53, the light emitted by the display device 10 (see Figure 1 )The contrast of the image displayed.

[0142] The transmittance control layer 52 may be implemented as, for example, a phase retardation layer. The anti-glare layer 53 may be implemented as, for example, a polarizing plate. However, the embodiments of the present disclosure may not be limited thereto.

[0143] Along Figure 6 Examples of tiled display devices taken along lines CC', D-D' and EE' and reference Figure 7 The described examples of tiled display devices taken along line BB' may be substantially the same.

[0144] Figure 8 Shown in detail Figure 5 Schematic diagram of the enlarged layout of area AR2.

[0145] Figure 8 A pad PAD and a first pixel PX1 disposed on an upper side of the first display device 11 are shown.

[0146] refer to Figure 8, at least one pad PAD may be disposed on an upper edge of the first display device 11. In the case where a data line (not shown) of the first display device 11 extends in the second direction DR2, the pad PAD may be disposed on an upper edge and / or a lower edge of the first display device 11. In the case where a data line of the first display device 11 extends in the first direction DR1, the pad PAD may be disposed on a left edge and a right edge of the first display device 11.

[0147] The pad PAD may be electrically connected to the data line. The pad PAD may be electrically connected to the side wiring SCL (see Fig. 9 ).

[0148] The side wiring SCL may be provided on the substrate SUB (see Fig. 9 ), and the side wiring SCL may be provided to extend from the side surface to the lower surface (or rear surface). The side wiring SCL may be electrically connected to the connection wiring CCL (see Fig. 9 ). The detailed description of the side wiring SCL and the connection wiring CCL will be referred to below. Fig. 9 Give in more detail.

[0149] Fig. 9 Shown along Figure 8 The F-F' intercepted tile display device TLD (see Figure 5 ) is a schematic cross-sectional view of an example.

[0150] exist Fig. 9 In the Figure 4 The same components as those shown in the schematic cross-sectional view of FIG. Figure 4 The description may be redundant (for example, the description related to area X will be omitted).

[0151] refer to Fig. 9 , the pad PAD may be disposed on the first insulating film 161. The pad PAD may be at least partially exposed without being covered by the second insulating film 171 and the embankment insulating film 191. The pad PAD and the pixel electrode PXE or the common electrode CE may include the same material. For example, the pad PAD may include a stacked structure (Ti / Al / Ti) of aluminum (Al) and titanium (Ti), a stacked structure (ITO / Al / ITO) of aluminum (Al) and ITO, an APC alloy or a stacked structure (ITO / APC / ITO) of an APC alloy and ITO. The pad PAD may include a metal material having a high reflectivity.

[0152] The first data metal layer DTL1 may include a data line DL. The data line DL may be disposed on the interlayer insulating film 140. For example, the data line DL and the first connection electrode CE1 may be disposed on the same layer and may include the same material.

[0153] The pad PAD may be electrically connected to the data line DL through the fifth contact hole CT5 penetrating the first insulating film 161. In some cases, a connection wiring (not shown) may be further provided between the pad PAD and the data line DL. The pad PAD and the data line DL may not be connected (e.g., not directly connected) but may be electrically connected through the connection wiring.

[0154] The connection wiring CCL may be disposed on the rear surface of the substrate SUB. The connection wiring CCL may be a single layer or a multilayer that may be made of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

[0155] The rear planarization film BVIA may be provided to cover a portion of the connection wiring CCL. The rear planarization film BVIA may be formed as an organic film including acrylic resin, epoxy resin, phenol resin, polyamide resin, polyimide resin, or the like.

[0156] The rear insulating film BPVX may be disposed on the lower surface of the rear planarization film BVIA (e.g., while covering the rear planarization film BVIA). The rear insulating film BPVX may include an inorganic film. For example, the inorganic film may be formed as a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0157] The side wiring SCL may be provided to extend from a lower edge of the substrate SUB to a side edge and an upper edge of the substrate SUB.

[0158] One end of the side wiring SCL may be electrically connected to the connection wiring CCL. For example, the one end of the side wiring SCL may be electrically connected to the side surface and the lower surface of the connection wiring CCL. The other end of the side wiring SCL may be electrically connected to the pad PAD. For example, the other end of the side wiring SCL may be electrically connected to the pad PAD through the sixth contact hole CT6 penetrating the second insulating film 171 and the bank insulating film 191.

[0159] The side wiring SCL can be arranged on the side surface of the substrate SUB, the side surface of the buffer film BF, the side surface of the first gate insulating film 131, the side surface of the second gate insulating film 132, the side surface of the interlayer insulating film 140, the side surface of the first insulating film 161, the side surface of the second insulating film 171 and the side surface of the embankment insulating film 191.

[0160] The flexible film FPCB may be disposed under the back insulating film BPVX (eg, in a direction away from the lower surface of the substrate SUB). The flexible film FPCB may be electrically connected to the connection wiring CCL by using the conductive adhesive member CAM.

[0161] The conductive adhesive member CAM may extend to the connection wiring CCL through the seventh contact hole CT7 .

[0162] The seventh contact hole CT7 may be a hole penetrating the back planarization film BVIA and the back insulation film BPVX, or may be a hole formed in a region where the back planarization film BVIA and the back insulation film BPVX may be removed in advance.

[0163] A data driving circuit (not shown) for supplying a data voltage to the data line DL may be mounted on the surface of the flexible film FPCB. For example, the flexible film FPCB may be implemented as a flexible printed circuit board, but may not be limited thereto. The data driving circuit may be implemented as, for example, a source driver integrated circuit (SDIC).

[0164] The conductive adhesive member CAM electrically connecting the flexible film FPCB and the connection wiring CCL may be, for example, an anisotropic conductive film (ACF) or an anisotropic conductive paste (ACP), but may not be limited thereto.

[0165] refer to Fig. 9 , the flexible film FPCB may be disposed on the rear surface of the substrate SUB and may extend to the pad PAD through the connection wiring CCL and the side wiring SCL. Thus, the pixel PX may be disposed until the display panel 100 (see Figure 1 ) and can increase the proportion of the display area in which the image is displayed.

[0166] Fig.10 A schematic block diagram of a tiled display device TLD according to an embodiment is shown.

[0167] refer to Fig.10 , the tiled display device TLD according to the embodiment may include a host system HOST and a plurality of display devices 11 , 12 , 13 , and 14 .

[0168] Fig.10 It is shown that the host system HOST controls the first display device 11 for better understanding and ease of description, but the host system HOST may also perform the function of controlling the display devices 11 , 12 , 13 , and 14 .

[0169] The host system HOST may be implemented as, for example, a set-top box, an application processor (AP), or the like.

[0170] The user's command can be input to the host system HOST in various formats. For example, a command generated by a user's touch input can be input to the host system HOST. The user's command can be input to the host system HOST through an external input device (e.g., keyboard input or remote control button input).

[0171] The host system HOST may receive original video data corresponding to the original image from the outside. The host system HOST may divide the original video data according to the number of display devices 11, 12, 13, and 14. For example, the host system HOST may divide the original video data into first video data corresponding to the first image, second video data corresponding to the second image, third video data corresponding to the third image, and fourth video data corresponding to the fourth image, corresponding to the first display device 11, the second display device 12, the third display device 13, and the fourth display device 14. The host system HOST may transmit the first video data to the first display device 11, the second video data to the second display device 12, the third video data to the third display device 13, and the fourth video data to the fourth display device 14.

[0172] The first display device 11 can display the first image according to the first video data, the second display device 12 can display the second image according to the second video data, the third display device 13 can display the third image according to the third video data, and the fourth display device 14 can display the fourth image according to the fourth video data. Therefore, the user can view the original image in which the first image to the fourth image displayed on the display devices 11, 12, 13 and 14 are combined.

[0173] refer to Fig.10 , the first display device 11 may include a broadcast tuning part 210, a signal processor 220, a display part 230, a speaker 240, a user input part 250, a hard disk drive (HDD) 260, a network communication part 270, a user interface (UI) generator 280 and a controller 290.

[0174] The broadcast tuning part 210 may receive a broadcast signal of a corresponding channel through an antenna by tuning a channel frequency (eg, a predetermined or selectable channel frequency) according to the control of the controller 290. The broadcast tuning part 210 may include a channel detection module and a radio frequency (RF) demodulation module.

[0175] The broadcast signal demodulated by the broadcast tuner part 210 may be processed by the signal processor 220 to be output to the display part 230 and the speaker 240. Here, the signal processor 220 may include a demultiplexer 221, a video decoder 222, a video processor 223, an audio decoder 224, and an additional data processor 225.

[0176] The demultiplexer 221 separates the demodulated broadcast signal into a video signal, an audio signal, and additional data. The separated video signal, audio signal, and additional data may be restored by the video decoder 222, the audio decoder 224, and the additional data processor 225, respectively. The video decoder 222, the audio decoder 224, and the additional data processor 225 may restore the broadcast signal to a decoded format corresponding to the encoding format when transmitting.

[0177] The decoded video signal may be converted by the video processor 223 to match a vertical frequency, a resolution, a screen ratio, etc. that meet an output standard of the display portion 230 , and the decoded audio signal may be output to the speaker 240 .

[0178] The display portion 230 includes a display panel 100 (see Figure 1 ) and a panel driver that controls driving of the display panel 100.

[0179] The user input part 250 may receive a signal transmitted by the host system HOST. The user input part 250 allows the user to receive commands related to communication with other display devices and data related to channel selection, user interface (UI) menu selection, and operations transmitted by the host system HOST. Data for selection and input may be provided for input.

[0180] The HDD 260 stores various software programs including an operating system (OS) program, recorded broadcast programs, moving images, photos, and other data, and may be implemented as a storage medium such as a hard disk or a nonvolatile memory. The HDD 260 may be referred to as a storage portion.

[0181] The network communication part 270 can be used for short-range communication with the host system HOST and other display devices, and can be a communication module including an antenna pattern that can realize mobile communication, data communication, Bluetooth, RF, Ethernet, etc. The network communication part 270 can transmit / receive wireless signals with at least one of a base station, an external terminal, and a server by using an antenna pattern described later on a mobile communication network constructed according to a technical standard or communication method for mobile communication (e.g., Global System for Mobile Communications (GSM), Code Division Multiple Access (CDMA), Code Division Multiple Access 2000 (CDMA2000), Enhanced Voice Data Optimization or Enhanced Voice Data Only (EV-DO), Wideband CDMA (WCDMA), High Speed ​​Downlink Packet Access (HSDPA), High Speed ​​Uplink Packet Access (HSUPA), Long Term Evolution (LTE), Long Term Evolution-Advanced (LTE-A), 5G, etc.).

[0182] The network communication part 270 can transmit / receive wireless signals in the communication network according to the wireless Internet technology by using the antenna pattern described later. As the wireless Internet technology, for example, WLAN (wireless local area network), Wi-Fi (wireless fidelity), Wi-Fi direct connection, DLNA (digital living network alliance), WiBro (wireless broadband), WiMAX (worldwide interoperability for microwave access), high-speed downlink packet access (HSDPA), high-speed uplink packet access (HSUPA), long-term evolution (LTE), advanced long-term evolution (LTE-A), etc., and the antenna pattern transmits and receives data according to at least one wireless Internet technology within the scope of Internet technologies not listed above.

[0183] The UI generator 280 generates a UI menu for communicating with the host system HOST and other display devices, and can be implemented by an algorithm code and an on screen display (OSD) integrated circuit (IC). The UI menu for communicating with the host system HOST and other display devices can be a menu for specifying a corresponding digital television (TV) for communication and selecting a desired function.

[0184] The controller 290 can be responsible for the overall control of the first display device 11, and can be responsible for the communication control of the host system HOST and other display devices 12, 13 and 14, and the corresponding algorithm code for control can be stored, and it can be implemented by a microcontroller part (MCU) in which the stored algorithm code can be run.

[0185] According to the input and selection of the user input part 250, the controller 290 controls the transmission of corresponding control commands and data to the host system HOST and other display devices 12, 13 and 14 through the network communication part 270. Of course, in the case where control commands (e.g., predetermined or selectable control commands) and data can be input from the host system HOST and other display devices 12, 13 and 14, operations can be performed according to the control commands.

[0186] A schematic block diagram of the second display device 12, a schematic block diagram of the third display device 13, and a schematic block diagram of the fourth display device 14, and reference Fig.10 The schematic block diagrams of the described first display device 11 may be substantially the same, and thus a redundant description will be omitted.

[0187] Fig.11 The transfer process of the light emitting element LE is schematically shown. Fig.12 An example of a backplane substrate 1200 to which the light emitting element LE may be transferred is shown.

[0188] refer to Fig.11, a thin film transistor substrate 1110 and a transfer substrate 1120 transferred to the thin film transistor substrate 1110 may be shown.

[0189] The thin film transistor substrate 1110 may be simply illustrated as including a substrate SUB, a thin film transistor layer TFTL formed on the substrate SUB, and a common electrode CE and a pixel electrode PXE formed on the thin film transistor layer TFTL.

[0190] The transfer substrate 1120 may include a plurality of light emitting elements LE and a carrier substrate CAF configured to transfer and implant the light emitting elements LE on the thin film transistor substrate 1110. The process of transferring and implanting the light emitting elements LE to the thin film transistor substrate 1110 may also be referred to as a transfer process.

[0191] In order to transfer more light emitting elements LE to the thin film transistor substrate 1110 in the transfer process, the transfer substrate 1120 may further include a carrier substrate CAF to which a plurality of light emitting elements LE may be attached and detached. For example, the carrier substrate CAF may be implemented as a carrier film including a polymer material having elasticity such as silicone described above, but the embodiments of the present disclosure may not be limited thereto.

[0192] The carrier substrate CAF may be attached to the base substrate SPUB of the light emitting element LE. After the transfer process is completed, the carrier substrate CAF may be detached and removed from the base substrate SPUB at some point.

[0193] The light emitting element LE may be an inorganic light emitting element, and the light emitting element LE may be a micro light emitting diode (micro LED). In the transfer process, a plurality of light emitting elements LE may be transferred through the carrier substrate CAF.

[0194] For the electrical connection between the light emitting element LE and the common electrode CE and the pixel electrode PXE, a bonding process may be performed after the transfer process. Through the bonding process, the resistance between the light emitting element LE and the common electrode CE may be reduced, or the resistance between the light emitting element LE and the pixel electrode PXE may be reduced.

[0195] refer to Fig.11 The thin film transistor substrate 1110 may further include a conductive material COND disposed on the pixel electrode PXE and the common electrode CE.

[0196] The conductive material COND may be a component for increasing adhesion between each of the pixel electrode PXE and the common electrode CE and the light emitting element LE. The conductive material COND may be a component for reducing resistance between each of the pixel electrode PXE and the common electrode CE and the light emitting element LE.

[0197] The conductive material COND may be, for example, an anisotropic conductive film (ACF) or an anisotropic conductive paste (ACP). The conductive material COND may include, for example, a metal conductive ball (not shown) having conductivity. The conductive material COND may become conductive by receiving pressure and heat. However, the embodiment of the conductive material COND may not be limited thereto.

[0198] refer to Fig.11 Although the conductive material COND may be shown as being disposed on both the pixel electrode PXE and the common electrode CE, the conductive material COND may be disposed only on the pixel electrode PXE or only on the common electrode CE. In some cases, the conductive material COND disposed on the pixel electrode PXE and the common electrode CE may have different thicknesses.

[0199] The plurality of light emitting elements LE may be transferred to the thin film transistor substrate 1110 through the transfer process and the bonding process as described above.

[0200] refer to Fig.12 , the backplane substrate 1200 may include a thin film transistor substrate 1110 and a transfer substrate 1120 .

[0201] Fig.12 The backplane substrate 1200 shown in FIG. 1 may be in the form of a light emitting element LE (see FIG. 1 ) attached to a carrier substrate CAF. Fig.11 ) is transferred to the thin film transistor substrate 1110.

[0202] The backplane substrate 1200 may further include a mother substrate (not shown). After both the transfer process and the bonding process may be performed, the mother substrate may be separated from the substrate SUB (e.g., the lower surface of the substrate SUB) and removed. The mother substrate may be, for example, a curable substrate including glass or the like, or may be a flexible substrate including plastic.

[0203] The backplane substrate 1200 may include, for example, a substrate for forming the display device 10 (see Figure 1 )'s substrate SUB.

[0204] The backplane substrate 1200 may include, for example, two or more display devices 10 (see FIG. Figure 1 ) of the substrate SUB. After the transfer process and the bonding process for the backplane substrate 1200 are completed, a scribing process for cutting the substrate SUB may be performed. Through the scribing process, two or more display devices 10 may be divided, respectively. Scribing lines at which the substrate SUB may be cut may be physically marked on the substrate SUB, but may not be limited thereto. The light emitting element LE (see Fig.11 ) may not be transferred to the scribe line at which the substrate SUB is cut. The light emitting element LE may not be bonded to the scribe line.

[0205] The backplane substrate 1200 may include, for example, a substrate for forming a tiled display device TLD (see Figure 5 ) of the display devices 11, 12, 13 and 14 (see Figure 5 ) of the substrate SUB. A pad PAD may be provided on the substrate SUB (see Fig. 9 ) or a region on the substrate SUB where a side wiring SCL may be provided (see Fig. 9 ) may be a region in which the light emitting element LE may not be transferred and a region on which the light emitting element LE may not be bonded.

[0206] In the embodiments of the present disclosure, Fig.11 The transfer and bonding process shown in can be performed by coupling (or adsorbing) the carrier substrate CAF having the light emitting element LE attached thereto to the cylinder head and by disposing the carrier substrate CAF having the light emitting element LE attached thereto onto the thin film transistor substrate 1110 .

[0207] Hereinafter, with reference to the accompanying drawings, a cylinder head according to an embodiment of the present disclosure and a method for driving a transfer and coupling system using the same will be described in detail.

[0208] Fig.13 A perspective view of a cylinder head 1300 according to an embodiment of the present disclosure is shown. Fig.14 Shows a cross section taken along line XX' Fig.13 Schematic cross-sectional view of a cylinder head 1300 .

[0209] refer to Fig.13 and Fig.14 , the cylinder head 1300 according to an embodiment of the present disclosure may include a first bracket 1310, a second bracket 1320, a transmissive member 1330, an elastic member 1340, a buffer member 1350, a first fastening portion 1360, a second fastening portion 1370, and the like.

[0210] The transmissive member 1330 may include a first transmissive member 1432 and a second transmissive member 1434. The buffer member 1350 may include a first buffer member 1452 and a second buffer member 1454.

[0211] The first bracket 1310 and the second bracket 1320 may be configured to accommodate the transmissive member 1330. The first bracket 1310 and the second bracket 1320 may be configured to be separated from each other. For example, the second bracket 1320 may be disposed in the third direction DR3 relative to the first bracket 1310.

[0212] In some embodiments, the first bracket 1310 may be integrally formed. In some embodiments, the first bracket 1310 may be configured to surround the transmissive member 1330 by including a plurality of assembled parts. For example, referring to Fig.13 , the first bracket 1310 may be shown as a quadrilateral shape having four sides as a whole. The first bracket 1310 may be divided into four parts corresponding to the respective sides of the quadrilateral shape, and the respective parts may be assembled or fastened to configure the first bracket 1310.

[0213] In some embodiments, the second bracket 1320 may be integrally formed. In some embodiments, the second bracket 1320 may be configured to surround the transmissive member 1330 by including a plurality of assembled parts. For example, referring to Fig.13 , similar to the first bracket 1310, the second bracket 1320 may be shown as a quadrilateral shape having four sides as a whole. The second bracket 1320 may be divided into four parts corresponding to the respective sides of the quadrilateral shape, and the respective parts may be assembled or fastened to configure the second bracket 1320.

[0214] The transmissive member 1330 may be accommodated in the first bracket 1310 and the second bracket 1320. For example, the transmissive member 1330 may be divided into a first transmissive member 1432 accommodated in the first bracket 1310 and a second transmissive member 1434 accommodated in the second bracket 1320. In some embodiments, the transmissive member 1330 may include a rigid material. In the above embodiments, the transmissive member 1330 may include quartz, glass, etc. In some embodiments, the transmissive member 1330 may include a flexible material. In the above embodiments, the transmissive member 1330 may include a flexible light-transmitting plastic, etc.

[0215] The transmission member 1330 may include at least one first air path 1335. At least one of the first bracket 1310 and the second bracket 1320 may include a second air path 1315. Fig.13 , an embodiment in which the first bracket 1310 includes the second air path 1315 is shown as an example. Hereinafter, for better understanding and ease of description, an embodiment in which the first bracket 1310 includes the second air path 1315 will be described as an example. However, embodiments of the present disclosure may not be limited thereto.

[0216] In some embodiments, the at least one first air path may include a plurality of first air paths 1335. For example, the first air paths 1335 may be arranged in a grid form.

[0217] At least one first air path 1335 may be configured to allow air to enter and leave. For example, air may be introduced from outside the cylinder head 1300 through at least one first air path 1335, or air may be discharged to the outside of the cylinder head 1300 through at least one first air path 1335.

[0218] The second air path 1315 may be configured to allow air to enter and leave. For example, air may be introduced from the outside of the cylinder head 1300 through the second air path 1315, or air may be discharged to the outside of the cylinder head 1300 through the second air path 1315.

[0219] At least one first air path 1335 and the second air path 1315 may extend to each other. In the above embodiment, air introduced from the outside of the cylinder head 1300 through the at least one first air path 1335 may be discharged to the outside of the cylinder head 1300 through the second air path 1315. Air introduced into the cylinder head 1300 through the second air path 1315 may be discharged to the outside of the cylinder head 1300 through the at least one first air path 1335.

[0220] The first bracket 1310 and the second bracket 1320 may be spaced apart from each other (e.g., spaced apart from each other by a distance (e.g., a predetermined or selectable distance) D). An air layer AL may be formed in a space formed by separating the first bracket 1310 and the second bracket 1320 inside the cylinder head 1300. Air introduced through the first air path 1335 and / or the second air path 1315 may be stored in the above internal space. The volume of the air layer AL may vary.

[0221] In some embodiments, the second air path 1315 may extend to an air pump (not shown) outside the cylinder head 1300. The air pump may be, for example, a blower configured to inject air into the second air path 1315. The air pump may be, for example, a vacuum pump configured to suck air from the second air path 1315.

[0222] The elastic member 1340 may be configured to connect the first bracket 1310 and the second bracket 1320. For example, the elastic member 1340 may be disposed on the side surfaces of the first bracket 1310 and the second bracket 1320. In some embodiments, the elastic member 1340 may also be disposed on the upper surface and / or rear surface of the first bracket 1310 and the second bracket 1320. Hereinafter, for better understanding and ease of description, an embodiment in which the elastic member 1340 may be disposed on the side surfaces of the first bracket 1310 and the second bracket 1320 will be described as an example. However, embodiments of the present disclosure may not be limited thereto. The elastic member 1340 may surround the side surface of the first bracket 1310. The elastic member 1340 may surround the side surface of the second bracket 1320. Air may be stored in the internal space between the first bracket 1310 and the second bracket 1320 through the elastic member 1340, the first bracket 1310 and the second bracket 1320.

[0223] The elastic member 1340 may have elasticity. For example, in the case where a force may be applied to the elastic member 1340 in the third direction DR3, the elastic member 1340 may be stretchable. For example, in the case where the force applied to the elastic member 1340 in the third direction DR3 is removed, the elastic member 1340 may be restored. The elastic member 1340 may be arbitrarily selected from elastic materials. For example, the elastic member 1340 may be implemented with rubber or flexible plastic, but the embodiments of the present disclosure may not be limited thereto.

[0224] By including the elastic member 1340 , each movement of the first bracket 1310 and the second bracket 1320 may be freely controlled while the first bracket 1310 and the second bracket 1320 are extended to each other.

[0225] The buffer member 1350 may be configured to protect the transmissive member 1330 from external force.

[0226] The first buffer member 1452 may be disposed between the transmissive member 1330 and the first bracket 1310 .

[0227] The second buffer member 1454 may be disposed between the transmissive member 1330 and the second bracket 1320. The buffer member 1350 may surround the transmissive member 1330. For example, the buffer member 1350 may absorb external force applied from the first bracket 1310 and the second bracket 1320 while surrounding the side surface of the transmissive member 1330.

[0228] The first fastening portion 1360 may be configured to fix the elastic member 1340 to the first bracket 1310. The second fastening portion 1370 may be configured to fix the elastic member 1340 to the second bracket 1320. For example, the first fastening portion 1360 may include a fixing member 1465 (e.g., a bolt or a nut) for fixing the elastic member 1340 to the first bracket 1310. In some embodiments, the first fastening portion 1360 may also include a sealing member (not shown) for sealing (e.g., an O-ring, etc.). For example, the second fastening portion 1370 may include a fixing member 1475 (e.g., a bolt or a nut) for fixing the elastic member 1340 to the second bracket 1320. In some embodiments, the second fastening portion 1370 may also include a sealing member (not shown) for sealing (e.g., an O-ring, etc.).

[0229] Fig.15A Shows that air can be Fig.13 The state of discharge of cylinder head 1300 is taken as an example. Fig. 15B shows that air can be injected into Fig.13 The state of the cylinder head 1300 is taken as an example.

[0230] refer to Fig.15A , air may be discharged from the inside of the cylinder head 1300 (eg, from the air layer AL) through the second air path 1315. Therefore, the distance d1 between the first bracket 1310 and the second bracket 1320 may be less than Fig.14 The air may be introduced from the outside of the cylinder head 1300 through the at least one first air path 1335, and thus the air pressure inside the cylinder head 1300 may be lower than the air pressure outside the cylinder head 1300. The cylinder head 1300 may have an adsorption (or coupling) force.

[0231] refer to Fig. 15B , air may be injected into the cylinder head 1300 (eg, the air layer AL) through the second air path 1315. The elastic member 1340 may be stretched. The distance d2 between the first bracket 1310 and the second bracket 1320 may be greater than Fig.14 . The air layer AL may provide pressure to the first transmission member 1432. According to Pascal's law, the pressure applied to the first transmission member 1432 by the air layer AL may be uniform. Therefore, the first transmission member 1432 may provide pressure uniformly in one direction (eg, in the third direction DR3).

[0232] Fig.16 Shows Fig.13 A top view of cylinder head 1300 is shown.

[0233] refer to Fig.16 , in the case where the cylinder head 1300 is viewed from the top, the second fastening portion 1370 may be disposed at the outermost side. For example, the width of the second fastening portion 1370 in one direction (e.g., the first direction DR1) may be the first length L1. For example, the width of the second fastening portion 1370 in another direction (e.g., the second direction DR2) may be the second length L2. In some embodiments, the first length L1 and the second length L2 may be the same, but embodiments of the present disclosure may not be limited thereto.

[0234] The second bracket 1320 may be disposed inside the second fastening portion 1370. In some embodiments, the elastic member 1340 (see Fig.14 ) can be further seen between the second fastening portion 1370 and the second bracket 1320.

[0235] The second transmissive member 1434 may be disposed inside the second bracket 1320. The second buffer member 1454 may be disposed between the second bracket 1320 and the second transmissive member 1434.

[0236] In the case of observing the cylinder head 1300 according to the embodiment of the present disclosure from the top, the alignment mark 1610 and the first air path 1335 may be visible due to the optically transparent nature of the transmissive member 1330. The alignment mark 1610 may be provided on the aforementioned first bracket 1310 (see Fig.13 ). The alignment mark 1610 according to an embodiment of the present disclosure may be located at a position adjacent to the transmissive member 1330 (see Fig.13 ) is disposed on the first bracket 1310 in an area where the cylinder head 1300 overlaps. According to an embodiment of the present disclosure, the alignment mark 1610 may be configured to adjust the position of the cylinder head 1300.

[0237] Figures 17 to 26 Methods for driving the transfer and bonding systems according to embodiments of the present disclosure are respectively shown.

[0238] refer to Figures 17 to 26 , the transfer and bonding system according to an embodiment of the present disclosure may include a cylinder head 1300 , a transfer substrate 1120 , a first stage 1710 , an imaging device 2110 , a second stage 1810 , a thin film transistor substrate 1110 , and a heat source 2310 .

[0239] Since the description of the cylinder head 1300 , the transfer substrate 1120 , and the thin film transistor substrate 1110 may be the same as the description given above, the description of these components will be omitted.

[0240] The process of coupling the transfer substrate 1120 to the cylinder head 1300 may be performed on the first stage 1710. The cylinder head 1300 may be coupled to the carrier substrate CAF of the transfer substrate 1120 while the cylinder head 1300 is disposed on the first stage 1710. The first stage 1710 may be approximately flat, but embodiments of the present disclosure may not be limited thereto.

[0241] A process of transferring the transfer substrate 1120 onto the thin film transistor substrate 1110 through the cylinder head 1300 and a process of bonding the transferred transfer substrate 1120 onto the thin film transistor substrate 1110 may be performed on the second stage 1810. The second stage 1810 may be approximately flat, but embodiments of the present disclosure may not be limited thereto.

[0242] The imaging device 2110 may be configured to obtain an image of at least one of the cylinder head 1300, the transfer substrate 1120, and the thin film transistor substrate 1110. For example, the imaging device 2110 may be configured to take an image of the cylinder head 1300, and detect the position of the alignment mark 1610 from the image of the cylinder head 1300. For example, the imaging device 2110 may be configured to image the transfer substrate 1120 and obtain an image of the light emitting element LE attached to the carrier substrate CAF from the image. For example, the imaging device 2110 may be configured to image the thin film transistor substrate 1110 and detect the pattern PAT of the sub-pixel SPX from the image. The imaging device 2110 may be, for example, a camera, but embodiments of the present disclosure may not be limited thereto.

[0243] The heat source 2310 may be configured to provide heat to the transfer substrate 1120. The heat radiated from the heat source 2310 may be provided as, for example, light in an infrared wavelength band. The heat radiated from the heat source 2310 may be provided as, for example, a laser beam of a single wavelength band. However, embodiments of the present disclosure may not be limited thereto, and in some embodiments, light of a visible wavelength band or an ultraviolet wavelength band may be provided.

[0244] refer to Figures 17 to 26 The transfer and bonding method according to an embodiment of the present disclosure may include: placing the cylinder head 1300 above the transfer substrate 1120 mounted on the first stage 1710 (see Fig.17 1700); moving the cylinder head 1300 toward the transfer substrate 1120 (see Fig.18 1800); connecting the cylinder head 1300 to the transfer substrate 1120 (see Fig.19 1900); moving the cylinder head 1300 connected to the transfer substrate 1120 away from the first stage 1710 (see Fig. 20 2000); using imaging device 2110 to obtain an image (see Fig.212100); moving the cylinder head 1300 connected to the transfer substrate 1120 toward the thin film transistor substrate 1110 (see Fig. 22 2200); applying pressure and heat to the transfer substrate 1120 (see Fig.23A and Fig. 23B 2300a and 2300b); connecting the cylinder head 1300 to the carrier substrate CAF (see Fig.24 2400); moving the cylinder head 1300 connected to the carrier substrate CAF away from the thin film transistor substrate 1110 (see Fig.25 2500); and separating the carrier substrate CAF from the cylinder head 1300 (see Fig.26 of 2600).

[0245] refer to Fig.17 , showing a cylinder head 1300 disposed above the transfer substrate 1120 (see Fig.17 1700). When setting, the cylinder head 1300 may be set above the transfer substrate 1120 (for example, by moving the cylinder head 1300 in a direction opposite to the third direction DR3 relative to the transfer substrate 1120). The transfer substrate 1120 may be set on the first stage 1710. The position of the cylinder head 1300 may be adjusted by a cylinder (not shown) to which the cylinder head 1300 may extend.

[0246] refer to Fig.18 , showing the cylinder head 1300 moving toward the transfer substrate 1120 (see Fig.18 1800). During the movement, the cylinder head 1300 may approach the transfer substrate 1120. For example, the cylinder head 1300 may approach the transfer substrate 1120 while descending. For example, the cylinder head 1300 may approach the transfer substrate 1120 to a range of about several hundred micrometers.

[0247] refer to Fig.19 , showing the cylinder head 1300 coupled to the transfer substrate 1120 (see Fig.19 1900). Air may be discharged from the inside of the cylinder head 1300 through the second air path 1315. The pressure inside the cylinder head 1300 may be reduced, and the transfer substrate 1120 (or the carrier substrate CAF) may be coupled to the cylinder head 1300. In some embodiments, the first stage 1710 may be disposed to be slightly inclined relative to the ground. Even in the above embodiments, the transfer substrate 1120 may be easily coupled to the first transmission member 1432.

[0248] refer to Fig. 20 , showing the cylinder head 1300 coupled to the transfer substrate 1120 moving away from the first stage 1710 (see Fig. 20The cylinder head 1300 may move in one direction (eg, a third direction DR3 or an ascending direction) in a state of being coupled to the transfer substrate 1120.

[0249] refer to Fig.21 , showing an image obtained using imaging device 2110 (see Fig.21 2100). Reference Fig.21 , the imaging device 2110 may obtain an image of at least one of the cylinder head 1300, the transfer substrate 1120, and the thin film transistor substrate 1110. In some embodiments, the imaging device 2110 may image the cylinder head 1300 and detect the position of the alignment mark 1610 from the image. In some embodiments, the imaging device 2110 may image the transfer substrate 1120 and detect the position of the light emitting element LE coupled to the carrier substrate CAF. In some embodiments, the imaging device 2110 may image the thin film transistor substrate 1110 and detect a pattern PAT on the thin film transistor substrate 1110 corresponding to the position of the sub-pixel SPX. For example, the pattern PAT corresponding to the position of the sub-pixel SPX may be formed by the above Fig. 9 The position of the cylinder head 1300 may be precisely adjusted in the first direction DR1 and / or the second direction DR2 based on an image obtained by the imaging device 2110 .

[0250] refer to Fig. 22 , showing the cylinder head 1300 coupled to the transfer substrate 1120 moving toward the thin film transistor substrate 1110 (see Fig. 22 When moving, the cylinder head 1300 may be moved in a direction (eg, a direction opposite to the third direction DR3) (eg, the cylinder head 1300 is lowered). When moving, the thin film transistor substrate 1110 and the light emitting element LE may contact each other. Figures 17 to 22 The steps shown in may correspond to a transfer process of the light emitting element LE.

[0251] refer to Fig.23A and Fig. 23B , showing the application of pressure and heat to the transfer substrate 1120 (see Fig.23A and Fig. 23B 2300a and 2300b). Fig.23A 1 shows an embodiment in which the cylinder head 1300 and the thin film transistor substrate 1110 are arranged in parallel. Fig.23A Describe the corresponding steps as a whole.

[0252] refer to Fig.23A, air may be injected into the second air path 1315. The second air path 1315 may extend to, for example, an air pump (not shown). Air provided from the air pump may be injected into the second air path 1315. An air layer AL may be provided between the first bracket 1310 and the second bracket 1320. Air injected through the second air path 1315 may be stored in the air layer AL. The air layer AL may provide pressure to the first transmission member 1432, and the first transmission member 1432 may provide pressure to the light emitting element LE through the carrier substrate CAF.

[0253] refer to Fig.23A , the heat source 2310 may provide heat. At least a portion of the provided heat may pass through the second transmission member 1434, the air layer AL, the first transmission member 1432, and the carrier substrate CAF to reach the light emitting element LE. Thus, heat may be provided to the light emitting element LE. The light emitting element LE may be fixed to the thin film transistor substrate 1110 by receiving pressure and heat. Fig.23A and Fig. 23B The steps shown in may correspond to the bonding process of the light emitting element LE.

[0254] Fig. 23B An embodiment in which the cylinder head 1300 and the thin film transistor substrate 1110 can be tilted and arranged is shown. In the above embodiment, the thin film transistor substrate 1110 can be arranged to be tilted relative to the ground together with the second stage 1810. Fig. 23B , the shape of the air layer AL may be fluidly changed according to the position of the thin film transistor substrate 1110. The air layer AL may uniformly provide pressure to the first transmission member 1432 as a whole. Therefore, the first transmission member 1432 may provide pressure (eg, uniform pressure) to the light emitting element LE through the carrier substrate CAF.

[0255] In a corresponding step, the light emitting element LE may be bonded to the thin film transistor substrate 1110. In a corresponding step, a bonding force between the light emitting element LE and the thin film transistor substrate 1110 may be greater than a bonding force between the light emitting element LE and the carrier substrate CAF.

[0256] refer to Fig.24 , it can be shown that the cylinder head 1300 is connected to the carrier substrate CAF (see Fig.24 2400). In a corresponding step, air may be discharged through the second air path 1315. The carrier substrate CAF may be attached to the first transmissive member 1432. Since the bonding force between the light emitting element LE and the thin film transistor substrate 1110 may be greater than the bonding force between the light emitting element LE and the carrier substrate CAF, in a corresponding step, the light emitting element LE and the carrier substrate CAF may be separated from each other.

[0257] refer to Fig.25 , showing the cylinder head 1300 coupled to the carrier substrate CAF moving (see Fig.25 2500). During the movement, the cylinder head 1300 coupled to the carrier substrate CAF may be moved (e.g., raised) in a direction (e.g., a third direction DR3) away from the second stage 1810. During the movement, the light emitting element LE may be kept bonded to the thin film transistor substrate 1110 disposed on the second stage 1810.

[0258] refer to Fig.26 , showing the separation of the carrier substrate CAF from the cylinder head 1300 (see Fig.26 2600). At the time of separation, air may be injected into the second air path 1315. The bonding force between the first transmission member 1432 and the carrier substrate CAF may be weakened, and the carrier substrate CAF may be separated from the first transmission member 1432.

[0259] refer to Figures 17 to 26 The described steps may be repeatedly performed. Thus, the transfer and bonding processes may be repeatedly performed on the thin film transistor substrate 1110. Therefore, the light emitting element LE may be efficiently transferred to the thin film transistor substrate 1110 of a large area, and the transferred light emitting element LE may be efficiently bonded.

[0260] According to the cylinder head, the transfer and bonding system including the same, and the method for driving the same according to the embodiment of the present disclosure, it may be possible to provide uniform pressure to the light emitting element during the transfer and bonding process of the light emitting element.

[0261] Although the present disclosure has been described in conjunction with what can currently be considered as actual implementations, it is understood that the present disclosure may not be limited to the disclosed implementations, but on the contrary, may be intended to cover various modifications and equivalent arrangements included in the spirit and scope of the appended claims. Therefore, those skilled in the art will understand that various modifications of the present disclosure and other equivalent implementations are possible. Therefore, the actual technical protection scope of the present disclosure must be determined based on the technical spirit of the appended claims.

Claims

1. A cylinder head, comprising: a first transmission portion including at least one first air path extending to the air layer; A first bracket, accommodating the first transmission part; a second transmission portion spaced apart from the first transmission portion in one direction by the air layer; a second bracket, accommodating the second transmission part; as well as an elastic member surrounding a side surface of the first bracket and a side surface of the second bracket, Wherein, one of the first bracket and the second bracket includes a second air path extending to the air layer.

2. The cylinder head according to claim 1, further comprising: a first fastening portion configured to surround the elastic member and fix the elastic member to the side surface of the first bracket; as well as The second fastening portion is configured to surround the elastic member and fix the elastic member to the side surface of the second bracket.

3. The cylinder head according to claim 1, further comprising: a first buffer member disposed between the first transmission portion and the first bracket and surrounding a side surface of the first transmission portion; as well as The second buffer member is disposed between the second transmissive portion and the second bracket and surrounds a side surface of the second transmissive portion.

4. A transfer and binding system comprising: Cylinder head; An imaging device configured to obtain an image in one direction; as well as a heat source configured to apply heat to the cylinder head, wherein The cylinder head comprises: a first transmission portion including a first air path extending to the air layer; A first bracket, accommodating the first transmission part; a second transmission portion spaced apart from the first transmission portion in the one direction by the air layer; a second bracket accommodating the second transmissive portion; and an elastic member surrounding a side surface of the first bracket and a side surface of the second bracket, and One of the first bracket and the second bracket includes a second air path extending to the air layer.

5. The transfer and bonding system according to claim 4, further comprising a transfer substrate, the transfer substrate comprising: a carrier substrate; as well as A plurality of light emitting elements are coupled to the carrier substrate, wherein the carrier substrate is in contact with the first transmissive portion.

6. The transfer and bonding system of claim 5, further comprising: A thin film transistor substrate, comprising a thin film transistor layer, wherein: The position of the cylinder head is adjusted based on the image of the pattern of the thin film transistor substrate obtained by the imaging device.

7. The transfer and bonding system according to claim 5, wherein: The first bracket includes an alignment mark overlapping the first transmission portion and the second transmission portion, and The position of the cylinder head is adjusted based on the image of the alignment mark obtained by the imaging device.

8. The transfer and bonding system according to claim 4, wherein: The heat source irradiates laser light onto the first transmission portion and the second transmission portion.

9. A driving method, comprising: A cylinder head is provided, the cylinder head comprising: a first transmission portion including a first air path extending to the air layer; A first bracket, accommodating the first transmission part; a second transmission portion spaced apart from the first transmission portion in one direction by the air layer; a second bracket accommodating the second transmissive portion; and an elastic member surrounding a side surface of the first bracket and a side surface of the second bracket, and One of the first bracket and the second bracket includes a second air path extending to the air layer; providing a transfer substrate including a carrier substrate coupled to a plurality of light emitting elements; providing a thin film transistor substrate including a thin film transistor layer; moving the cylinder head toward the transfer substrate; exhausting air from the cylinder head through the second air path to couple the transfer substrate to the first transmissive portion of the cylinder head; moving the cylinder head coupled to the transfer substrate toward the thin film transistor substrate; injecting air into the cylinder head through the second air path to press the first transmissive portion of the cylinder head against the transfer substrate; exhausting air from the cylinder head through the second air path to couple the carrier substrate to the first transmissive portion of the cylinder head; and Air is injected into the cylinder head via the second air path to separate the carrier substrate from the first transmissive portion of the cylinder head.

10. The driving method according to claim 9, wherein: Moving the cylinder head coupled to the transfer substrate toward the thin film transistor substrate includes: obtaining an image of the thin film transistor substrate; detecting a pattern in the thin film transistor substrate from the image; and The position of the cylinder head is adjusted based on the detected pattern.

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