Test circuit, driving chip and electronic equipment

Abstract

The invention provides a test circuit, a driving chip and electronic equipment. A first end of the test circuit is connected with an output end of a band-gap reference circuit, a second end is connected with an external power supply, and a third end is connected with an input end of a driving unit; the test circuit is configured to receive the reference voltage provided by the band-gap reference circuit and a control voltage provided by an external power supply, the control voltage is generated based on a target test temperature, and the target test temperature is in positive correlation with the control voltage; the test circuit is configured to generate a control signal based on the reference voltage and the control voltage and output the control signal at a third end; and the driving unit is configured to output a test signal under the action of the control signal or not output the signal after being damaged. According to the invention, the real temperature range that the driving chip can bear under the condition of normal operation can be simply and efficiently tested, so that the operation stability of the driving chip can be improved.

Description

Technical Field

[0001] The embodiments of the present application relate to a testing technology for a driver chip, and more particularly to a testing circuit, a driver chip, and an electronic device. Background Art

[0002] Power devices include power metal oxide semiconductor field effect transistors, insulated gate bipolar transistors, gallium nitride transistors and silicon carbide transistors. Power devices are generally driven by driver chips, which generally have overheat protection structures. The overheat protection structure is used to ensure that the driver chip can still operate normally when it is in a high temperature environment.

[0003] In order to ensure that the components in the driver chip are not damaged due to overheating and that the driver chip can operate stably when overheated, it is necessary to test the actual temperature range that the driver chip can withstand under normal operation. However, the traditional solution requires adjusting the temperature of the driver chip to detect the actual temperature range, which is very troublesome and costly.

[0004] Therefore, how to simply and efficiently test the actual temperature range that the driver chip can withstand under normal operation to help improve the stability of the driver chip operation still needs to be solved. Summary of the invention

[0005] The embodiments of the present application provide a test circuit, a driver chip, and an electronic device, which can simply and efficiently test the actual temperature range that the driver chip can withstand under normal operation, so as to help improve the stability of the operation of the driver chip.

[0006] In a first aspect, an embodiment of the present application provides a test circuit, wherein a first end of the test circuit is connected to an output end of a bandgap reference circuit, a second end is connected to an external power supply, and a third end is connected to an input end of a driving unit; the bandgap reference voltage and the driving unit are both arranged inside a driving chip of a power device;

[0007] The test circuit is configured to receive a reference voltage provided by the bandgap reference circuit and a control voltage provided by the external power supply, wherein the control voltage is generated based on a target test temperature, and the target test temperature is positively correlated with the control voltage;

[0008] The test circuit is configured to generate a control signal based on the reference voltage and the control voltage, and output the control signal at a third terminal;

[0009] The driving unit is configured to output a test signal under the action of the control signal or not output a signal after being damaged.

[0010] The test circuit provided in this embodiment is configured to generate a control signal based on the reference voltage and the control voltage, and output the control signal at a third terminal. The control voltage is generated based on a target test temperature, and the target test temperature is positively correlated with the control voltage. The drive unit is configured to output a test signal under the action of the control signal or not output a signal after being damaged. In this way, by changing the magnitude of the control voltage, the performance of the driver chip at different target test temperatures can be tested. This test circuit has a simple control method and a simple structure, and can more simply and efficiently test the actual temperature range that the driver chip can withstand under normal operation, so as to help improve the stability of the driver chip operation.

[0011] In some embodiments of the present application, the test circuit includes: a voltage divider circuit, a comparison circuit and a signal merging circuit;

[0012] The voltage divider circuit has an input end connected to the output end of the bandgap reference circuit, and an output end connected to the first end of the comparison circuit;

[0013] The comparison circuit has a second terminal connected to the external power supply and a third terminal outputting a first initial control signal and a second initial control signal;

[0014] a signal combining circuit, the input end of which is connected to the third end of the comparison circuit, and the output end of which is connected to the input end of the driving unit;

[0015] The voltage divider circuit is configured to divide the reference voltage into a first reference voltage and a second reference voltage;

[0016] The comparison circuit is configured to receive a first control voltage and a second control voltage provided by the external power supply, generate a first initial control signal according to the first reference voltage and the first control voltage, and generate a second initial control signal according to the second reference voltage and the second control voltage;

[0017] The signal merging circuit is configured to merge the first initial control signal and the second initial control signal into the control signal.

[0018] In some embodiments of the present application, the second control voltage is greater than the first control voltage.

[0019] The test circuit provided in this embodiment includes a voltage divider circuit, a comparison circuit and a signal merging circuit. The voltage divider circuit is configured to divide the reference voltage into a first reference voltage and a second reference voltage. The comparison circuit is configured to receive a first control voltage and a second control voltage provided by the external power supply, generate a first initial control signal according to the first reference voltage and the first control voltage, and generate a second initial control signal according to the second reference voltage and the second control voltage. The signal merging circuit is configured to merge the first initial control signal and the second initial control signal into the control signal.

[0020] By setting the first control voltage and the second control voltage, it can be achieved that after the overheat protection inside the driver chip is triggered, it can also be known through the output of the driving unit whether the driver chip can withstand a higher target test temperature, and the higher target test temperature refers to a temperature higher than the temperature corresponding to the overheat protection. Compared with the traditional solution, the test circuit provided in this embodiment can know the actual temperature range (or extreme temperature range) that the driver chip can withstand, and the test of the driver chip is more accurate, so as to help improve the stability of the operation of the driver chip. In addition, the control method of the test circuit provided in this embodiment is simple, and the structure is simple, so that the actual temperature range that the driver chip can withstand under normal operation can be tested more simply and efficiently, so as to help improve the stability of the operation of the driver chip.

[0021] In some embodiments of the present application, the comparison circuit includes: a first comparison circuit and a second comparison circuit;

[0022] The first comparison circuit has a first end connected to the output end of the voltage divider circuit, a second end receiving the first control voltage provided by the external power supply, and a third end connected to the driving unit;

[0023] The second comparison circuit has a first end connected to the output end of the voltage divider circuit, a second end receiving a second control voltage provided by the external power supply, and a third end connected to the driving unit;

[0024] The first comparison circuit is configured to generate a first initial control signal according to the first reference voltage and the first control voltage;

[0025] The second comparison circuit is configured to generate a second initial control signal according to the second reference voltage and the second control voltage.

[0026] In the test circuit provided in this embodiment, the comparison circuit includes a first comparison circuit and a second comparison circuit. The first comparison circuit is configured to generate a first initial control signal according to the first reference voltage and the first control voltage. The second comparison circuit is configured to generate a second initial control signal according to the second reference voltage and the second control voltage.

[0027] By setting the first control voltage and the second control voltage, it can be achieved that after the overheat protection inside the driver chip is triggered, it can also be known through the output of the driving unit whether the driver chip can withstand a higher target test temperature, and the higher target test temperature refers to a temperature higher than the temperature corresponding to the overheat protection. Compared with the traditional solution, the test circuit provided in this embodiment can know the actual temperature range (or extreme temperature range) that the driver chip can withstand, and the test of the driver chip is more accurate, so as to help improve the stability of the operation of the driver chip. In addition, the control method of the test circuit provided in this embodiment is simple, and the structure is simple, so that the actual temperature range that the driver chip can withstand under normal operation can be tested more simply and efficiently, so as to help improve the stability of the operation of the driver chip.

[0028] In some embodiments of the present application, when the first comparison circuit is a first comparator, the first terminal of the first comparison circuit is a negative input terminal of the first comparator, and the second terminal is a positive input terminal of the first comparator;

[0029] When the second comparison circuit is a second comparator, the first terminal of the second comparison circuit is the negative input terminal of the second comparator, and the second terminal is the positive input terminal of the second comparator.

[0030] In the test circuit provided in this embodiment, the first comparison circuit is the first comparator, and the second comparison circuit is the second comparator. The first comparison circuit and the second comparison circuit have simple structures and can realize signal comparison simply and efficiently.

[0031] In some embodiments of the present application, the first comparison circuit includes: a first comparator; the second comparison circuit includes: a second comparator and an inverter;

[0032] The first terminal of the first comparison circuit is the negative input terminal of the first comparator, and the second terminal is the positive input terminal of the first comparator;

[0033] The first terminal of the second comparator is a positive input terminal of the second comparator, and the second terminal is a negative input terminal of the second comparator;

[0034] The input end of the inverter is connected to the third end of the second comparator, and the output end of the inverter is connected to the input end of the signal combining circuit.

[0035] In the test circuit provided in this embodiment, the first comparison circuit is composed of a comparator, and the second comparison circuit is composed of a comparator and an inverter, which has a simple structure and can realize signal comparison simply and efficiently.

[0036] In some embodiments of the present application, the driving unit includes a driving transistor, and the test circuit further includes a signal detection circuit, wherein the signal detection circuit is provided with a transistor identical to the driving transistor;

[0037] The first end of the signal detection circuit is connected to the output end of the comparison circuit, the second end receives the first external voltage, and the third end is connected to the power supply end;

[0038] The signal detection circuit is configured to output a detection signal at the second end or not output a signal after being damaged according to the first initial control signal and the second initial control signal.

[0039] The test circuit provided in this embodiment includes a signal detection circuit. The signal detection circuit is provided with a transistor identical to the driving transistor, and the signal detection circuit is configured to output a detection signal at the second end or not output a signal after damage according to the first initial control signal and the second initial control signal. The signal detection circuit can also detect whether the driving unit can withstand the target test temperature at this time. In practical applications, it can be comprehensively judged whether the driving unit can withstand the target test temperature at this time based on the test signal output by the driving unit and the detection signal output by the signal detection circuit, thereby improving the accuracy of the driver chip test.

[0040] In some embodiments of the present application, the signal detection circuit includes: a first logic OR gate circuit and the transistor;

[0041] The input end of the first logic OR gate circuit is connected to the output end of the comparison circuit, and the output end is connected to the control end of the transistor;

[0042] The first end of the transistor is the second end of the signal detection circuit; the second end of the transistor is the third end of the signal detection circuit.

[0043] The test circuit provided in this embodiment includes a signal detection circuit. The signal detection circuit is provided with the transistor identical to the driving transistor, and the signal detection circuit is configured to output a detection signal at the second end or not output a signal after damage according to the first initial control signal and the second initial control signal. The signal detection circuit can also detect whether the driving unit can withstand the target test temperature at this time. In practical applications, it can be comprehensively judged whether the driving unit can withstand the target test temperature at this time based on the test signal output by the driving unit and the detection signal output by the signal detection circuit, thereby improving the accuracy of the driver chip test.

[0044] In a second aspect, the present application provides a driver chip, comprising the test circuit as described in the first aspect, and further comprising a bandgap reference circuit and a driver unit;

[0045] The output end of the bandgap reference circuit is connected to the input end of the test circuit;

[0046] The input end of the driving unit is connected to the output end of the test circuit;

[0047] The bandgap reference circuit is configured to provide a reference voltage;

[0048] The driving unit is configured to output a driving signal of the power device, and to output a test signal under the action of the control signal or not output a signal after being damaged.

[0049] The driver chip provided in this embodiment includes a bandgap reference circuit, a test circuit and a drive unit. The test circuit is configured to generate a control signal based on the reference voltage and the control voltage, and output the control signal at a third terminal. The control voltage is generated based on a target test temperature, and the target test temperature is positively correlated with the control voltage. The drive unit is configured to output a test signal under the action of the control signal or not output a signal after being damaged. In this way, by changing the size of the control voltage, the performance of the driver chip at different target test temperatures can be tested.

[0050] The test circuit provided in the driver chip provided in this embodiment has a simple control method and a simple structure, and can more simply and efficiently test the actual temperature range that the driver chip can withstand under normal operation, so as to help improve the stability of the operation of the driver chip.

[0051] In some embodiments of the present application, the driving unit includes: a pull-up circuit, a pull-down circuit, and a second logic OR gate circuit;

[0052] The second end of the pull-up circuit is connected to the first power supply, and the third end is connected to the third end of the pull-down circuit;

[0053] The second end of the pull-down circuit is connected to a second power supply;

[0054] The first end of the second logic OR gate circuit is connected to the output end of the test circuit, the second end receives a second external voltage, and the third end is connected to the first end of the pull-up circuit and the first end of the pull-down circuit;

[0055] The third end of the pull-up circuit is configured to output a pull-up driving signal, or not output a signal after being damaged;

[0056] The third terminal of the pull-down circuit is configured to output a pull-down driving signal as the test signal, or not output a signal after being damaged.

[0057] The driving unit provided in this embodiment includes a pull-up circuit, a pull-down circuit and a second logic OR gate circuit. The first end of the second logic OR gate circuit is connected to the output end of the test circuit, the second end receives a second external voltage, and the third end is connected to the first end of the pull-up circuit and the first end of the pull-down circuit. The third end of the pull-up circuit is configured to output a pull-up driving signal. The third end of the pull-down circuit is configured to output a pull-down driving signal as the test signal.

[0058] When the control signal output by the test circuit is at a high level, the pull-down circuit is turned on, and the pull-down circuit outputs a pull-down drive signal as a test signal or does not output a signal after being damaged. The test signal can be used to determine whether the driver chip can withstand the current target test temperature. Similarly, by changing the magnitude of the control voltage to change the level of the control signal, the performance of the driver chip at different target test temperatures can be tested.

[0059] The test circuit provided in the driver chip provided in this embodiment has a simple control method and a simple structure, and can more simply and efficiently test the actual temperature range that the driver chip can withstand under normal operation, so as to help improve the stability of the operation of the driver chip.

[0060] In a third aspect, the present application provides an electronic device, comprising the driver chip provided in the second aspect, and also comprising a power device;

[0061] The driving chip is connected to the control end of the power device;

[0062] The driving chip is configured to output a driving signal of a power device. BRIEF DESCRIPTION OF THE DRAWINGS

[0063] In order to more clearly illustrate the implementation methods in the embodiments of the present application or the related technologies, the following is a brief introduction to the drawings required for use in the embodiments or the related technology descriptions. Obviously, the drawings described below are some embodiments of the present application, and a person skilled in the art can also obtain other drawings based on these drawings.

[0064] Figure 1 A schematic diagram of a test circuit provided for one embodiment of the present application;

[0065] Figure 2 A schematic diagram of a test circuit provided for one embodiment of the present application;

[0066] Figure 3 A schematic diagram of a test circuit provided for one embodiment of the present application;

[0067] Figure 4 A schematic diagram of a voltage divider circuit in a test circuit provided in one embodiment of the present application;

[0068] Figure 5 A schematic diagram of a test circuit provided for one embodiment of the present application;

[0069] Figure 6 A schematic diagram of a test circuit provided for one embodiment of the present application;

[0070] Figure 7 A schematic diagram of changes of various signals in a test circuit provided in one embodiment of the present application;

[0071] Figure 8 A partial schematic diagram of a test circuit provided for one embodiment of the present application;

[0072] Fig. 9 A schematic diagram of a driver chip provided for one embodiment of the present application;

[0073] Fig.10 A schematic diagram of a driver chip provided for one embodiment of the present application. DETAILED DESCRIPTION

[0074] In order to make the purpose, implementation mode and advantages of the present application clearer, the exemplary implementation mode of the present application will be clearly and completely described below in conjunction with the drawings in the exemplary embodiments of the present application. Obviously, the described exemplary embodiments are only part of the embodiments of the present application, rather than all the embodiments.

[0075] It should be noted that the brief description of terms in this application is only for the convenience of understanding the embodiments described below, and is not intended to limit the embodiments of this application. Unless otherwise specified, these terms should be understood according to their common and usual meanings.

[0076] In addition, the terms "include" and "have" and any variations thereof are intended to cover but not exclude inclusion, for example, a product or device comprising a list of components is not necessarily limited to those components expressly listed but may include other components not expressly listed or inherent to such products or devices.

[0077] In the description of the present application, it should be understood that the terms "center", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0078] The terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, unless otherwise specified, "plurality" means two or more.

[0079] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0080] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0081] See also Figure 1 , an embodiment of the present application provides a test circuit 10.

[0082] The test circuit 10 has a first terminal connected to the output terminal of the bandgap reference circuit 21 , a second terminal connected to an external power supply, and a third terminal connected to the input terminal of the driving unit 22 .

[0083] The bandgap reference circuit 21 and the driving unit 22 are both disposed inside a driving chip 20 of the power device. The driving chip 20 outputs a driving signal based on the driving unit 22 to drive the power device.

[0084] The bandgap reference circuit 21 is connected to the input end of the test circuit 10 and is configured to provide a reference voltage to the test circuit 10. The input end of the driving unit 22 is connected to the output end of the test circuit 10, and the output end of the driving unit 22 is connected to the control end of the power device.

[0085] The test circuit 10 is configured to receive the reference voltage provided by the bandgap reference circuit 21 and the control voltage provided by the external power supply.

[0086] The control voltage is generated based on the target test temperature, and the target test temperature is positively correlated with the control voltage. That is, different target test temperatures correspond to different control voltages. For example, 130° C. corresponds to the first control voltage, and 150° C. corresponds to the second control voltage.

[0087] The test circuit 10 is configured to generate a control signal based on the reference voltage and the control voltage, and output the control signal at a third terminal.

[0088] The driving unit 22 is configured to output a test signal under the control signal or not output a signal after being damaged.

[0089] The test signal may be a pull-down gate driving signal output by the driving unit 22 .

[0090] That is to say, by detecting the output of the driving unit 22, it can be determined whether the target test temperature is within the actual temperature range that the driving chip 20 can withstand. Specifically, when the test signal output is the pull-down gate drive signal, it proves that the driving chip 20 can withstand the target test temperature corresponding to the control voltage, and the target test temperature is within the actual temperature range that the driving chip 20 can withstand. When the driving unit 22 is damaged and does not output a signal, it proves that the driving chip 20 cannot withstand the target test temperature corresponding to the control voltage, and the target test temperature exceeds the actual temperature range that the driving chip 20 can withstand. Therefore, based on the output of the driving unit 22, the actual temperature range that the driving chip 20 can withstand can be inferred. The actual temperature range can be understood as the extreme temperature range.

[0091] In one of the embodiments, when inferring the real temperature range that the driver chip 20 can withstand, the specific operation method is to change the size of the target test temperature and test to obtain the real temperature range that the driver chip 20 can withstand. For example, the test shows that at the first target test temperature, the driver unit 22 can output the test signal. At this time, the second target test temperature is formed by adding a threshold temperature on the basis of the first target test temperature. The test shows that at the second target test temperature, the driver unit 22 does not output a signal after being damaged. Then the first target test temperature can be understood as a real temperature. The threshold temperature can be selected according to actual needs. The smaller the threshold temperature, the more accurate the measured real temperature.

[0092] It should be noted that when the real temperature is obtained, the real temperature of the same type of driver chip 20 is obtained, because after a tested driver chip 20 is damaged, the same type of driver chip 20 is used as the next tested driver chip 20, and so on, until the real temperature is determined.

[0093] The test circuit 10 provided in this embodiment is configured to generate a control signal based on the reference voltage and the control voltage, and output the control signal at the third terminal. The control voltage is generated based on the target test temperature, and the target test temperature is positively correlated with the control voltage. The drive unit 22 is configured to output a test signal under the action of the control signal or not output a signal after being damaged. In this way, by changing the magnitude of the control voltage, the performance of the driver chip 20 at different target test temperatures can be tested. This test circuit 10 has a simple control method and a simple structure, and can more simply and efficiently test the actual temperature range that the driver chip 20 can withstand under normal operation, so as to help improve the stability of the operation of the driver chip 20.

[0094] See also Figure 2 In some embodiments, the test circuit 10 includes: a voltage divider circuit 11, a comparison circuit 12 and a signal merging circuit 13.

[0095] The voltage divider circuit 11 has an input end connected to the output end of the bandgap reference circuit 21 , and an output end connected to the first end of the comparison circuit 12 .

[0096] The voltage divider circuit 11 is configured to divide the reference voltage into a first reference voltage and a second reference voltage. The first reference voltage and the second reference voltage may have the same temperature coefficient. The first reference voltage may also have a zero temperature coefficient, and correspondingly, the second reference voltage has an absolute positive temperature coefficient.

[0097] The comparison circuit 12 has a second terminal connected to the external power supply, and a third terminal outputting a first initial control signal and a second initial control signal.

[0098] The comparison circuit 12 is configured to receive a first control voltage and a second control voltage provided by the external power supply. The comparison circuit 12 is configured to generate a first initial control signal according to the first reference voltage and the first control voltage. The comparison circuit 12 is configured to generate a second initial control signal according to the second reference voltage and the second control voltage. Specifically, the comparison circuit 12 generates the first initial control signal by comparing the first reference voltage and the first control voltage. The comparison circuit 12 generates the second initial control signal by comparing the second reference voltage and the second control voltage.

[0099] The signal merging circuit 13 has an input end connected to the third end of the comparison circuit 12, and an output end connected to the input end of the driving unit 22. The signal merging circuit 13 is configured to merge the first initial control signal and the second initial control signal into the control signal. The signal merging circuit 13 may be a logic AND gate circuit.

[0100] It should be noted that, in the conventional solution, when the overheat protection capability of the driver chip 20 is tested, the overheat protection structure in the driver chip 20 will perform overheat protection, which results in the inability to test the actual temperature range that the driver chip 20 can withstand. For example, researchers need to test whether the driver chip 20 can withstand a high temperature of 150 degrees Celsius (℃), but during the test, due to the existence of the overheat protection structure, the overheat protection of the driver chip 20 is triggered at 130℃, so it is impossible to determine whether the driver chip 20 can withstand a high temperature of 150℃ through the signal output by the driver chip 20.

[0101] Therefore, optionally, the second control voltage may be greater than the first control voltage. At this time, the comparison circuit 12 may first receive the first control voltage. At this time, the comparison circuit 12 outputs the first initial control signal, and correspondingly, the signal merging circuit 13 receives the first initial control signal. When the first control voltage triggers the overheat protection inside the driver chip 20, the comparison circuit 12 receives the second control voltage again. Correspondingly, the comparison circuit 12 outputs the first initial control signal and the second initial control signal, and the signal merging circuit 13 receives the first initial control signal and the second initial control signal.

[0102] In this way, after the overheat protection inside the driver chip 20 is triggered, it is also possible to know whether the driver chip 20 can withstand a higher target test temperature through the output of the driver unit 22. The higher target test temperature refers to a temperature higher than the temperature corresponding to the overheat protection.

[0103] For example, when 130°C is used as the first target test temperature, it corresponds to the first control voltage, and when 150°C is used as the second target test temperature, it corresponds to the second control voltage. The second control voltage is greater than the first control voltage. The comparison circuit 12 first receives the first control voltage, and at this time, the overheat protection inside the driver chip 20 is triggered. If the comparison circuit 12 continues to be controlled to receive the first control voltage, it is impossible to know whether the driver chip 20 can withstand 150°C. At this time, the comparison circuit 12 is controlled to receive the second control voltage, and the second control voltage corresponds to the second initial control signal. The signal merging circuit 13 outputs the control signal after receiving the first initial control signal and the second initial control signal. The drive unit 22 outputs a test signal under the action of the control signal or does not output a signal after being damaged. Then, according to the output of the drive unit 22, it can be judged whether the drive chip 20 can withstand 150°C.

[0104] Optionally, the second control voltage may be a signal obtained by amplifying the first control voltage. The first control voltage may be amplified by an amplifier inside the driver chip to obtain the second control voltage. The second control voltage is multiplexed at the input end of the comparison circuit 12.

[0105] It should also be noted that, under normal temperature conditions, the first initial control signal output by the comparison circuit 12 is a low-level signal. When the target test temperature is increased so that the first control voltage is greater than the first reference voltage, the first initial control signal output by the comparison circuit 12 is a high-level signal. When the target test temperature is increased again to a temperature greater than the temperature corresponding to the overheat protection, the comparison circuit 12 receives the second control voltage, and as the second control voltage increases, the second initial control signal output by the comparison circuit 12 is a high-level signal. When both the first initial control signal and the second initial control signal are high-level signals, the control signal output by the signal merging circuit 13 is a high-level signal. When the control signal acts on the drive unit 22, the pull-down circuit in the drive unit 22 is controlled to be turned on, and the power device is turned off after the pull-down circuit is turned on. At this time, one end of the pull-down circuit outputs a pull-down drive signal as the test signal.

[0106] The test circuit 10 provided in this embodiment includes a voltage divider circuit 11, a comparison circuit 12 and a signal merging circuit 13. The voltage divider circuit 11 is configured to divide the reference voltage into a first reference voltage and a second reference voltage. The comparison circuit 12 is configured to receive a first control voltage and a second control voltage provided by the external power supply, generate a first initial control signal according to the first reference voltage and the first control voltage, and generate a second initial control signal according to the second reference voltage and the second control voltage. The signal merging circuit 13 is configured to merge the first initial control signal and the second initial control signal into the control signal.

[0107] By setting the first control voltage and the second control voltage, it can be achieved that after the overheat protection inside the driver chip 20 is triggered, it can also be known through the output of the driving unit 22 whether the driver chip 20 can withstand a higher target test temperature, and the higher target test temperature refers to a temperature higher than the temperature corresponding to the overheat protection. Compared with the traditional solution, the test circuit 10 provided in this embodiment can know the actual temperature range (or extreme temperature range) that the driver chip 20 can withstand, and the test of the driver chip 20 is more accurate, so as to help improve the stability of the operation of the driver chip 20. In addition, the control method of the test circuit 10 provided in this embodiment is simple, and the structure is simple, and it can more simply and efficiently test the actual temperature range that the driver chip 20 can withstand under normal operation, so as to help improve the stability of the operation of the driver chip 20.

[0108] See also Figure 3 In some embodiments, the comparison circuit 12 includes a first comparison circuit 121 and a second comparison circuit 122 .

[0109] The first comparison circuit 121 has a first terminal connected to the output terminal of the voltage divider circuit 11 , a second terminal receiving the first control voltage provided by the external power supply, and a third terminal connected to the driving unit 22 .

[0110] The second comparison circuit 122 has a first terminal connected to the output terminal of the voltage divider circuit 11 , a second terminal receiving a second control voltage provided by the external power supply, and a third terminal connected to the driving unit 22 .

[0111] The first comparison circuit 121 is configured to generate a first initial control signal according to the first reference voltage and the first control voltage. Specifically, the first comparison circuit 121 generates the first initial control signal by comparing the first reference voltage and the first control voltage.

[0112] The second comparison circuit 122 is configured to generate a second initial control signal according to the second reference voltage and the second control voltage. Specifically, the second comparison circuit 122 generates the second initial control signal by comparing the second reference voltage and the second control voltage.

[0113] The first comparison circuit 121 and the second comparison circuit 122 may be circuits including comparators, and the comparison of signals is realized by the comparators. The first comparison circuit 121 and the second comparison circuit 122 may also include other devices, such as inverters, voltage regulators, etc., which are not limited in this embodiment.

[0114] Under normal temperature conditions, the first initial control signal output by the first comparison circuit 121 is a low-level signal. When the target test temperature is increased so that the first control voltage is greater than the first reference voltage, the first initial control signal output by the first comparison circuit 121 is a high-level signal. When the target test temperature is increased again to a temperature greater than the temperature corresponding to the overheat protection, the second comparison circuit 122 receives the second control voltage, and as the second control voltage increases, the second initial control signal output by the second comparison circuit 122 is a high-level signal. When both the first initial control signal and the second initial control signal are high-level signals, the control signal output by the signal merging circuit 13 is a high-level signal. When the control signal acts on the drive unit 22, the pull-down circuit in the drive unit 22 is controlled to be turned on, and the power device is turned off after the pull-down circuit is turned on. At this time, one end of the pull-down circuit outputs a pull-down drive signal as the test signal.

[0115] In the test circuit 10 provided in this embodiment, the comparison circuit 12 includes a first comparison circuit 121 and a second comparison circuit 122. The first comparison circuit 121 is configured to generate a first initial control signal according to the first reference voltage and the first control voltage. The second comparison circuit 122 is configured to generate a second initial control signal according to the second reference voltage and the second control voltage.

[0116] By setting the first control voltage and the second control voltage, it can be achieved that after the overheat protection inside the driver chip 20 is triggered, it can also be known through the output of the driving unit 22 whether the driver chip 20 can withstand a higher target test temperature, and the higher target test temperature refers to a temperature higher than the temperature corresponding to the overheat protection. Compared with the traditional solution, the test circuit 10 provided in this embodiment can know the actual temperature range (or extreme temperature range) that the driver chip 20 can withstand, and the test of the driver chip 20 is more accurate, so as to help improve the stability of the operation of the driver chip 20. In addition, the control method of the test circuit 10 provided in this embodiment is simple, and the structure is simple, and it can more simply and efficiently test the actual temperature range that the driver chip 20 can withstand under normal operation, so as to help improve the stability of the operation of the driver chip 20.

[0117] See also Figure 4 In some embodiments, the voltage divider circuit 11 includes an amplifier 110 as shown in the figure, a control switch 111 (a transistor as shown in the figure), a resistor R1, a resistor R2 and a resistor R3.

[0118] The first terminal (positive input terminal) of the amplifier 110 is connected to the output terminal of the bandgap reference circuit 21. The second terminal (negative input terminal) of the amplifier 110 is connected to the first terminal of the resistor R3 to receive the voltage V1. The second terminal of the resistor R3 is connected to the low voltage power supply terminal (for example, the ground terminal shown in the figure). The third terminal of the amplifier 110 is connected to the first terminal of the control switch 111. The fourth terminal of the amplifier 110 is connected to the high voltage power supply terminal, and the fifth terminal is connected to the low voltage power supply terminal (for example, the ground terminal shown in the figure).

[0119] The second end of the control switch 111 is connected to the high voltage power supply end, and the third end is connected to the first end of the resistor R1. The second end of the resistor R1 outputs the second reference voltage. The second end of the resistor R1 is connected to the first end of the resistor R2, and the second end of the resistor R2 is connected to the first end of the resistor R3. The first end of the resistor R2 outputs the first reference voltage. The purpose of this design is to make the second reference voltage greater than the second reference voltage.

[0120] The resistance values ​​of the resistor R1 , the resistor R2 , and the resistor R3 can be selected according to actual needs, and are not limited in this embodiment.

[0121] The models of the amplifier 110 and the control switch 111 may also be selected according to actual needs, and are not limited in this embodiment.

[0122] The voltage divider circuit 11 may be a voltage follower.

[0123] The voltage divider circuit 11 provided in this embodiment has a simple structure and can efficiently divide the reference voltage.

[0124] See also Figure 5 In some embodiments, the first comparison circuit 121 and the second comparison circuit 122 may be circuits including comparators.

[0125] like Figure 5 As shown, the first comparison circuit 121 is a first comparator 123. Then, the first end of the first comparison circuit 121 is the negative input end of the first comparator 123, and the second end of the first comparison circuit 121 is the positive input end of the first comparator 123. The negative input end of the first comparator 123 inputs the first reference voltage, and the positive input end of the first comparator 123 inputs the first control voltage. The output of the first comparator 123 is the first initial control signal.

[0126] like Figure 5 As shown, the second comparison circuit 122 is a second comparator 124. Then, the first end of the second comparison circuit 122 is the negative input end of the second comparator 124, and the second end of the second comparator 124 is the positive input end of the second comparator 124. The negative input end of the second comparator 124 inputs the second reference voltage, and the positive input end of the second comparator 124 inputs the second control voltage. The output of the second comparator 124 is the second initial control signal.

[0127] The first comparator 123 and the second comparator 124 may be comparators having the same structure.

[0128] The first initial control signal and the second initial control signal enter the signal merging circuit 13, and the signal merging circuit 13 merges the first initial control signal and the second initial control signal into a control signal and then outputs the control signal.

[0129] like Figure 5 As shown, the signal combining circuit 13 may be a logic AND gate circuit.

[0130] In the test circuit 10 provided in this embodiment, the first comparison circuit 121 is the first comparator 123, and the second comparison circuit 122 is the second comparator 124. The first comparison circuit 121 and the second comparison circuit 122 have simple structures and can realize signal comparison simply and efficiently.

[0131] In some embodiments, the first comparison circuit 121 includes a first comparator 123. The second comparison circuit 122 includes a second comparator 124 and an inverter.

[0132] The first terminal of the first comparison circuit 121 is the positive input terminal of the first comparator 123, and the second terminal is the negative input terminal of the first comparator 123. The positive input terminal of the first comparator 123 receives the first reference voltage, and the negative input terminal of the first comparator 123 receives the first control voltage.

[0133] The first end of the second comparator 124 is the positive input end of the second comparator 124, and the second end is the negative input end of the second comparator 124. The positive input end of the second comparator 124 receives the second reference voltage, and the negative input end of the second comparator 124 receives the second control voltage. At this time, the input end of the inverter is connected to the third end (i.e., the output end) of the second comparator 124. Through the action of the inverter, the signal output by the second comparator 124 is inverted, and the second initial control signal is output after the inversion process.

[0134] The first comparator 123 and the second comparator 124 may be comparators having the same structure.

[0135] The first initial control signal and the second initial control signal enter the signal merging circuit 13, and the signal merging circuit 13 merges the first initial control signal and the second initial control signal into a control signal and then outputs the control signal.

[0136] The signal combining circuit 13 may be a logic AND gate circuit.

[0137] In the test circuit 10 provided in this embodiment, the first comparison circuit 121 is composed of a comparator, and the second comparison circuit 122 is composed of a comparator and an inverter, which has a simple structure and can realize signal comparison simply and efficiently.

[0138] See also Figure 6 In some embodiments, the driving unit 22 includes a driving transistor, and the test circuit 10 further includes a signal detection circuit 14. The signal detection circuit 14 is provided with a transistor that is the same as the driving transistor.

[0139] The signal detection circuit 14 has a first terminal connected to the output terminal of the comparison circuit 12 , a second terminal receiving a first external voltage, and a third terminal connected to a power supply terminal.

[0140] The signal detection circuit 14 is configured to output a detection signal at the second end or not output a signal after being damaged according to the first initial control signal and the second initial control signal.

[0141] Under normal temperature, the first initial control signal output by the first comparison circuit 121 is a low level signal. When the target test temperature is increased so that the first control voltage is greater than the first reference voltage, the first initial control signal output by the first comparison circuit 121 is a high level signal.

[0142] like Figure 7 As shown in the signal change schematic diagram, when the target test temperature is increased again to a temperature greater than the temperature corresponding to the overheat protection, the second comparison circuit 122 receives the second control voltage, and as the second control voltage increases, the second initial control signal output by the second comparison circuit 122 is a high level signal. When both the first initial control signal and the second initial control signal are high level signals, the detection signal output by the signal detection circuit 14 is a low level signal. As shown in the figure, when the second initial control signal is a high level signal, the detection signal is a low level signal.

[0143] Thus, by the detection signal output by the signal detection circuit 14, it is also possible to determine whether the transistor 142 can withstand the target test temperature. Specifically, when the detection signal is at a low level, it is determined that the transistor 142 can withstand the target test temperature at this time. When the detection signal is not output after damage, it is determined that the transistor 142 cannot withstand the target test temperature at this time. Since the transistor 142 is the same as the driving transistor in the driving unit 22, by detecting whether the transistor 142 can withstand the target test temperature at this time, it is also possible to know whether the driving unit 22 can withstand the target test temperature at this time.

[0144] The test circuit 10 provided in this embodiment includes a signal detection circuit 14. The signal detection circuit 14 is provided with a transistor identical to the driving transistor, and the signal detection circuit 14 is configured to output a detection signal at the second end or not output a signal after being damaged according to the first initial control signal and the second initial control signal. The signal detection circuit 14 can also detect whether the driving unit 22 can withstand the target test temperature at this time. In practical applications, it can be comprehensively judged whether the driving unit 22 can withstand the target test temperature at this time based on the test signal output by the driving unit 22 and the detection signal output by the signal detection circuit 14, thereby improving the accuracy of the test of the driving chip 20.

[0145] Please also refer to Figure 8 In some embodiments, the signal detection circuit 14 includes a first logic OR gate circuit 141 and the transistor 142 as described above.

[0146] The input end of the first logic OR gate circuit 141 is connected to the output end of the comparison circuit 12, and the output end is connected to the control end of the transistor 142. The first end of the transistor 142 is the second end of the signal detection circuit 14; the second end of the transistor 142 is the third end of the signal detection circuit 14.

[0147] As can be seen from the figure, the first logic or gate circuit 141 receives the first initial control signal and the second initial control signal. When the first initial control signal is high or the second initial control signal is a high signal, the first logic or gate circuit 141 outputs a high signal. The high signal acts on the control end (gate) of the transistor 142 to control the transistor 142 to turn on. Before the transistor 142 is turned on, the first end of the transistor 142 (i.e., the second end of the signal detection circuit 14) receives the first external voltage, and the detection signal output by the first end of the transistor 142 is a high signal. After the transistor 142 is turned on, the first end of the transistor 142 is connected to the second end of the transistor 142, and the detection signal output by the first end of the transistor 142 is a low signal. If the transistor 142 is broken down and damaged, the first end of the transistor 142 does not output a signal.

[0148] Optionally, as shown in the figure, the first end of the transistor 142 is also connected to one end of an external resistor R. The other end of the external resistor R is connected to an external power supply. The voltage provided by the external power supply may be 5V.

[0149] The test circuit 10 provided in this embodiment includes a signal detection circuit 14. The signal detection circuit 14 is provided with a transistor 142 that is the same as the driving transistor. The signal detection circuit 14 is configured to output a detection signal at the second end or not output a signal after damage according to the first initial control signal and the second initial control signal. The signal detection circuit 14 can also detect whether the driving unit 22 can withstand the target test temperature at this time. In practical applications, it can be comprehensively judged whether the driving unit 22 can withstand the target test temperature at this time based on the test signal output by the driving unit 22 and the detection signal output by the signal detection circuit 14, thereby improving the accuracy of the test of the driving chip 20.

[0150] See also Fig. 9 , an embodiment of the present application further provides a driving chip 20.

[0151] The driving chip 20 includes the test circuit 10 provided in any one of the above embodiments.

[0152] The driver chip 20 further includes a bandgap reference circuit 21 and a driving unit 22. The output end of the bandgap reference circuit 21 is connected to the input end of the test circuit 10. The input end of the driving unit 22 is connected to the output end of the test circuit 10.

[0153] The bandgap reference circuit 21 is configured to provide a reference voltage, specifically, to input the reference voltage to the test circuit 10 .

[0154] The driving unit 22 is configured to output a driving signal of the power device.

[0155] The test circuit 10 has a first terminal connected to the output terminal of the bandgap reference circuit 21 , a second terminal connected to an external power source, and a third terminal connected to the input terminal of the driving unit 22 .

[0156] The test circuit 10 is configured to receive the reference voltage provided by the bandgap reference circuit 21 and the control voltage provided by the external power supply.

[0157] The control voltage is generated based on the target test temperature, and the target test temperature is positively correlated with the control voltage. That is, different target test temperatures correspond to different control voltages. For example, 130° C. corresponds to the first control voltage, and 150° C. corresponds to the second control voltage.

[0158] The test circuit 10 is configured to generate a control signal based on the reference voltage and the control voltage, and output the control signal at a third terminal.

[0159] The driving unit 22 is configured to output a test signal under the control signal or not output a signal after being damaged.

[0160] The test signal may be a pull-down gate driving signal output by the driving unit 22 .

[0161] That is to say, by detecting the output of the driving unit 22, it can be determined whether the target test temperature is within the actual temperature range that the driving chip 20 can withstand. Specifically, when the test signal output is the pull-down gate drive signal, it proves that the driving chip 20 can withstand the target test temperature corresponding to the control voltage, and the target test temperature is within the actual temperature range that the driving chip 20 can withstand. When the driving unit 22 is damaged and does not output a signal, it proves that the driving chip 20 cannot withstand the target test temperature corresponding to the control voltage, and the target test temperature exceeds the actual temperature range that the driving chip 20 can withstand. Therefore, based on the output of the driving unit 22, the actual temperature range that the driving chip 20 can withstand can be inferred. The actual temperature range can be understood as the extreme temperature range.

[0162] In one of the embodiments, when inferring the real temperature range that the driver chip 20 can withstand, the specific operation method is to change the size of the target test temperature and test to obtain the real temperature range that the driver chip 20 can withstand. For example, the test shows that at the first target test temperature, the driver unit 22 can output the test signal. At this time, the second target test temperature is formed by adding a threshold temperature on the basis of the first target test temperature. The test shows that at the second target test temperature, the driver unit 22 does not output a signal after being damaged. Then the first target test temperature can be understood as a real temperature. The threshold temperature can be selected according to actual needs. The smaller the threshold temperature, the more accurate the measured real temperature.

[0163] It should be noted that when the real temperature is obtained, the real temperature of the same type of driver chip 20 is obtained, because after a tested driver chip 20 is damaged, the same type of driver chip 20 is used as the next tested driver chip 20, and so on, until the real temperature is determined.

[0164] The driver chip 20 provided in this embodiment includes a bandgap reference circuit 21, a test circuit 10 and a drive unit 22. The test circuit 10 is configured to generate a control signal based on the reference voltage and the control voltage, and output the control signal at a third terminal. The control voltage is generated based on a target test temperature, and the target test temperature is positively correlated with the control voltage. The drive unit 22 is configured to output a test signal under the action of the control signal or not output a signal after being damaged. In this way, by changing the size of the control voltage, the performance of the driver chip 20 at different target test temperatures can be tested.

[0165] The test circuit 10 provided in the driver chip 20 provided in this embodiment has a simple control method and a simple structure, and can more simply and efficiently test the actual temperature range that the driver chip 20 can withstand under normal operation, so as to help improve the operating stability of the driver chip 20.

[0166] See also Fig.10 In some embodiments, the driving unit 22 includes: a pull-up circuit 23 , a pull-down circuit 24 , and a second logic OR gate circuit 25 .

[0167] The second end of the pull-up circuit 23 is connected to the first power supply, and the third end is connected to the third end of the pull-down circuit 24. The second end of the pull-down circuit 24 is connected to the second power supply. The first power supply is a high voltage power supply end, and the second power supply is a low voltage power supply end (e.g., a ground end).

[0168] The first end of the second logic OR gate circuit 25 is connected to the output end of the test circuit 10, the second end receives the second external voltage, and the third end is connected to the first end of the pull-up circuit 23 and the first end of the pull-down circuit 24. The second external voltage can be set according to actual needs.

[0169] The third end of the pull-up circuit 23 is configured to output a pull-up driving signal, or not output a signal after being damaged. The third end of the pull-down circuit 24 is configured to output a pull-down driving signal as the test signal, or not output a signal after being damaged.

[0170] After the second logic OR gate circuit 25 receives the control signal output by the test circuit 10, if the control signal is at a low level, it outputs a low level signal to the first end of the pull-up circuit 23 and the first end of the pull-down circuit 24. At this time, the pull-down circuit 24 is not conducting, and the third end of the pull-up circuit 23 outputs a pull-up driving signal to the power device.

[0171] After the second logic OR gate circuit 25 receives the control signal output by the test circuit 10, if the control signal is at a high level, it outputs a high level signal to the first end of the pull-up circuit 23 and the first end of the pull-down circuit 24. At this time, the pull-down circuit 24 is turned on, and the third end of the pull-down circuit 24 outputs a pull-down driving signal as the test signal.

[0172] Optionally, other devices or circuits, such as a voltage stabilizing circuit, a voltage stabilizing resistor, etc., may be provided in the pull-up circuit 23 and the pull-down circuit 24, which is not limited in this embodiment.

[0173] The driving unit 22 provided in this embodiment includes a pull-up circuit 23, a pull-down circuit 24, and a second logic OR gate circuit 25. The first end of the second logic OR gate circuit 25 is connected to the output end of the test circuit 10, the second end receives the second external voltage, and the third end is connected to the first end of the pull-up circuit 23 and the first end of the pull-down circuit 24. The third end of the pull-up circuit 23 is configured to output a pull-up driving signal. The third end of the pull-down circuit 24 is configured to output a pull-down driving signal as the test signal.

[0174] When the control signal output by the test circuit 10 is at a high level, the pull-down circuit 24 is turned on, and the pull-down circuit 24 outputs a pull-down driving signal as a test signal or does not output a signal after being damaged. The test signal can be used to determine whether the driver chip 20 can withstand the current target test temperature. Similarly, by changing the magnitude of the control voltage to change the level of the control signal, the performance of the driver chip 20 at different target test temperatures can be tested.

[0175] The test circuit 10 provided in the driver chip 20 provided in this embodiment has a simple control method and a simple structure, and can more simply and efficiently test the actual temperature range that the driver chip 20 can withstand under normal operation, so as to help improve the operating stability of the driver chip 20.

[0176] Some embodiments of the present application also provide an electronic device, which includes a driver chip 20 provided in any of the above embodiments, and also includes a power device. The driver chip 20 is connected to the control end of the power device. The driver chip 20 is configured to output a driving signal of the power device.

[0177] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

[0178] For the convenience of explanation, the above description has been made in conjunction with specific embodiments. However, the above exemplary discussion is not intended to be exhaustive or limit the embodiments to the specific forms disclosed above. Based on the above teachings, various modifications and variations can be obtained. The selection and description of the above embodiments are to better explain the principles and practical applications, so that those skilled in the art can better use the embodiments and various different variations of the embodiments suitable for specific use considerations.

Claims

1. A test circuit, characterized in that: The first end of the test circuit is connected to the output end of the bandgap reference circuit, the second end is connected to the external power supply, and the third end is connected to the input end of the driving unit; the bandgap reference voltage and the driving unit are both arranged inside the driving chip of the power device; The test circuit is configured to receive a reference voltage provided by the bandgap reference circuit and a control voltage provided by the external power supply, wherein the control voltage is generated based on a target test temperature, and the target test temperature is positively correlated with the control voltage; The test circuit is configured to generate a control signal based on the reference voltage and the control voltage, and output the control signal at a third terminal; The driving unit is configured to output a test signal under the action of the control signal or not output a signal after being damaged.

2. The test circuit according to claim 1, characterized in that: The test circuit comprises: a voltage divider circuit, a comparison circuit and a signal combining circuit; The voltage divider circuit has an input end connected to the output end of the bandgap reference circuit, and an output end connected to the first end of the comparison circuit; The comparison circuit has a second terminal connected to the external power supply and a third terminal outputting a first initial control signal and a second initial control signal; a signal combining circuit, the input end of which is connected to the third end of the comparison circuit, and the output end of which is connected to the input end of the driving unit; The voltage divider circuit is configured to divide the reference voltage into a first reference voltage and a second reference voltage; The comparison circuit is configured to receive a first control voltage and a second control voltage provided by the external power supply, generate a first initial control signal according to the first reference voltage and the first control voltage, and generate a second initial control signal according to the second reference voltage and the second control voltage; The signal merging circuit is configured to merge the first initial control signal and the second initial control signal into the control signal.

3. The test circuit according to claim 2, characterized in that: The second control voltage is greater than the first control voltage.

4. The test circuit according to claim 2, characterized in that: The comparison circuit comprises: a first comparison circuit and a second comparison circuit; The first comparison circuit has a first end connected to the output end of the voltage divider circuit, a second end receiving the first control voltage provided by the external power supply, and a third end connected to the driving unit; The second comparison circuit has a first end connected to the output end of the voltage divider circuit, a second end receiving a second control voltage provided by the external power supply, and a third end connected to the driving unit; The first comparison circuit is configured to generate a first initial control signal according to the first reference voltage and the first control voltage; The second comparison circuit is configured to generate a second initial control signal according to the second reference voltage and the second control voltage.

5. The test circuit according to claim 4, characterized in that: When the first comparison circuit is a first comparator, the first terminal of the first comparison circuit is the negative input terminal of the first comparator, and the second terminal is the positive input terminal of the first comparator; When the second comparison circuit is a second comparator, the first terminal of the second comparison circuit is the negative input terminal of the second comparator, and the second terminal is the positive input terminal of the second comparator.

6. The test circuit according to claim 4, characterized in that: The first comparison circuit includes: a first comparator; the second comparison circuit includes: a second comparator and an inverter; The first terminal of the first comparison circuit is the negative input terminal of the first comparator, and the second terminal is the positive input terminal of the first comparator; The first terminal of the second comparator is a positive input terminal of the second comparator, and the second terminal is a negative input terminal of the second comparator; The input end of the inverter is connected to the third end of the second comparator, and the output end of the inverter is connected to the input end of the signal combining circuit.

7. The test circuit according to any one of claims 2 to 6, characterized in that: The driving unit includes a driving transistor, and the test circuit also includes a signal detection circuit, wherein the signal detection circuit is provided with a transistor identical to the driving transistor; The first end of the signal detection circuit is connected to the output end of the comparison circuit, the second end receives the first external voltage, and the third end is connected to the power supply end; The signal detection circuit is configured to output a detection signal at the second end or not output a signal after being damaged according to the first initial control signal and the second initial control signal.

8. The test circuit according to claim 7, characterized in that: The signal detection circuit comprises: a first logic OR gate circuit and the transistor; The input end of the first logic OR gate circuit is connected to the output end of the comparison circuit, and the output end is connected to the control end of the transistor; The first end of the transistor is the second end of the signal detection circuit; the second end of the transistor is the third end of the signal detection circuit.

9. A driver chip, characterized in that: A test circuit comprising any one of claims 1 to 8, further comprising a bandgap reference circuit and a driving unit; The output end of the bandgap reference circuit is connected to the input end of the test circuit; The input end of the driving unit is connected to the output end of the test circuit; The bandgap reference circuit is configured to provide a reference voltage; The driving unit is configured to output a driving signal of the power device, and to output a test signal under the action of the control signal or not output a signal after being damaged.

10. The driver chip according to claim 9, characterized in that: The driving unit comprises: a pull-up circuit, a pull-down circuit and a second logic OR gate circuit; The second end of the pull-up circuit is connected to the first power supply, and the third end is connected to the third end of the pull-down circuit; The second end of the pull-down circuit is connected to a second power supply; The first end of the second logic OR gate circuit is connected to the output end of the test circuit, the second end receives a second external voltage, and the third end is connected to the first end of the pull-up circuit and the first end of the pull-down circuit; The third end of the pull-up circuit is configured to output a pull-up driving signal, or not output a signal after being damaged; The third terminal of the pull-down circuit is configured to output a pull-down driving signal as the test signal, or not output a signal after being damaged.

11. An electronic device, characterized in that: A driver chip as claimed in claim 9 or 10, further comprising a power device; The driving chip is connected to the control end of the power device; The driving chip is configured to output a driving signal of a power device.

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