Computing storage unit, method of processing data, and non-transitory storage medium

Abstract

The invention discloses a computing storage unit, a method of processing data, and a non-transitory storage medium. The computing storage unit may include a storage device for data and a controller to read the data from the storage device. The compute storage unit may also include a compute engine to implement a function that processes the data and generates a result. The computing storage unit may receive a command from the host processor and read the data from the storage device based at least in part on the command, execute the function to process the data and generate the result, and return the result to the host processor.

Description

[0001] This application claims the benefit of U.S. Provisional Patent Application No. 63 / 532,669, filed on August 14, 2023, and U.S. Patent Application No. 18 / 513,498, filed on November 17, 2023, which are incorporated herein by reference for all purposes. Technical Field

[0002] The present disclosure relates generally to storage devices, and more particularly to the processing of data using storage devices. Background Art

[0003] As the capacity provided by storage devices increases, applications can process more and more data. It may take a lot of time to transfer large amounts of data from storage devices to main memory for application processing. In addition, having the host processor execute commands to process the data can place a burden on the host processor.

[0004] There still needs to be support for processing data without burdening the host processor. Summary of the invention

[0005] The computational storage unit may include a storage device, a controller, and a computation engine. The computational storage unit may receive commands from a host processor and read data from the storage device, perform functions on the data using the computation engine, and return results to the host processor.

[0006] A computational storage unit includes: a storage device for data; a controller for reading the data from the storage device; and a computational engine for implementing a function for processing the data and generating a result. The computational storage unit is configured to: receive a command from a host processor, and based at least in part on the command, read the data from the storage device, execute the function to process the data and generate the result, and return the result to the host processor.

[0007] A method for processing data includes: receiving a command from a host processor at a computational storage unit; reading data from a storage device of the computational storage unit based at least in part on the command; executing a function on the data based at least in part on the command by a computational engine of the computational storage unit; and returning a result to the host processor based at least in part on the command.

[0008] A non-transitory storage medium stores computer instructions, which, when executed by a processor, cause: a computing storage unit to receive a command from a host processor; read data from a storage device of the computing storage unit based at least in part on the command; execute a function on the data based at least in part on the command by a computing engine of the computing storage unit; and return a result to the host processor based at least in part on the command. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The drawings described below are examples of how embodiments of the present disclosure may be implemented and are not intended to limit the embodiments of the present disclosure. Various embodiments of the present disclosure may include elements not shown in a particular drawing and / or may omit elements shown in a particular drawing. The drawings are intended to provide illustrations and may not be to scale.

[0010] Figure 1 A machine including a computational storage unit that processes data using a function according to an embodiment of the present disclosure is shown.

[0011] Figure 2 The embodiment according to the present disclosure is shown Figure 1 Details of the machine.

[0012] Figure 3A The embodiment of the present disclosure can be shown Figure 1 The storage device is associated with Figure 1 A first example arrangement of a computational storage unit.

[0013] Figure 3B The embodiment of the present disclosure can be shown Figure 1 The storage device is associated with Figure 1 A second example arrangement of computational storage units.

[0014] Figure 3C The embodiment of the present disclosure can be shown Figure 1 The storage device is associated with Figure 1 A third example arrangement of a computational storage unit.

[0015] Figure 3D The embodiment of the present disclosure can be shown Figure 1 The storage device is associated with Figure 1 A fourth example arrangement of a computational storage unit.

[0016] Figure 4 The embodiment according to the present disclosure is shown Figure 1 Details of the storage device.

[0017] Figure 5 The embodiment according to the present disclosure is shown Figure 1 The host processor and Figure 1 The computational storage unit is Figure 1 The fabric communicates with the data to perform functions on it.

[0018] Figure 6 It is shown that the embodiment according to the present disclosure can be Figure 1 The host processor and Figure 1 Details of commands and results exchanged between computational storage units.

[0019] Figure 7 The data according to the embodiment of the present disclosure is split into suitable Figure 5 multiple portions of a buffer.

[0020] Figure 8 The embodiment according to the present disclosure is shown Figure 6 The results are split into Figure 5 multiple portions of a buffer.

[0021] Fig. 9 The embodiment according to the present disclosure is shown Figure 1 The computational storage unit is from Figure 1 The host processor receives Figure 6 A flowchart of an example process for executing commands and processing data.

[0022] Fig.10 The embodiment according to the present disclosure is shown Figure 1 The computational storage unit reads portions of the data and stores the portions in Figure 5 Flowchart of an example process in a buffer.

[0023] Fig.11 The embodiment according to the present disclosure is shown Figure 1 A flowchart of an example process of storing results of data processing in a computational storage unit.

[0024] Fig.12 The embodiment according to the present disclosure is shown Figure 1 The computational storage unit pair Figure 7 The function will be executed on the part of the data Figure 6 The results are returned to Figure 1 Flowchart of an example process for a host processor of FIG.

[0025] Fig.13 The embodiment according to the present disclosure is shown Figure 1 The computational storage unit is from Figure 1 Flowchart of an example process for a host processor download function. DETAILED DESCRIPTION

[0026] Reference will now be made in detail to embodiments of the present disclosure, examples of which are illustrated in the accompanying drawings. In the following detailed description, many specific details are set forth to enable a thorough understanding of the present disclosure. However, it should be understood that one of ordinary skill in the art may practice the present disclosure without these specific details. In other cases, well-known methods, processes, components, circuits, and networks are not described in detail to avoid unnecessarily obscuring aspects of the embodiments.

[0027] It will be understood that although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, without departing from the scope of the present disclosure, a first module may be referred to as a second module, and similarly, a second module may be referred to as a first module.

[0028] The terms used in the description of the present disclosure are only used for the purpose of describing specific embodiments and are not intended to limit the present disclosure. As used in the description of the present disclosure and the appended claims, unless the context clearly indicates otherwise, the singular form is intended to also include the plural form. It will also be understood that the term "and / or" as used herein refers to and encompasses any and all possible combinations of one or more of the relevant listed items. It will also be understood that when used in this specification, the terms "include" and / or "comprising" indicate the presence of stated features, wholes, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or their groups. The components and features of the accompanying drawings are not necessarily drawn to scale.

[0029] Storage devices continue to grow in size, storing more and more data. Processing the data using a host processor may require transferring increasingly large amounts of data between the storage device and the host memory, and may require more processing cycles for the host processor to process. There are inherent delays or latencies associated with transferring data from the storage device to the host memory, which may further delay the amount of time required to process the data using the host processor. Furthermore, the time spent by the host processor processing the data is time that could be used for other operations of the host processor.

[0030] Embodiments of the present disclosure address these issues by including a compute engine with a storage device. The compute engine can process data closer to the storage device, thereby eliminating the time required to transfer data from the storage device to the host memory and freeing up the host processor to perform other processing.

[0031] In an embodiment of the present disclosure, the host may issue a single command. The command may specify where the data to be processed is stored on the storage device (e.g., the logical address of the data and its size), the command to be executed on the data (which may be built into the computing engine or in a program downloaded to the computing engine, and the command may also include any parameters applicable to the command), and the location where the result may be written (e.g., in a register of the host processor or an address in the host memory).

[0032] The storage device can then read the data from that location and deliver it to a buffer in the compute engine. If the buffer is not large enough to store all the data, the buffer can be treated as a queue: as data is read from the storage device, it can be placed in the buffer, and the compute engine can "remove" the data from the buffer as it is processed. (Note that the compute engine can leave the data in place in the buffer, but mark it as being processed so that new data can overwrite the processed data without actually deleting the processed data.) In this way, a command can begin processing data before all the data has been read from the storage device.

[0033] When the result is generated, the result can be written to the location specified in the command. In this way, the result can be delivered to the host processor "on the fly" or "inline" as the command is executed.

[0034] Figure 1 A machine including a compute storage unit that processes data using functions according to an embodiment of the present disclosure is shown. Machine 105 (also referred to as a host) may include a processor (also referred to as a host processor) 110, a memory (also referred to as a host memory) 115, a storage device 120, and a compute storage unit 125. Processor 110 may be any kind of processor. (For ease of illustration, processor 110 and other components discussed below are shown external to the machine: embodiments of the present disclosure may include these components within the machine.) Although Figure 1 A single processor 110 is shown, but the machine 105 may include any number of processors, each of which may be a single-core or multi-core processor, each of which may implement a reduced instruction set computer (RISC) architecture or a complex instruction set computer (CISC) architecture, etc., and may be mixed in any desired combination.

[0035] The processor 110 may be coupled to a memory 115. The memory 115 may be any kind of memory (such as flash memory, dynamic random access memory (DRAM), static random access memory (SRAM), persistent random access memory, ferroelectric random access memory (FRAM), or non-volatile random access memory (NVRAM) (such as magnetoresistive random access memory (MRAM)), etc.). The memory 115 may also be any desired combination of different memory types and may be managed by the memory controller 130. The memory 115 may be used to store what may be referred to as "short-term" data: that is, data that is not expected to be stored during an extended period of time. Examples of short-term data may include temporary files, data used locally by an application (which may have been copied from other storage locations), etc.

[0036] The processor 110 and the memory 115 may also support an operating system under which various applications may run. These applications may issue requests (which may also be referred to as commands) to read data from the memory 115 or the storage device 120 or to write data to the memory 115 or the storage device 120. The storage device 120 may be accessed using a device driver 135. The storage device 120 may be associated with a computing storage unit 125. As described below with reference to FIG. 3A to FIG. 3D As discussed, the computing storage unit 125 and the storage device 120 may be designed and manufactured as a single integrated unit, or the computing storage unit 125 may be separate from the storage device 120. The expression "associated with..." is intended to encompass descriptions of a single integrated unit that includes both a storage device and a computing storage unit, as well as a storage device that is paired with a computing storage unit but is not manufactured as a single integrated unit. In other words, when the storage device and the computing storage unit are physically separate devices but are connected in a manner that enables them to communicate with each other, they may be referred to as "paired." In addition, in the remainder of this document, any reference to the storage device 120 and / or the computing storage unit 125 may be understood to refer to physically separate but paired devices (and therefore may include other devices) or two devices integrated into a single component.

[0037] Furthermore, the connection between the storage device and the paired computing storage unit may enable the two devices to communicate, but may not enable one (or both) devices to work with different partners: that is, the storage device may not be able to communicate with another computing storage unit, and / or the computing storage unit may not be able to communicate with another storage device. For example, the storage device and the paired computing storage unit may be serially connected to a network (fabric) (in either order), enabling the computing storage unit to access information from the storage device in a manner that the other computing storage unit may not be able to achieve.

[0038] Although Figure 1 The generic term "storage" is used, but embodiments of the present disclosure may include any form of storage that may be associated with a computing storage device, examples of which may include hard disk drives and solid-state drives (SSDs). Any reference to "SSD" below should be understood to include such other embodiments of the present disclosure.

[0039] Processor 110, storage device 120, and computational storage unit 125 are shown connected to network 140. Network 140 is intended to represent any network along which information can be passed. Network 140 may include a network that may be internal to machine 105 and may use interfaces such as Peripheral Component Interconnect Express (PCIe), Serial AT Attachment (SATA), Small Computer System Interface (SCSI), etc. Network 140 may also include a network that may be external to machine 105 and may use interfaces such as Ethernet, InfiniBand, or Fibre Channel. In addition, network 140 may support one or more protocols such as Non-Volatile Memory Express (NVMe), NVMe over a Network (NVMe-oF), or Simple Service Discovery Protocol (SSDP), among others. Therefore, network 140 may be considered to include both internal and external networking connections, through which commands may be sent directly or indirectly to storage device 120 (more specifically, a computational storage unit associated with storage device 120). In embodiments of the present disclosure where network 140 supports external networking connections, storage device 120 and / or computational storage unit 125 may be located external to machine 105 .

[0040] Figure 1 The processor 110, storage device 120, and computing storage unit 125 are shown as connected to the network 140 because the processor 110, storage device 120, and computing storage unit 125 can communicate via the network 140. In some embodiments of the present disclosure, the storage device 120 and / or computing storage unit 125 may include a connection to the network 140 that may include the ability to communicate with a remote machine and / or network: for example, a network-enabled solid-state drive (SSD). However, in other embodiments of the present disclosure, although the machine 105 may include a connection to another machine and / or network (which connection may be considered part of the network 140), the storage device 120 and / or computing storage unit 125 may not be connected to the other machine and / or network. In such an embodiment of the present disclosure, the storage device 120 and / or computing storage unit 125 may still be accessible from the remote machine, but such commands may reach the storage device 120 and / or computing storage unit 125 through the processor 110 or the like.

[0041] Figure 2 The embodiment according to the present disclosure is shown Figure 1 Details of the machine 105. Figure 2In the embodiment of the present invention, the machine 105 generally includes one or more processors 110, which may include a memory controller 130 and a clock 205, which may be used to coordinate the operation of the components of the machine. The processor 110 may also be coupled to a memory 115, which may include, by way of example, a random access memory (RAM), a read-only memory (ROM), or other state preservation medium. The processor 110 may also be coupled to a storage device 120 and a network connector 210, which may be, for example, an Ethernet connector or a wireless connector. The processor 110 may also be connected to a bus 215, to which a user interface 220 and input / output (I / O) interface ports that may be managed using an I / O engine 225 may be attached.

[0042] FIG. 3A to FIG. 3D The embodiment of the present disclosure can be shown Figure 1 The storage device 120 is associated with Figure 1 Various arrangements of the computing storage unit 125. Figure 3A , a storage device 305 and a computing device 310-1 (which may be referred to simply as a "device") are shown. The storage device 305 may include a controller (e.g., a storage controller) 315 and a storage device 320-1. The storage device 305 may be accessible using any desired form of access. For example, in Figure 3A , the storage device 305 may be accessed through queue pairs: a management queue pair 325 may be used for management of the storage device 305, and an I / O queue pair 330 may be used to control the I / O of the storage device 305. Embodiments of the present disclosure may include any number (one or more) of queue pairs 325 and 330 (or other forms of access), and access may be shared: for example, a single queue pair may be used for both management and I / O control of the storage device 305 (i.e., queue pairs 325 and 330 may be combined in one queue pair).

[0043] The computing device 310-1 may be paired with the storage device 305. The computing device 310-1 may include any number of (one or more) processors (e.g., computing storage processors) 335 (also referred to as computing engines or engines), and may provide one or more services (e.g., computing storage services CSS) 340-1 and 340-2 (which may be collectively referred to as services 340). For greater clarity, each processor 335 may provide any number of (one or more) services 340, (although embodiments of the present disclosure may include a computing device 310-1 that includes exactly two services 340-1 and 340-2). The services 340 may be functions built into the processor 335, from Figure 1 The processor 110 downloads the function (ie, Figure 1The computing device 310-1 may be accessed through a management queue pair 345 and an I / O queue pair 350, which may be used to manage the computing device 310-1 and / or control the I / O of the computing device 310-1, similar to the queue pairs 325 and 330 of the storage device 305. As with the queue pairs 325 and 330, other forms of access may be used, and a single queue pair may be used for both management and I / O control of the computing device 310-1 (i.e., the queue pairs 345 and 350 may be combined in one queue pair).

[0044] Processor 335 can be considered as near-storage processing: that is, Figure 1 The processor 110 is closer to the storage device 305. Because the processor 335 is closer to the storage device 305, the processor 335 can Figure 1 The processor 110 executes commands on data stored in the storage device 305 more quickly. Figure 3A As shown in the figure, but as shown below Figure 5 As further discussed, the processor 335 may have associated memory that may be used to locally execute commands on data stored in the storage device 305 .

[0045] Although Figure 3A Storage device 305 and computing device 310-1 are shown as being individually accessible via network 140, but embodiments of the present disclosure may also include storage device 305 and computing device 310-1 connected in series. That is, commands for both storage device 305 and computing device 310-1 may be received at a unified physical connection to network 140, and may pass through one device to the other. For example, if computing device 310-1 is located between storage device 305 and network 140, computing device 310-1 may receive commands for both computing device 310-1 and storage device 305: computing device 310-1 may process commands for computing device 310-1, and may pass commands for storage device 305 to storage device 305.

[0046] The services 340 may provide a variety of different functions that may be performed on the data stored in the storage device 305. For example, the services 340 may provide predefined functions (such as encryption, decryption, compression and / or decompression of data, erasure coding, and / or application of regular expressions). Alternatively, the services 340 may provide more general functions (such as data search and / or SQL functions). The services 340 may also support running application-specific code. That is, an application using the services 340 may provide custom code that will be executed using the data on the storage device 305. Table 1 lists some examples of services that may be provided by the processor 335.

[0047] Table 1: Service Types In some embodiments of the present disclosure, service 340 may be stored in a "program slot": that is, a specific address range within processor 335. Service 340 may also be any combination of such functions. In other embodiments of the present disclosure, computing device 310-1 may include memory ( Figure 3A 310-1). The memory may be included within computing device 310-1, or may be external to computing device 310-1 and connectable to computing device 310-1. Whether internal or external to computing device 310-1, the memory may be used to store service 340. That is, processor 335 may execute service 340 from the memory, or service 340 may be loaded from the memory into program slots in processor 335 (and then executed from those program slots).

[0048] The processor 335 (and indeed, the computing device 310-1) can be implemented in any desired manner. Example implementations may include a local processor (such as a central processing unit (CPU), a graphics processing unit (GPU), a general-purpose GPU (GPGPU), a data processing unit (DPU), and a tensor processing unit (TPU), etc.). The processor 335 may also be implemented using a field programmable gate array (FPGA), an application-specific integrated circuit (ASIC), or a system on a chip, etc. If the computing device 310-1 includes more than one processor 335, each processor may be implemented as described above. For example, the computing device 310-1 may have each of a CPU, a TPU, and an FPGA, or the computing device 310-1 may have two FPGAs, or the computing device 310-1 may have two CPUs and one ASIC, etc.

[0049] Depending on the desired interpretation, computing device 310 - 1 or processor 335 may be considered a computational storage unit.

[0050] although Figure 3A Storage device 305 and computing device 310-1 are shown as separate devices, but Figure 3B Thus, computing device 310-2 may include controller 315, storage device 320-1, and processor 335 that provides services 340-1 and 340-2. Figure 3A The storage device 305 of the computing device 310-1 can receive management and I / O commands via queue pairs 345 and 350. Even though the computing device 310-2 is shown as including both a storage device and a processor 335, Figure 3B Still, it may be considered to include storage associated with the computational storage unit.

[0051] exist Figure 3C In yet another variation, a computing device 310-3 is shown. The computing device 310-3 may include a controller 315 and a storage device 320-1, as well as a processor 335 that provides services 340-1 and 340-2. However, even though the computing device 310-3 may be considered a single component including the controller 315, the storage device 320-1, and the processor 335 (and also considered a storage device associated with a computing storage unit), Figure 3B , the controller 315 and the processor 335 may each include their own queue pairs 325, 345, 330, and 350 (again, the queue pairs may be used for management and / or I / O control). By including the queue pair 325, the controller 315 may provide transparent access to the storage device 320-1 (without requiring all communications to go through the processor 335).

[0052] In addition, the processor may have a proxy storage access 355 for accessing the storage device 320-1. Thus, instead of routing access requests through the controller 315, the processor 335 can directly access data from the storage device 320-1. The proxy storage access 355 may include, for example, circuitry to access data from the storage device 320-1 without sending a request to the controller 315.

[0053] exist Figure 3C , both the controller 315 and the proxy storage access 355 are shown with dashed lines to indicate that they are optional elements and may be omitted depending on the implementation.

[0054] at last, Figure 3D Another embodiment is shown. Figure 3D , a computing device 310-4 is shown that may include an array. Figure 3C The computing device 310-3 may include one or more storage devices (or storage elements) 320-1 to 320-4. Figure 3D Four storage elements are shown, but embodiments of the present disclosure may include any number (one or more) of storage elements. In addition, the individual storage elements may be other storage devices (such as, FIG. 3A to FIG. 3D those storage devices shown in ).

[0055] Because the computing device 310-4 may include more than one storage element 320-1 to 320-4, the computing device 310-4 may include an array controller 360. The array controller 360 may manage how data is stored on the storage elements 320-1 to 320-4 and how data is retrieved from the storage elements 320-1 to 320-4. For example, if the storage elements 320-1 to 320-4 are implemented as some level of redundant array of independent disks (RAID), the array controller 360 may be a RAID controller. If the storage elements 320-1 to 320-4 are implemented using some form of erasure coding, the array controller 360 may be an erasure coding controller.

[0056] Figure 4 The embodiment according to the present disclosure is shown Figure 1 Details of the storage device 120. Although Figure 4 Focus on Figure 1 The computational storage unit 125 is separate from the storage device 120, but in a single integrated component may include Figure 1 In embodiments of the present disclosure of both the storage device 120 and the computing storage unit 125, Figure 4 It may only represent a portion of the integrated components related to the storage device 120, wherein the portion related to the computing storage unit 125 is not shown. Figure 4 Shown in.

[0057] exist Figure 4 In FIG. 1 , the implementation of the storage device 120 is shown as being for a solid state drive (SSD), but embodiments of the present disclosure may include other implementations (such as a hard disk drive). Figure 4 In the embodiment, the storage device 120 may include a host interface layer (HIL) 405, a controller (e.g., an SSD controller) 315, and various flash memory chips 410-1 to 410-8 (which may also be referred to as flash memory storage devices, flash memory, or flash memory chips, and may be collectively referred to as flash memory chips 410). The flash memory chips 410 may be organized into various channels 415-1 to 415-4 (which may be collectively referred to as channels 415). The host interface layer 405 may manage the storage device 120 and other components (such as, Figure 1 Host interface layer 405 may also manage communications with devices that are remote from storage device 120: i.e., not Figure 1 A device that is part of the machine 105 but communicates with the storage device 120, for example, via one or more network connections. These communications may include read requests to read data from the storage device 120, write requests to write data to the storage device 120, and delete requests to delete data from the storage device 120.

[0058] The host interface layer 405 may manage interfaces across only a single port, or the host interface layer 405 may manage interfaces across multiple ports. Alternatively, the storage device 120 may include multiple ports, each of which may have a separate host interface layer 405 to manage interfaces across that port. Embodiments of the inventive concept may also mix possibilities (e.g., an SSD with three ports may have one host interface layer for managing one port and a second host interface layer for managing the other two ports). The host interface layer 405 may communicate with other components via a connection 420, which may be, for example, a PCIe connection, an M.2 connection, a U.2 connection, a SCSI connection, or a SATA connection, etc.

[0059] The controller 315 may use a flash memory controller 425 to manage read and write operations to the flash memory chips 410 as well as garbage collection and other operations. The SSD controller 315 may also include a flash translation layer 430. The flash translation layer 430 may manage (e.g., Figure 1 The flash translation layer 430 does not need to notify the storage device 120 when data is moved from one block to another. Figure 1 Host 105.

[0060] Although Figure 4 The storage device 120 is shown as including eight flash memory chips 410-1 to 410-8 organized into four channels 415-1 to 415-4, but embodiments of the inventive concept may support any number of flash memory chips organized into any number of channels. Figure 4 The structure of the SSD is shown, but the same Figure 4 The structure shown in FIG. 1 is different from that of other storage devices (eg, hard drives) to manage reading and writing data, but has similar potential benefits.

[0061] Although Figure 4 The storage device 120 is shown as a storage device only, but embodiments of the present disclosure may include other components within the storage device 120. For example, the storage device 120 may include Figure 1 The calculation storage unit 125 or Figure 1 The computing storage unit 125 is associated with the computing storage unit 125, which can support near data processing. Figure 1 The computing storage unit 125 may be composed of Figure 1 The processor 110 is used to perform various operations.

[0062] Figure 5 The embodiment according to the present disclosure is shown Figure 1The host processor 110 and Figure 1 The calculation storage unit 125 is Figure 1 The network 140 communicates to perform functions on the data. Figure 5 is an optional diagram of storage device 120 and computing storage unit 125, which may include other components and are described elsewhere herein. Figure 5 , the storage device 120 and the computing storage unit 125 are shown as being combined into a single integrated element, but as discussed above, embodiments of the present disclosure may have the storage device 120 and the computing storage unit 125 as separate associated components. Figure 5 For purposes of this disclosure, any reference to storage device 120 may be understood to also reference computing storage unit 125 .

[0063] exist Figure 5 In the present invention, the processor 110 may want the computing engine 335 to process the data stored in the flash chip 410 and return the result to the host processor 110. One method is for the host processor 110 to issue a command to transfer the data from the flash chip 410 to a storage device accessible to the computing engine 335. For example, the computing engine 335 can access the computing storage memory (i.e., CS memory) 505, which can also be part of the computing storage unit 125. The computing storage memory 505 can be, for example, a DRAM. The computing storage memory 505 can be understood as being similar to Figure 1 The host memory 115 is different from: Figure 1 Compared to host memory 115 accessible by any component of machine 105, computational storage memory 505 may be local to computational storage unit 125. Controller 315 may transfer (e.g., copy) data from flash memory chip 410 to computational storage memory 505 in response to the command. Once the data has been transferred from flash memory chip 410 to computational storage memory 505, controller 315 (or compute engine 335, depending on which element may communicate with host processor 110) may notify host processor 110.

[0064] Once the data has been copied from the flash chip 410 to the computing storage memory 505, the host processor 110 may then issue a second command to the computing engine 335 to process the data. The command may specify the location where the data is currently stored in the computing storage memory 505, some identifier of the function to be performed on the data, and the location where the result may be stored. The computing engine 335 may execute the identified function on the data stored in the computing storage memory 505 in response to the second command. Once the computing engine 335 has finished processing the data in the computing storage memory 505, the computing engine 335 may then write the result to the indicated location. The location may be, for example, an address in the computing storage memory 505 or the flash chip 410. (In some embodiments of the present disclosure, the location may also be at Figure 1 ) The compute engine 335 (or controller 315, depending on which element can communicate with the host processor 110) can notify the host processor 110 when the data processing is completed.

[0065] Finally, host processor 110 may issue a third command to transfer the result back to host processor 110. Controller 315 (or compute engine 335, depending on which element may communicate with host processor 110) may then return the result read from wherever it was stored.

[0066] This approach, while functional, may have some problems. First, the host processor 110 may issue three commands: one command to transfer data from the flash chip 410 to the computational storage memory 505, one command to process the data, and one command to return the result. Three commands may take more time to issue than a single unified (or fused) command.

[0067] Second, because the host processor 110 issues multiple commands, the host processor 110 may wait for one command to complete before issuing a second command. For example, before issuing a command to the computing engine 335 for processing data, the host processor 110 may wait until the data is available in the computing storage memory 505. After all, if the data is not yet available, the command for processing the data may cause an error. Similarly, the host processor 110 may wait until the result is available before issuing a command for returning a result, because if the result is not yet available (because the computing engine 335 has not yet completed processing the data), the command for returning the result may cause an error. Therefore, the host processor 110 may wait for each command to complete before issuing the next command, which increases the overall time required to complete the sequence.

[0068] Third, because the host processor 110 may wait until a command is completed before issuing the next command, the computational storage memory 505 may need to be large enough to store all the data. For example, if the data size is five megabytes (MB), the computational storage memory 505 may need to be at least 5MB in size. The computational storage memory 505 may be expensive. For example, in the case where the computational storage memory 505 uses DRAM, the average price of 1GB of DRAM is about $0.43. In contrast, the average price of 1 gigabyte (GB) of flash memory is about $0.06, making DRAM about seven times more expensive than flash memory. Therefore, the cost of manufacturing the computational storage unit 125 may increase with the size of the computational storage memory 505.

[0069] Embodiments of the present disclosure can solve these problems. First, instead of issuing three separate commands, the host processor 110 can issue a single command (which can be referred to as a fused computing command or a unified computing command) to transfer data from the flash chip 410 to the computing storage memory 505, perform a function on the data, and return the result. As a result of this one command, the storage device 120 and the computing storage unit 125 can read data from the flash chip 410, perform a function on the data, and return the result to the host processor 110. Using one command instead of three commands improves the above model.

[0070] Additionally, rather than transferring the data from the flash chips 410 to the compute storage memory 505, the data may be transferred to the buffer 510 of the compute engine 335. The buffer 510 may be a local memory that the compute engine 335 may use to process the data. (Note that in the above model, the compute engine 335 may move data from the compute storage memory 505 to the buffer 510 for local processing, just as the host processor 110 may include a cache that stores a local copy of the data, rather than storing it in, for example, a cache.) Figure 1 ) By transferring the data to the buffer 510, the time required to write the data to the computational storage memory 505 and then read the data back from the computational storage memory 505 to transfer the data to the buffer 510 can be eliminated: the data can be sent directly to the buffer 510. The buffer 510 can be implemented using, for example, SRAM or some other form of (relatively) fast memory. By using the buffer 510 instead of the computational storage memory 505 to store the data, the computational storage memory can be omitted, as shown by the dashed line of the computational storage memory 505.

[0071] As shown below Figure 7 As further discussed, buffer 510 may be smaller than computational storage memory 505 .

[0072] Yet another advantage of the embodiments of the present disclosure is that the computing engine 335 can process data before all the data is transferred from the flash memory chip 410 to the buffer 510. In the above model of "the host processor 110 issues a command to transfer data to the computing storage memory 505, issues another command to call the computing engine 335 to process the data, and issues a third command to transfer the results back to the host processor 110", the host processor 110 may not be able to issue a command to start processing the data until the data has been transferred from the flash memory chip 410 to the computing storage memory 505. However, if the data is transferred from the flash memory chip 410 to the buffer 510, the computing engine 335 can start processing the data: the computing engine 335 does not need to wait for all the data to be transferred first. (In fact, as described below with reference to Figure 7 As discussed, it may not be possible to transfer all the data from the flash memory chip 410 to the buffer 510, in which case the computing engine 335 may not be able to wait until all the data is transferred to the buffer 510.) Finally, because the compute engine 335 can begin processing the data as soon as there is data in the buffer 510, as the compute engine 335 processes the data, the compute engine 335 can also begin sending results back to the host processor 110. Just as the compute engine 335 can begin processing data before all the data has been transferred from the flash chips 410 to the buffer 510, the compute engine 335 can also send results back to the host processor 110 before all the data has been transferred from the flash chips 410 to the buffer 510. By returning the results more quickly, the host processor 110 can also begin its next processing, rather than waiting until the compute engine 335 has processed all the data.

[0073] Figure 6 It is shown that the embodiment according to the present disclosure can be Figure 1 The host processor 110 and Figure 1 The details of the commands and results exchanged between the computation storage unit 125. Figure 5 As in , the computational storage unit 125 may be combined with the storage device 120 into a single integrated unit, or the computational storage unit may be separate from the storage device 120 but in communication with the storage device 120.

[0074] exist Figure 6 6, host processor 110 may send command 605 to computational storage unit 125. Command 605 may be a command to download a function to computational storage unit 125. For example, host processor 110 (or an application running on host processor 110) may include a function that processes data using a specific algorithm. The function may be custom designed for use with a specific data set, or the function may be a function that can be used with a variety of data sets but is not currently included in computational storage unit 125 for whatever reason.

[0075] Command 605 may include a function address 610, a function size 615, and a program slot identifier (program slot ID) 620. Function address 610 may indicate where the function is currently stored so that the function may be downloaded into computational storage unit 125. For example, function address 610 may be Figure 1 Function address 610 may also reference an address in host memory 115 or a register in host processor 110. Figure 1 function on the storage device 120, or even with Figure 1 105 (in which case, function address 610 may indicate the remote machine where the function is stored and where the function is stored on the remote machine). Function size 615 may specify how large the function code is so that compute storage unit 125 may determine how much information to read to download the entire function. Finally, program slot identifier 620 may identify the program slot in compute storage unit 125 where the downloaded function may be stored. For example, as described above with reference to Figure 3A As discussed, a program slot may be an address range in the local memory of the compute storage unit 125: a downloaded function may then be stored in the address range, and the downloaded function may be called by identifying the program slot. Other forms of function identification may also be used, depending on how the functions may be stored in the compute storage unit: for example, each function may be assigned a function identifier instead of being assigned a program slot: the compute storage unit 125 may then manage the association between a function (stored anywhere in the compute storage unit 125) and a function identifier (ID).

[0076] As mentioned above FIG. 3A to FIG. 3D As discussed, in some embodiments of the present disclosure, the computing storage unit 125 may already implement various functions or services. If the function to be applied to the data is already supported by the computing storage unit 125, it may not be necessary to download the function to the computing storage unit 125, and command 605 may be omitted.

[0077] Host processor 110 may also send command 625. Command 625 may be for computing storage unit 125 as described above with reference to Figure 5 Command 625 may include data address 630, data size 635, buffer address 640, function identifier 645, and result address 650. Data address 630 may identify a function that can be used in Figure 1 The data address 630 may be a physical address or a logical address, and the storage device 120 may map the logical address to the physical address. The data size 635 may indicate how large the data is, so that the calculation storage unit 125 (or FIG. 3A to FIG. 3DThe controller 315) can know how much data to read.

[0078] Buffer address 640 may identify Figure 5 In some embodiments of the present disclosure, the host processor 110 can see the location of the data to be stored in the buffer 510. Figure 5 buffer 510, and thus which addresses are assigned to Figure 5 In other embodiments of the present disclosure, the host processor 110 may not be able to see Figure 5 buffer 510, in this case, the computational storage unit 125 may determine Figure 5 Which address in the buffer 510 of the host processor 110 should store the transferred data: In such an embodiment of the present disclosure, the buffer address 640 may be omitted from the command 625. The function identifier 645 may identify the function that will be used to process the data. As described above, the function identifier may simply be an identifier that the compute storage unit 125 can use to locate the function. For example, if the compute storage unit 125 exposes physical functions or virtual functions to the host processor 110, each function that will be used to process the data may be assigned a specific physical or virtual function number, which may be used to identify the function that will be used to process the data. Optionally, the function identifier 645 may reference a program slot that stores a particular function, in which case the compute storage unit 125 may execute the function stored in the identified program slot. Finally, the result address 650 may specify where the result of the function should be stored for the host processor 110. For example, the result address 650 may identify the program slot where the result should be stored. Figure 1 An address in host memory 115, a register in host processor 110, or Figure 1 The address on the storage device 120, etc.

[0079] Finally, compute storage unit 125 may send result 655 back to host processor 110. As described above, result 655 may not be sent as a message, but may be written to result address 650 by compute storage unit 125. Result 655 is intended to illustrate that compute storage unit 125 returns a result to host processor 110.

[0080] As mentioned above Figure 5 As discussed, the advantages of the embodiments of the present disclosure are that: Figure 5 The buffer 510 is omitted Figure 5 Additional computing storage memory 505. But not for Figure 5 The buffer 510 is replaced Figure 5 The computing storage memory 505 thus increases Figure 5 The size of the buffer 510, Figure 5The buffer 510 may hold more than may already exist Figure 5 The computational storage memory 505 is smaller. For example, if Figure 5 If the computational storage memory 505 is used, the computational storage unit 125 may need to include approximately 10 MB of DRAM. Figure 5 The buffer 510 may be smaller: for example, Figure 5 The buffer 510 may include only 1 MB or 2 MB of SRAM. However, Figure 5 The buffer 510 may be smaller than Figure 5 The fact that the computational storage memory 505 can be used has no limit on the size of the data. Figure 7 shows how buffer 510 can be smaller than Figure 6 The size of the data to be processed is 635.

[0081] Figure 7 The data according to the embodiment of the present disclosure is split into suitable Figure 5 multiple portions of the buffer 510. Figure 7 , data 705 is shown. Data 705 is shown as having Figure 6 635. In contrast, buffer 510 is shown as having size 710, which may be smaller than data size 635. However, instead of attempting to store the entire data 705 into buffer 510, data 705 may be split into a plurality of portions 715-1 through 715-4 (which may be collectively referred to as portions 715). Figure 1 The computational storage unit 125 may determine how large each portion 715 may be: the size of each portion 715 may depend on various factors (such as, how the data 705 is organized (e.g., whether the data 705 includes a database table or data structure with a fixed size), the size of the smallest manageable portion of the data 705 that can be processed (e.g., entire rows in a database table should be processed together), or the size of the buffer 510), etc. Each portion 715 of the data 705 may have a size that may be smaller than the size 710 of the buffer 510 (such as sizes 720-1 to 720-4 (which may be collectively referred to as size 720)). (Note that each portion 715 of the data 705 may have a different size 720: it is not required that each portion 715 of the data 705 have the same size. However, in some embodiments of the present disclosure, each portion 715 of the data 705 may have the same size 720.) Therefore, the buffer 510 may be large enough to store one or more of the portions 715 of the data 705. Figure 7 In the remainder of the discussion, it is assumed that a portion 715 of data 705 can be stored in buffer 510 at a time.

[0082] Once portion 715 of data 705 has been stored in buffer 510, FIG. 3A to FIG. 3D The computing engine 335 can then begin processing portion 715 of data 705. Note that FIG. 3A to FIG. 3D The calculation engine 335 of may proceed even without storing all the data 705 in the buffer 510: FIG. 3A to FIG. 3D The computing engine 335 may process the data 705 one portion at a time. Once FIG. 3A to FIG. 3D The computing engine 335 has processed a portion 715 of the data 705, and then another portion 715 of the data 705 can be transferred to the buffer 510. FIG. 3A to FIG. 3D The computing engine 335 may process the portion 715 of the data 705, and so on. In other words, FIG. 3A to FIG. 3D The computing engine 335 may be used even before all the data 705 has been transferred to the buffer 510, and even before all the data 705 has been received from the Figure 1 The data 705 in the buffer 510 is processed before being read by the storage device 120 .

[0083] Although Figure 7 The data 705 is shown as including four portions 715 (ie, a first portion 715 - 1 , a second portion 715 - 2 , a third portion 715 - 3 , and a fourth portion 715 - 4 ), but embodiments of the present disclosure may include any number(s) of portions 715 of the data 705 .

[0084] because FIG. 3A to FIG. 3D The computing engine 335 can process the data 705 in part 715, thus FIG. 3A to FIG. 3D The calculation engine 335 may generate a result. In some embodiments of the present disclosure, FIG. 3A to FIG. 3D The calculation engine 335 may be internally (or Figure 1 At a certain address in the memory 115, which may include Figure 6 The return address 650) stores the partial results until all data 705 has been processed. Once all partial results are generated, FIG. 3A to FIG. 3D The calculation engine 335 can be Figure 1 The host processor 110 passes Figure 6 The result is stored as specified by address 650 Figure 6 The final result is 655. However, in other embodiments of the present disclosure, FIG. 3A to FIG. 3D The calculation engine 335 may store partial results in Figure 1 The host processor 110 passes Figure 6 The result address is the location specified by 650. Figure 8 Shows this situation.

[0085] Figure 8The embodiment according to the present disclosure is shown Figure 6 The result 655 is split into Figure 5 multiple portions of the buffer 510. Figure 8 middle, FIG. 3A to FIG. 3D The computing engine 335 of can generate the result 655 in multiple parts (such as, first part 805-1, second part 805-2, third part 805-3 and fourth part 805-4, which can be collectively referred to as parts (or, partial results) 805). For example, part 805-1 of the result 655 can be from Figure 7 Data 705 Figure 7 Part 715-1 of the result 655 is processed, and part 805-2 of the result 655 may be a partial result of processing part 715-1 of the result 655. Figure 7 Data 705 Figure 7 The partial result of processing the portion 715-2, and so on. When each portion 805 of the result 655 is generated, FIG. 3A to FIG. 3D The calculation engine 335 may be configured as follows: Figure 6 Each portion 805 of the result 655 is stored as specified by the result address 650. FIG. 3A to FIG. 3D The calculation engine 335 can keep track of how much data has been written Figure 6 The result address 650 of 805-1 can be written to avoid that the subsequent partial result 805 can overwrite the previous partial result 805. For example, if each partial result 805 is four bytes, the partial 805-1 can be written to the offset of zero bytes. Figure 6 The return address 650, part 805-2 can be written at a four-byte offset Figure 6 The return address is 650, and so on. Optionally, FIG. 3A to FIG. 3B The computing engine 335 can write all parts 805 into Figure 6 The return address 650 is not used to offset so that when part 805 is written, Figure 1 The host processor 110 from Figure 6 The return address 650 reads data. In this way, Figure 1 The host processor 110 may even be capable of FIG. 3A to FIG. 3D The computation engine 335 completely generates the result 655 before starting to use the result 655 .

[0086] Fig. 9 The embodiment according to the present disclosure is shown Figure 1 The calculation storage unit 125 is from Figure 1 The host processor 110 receives Figure 6 A flowchart of an example process of command 625 and processing data. Fig. 9 In block 905, Figure 1 The computing storage unit 125 (and / or Figure 1The storage device 120, depending on the implementation) can be obtained from Figure 1 The host processor 110 receives Figure 6 At block 910, in response to Figure 6 Order 625, Figure 1 The storage device 120 (more specifically, FIG. 3A to FIG. 3D The controller 315) can be Figure 4 Flash memory chip 410 reads Figure 7 At block 915, again in response to Figure 6 Order 625, FIG. 3A to FIG. 3D The computing engine 335 can be used for Figure 7 Finally, in response to the data 705, Figure 6 Order 625, FIG. 3A to FIG. 3D The computing engine 335 can Figure 6 655 results returned for Figure 1 The host processor 110.

[0087] Fig.10 The embodiment according to the present disclosure is shown Figure 1 The computational storage unit 125 reads portions of the data and stores the portions in Figure 5 A flowchart of an example process in the buffer 510 of FIG. Fig.10 In block 1005, FIG. 3A to FIG. 3D The controller 315 can be Figure 4 Flash memory chip 410 reads Figure 7 Data 705 Figure 7 portion 715. At block 1010, FIG. 3A to FIG. 3D The controller 315 can Figure 7 Data 705 Figure 7 Part 715 is stored in Figure 5 Finally, at block 1015, FIG. 3A to FIG. 3D The controller 315 can check to see Figure 7 Data 705 Figure 7 Have all parts 715 of been read? If so, the process is complete; otherwise, the process returns to block 1005 to read Figure 7 Data 705 Figure 7 The subsequent portion 715.

[0088] Also implicit in block 1015 is that Figure 5 The buffer 510 has a Figure 7 Data 705 Figure 7 The space for the subsequent portion 715. If Figure 5 The buffer 510 does not have a Figure 7 Data 705 Figure 7The space of the subsequent portion 715 is then FIG. 3A to FIG. 3D The controller 315 may pause until Figure 5 The buffer 510 has a Figure 7 Data 705 Figure 7 The subsequent portion 715 of the space.

[0089] Fig.11 The embodiment according to the present disclosure is shown Figure 1 The computation storage unit 125 stores the results of data processing. In block 1105, FIG. 3A to FIG. 3D The computing engine 335 can Figure 6 The result 655 is stored in Figure 6 The result address is 650, so that Figure 1 The host processor 110 may use Figure 6 The result is 655. As discussed above, Figure 6 The result of address 650 can be Figure 1 registers in the host processor 110, Figure 1 The address in the host memory 115 or Figure 1 An address (logical or physical) in the storage device 120.

[0090] Fig.12 The embodiment according to the present disclosure is shown Figure 1 The computing storage unit 125 pairs Figure 7 The data 705 part executes the function and Figure 6 The result of 655 is returned to Figure 1 A flowchart of an example process for host processor 110. Fig.12 In block 1205, FIG. 3A to FIG. 3D The computing engine 335 can store Figure 5 The buffer 510 Figure 7 Data 705 Figure 7 The portion 715 performs the function. In block 1210, FIG. 3A to FIG. 3D The calculation engine 335 may return Figure 6 Results 655 Figure 8 As discussed above, Figure 6 Results 655 Figure 8 The portion 805 returned to the host processor 110 may include Figure 6 Results 655 Figure 8 The portion 805 is stored in Figure 6 The result address 650. Finally, at block 1215, FIG. 3A to FIG. 3D The calculation engine 335 can check to see Figure 7 Data 705 Figure 7Have all parts 715 of been processed. If so, the process is complete; otherwise, the process returns to block 1205 to process Figure 7 Data 705 Figure 7 The subsequent portion 715.

[0091] Fig.13 The embodiment according to the present disclosure is shown Figure 1 The calculation storage unit 125 is from Figure 1 Flowchart of an example process for a host processor 110 download function. Fig.13 In block 1305, FIG. 3A to FIG. 3D The computing engine 335 may receive Figure 6 The command 605 starts from Figure 1 The host processor 110 downloads the function. At block 1310, FIG. 3A to FIG. 3D The computing engine 335 of the embodiment can download the function. This can involve storing the downloaded function in FIG. 3A to FIG. 3D The downloaded function may be stored in a program slot of the computing engine 335, or may involve some other form of storing the downloaded function and associating a function identifier with the downloaded function.

[0092] exist Figures 9 to 13 In the flowchart, some embodiments of the present disclosure are shown. However, those skilled in the art will recognize that other embodiments of the present disclosure are also feasible by changing the order of the boxes, by omitting boxes, or by including links not shown in the drawings. All these variations of the flowchart are considered embodiments of the present disclosure, whether explicitly described or not.

[0093] Computational storage devices may use additional dynamic random access memory (DRAM) for operation to support computational storage commands. The additional DRAM may increase the cost of the device and may increase power consumption due to data movement to / from the DRAM.

[0094] Data from a solid-state drive (SSD) can be stored in DRAM. The compute engine reads from DRAM to perform a compute operation. After the compute operation is completed, the result can be stored in DRAM. Finally, the result of the NVMe command can be transmitted to the host.

[0095] In an embodiment of the present disclosure, data from the SSD may be stored in a static random access memory (SRAM) buffer. The computing engine may read data from the SRAM buffer to perform a computing operation. After completing the operation, the computing engine may transmit the result directly to the host. Therefore, the embodiments of the present disclosure may perform the same computing operation with fewer commands and may avoid moving data from / to DRAM (although the embodiments of the present disclosure may use DRAM as a supplement or alternative to SRAM).

[0096] Embodiments of the present disclosure may support new command formats and software interfaces. Data from NAND storage devices may be stored in internal memory. By avoiding the use of DRAM, embodiments of the present disclosure may eliminate the need to use the "NVMe Read SGL CPM command" to move data to DRAM, thereby eliminating some data transfer operations and saving power.

[0097] The following discussion is intended to provide a brief, general description of one or more suitable machines in which certain aspects of the present disclosure may be implemented. One or more machines may be controlled at least in part by input from conventional input devices (such as keyboards, mice, etc.) and by instructions received from another machine, interaction with a virtual reality (VR) environment, biometric feedback, or other input signals. As used herein, the term "machine" is intended to broadly include a single machine, a virtual machine, or a system of machines, virtual machines, or devices that are communicatively combined and operate together. Exemplary machines include computing devices (such as personal computers, workstations, servers, portable computers, handheld devices, phones, tablet computers, etc.) and transportation devices (such as private or public transportation (e.g., cars, trains, taxis, etc.)).

[0098] One or more machines may include embedded controllers (such as programmable or non-programmable logic devices or arrays, application specific integrated circuits (ASICs), embedded computers, smart cards, etc.). One or more machines may utilize one or more connections to one or more remote machines (such as through a network interface, modem, or other communication combination). Machines may be interconnected by way of physical networks and / or logical networks (such as intranets, the Internet, local area networks, wide area networks, etc.). Those skilled in the art will appreciate that network communications may utilize a variety of wired and / or wireless short-range or long-range carriers and protocols, including radio frequency (RF), satellite, microwave, Institute of Electrical and Electronics Engineers (IEEE) 802.11, Bluetooth®, optical, infrared, cable, laser, etc.

[0099] Embodiments of the present disclosure may be described by reference to or in conjunction with associated data including functions, programs, data structures, applications, etc., which, when accessed by a machine, cause the machine to perform a task or define an abstract data type or a low-level hardware context. The associated data may be stored, for example, in volatile and / or non-volatile memory (e.g., RAM, ROM, etc.), or in other storage devices and their associated storage media, including hard drives, floppy disks, optical storage devices, tapes, flash memory, memory sticks, digital video disks, biometric storage devices, etc. The associated data may be transmitted in the form of packets, serial data, parallel data, propagation signals, etc., in a transmission environment including a physical network and / or a logical network, and may be used in a compressed or encrypted format. The associated data may be used in a distributed environment and stored locally and / or remotely for machine access.

[0100] Embodiments of the present disclosure may include tangible, non-transitory machine-readable media including instructions executable by one or more processors, including instructions for performing elements of the present disclosure as described herein.

[0101] The various operations of the methods described above may be performed by any suitable means capable of performing the operations (such as various hardware and / or software components, circuits and / or modules). Software may include an ordered list of executable instructions for implementing logical functions and may be embodied in any "processor-readable medium" for use by or in conjunction with an instruction execution system, device or apparatus (such as a single-core or multi-core processor or a system containing a processor).

[0102] The blocks or steps of the methods or algorithms and functions described in conjunction with the embodiments of the present disclosure herein may be implemented directly in hardware, in software modules executed by a processor, or in a combination of the two. If implemented in software, the functions may be stored on or transmitted via a tangible, non-transitory computer-readable medium. The software module may reside in a random access memory (RAM), flash memory, read-only memory (ROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), registers, hard disks, removable disks, CD ROMs, or any other form of storage medium known in the art.

[0103] The principles of the present disclosure have been described and illustrated with reference to the illustrated embodiments, and it will be appreciated that the illustrated embodiments may be modified in arrangement and detail without departing from these principles, and may be combined in any desired manner. Although the foregoing discussion focuses on specific embodiments, other configurations are contemplated. Specifically, even though expressions such as "according to embodiments of the present disclosure" are used herein, these phrases are intended to generally relate to embodiment possibilities, and are not intended to limit the present disclosure to specific embodiment configurations. As used herein, these terms may relate to the same or different embodiments that may be combined into other embodiments.

[0104] The foregoing illustrative embodiments should not be construed as limiting the present disclosure. Although several embodiments have been described, those skilled in the art will readily appreciate that many modifications may be made to those embodiments without substantially departing from the novel teachings and advantages of the present disclosure. Therefore, all such modifications are intended to be included within the scope of the present disclosure as defined in the claims.

[0105] The embodiments of the present disclosure may be extended to the following statements without being limited: Statement 1. An embodiment of the present disclosure includes a computing storage unit, including: Storage devices, for data; A controller, configured to read the data from a storage device; and A computing engine for implementing functions for processing the data and generating results, The computational storage unit is configured to receive a command from a host processor and read the data from a storage device, execute the function to process the data and generate the result, and return the result to the host processor based at least in part on the command.

[0106] Statement 2. An embodiment of the present disclosure includes a computational storage unit according to statement 1, wherein the storage device includes flash memory.

[0107] Statement 3. An embodiment of the present disclosure includes a computational storage unit according to statement 1, wherein: The computing engine includes a buffer; and The controller is configured to read the data from the storage device and store the data in a buffer of the computing engine.

[0108] Statement 4. An embodiment of the present disclosure includes the computational storage unit of statement 3, wherein the buffer includes static random access memory (SRAM).

[0109] Statement 5. An embodiment of the present disclosure includes a computational storage unit according to statement 1, wherein the computational storage unit does not include dynamic random access memory (DRAM).

[0110] Statement 6. An embodiment of the present disclosure includes a computational storage unit according to statement 1, wherein the command includes a location in the storage device where the data is stored.

[0111] Statement 7. An embodiment of the present disclosure includes a computational storage unit according to statement 6, wherein the command also includes the size of the data in the storage device.

[0112] Statement 8. An embodiment of the present disclosure includes a computational storage unit according to statement 1, wherein the command includes a function identifier of a function that processes the data using a computational engine.

[0113] Statement 9. An embodiment of the present disclosure includes a computing storage unit according to statement 8, wherein the function includes a built-in function of the computing engine or a downloaded function.

[0114] Statement 10. An embodiment of the present disclosure includes a computational storage unit according to statement 8, wherein the function identifier includes a program slot identifier, and the program slot identifier identifies a program slot of the computational engine that includes the function.

[0115] Statement 11. An embodiment of the present disclosure includes a computational storage unit according to statement 1, wherein the command includes a location to store the result.

[0116] Statement 12. An embodiment of the present disclosure includes a computational storage unit according to statement 11, wherein the location includes a register in a host processor or an address in a host memory.

[0117] Statement 13. An embodiment of the present disclosure includes a computational storage unit according to statement 1, wherein: The computing engine includes a buffer; and The command includes an address in a buffer of the computing engine where the data is stored.

[0118] Statement 14. An embodiment of the present disclosure includes a computing storage unit according to statement 1, wherein the computing engine includes a program slot for the downloaded function.

[0119] Statement 15. An embodiment of the present disclosure includes the computational storage unit of statement 14, wherein the computational engine is configured to receive a downloaded function from a host processor and store the downloaded function in a program slot.

[0120] Statement 16. An embodiment of the present disclosure includes the computational storage unit of statement 15, wherein the computational engine is configured to receive a second command for downloading the downloaded function from the host processor.

[0121] Statement 17. An embodiment of the present disclosure includes the computing storage unit of statement 16, wherein the second command includes a location where the downloaded function is stored.

[0122] Statement 18. An embodiment of the present disclosure includes the computational storage unit of statement 17, wherein the location where the downloaded function is stored comprises a register in a host processor or an address in a host memory.

[0123] Statement 19. An embodiment of the present disclosure includes a computational storage unit according to statement 1, wherein: The controller is configured to read the data from the storage device and deliver the data to the computing engine; and The computing engine is configured to execute the function to process the data, generate the result, and return the result to the host processor.

[0124] Statement 20. An embodiment of the present disclosure includes a computational storage unit according to statement 1, wherein: The data includes a first part and a second part; The controller is configured to read the first portion of the data and deliver the first portion of the data to a computing engine; and The computation engine is configured to execute the function on a first portion of the data, generate a first portion of the result, and return the first portion of the result to a host processor.

[0125] Statement 21. An embodiment of the present disclosure includes the computational storage unit of statement 20, wherein the controller is further configured to read the first portion of the data and store the first portion of the data in a buffer of the computational engine.

[0126] Statement 22. An embodiment of the present disclosure includes a computational storage unit according to statement 21, wherein: The data includes a first size; The first portion of the data comprises a second size; and The buffer of the computing engine includes a third size that is at least as large as the second size and smaller than the first size.

[0127] Statement 23. An embodiment of the present disclosure includes a computational storage unit according to statement 20, wherein: The controller is further configured to read a second portion of the data and deliver the second portion of the data to the computing engine; and The computation engine is further configured to execute the function on a second portion of the data, generate a second portion of the result, and return the second portion of the result to the host processor.

[0128] Statement 24. An embodiment of the present disclosure includes a computational storage unit according to statement 23, wherein the controller is further configured to execute the function on a first portion of the data based at least in part on a computational engine, read a second portion of the data and deliver the second portion of the data to the computational engine.

[0129] Statement 25. An embodiment of the present disclosure includes a computing storage unit according to statement 24, wherein the controller is also configured to execute the function on a first portion of the data in a buffer of the computing engine based at least in part on the computing engine, read a second portion of the data and store the second portion of the data in the buffer of the computing engine.

[0130] Statement 26. An embodiment of the present disclosure includes a computational storage unit according to statement 23, wherein the computing engine is further configured to execute the function on the first portion of the data before the controller reads the second portion of the data and delivers the second portion of the data to the computing engine.

[0131] Statement 27. An embodiment of the present disclosure includes a method comprising: receiving commands from a host processor at a computational storage unit; reading data from a storage device of the computational storage unit based at least in part on the command; executing, by a computation engine of a computational storage unit, a function on the data based at least in part on the command; and Results are returned to the host processor based at least in part on the command.

[0132] Statement 28. An embodiment of the present disclosure includes a method according to statement 27, wherein the step of reading the data from the storage device of the computing storage unit based at least in part on the command includes: reading the data from the flash memory of the computing storage unit based at least in part on the command.

[0133] Statement 29. An embodiment of the present disclosure includes a method according to statement 27, wherein the step of reading the data from the storage device of the computing storage unit based at least in part on the command includes: storing the data in a buffer of a computing engine of the computing storage unit based at least in part on the command.

[0134] Statement 30. An embodiment of the present disclosure includes a method according to statement 29, wherein the step of storing the data in a buffer of a computing engine of a computing storage unit based at least in part on the command includes: storing the data in a static random access memory (SRAM) of a computing engine of the computing storage unit based at least in part on the command.

[0135] Statement 31. An embodiment of the present disclosure includes the method of statement 27, wherein the computational storage unit does not include dynamic random access memory (DRAM).

[0136] Statement 32. An embodiment of the present disclosure includes the method of statement 27, wherein the command includes a location in a storage device where the data is stored.

[0137] Statement 33. An embodiment of the present disclosure includes a method according to statement 32, wherein the step of reading the data from the storage device of the computing storage unit based at least in part on the command includes: reading the data from the location in the storage device of the computing storage unit based at least in part on the command.

[0138] Statement 34. An embodiment of the present disclosure includes the method of statement 32, wherein the command further includes a size of the data in the storage device.

[0139] Statement 35. An embodiment of the present disclosure includes the method of statement 27, wherein the command includes a function identifier of a function that processes the data using a computing engine.

[0140] Statement 36. An embodiment of the present disclosure includes a method according to statement 35, wherein the step of executing the function on the data based at least in part on the command through a computing engine of a computing storage unit includes: executing the function identified by a function identifier on the data based at least in part on the command through a computing engine of a computing storage unit.

[0141] Statement 37. An embodiment of the present disclosure includes the method of statement 35, wherein the function comprises a built-in function of a computing engine or a downloaded function.

[0142] Statement 38. An embodiment of the present disclosure includes a method according to statement 35, wherein the function identifier includes a program slot identifier, and the program slot identifier identifies a program slot of a computing engine of the computing storage unit that includes the function.

[0143] Statement 39. An embodiment of the present disclosure includes a method according to statement 38, wherein the step of executing the function on the data at least partially based on the command through a computing engine of a computing storage unit includes: executing the function stored in a program slot of the computing engine on the data at least partially based on the command through a computing engine of the computing storage unit.

[0144] Statement 40. An embodiment of the present disclosure includes the method of statement 27, wherein the command includes a location to store the result.

[0145] Statement 41. An embodiment of the present disclosure includes a method according to statement 40, wherein the step of returning the result to the host processor based at least in part on the command includes: storing the result in the location based at least in part on the command by a computing engine of a computing storage unit.

[0146] Statement 42. An embodiment of the present disclosure includes the method of statement 40, wherein the location comprises a register in a host processor or an address in a host memory.

[0147] Statement 43. An embodiment of the present disclosure includes the method of statement 27, wherein: The command includes an address in a buffer of the computing engine; and Reading the data from a storage device of the computational storage unit based at least in part on the command includes storing the data at the address in a buffer of a computational engine of the computational storage unit based at least in part on the command.

[0148] Statement 44. An embodiment of the present disclosure includes the method according to statement 27, further comprising: downloading the downloaded function to a computing engine of a computing storage unit.

[0149] Statement 45. An embodiment of the present disclosure includes a method according to statement 44, wherein the step of downloading the downloaded function to the computing engine of the computing storage unit includes: downloading the downloaded function from the host processor to the computing engine of the computing storage unit.

[0150] Statement 46. An embodiment of the present disclosure includes the method according to statement 44, wherein the step of downloading the downloaded function to the computing engine of the computing storage unit includes downloading the downloaded function to the program slot of the computing engine of the computing storage unit.

[0151] Statement 47. An embodiment of the present disclosure includes a method according to statement 44, wherein the step of downloading the downloaded function to the computing engine of the computing storage unit includes receiving a second command for downloading the downloaded function to the computing engine of the computing storage unit.

[0152] Statement 48. An embodiment of the present disclosure includes the method of statement 47, wherein the second command includes a location where the downloaded function is stored.

[0153] Statement 49. An embodiment of the present disclosure includes the method of statement 48, wherein the location where the downloaded function is stored comprises a register in a host processor or an address in a host memory.

[0154] Statement 50. An embodiment of the present disclosure includes the method of statement 47, wherein: The second command includes a program slot identifier identifying a program slot of a compute engine of the compute storage unit; and The step of downloading the downloaded function to the computing engine of the computing storage unit includes: downloading the downloaded function to the program slot of the computing engine of the computing storage unit.

[0155] Statement 51. An embodiment of the present disclosure includes a method according to statement 27, wherein the step of reading the data from the storage device of the computing storage unit based at least in part on the command includes: reading the data from the storage device of the computing storage unit based at least in part on the command through a controller of the computing storage unit.

[0156] Statement 52. An embodiment of the present disclosure includes the method of statement 51, wherein: The data includes a first part and a second part; The step of reading, by a controller of the computational storage unit, the data from a storage device of the computational storage unit based at least in part on the command comprises: reading, by a controller of the computational storage unit, a first portion of the data from a storage device of the computational storage unit based at least in part on the command; The step of performing, by a computation engine of a computation storage unit, the function on the data based at least in part on the command comprises: performing, by a computation engine of a computation storage unit, the function on a first portion of the data based at least in part on the command; and Returning the result to the host processor based at least in part on the command includes returning a first portion of the result to the host processor based at least in part on the command.

[0157] Statement 53. An embodiment of the present disclosure includes a method according to statement 52, wherein the step of reading the first portion of the data from the storage device of the computing storage unit through the controller of the computing storage unit at least in part based on the command includes: storing the first portion of the data in a buffer of the computing engine of the computing storage unit at least in part based on the command.

[0158] Statement 54. An embodiment of the present disclosure includes the method of statement 53, wherein: The data includes a first size; The first portion of the data comprises a second size; and The buffer of the computing engine includes a third size that is at least as large as the second size and smaller than the first size.

[0159] Statement 55. An embodiment of the present disclosure includes the method of statement 52, wherein: The step of reading, by the controller of the computational storage unit, the data from the storage device of the computational storage unit based at least in part on the command further comprises: reading, by the controller of the computational storage unit, a second portion of the data from the storage device of the computational storage unit based at least in part on the command; The step of performing, by a computation engine of a computation storage unit, the function on the data based at least in part on the command further comprises: performing, by a computation engine of a computation storage unit, the function on a second portion of the data based at least in part on the command; and Returning the result to the host processor based at least in part on the command also includes returning a second portion of the result to the host processor based at least in part on the command.

[0160] Statement 56. An embodiment of the present disclosure includes a method according to statement 55, wherein the step of reading the second portion of the data from the storage device of the computing storage unit through the controller of the computing storage unit at least partially based on the command includes: reading the second portion of the data from the storage device of the computing storage unit through the controller of the computing storage unit based at least partially on executing the function on the first portion of the data through the computing engine of the computing storage unit.

[0161] Statement 57. An embodiment of the present disclosure includes a method according to statement 56, wherein the step of reading the second portion of the data from the storage device of the computing storage unit through the controller of the computing storage unit at least partially based on the command includes: storing the second portion of the data in the buffer of the computing engine of the computing storage unit based at least partially on executing the function on the first portion of the data in the buffer of the computing engine of the computing storage unit through the computing engine of the computing storage unit.

[0162] Statement 58. An embodiment of the present disclosure includes a method according to statement 55, wherein the step of executing the function on the first portion of the data at least partially based on the command by a computing engine of the computing storage unit includes: before reading the second portion of the data from the storage device of the computing storage unit at least partially based on the command by a controller of the computing storage unit, executing the function on the first portion of the data at least partially based on the command by a computing engine of the computing storage unit.

[0163] Statement 59. Embodiments of the present disclosure include an article comprising a non-transitory storage medium having stored thereon instructions that, when executed by a machine, cause: receiving commands from a host processor at a computational storage unit; reading data from a storage device of the computational storage unit based at least in part on the command; executing, by a computation engine of a computational storage unit, a function on the data based at least in part on the command; and Results are returned to the host processor based at least in part on the command.

[0164] Statement 60. An embodiment of the present disclosure includes an article according to statement 59, wherein the step of reading the data from the storage device of the computing storage unit based at least in part on the command includes: reading the data from the flash memory of the computing storage unit based at least in part on the command.

[0165] Statement 61. An embodiment of the present disclosure includes an article according to statement 59, wherein the step of reading the data from the storage device of the computing storage unit based at least in part on the command includes: storing the data in a buffer of a computing engine of the computing storage unit based at least in part on the command.

[0166] Statement 62. An embodiment of the present disclosure includes an article according to statement 61, wherein the step of storing the data in a buffer of a computing engine of a computing storage unit based at least in part on the command includes: storing the data in a static random access memory (SRAM) of a computing engine of the computing storage unit based at least in part on the command.

[0167] Statement 63. An embodiment of the present disclosure includes the article of statement 59, wherein the computational storage unit does not include dynamic random access memory (DRAM).

[0168] Statement 64. An embodiment of the present disclosure includes the article of statement 59, wherein the command includes a location in a storage device where the data is stored.

[0169] Statement 65. An embodiment of the present disclosure includes an article according to statement 64, wherein the step of reading the data from the storage device of the computing storage unit based at least in part on the command includes: reading the data from the location in the storage device of the computing storage unit based at least in part on the command.

[0170] Statement 66. An embodiment of the present disclosure includes the article of statement 64, wherein the command further includes a size of the data in the storage device.

[0171] Statement 67. An embodiment of the present disclosure includes an article as described in statement 59, wherein the command includes a function identifier of a function that processes the data using a computing engine.

[0172] Statement 68. An embodiment of the present disclosure includes an article according to statement 67, wherein the step of executing the function on the data at least partially based on the command through a computing engine of a computing storage unit includes: executing the function identified by a function identifier on the data at least partially based on the command through a computing engine of a computing storage unit.

[0173] Statement 69. An embodiment of the present disclosure includes an article according to statement 67, wherein the function includes a built-in function of the computing engine or a downloaded function.

[0174] Statement 70. An embodiment of the present disclosure includes the article of claim 67, wherein the function identifier includes a program slot identifier that identifies a program slot of a compute engine of a compute storage unit that includes the function.

[0175] Statement 71. An embodiment of the present disclosure includes an article according to statement 70, wherein the step of executing the function on the data through a computing engine of a computing storage unit at least partially based on the command includes: executing the function stored in a program slot of the computing engine on the data through a computing engine of the computing storage unit at least partially based on the command.

[0176] Statement 72. An embodiment of the present disclosure includes the article of statement 59, wherein the command includes a location to store the result.

[0177] Statement 73. An embodiment of the present disclosure includes an article according to statement 72, wherein the step of returning the result to the host processor based at least in part on the command includes: storing the result in the location based at least in part on the command by a computing engine of a computing storage unit.

[0178] Statement 74. An embodiment of the present disclosure includes the article of statement 72, wherein the location comprises a register in a host processor or an address in a host memory.

[0179] Statement 75. An embodiment of the present disclosure includes an article according to statement 59, wherein: The command includes an address in a buffer of the computing engine; and Reading the data from a storage device of the computational storage unit based at least in part on the command includes storing the data at the address in a buffer of a computational engine of the computational storage unit based at least in part on the command.

[0180] Statement 76. An embodiment of the present disclosure includes an article according to statement 59, wherein the non-transitory storage medium has further instructions stored thereon, and when the further instructions are executed by the machine, the downloaded function is downloaded to the computing engine of the computing storage unit.

[0181] Statement 77. An embodiment of the present disclosure includes the article of claim 76, wherein downloading the downloaded function to the computational engine of the computational storage unit comprises downloading the downloaded function from the host processor to the computational engine of the computational storage unit.

[0182] Statement 78. An embodiment of the present disclosure includes an article according to statement 76, wherein the step of downloading the downloaded function to the computing engine of the computing storage unit includes: downloading the downloaded function to a program slot of the computing engine of the computing storage unit.

[0183] Statement 79. An embodiment of the present disclosure includes an article according to statement 76, wherein the step of downloading the downloaded function to the computing engine of the computing storage unit includes: receiving a second command for downloading the downloaded function to the computing engine of the computing storage unit.

[0184] Statement 80. An embodiment of the present disclosure includes the article of statement 79, wherein the second command includes a location where the downloaded function is stored.

[0185] Statement 81. An embodiment of the present disclosure includes the article of statement 80, wherein the location where the downloaded function is stored comprises a register in a host processor or an address in a host memory.

[0186] Statement 82. An embodiment of the present disclosure includes an article according to statement 79, wherein: The second command includes a program slot identifier identifying a program slot of a compute engine of the compute storage unit; and The step of downloading the downloaded function to the computing engine of the computing storage unit includes: downloading the downloaded function to the program slot of the computing engine of the computing storage unit.

[0187] Statement 83. An embodiment of the present disclosure includes an article according to statement 59, wherein the step of reading the data from the storage device of the computing storage unit based at least in part on the command includes: reading the data from the storage device of the computing storage unit based at least in part on the command through a controller of the computing storage unit.

[0188] Statement 84. An embodiment of the present disclosure includes an article according to statement 83, wherein: The data includes a first part and a second part; The step of reading, by a controller of the computational storage unit, the data from a storage device of the computational storage unit based at least in part on the command comprises: reading, by a controller of the computational storage unit, a first portion of the data from a storage device of the computational storage unit based at least in part on the command; The step of performing, by a computation engine of a computation storage unit, the function on the data based at least in part on the command comprises: performing, by a computation engine of a computation storage unit, the function on a first portion of the data based at least in part on the command; and Returning the result to the host processor based at least in part on the command includes returning a first portion of the result to the host processor based at least in part on the command.

[0189] Statement 85. An embodiment of the present disclosure includes an article according to statement 84, wherein the step of reading the first portion of the data from the storage device of the computing storage unit through the controller of the computing storage unit at least in part based on the command includes: storing the first portion of the data in a buffer of the computing engine of the computing storage unit at least in part based on the command.

[0190] Statement 86. An embodiment of the present disclosure includes an article according to statement 85, wherein: The data includes a first size; The first portion of the data comprises a second size; and The buffer of the computing engine includes a third size that is at least as large as the second size and smaller than the first size.

[0191] Statement 87. An embodiment of the present disclosure includes an article according to statement 84, wherein: The step of reading, by the controller of the computational storage unit, the data from the storage device of the computational storage unit based at least in part on the command further comprises: reading, by the controller of the computational storage unit, a second portion of the data from the storage device of the computational storage unit based at least in part on the command; The step of performing, by a computation engine of a computation storage unit, the function on the data based at least in part on the command further comprises: performing, by a computation engine of a computation storage unit, the function on a second portion of the data based at least in part on the command; and Returning the result to the host processor based at least in part on the command also includes returning a second portion of the result to the host processor based at least in part on the command.

[0192] Statement 88. An embodiment of the present disclosure includes an article according to statement 87, wherein the step of reading the second portion of the data from the storage device of the computing storage unit through the controller of the computing storage unit at least in part based on the command includes: reading the second portion of the data from the storage device of the computing storage unit through the controller of the computing storage unit based at least in part on executing the function on the first portion of the data through the computing engine of the computing storage unit.

[0193] Statement 89. An embodiment of the present disclosure includes an article according to statement 88, wherein the step of reading the second portion of the data from the storage device of the computing storage unit based at least in part on the command through the controller of the computing storage unit includes: storing the second portion of the data in the buffer of the computing engine of the computing storage unit based at least in part on executing the function on the first portion of the data in the buffer of the computing engine of the computing storage unit through the computing engine of the computing storage unit.

[0194] Statement 90. An embodiment of the present disclosure includes an article according to statement 87, wherein the step of executing the function on the first portion of the data at least in part based on the command by a computing engine of the computing storage unit includes: before reading the second portion of the data from the storage device of the computing storage unit at least in part based on the command by a controller of the computing storage unit, executing the function on the first portion of the data at least in part based on the command by the computing engine of the computing storage unit.

[0195] Therefore, in view of the various arrangements of the embodiments described herein, this detailed description and accompanying material are intended to be illustrative only and should not be taken as limiting the scope of the disclosure. Therefore, what is claimed as the present disclosure is all such modifications that may fall within the scope and spirit of the appended claims and their equivalents.

Claims

1. A computing storage unit, comprising: Storage devices, for data; A controller, configured to read the data from a storage device; as well as A computing engine for implementing functions for processing the data and generating results, The computational storage unit is configured to: receive a command from a host processor, and based at least in part on the command, read the data from a storage device, execute the function to process the data and generate the result, and return the result to the host processor.

2. The computational storage unit according to claim 1, wherein: The controller is configured to read the data from the storage device and deliver the data to the computing engine; and The computing engine is configured to execute the function to process the data, generate the result, and return the result to the host processor.

3. The computational storage unit according to claim 2, wherein: The computing engine includes a buffer; and The controller is also configured to read the data from the storage device and store the data in a buffer of the computing engine.

4. The computational storage unit according to claim 1, wherein: The command includes the location in the storage device where the data is to be stored.

5. The computational storage unit according to claim 1, wherein: The command includes a function identifier of a function that processes the data using a computing engine.

6. The computational storage unit according to claim 1, wherein: The command includes the location where the result is stored.

7. The computational storage unit according to any one of claims 1 to 6, wherein: The computation engine includes program slots for downloaded functions.

8. The computational storage unit according to any one of claims 1 to 6, wherein: The data includes a first part and a second part; The controller is configured to read the first portion of the data and deliver the first portion of the data to a computing engine; and The computation engine is configured to execute the function on a first portion of the data, generate a first portion of the result, and return the first portion of the result to a host processor.

9. A method for processing data, comprising: receiving commands from a host processor at a computational storage unit; reading data from a storage device of the computational storage unit based at least in part on the command; executing, by a computation engine of a computational storage unit, a function on the data based at least in part on the command; as well as Results are returned to the host processor based at least in part on the command.

10. The method according to claim 9, wherein: Reading the data from a storage device of the computational storage unit based at least in part on the command includes storing the data in a buffer of a computational engine of the computational storage unit based at least in part on the command.

11. The method according to claim 9, wherein: The command includes a function identifier of a function for processing the data using a computing engine; and The step of executing the function on the data based at least in part on the command by a computing engine of the computing storage unit includes executing the function identified by a function identifier on the data based at least in part on the command by a computing engine of the computing storage unit.

12. The method according to claim 9, wherein: The command includes a location to store the result; and Returning the result to the host processor based at least in part on the command includes storing, by a computation engine of a computational storage unit, the result in the location based at least in part on the command.

13. The method according to any one of claims 9 to 12, further comprising: Download the downloaded function to the computing engine of the computing storage unit.

14. The method according to any one of claims 9 to 12, wherein: The step of reading the data from the storage device of the computational storage unit based at least in part on the command includes reading the data from the storage device of the computational storage unit based at least in part on the command by a controller of the computational storage unit.

15. The method according to claim 14, wherein: The data includes a first part and a second part; The step of reading, by a controller of the computational storage unit, the data from a storage device of the computational storage unit based at least in part on the command comprises: reading, by a controller of the computational storage unit, a first portion of the data from a storage device of the computational storage unit based at least in part on the command; The step of performing, by a computation engine of a computation storage unit, the function on the data based at least in part on the command comprises: performing, by a computation engine of a computation storage unit, the function on a first portion of the data based at least in part on the command; and Returning the result to the host processor based at least in part on the command includes returning a first portion of the result to the host processor based at least in part on the command.

16. The method of claim 15, wherein: The step of reading, by the controller of the computational storage unit, the data from the storage device of the computational storage unit based at least in part on the command further comprises: reading, by the controller of the computational storage unit, a second portion of the data from the storage device of the computational storage unit based at least in part on the command; The step of performing, by a computation engine of a computation storage unit, the function on the data based at least in part on the command further comprises: performing, by a computation engine of a computation storage unit, the function on a second portion of the data based at least in part on the command; and Returning the result to the host processor based at least in part on the command also includes returning a second portion of the result to the host processor based at least in part on the command.

17. The method according to claim 16, wherein: The step of reading the second part of the data from the storage device of the computing storage unit through the controller of the computing storage unit at least partially based on the command includes: reading the second part of the data from the storage device of the computing storage unit through the controller of the computing storage unit at least partially based on executing the function on the first part of the data through the computing engine of the computing storage unit.

18. A non-transitory storage medium storing computer instructions, which when executed by a processor cause: receiving commands from a host processor at a computational storage unit; reading data from a storage device of the computational storage unit based at least in part on the command; executing, by a computation engine of a computational storage unit, a function on the data based at least in part on the command; as well as Results are returned to the host processor based at least in part on the command.

19. The non-transitory storage medium according to claim 18, wherein: Reading the data from a storage device of the computational storage unit based at least in part on the command includes storing the data in a buffer of a computational engine of the computational storage unit based at least in part on the command.

20. The non-transitory storage medium of claim 18, storing further computer instructions which, when executed by a processor, cause the downloaded function to be downloaded to a computing engine of a computing storage unit.

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