Improved HR neuron model circuit based on voltage control type memristor

Abstract

The invention provides an improved HR neuron model circuit based on a voltage control type memristor. A resistor, a capacitor, an operational amplifier, a multiplier and a direct-current voltage source construct three paths. Output signals of the first channel and the memristor equivalent circuit are used as input signals of the first channel; output signals of the first channel and the second channel are used as input signals of the second channel; and output signals of the first channel and the third channel are used as input signals of the third channel. By setting the amplitudes of two paths of external excitation I1 and I2 with different frequencies to be 3V and the frequency of the I1 to be 5kHz, and sequentially adjusting the frequency of the I2 to be 20Hz, 200Hz, 400Hz and 700Hz, the improved memristor HR neuron circuit shows a periodic cluster discharge mode that each cluster has a chaotic peak, a periodic cluster discharge mode that each cluster has a periodic peak, a periodic peak discharge mode that each cluster has a periodic peak, a periodic peak discharge mode that each cluster has a periodic peak, and a chaotic peak discharge mode. Various complex neuron discharge phenomena can be generated, and a theoretical basis is provided for research, prevention and treatment of neurological diseases.

Description

Technical Field

[0001] The present invention belongs to the technical field of circuit design, and relates to a memristor HR neuron model circuit, and in particular to the design and circuit implementation of an improved HR neuron model based on a voltage-controlled memristor. Background Art

[0002] Memristor is the fourth basic two-terminal circuit element after resistor, capacitor and inductor. The difference is that memristor is a non-volatile nonlinear electronic device that can change its resistance according to the amount of charge flowing through it and remember the change state of resistance in a non-volatile manner. This feature is very similar to the synaptic weight of the synapse changing with the activity of the previous and next neurons. Therefore, memristor is widely used in the field of nervous system and has broad development prospects.

[0003] Neurons are the basic units of the nervous system structure, and information is transmitted in the nervous system in the form of electrical pulses. In the past few decades, the dynamic behaviors based on various neuron and neural network models have been widely studied. Among them, HR neurons can effectively simulate the electrical activity in the brain. Many biological neural electrical activity phenomena, such as cluster discharge, periodic discharge and even simple chaotic discharge, have been verified in neuron and neural network models.

[0004] Neurons can be considered as signal processors that can receive multiple signal inputs simultaneously. In the prior art, some expert teams have injected electrical stimulation with high and low frequency currents into neuron models to study the mode transition of electrical activity in neurons; others have built neuron models with periodic high and low frequency electromagnetic radiation and Gaussian white noise to study the mode transition in neuron electrical activity. However, inputting multi-frequency AC signals into memristor neuron circuits to study their impact on the discharge pattern of neuron circuits still requires relevant research by researchers in this field. Summary of the invention

[0005] In view of the deficiencies in the prior art, the present invention proposes an improved HR neuron model circuit based on a voltage-controlled memristor.

[0006] 1. A method for constructing an improved HR neuron model circuit based on a voltage-controlled memristor, comprising the following steps:

[0007] (1) A voltage-controlled memristor model, which is described as:

[0008]

[0009] in is the memetic derivative, is the magnetic flux, α and β are constants.

[0010] (2) An improved HR neuron model based on voltage-controlled memristor is shown below:

[0011]

[0012] Where I1 = A1 sin(2πf1t), I2 = A2 sin(2πf2t), k is the memristor coupling strength. x, y and They represent the neuron's membrane potential, the recovery variable associated with the neuron's intracellular current, and the transmembrane magnetic flux on the neuron's membrane, respectively.

[0013] (3) According to Kirchhoff’s circuit law, the circuit characteristics of the operational amplifier and the voltage-current relationship of the circuit elements, when the memristor coupling strength k = 1, the circuit equivalent equation can be derived as follows:

[0014]

[0015] Among them, Memristor coupling strength

[0016] 2. According to the above mathematical model, an improved HR neuron model circuit based on voltage-controlled memristor is designed, which mainly includes the first channel circuit, the second channel circuit, the third channel circuit, and the memristor analog equivalent circuit:

[0017] The first channel module is composed of an operational amplifier U1, an operational amplifier U2, an operational amplifier U3, a capacitor C1, a multiplier A1, a multiplier A2, a multiplier A3, a multiplier A4, and resistors R1, R2, R3, R4, R5, R6, R7, R8, R9, and R 10 The output signal -x of the first path is used as the input signal of the multiplier A1 and the multiplier A4 in the first path, and acts on the first path. The output signal -x is used as the resistor R in the third path. 18 One input signal acts on the third path, and the first channel output signal -x is connected to the operational amplifier U3 to become the x signal, which serves as the input signal of the multipliers A1, A2, and A3 in the first path module and acts on the first path. The output signal x serves as the input signal of the multiplier A5 in the second path module and acts on the second path.

[0018] The second channel module is composed of a multiplier A5, an operational amplifier U4, an operational amplifier U5, an operational amplifier U6 and a resistor R 11 , resistor R 12 , resistor R 13 , resistor R 14 , resistor R 15 , resistor R16 , resistor R 17 , capacitor C2, and DC voltage source V1. The output signal -y of the second path acts as the input signal of the resistor R2 in the first path and acts on the first path. The output signal -y is connected to the operational amplifier U6 and becomes the y signal as the second path resistor R 13 The input signal of one path is applied to the second path.

[0019] The third channel module is composed of an operational amplifier U7, an operational amplifier U8, an operational amplifier U9 and a resistor R 18 , resistor R 19 , resistor R 20 , resistor R 21 , resistor R 22 , resistor R 23 , capacitor C3. The third path outputs a signal - Connecting operational amplifier U9 turns the output signal As the third path resistor R 19 The input signal of one channel acts on the third channel, and the output signal It acts as the input signal of multiplier A6 in the memristor analog equivalent circuit and acts on the memristor analog equivalent circuit.

[0020] The memristor analog equivalent circuit is composed of a multiplier A6, an operational amplifier U 10 And the resistor R 24 , resistor R 25 The output signal W of the memristor analog equivalent circuit is used as the input signal of the multiplier A4 in the first path.

[0021] 3. The improved HR neuron model circuit based on voltage-controlled memristor is characterized by: the operational amplifier U1, operational amplifier U2, operational amplifier U3, operational amplifier U4, operational amplifier U5, operational amplifier U6, operational amplifier U7, operational amplifier U8, operational amplifier U9, operational amplifier U 10 The operational amplifier UA741 is used, and the multiplier A1, the multiplier A2, the multiplier A3, the multiplier A4, the multiplier A5, the multiplier A6 and the multiplier AD633JN are used.

[0022] The second pin of the operational amplifier U1 is connected to the seventh pin of the multiplier A1 through a resistor R1, to the sixth pin of the operational amplifier U5 through a resistor R2, to the seventh pin of the multiplier A3 through a resistor R3, to the seventh pin of the multiplier A4 through a resistor R4, to the external excitation I1 through a resistor R5, to the external excitation I2 through a resistor R6, and to the sixth pin of the operational amplifier U1 through a resistor R7; the sixth pin of the operational amplifier U1 is connected to the second pin of the operational amplifier U2 through a resistor R8, and to the second pin of the operational amplifier U1 through a resistor R7; the third pin is grounded; the fourth pin is connected to the negative voltage source VEE, and the seventh pin is connected to the positive voltage source VCC; the first pin, the fifth pin, and the eighth pin are suspended.

[0023] The second pin of the operational amplifier U2 is connected to the sixth pin of the operational amplifier U1 through the resistor R8, and is connected to the sixth pin of the operational amplifier U2 through the capacitor C1; the sixth pin of the operational amplifier U2 is connected to the second pin of the operational amplifier U3 through the resistor R9, is connected to the second pin of the operational amplifier U2 through the capacitor C1, is directly connected to the third pin of the multiplier A1, is directly connected to the first pin of the multiplier A4, and is connected to the third pin of the multiplier A5 through the resistor R10. 18 Connect the 2nd pin of the operational amplifier U7; the 3rd pin is grounded; the 4th pin is connected to the negative voltage source VEE, and the 7th pin is connected to the positive voltage source VCC; the 1st pin, the 5th pin, and the 8th pin are left floating.

[0024] The second pin of the operational amplifier U3 is connected to the sixth pin of the operational amplifier U2 through the resistor R9. 10 Connect to the 6th pin of the operational amplifier U3; the 6th pin is connected to the 10 Connect the 2nd pin of the operational amplifier U3, directly connect to the 1st pin of the multiplier A1, directly connect to the 1st and 3rd pins of the multiplier A2, directly connect to the 3rd pin of the multiplier A3, directly connect to the 1st and 3rd pins of the multiplier A5; the 3rd pin is grounded; the 4th pin is connected to the negative voltage source VEE, and the 7th pin is connected to the positive voltage source VCC; the 1st, 5th and 8th pins are left floating.

[0025] The second pin of the operational amplifier U4 is connected to the 11 Connect the 7th pin of multiplier A5 through resistor R 12 Connect the negative terminal of the DC voltage source V1 through the resistor R 13 Connect the 6th pin of the operational amplifier U6 through the resistor R 14 Connect to pin 6 of operational amplifier U4; pin 6 is connected to pin 6 through resistor R 14 Connect the second pin of the operational amplifier U4 through the resistor R 15Connect the 2nd pin of the operational amplifier U5; the 3rd pin is grounded; the 4th pin is connected to the negative voltage source VEE, and the 7th pin is connected to the positive voltage source VCC; the 1st pin, the 5th pin, and the 8th pin are left floating.

[0026] The second pin of the operational amplifier U5 is connected to the 15 Connect the 6th pin of the operational amplifier U4 to the 6th pin of the operational amplifier U5 through the capacitor C2; the 6th pin is connected to the 2nd pin of the operational amplifier U5 through the capacitor C2 and connected to the 2nd pin of the operational amplifier U5 through the resistor R 16 Connect the second pin of the operational amplifier U6 to the second pin of the operational amplifier U1 through R2; the third pin is grounded; the fourth pin is connected to the negative voltage source VEE, and the seventh pin is connected to the positive voltage source VCC; the first pin, the fifth pin, and the eighth pin are left floating.

[0027] The second pin of the operational amplifier U6 is connected to the 16 Connect the 6th pin of the operational amplifier U5 through the resistor R 17 Connect to the 6th pin of the operational amplifier U6; the 6th pin is connected to the 17 Connect the second pin of the operational amplifier U6 through the resistor R 13 Connect the 2nd pin of the operational amplifier U4; the 3rd pin is grounded; the 4th pin is connected to the negative voltage source VEE, and the 7th pin is connected to the positive voltage source VCC; the 1st pin, the 5th pin, and the 8th pin are left floating.

[0028] The second pin of the operational amplifier U7 is connected to the 18 Connect the 6th pin of the operational amplifier U2 through the resistor R 19 Connect pins 1 and 3 of multiplier A6 through resistor R 19 Connect the 6th pin of the operational amplifier U9 through the resistor R 20 Connect to pin 6 of operational amplifier U7; pin 6 is connected to pin 6 through resistor R 20 Connect the second pin of the operational amplifier U7 through the resistor R 21 Connect the 2nd pin of the operational amplifier U8; the 3rd pin is grounded; the 4th pin is connected to the negative voltage source VEE, and the 7th pin is connected to the positive voltage source VCC; the 1st pin, the 5th pin, and the 8th pin are left floating.

[0029] The second pin of the operational amplifier U8 is connected to the 21 Connect the 6th pin of the operational amplifier U7 to the 6th pin of the operational amplifier U8 through the capacitor C3; the 6th pin is connected to the 2nd pin of the operational amplifier U8 through the capacitor C3 and connected to the 2nd pin of the operational amplifier U8 through the resistor R 22Connect the 2nd pin of the operational amplifier U9; the 3rd pin is grounded; the 4th pin is connected to the negative voltage source VEE, and the 7th pin is connected to the positive voltage source VCC; the 1st pin, the 5th pin, and the 8th pin are left floating.

[0030] The second pin of the operational amplifier U9 is connected to the 22 Connect the 6th pin of the operational amplifier U8 through the resistor R 23 Connect to pin 6 of operational amplifier U9; pin 6 is connected to pin 6 through resistor R 19 Connect the second pin of the operational amplifier U7 through the resistor R 23 Connect the 2nd pin of the operational amplifier U8, and directly connect the 1st and 3rd pins of the multiplier A6; the 3rd pin is grounded; the 4th pin is connected to the negative voltage source VEE, and the 7th pin is connected to the positive voltage source VCC; the 1st pin, the 5th pin, and the 8th pin are left floating.

[0031] The operational amplifier U 10 The second pin is connected through the resistor R 25 Connecting operational amplifier U 10 The 6th pin of 24 Connect the 7th pin of multiplier A6; the 6th pin through resistor R 25 Connecting operational amplifier U 10 The second pin of is directly connected to the third pin of the multiplier A4; the third pin is grounded; the fourth pin is connected to the negative voltage source VEE, and the seventh pin is connected to the positive voltage source VCC; the first pin, the fifth pin, and the eighth pin are left floating.

[0032] The third pin of the multiplier A1 is directly connected to the sixth pin of the operational amplifier U2, the first pin is directly connected to the sixth pin of the operational amplifier U3; the seventh pin is connected to the second pin of the operational amplifier U1 through the resistor R1.

[0033] The first and third pins of the multiplier A2 are directly connected to the sixth pin of the operational amplifier U3; and the seventh pin is directly connected to the first pin of the multiplier A3.

[0034] The third pin of the multiplier A3 is directly connected to the sixth pin of the operational amplifier U3, and the first pin is directly connected to the seventh pin of the multiplier A2; the seventh pin is connected to the second pin of the operational amplifier U1 through the resistor R3.

[0035] The third pin of the multiplier A4 is directly connected to the operational amplifier U 10 The 6th pin of the operational amplifier U1 is connected to the 1st pin of the operational amplifier U2, and the 7th pin is connected to the 2nd pin of the operational amplifier U1 through the resistor R4.

[0036] The third pin of the multiplier A5 is directly connected to the sixth pin of the operational amplifier U3, and the first pin is directly connected to the sixth pin of the operational amplifier U3; the seventh pin is connected to the operational amplifier U3 through the resistor R 11 Connect to pin 2 of operational amplifier U4.

[0037] The first and third pins of the multiplier A6 are directly connected to the sixth pin of the operational amplifier U9; the seventh pin is connected to the operational amplifier U9 through the resistor R 24 Connecting operational amplifier U 10 Pin 2 of the .

[0038] 4. The improved HR neuron model circuit based on voltage-controlled memristor is characterized in that: in the first channel circuit, resistor R1=10k, resistor R2=300k, resistor R3=3k, resistor R4=30k, resistor R5=300k, resistor R6=300k, resistor R7=300k, resistor R8=2k, resistor R9=10k, resistor R 10 =10k, capacitor C1 = 50nF; resistor R in the second channel circuit 11 =2k, resistor R 12 =100k, resistor R 13 =100k, resistor R 14 =100k, resistor R 15 =2k, resistor R 16 =10k, resistor R 17 =10k, capacitor C2 = 50nF, DC voltage source V1 = 1V; resistor R in the third channel circuit 18 =100k, resistor R 19 =100k, resistor R 20 =100k, resistor R 21 =2k, resistor R 22 =10k, resistor R 23 =10k, capacitor C3 = 50nF; the resistance R in the memristor analog equivalent circuit 24 =100k, resistor R 25 =10k, external excitation I1, I2 are sinusoidal signals generated by the function signal generator, the value of the positive voltage source VCC is +15V, and the value of the negative voltage source VEE is -15V.

[0039] Beneficial effects: The present invention uses components to build three circuit channels. By introducing a memristor and two external input signals of different frequencies into the HR neuron model, it is found that the circuit has a periodic cluster discharge mode of chaotic spikes, a periodic cluster discharge mode of period 3 spikes, a period 2 spike discharge mode and a chaotic spike discharge mode when driven by high-frequency and low-frequency signals. The circuit of the invention generates a variety of co-storage discharge modes and realizes the conversion of different discharge modes, enriching the discharge mode of the HR neuron system. The generation of multiple discharge modes of HR neurons through external stimulation provides new insights into the transmission of complex signals in the nervous system and provides a theoretical basis for the research, prevention and treatment of neurological diseases. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 It is a schematic diagram of the connection of an improved HR neuron circuit based on a voltage-controlled memristor according to the present invention.

[0041] Figure 2 It is a timing diagram of periodic cluster discharge in which each cluster of the first path output signal x has chaotic peaks when the amplitude of the external excitations I1 and I2 is 3V, the frequency of I1 is 5kHz, and the frequency of I2 is 20Hz according to the circuit simulation of the present invention.

[0042] Figure 3 It is a periodic cluster discharge timing diagram of the circuit simulation of the present invention when the amplitude of the external excitations I1 and I2 is 3V, the frequency of I1 is 5kHz, and the frequency of I2 is 200Hz, and each cluster of the first path output signal x has three peaks in the period.

[0043] Figure 4 The circuit simulation of the present invention is a timing diagram of the peak discharge of the period 2 of the first path output signal x when the amplitude of the external excitations I1 and I2 is 3V, the frequency of I1 is 5kHz, and the frequency of I2 is 400Hz.

[0044] Figure 5 The chaotic peak discharge timing diagram of the first path output signal x is shown in the circuit simulation of the present invention when the amplitude of the external excitations I1 and I2 is 3V, the frequency of I1 is 5kHz, and the frequency of I2 is 700Hz. DETAILED DESCRIPTION

[0045] In order to make the purpose and technical solution of the present invention more clearly understood, the application principle of the present invention is described in detail below in conjunction with the accompanying drawings and embodiments.

[0046] 1. A method for constructing an improved HR neuron model circuit based on a voltage-controlled memristor, characterized by comprising the following steps:

[0047] (1) A voltage-controlled memristor model, which is described as:

[0048]

[0049] in is the memetic derivative, is the magnetic flux, α and β are constants.

[0050] (3) An improved HR neuron model based on voltage-controlled memristor is shown below:

[0051]

[0052] Where I1 = A1 sin(2πf1t), I2 = A2 sin(2πf2t), k is the memristor coupling strength. x, y and They represent the neuron's membrane potential, the recovery variable associated with the neuron's intracellular current, and the transmembrane magnetic flux on the neuron's membrane, respectively.

[0053] (3) According to Kirchhoff’s circuit law, the circuit characteristics of the operational amplifier and the voltage-current relationship of the circuit elements, when the memristor coupling strength k = 1, the circuit equivalent equation can be derived as follows:

[0054]

[0055] Among them, Memristor coupling strength

[0056] 2. According to the above mathematical model, an improved HR neuron model circuit based on voltage-controlled memristor is designed, which mainly includes the first channel circuit, the second channel circuit, the third channel circuit, and the memristor analog equivalent circuit:

[0057] The first channel module is composed of an operational amplifier U1, an operational amplifier U2, an operational amplifier U3, a capacitor C1, a multiplier A1, a multiplier A2, a multiplier A3, a multiplier A4, and resistors R1, R2, R3, R4, R5, R6, R7, R8, R9, and R 10 The output signal -x of the first path is used as the input signal of the multiplier A1 and the multiplier A4 in the first path, and acts on the first path. The output signal -x is used as the resistor R in the third path. 18 One input signal acts on the third path, and the first channel output signal -x is connected to the operational amplifier U3 to become the x signal, which serves as the input signal of the multipliers A1, A2, and A3 in the first path module and acts on the first path. The output signal x serves as the input signal of the multiplier A5 in the second path module and acts on the second path.

[0058] The second channel module is composed of a multiplier A5, an operational amplifier U4, an operational amplifier U5, an operational amplifier U6 and a resistor R 11 , resistor R 12 , resistor R 13 , resistor R 14 , resistor R 15 , resistor R 16 , resistor R 17 , capacitor C2, and DC voltage source V1. The output signal -y of the second path acts as the input signal of the resistor R2 in the first path and acts on the first path. The output signal -y is connected to the operational amplifier U6 and becomes the y signal as the second path resistor R 13 The input signal of one path is applied to the second path.

[0059] The third channel module is composed of an operational amplifier U7, an operational amplifier U8, an operational amplifier U9 and a resistor R 18 , resistor R 19 , resistor R 20 , resistor R 21 , resistor R 22 , resistor R 23 , capacitor C3. The third path outputs a signal - Connecting operational amplifier U9 turns the output signal As the third path resistor R 19 The input signal of one channel acts on the third channel, and the output signal It acts as the input signal of multiplier A6 in the memristor analog equivalent circuit and acts on the memristor analog equivalent circuit.

[0060] The memristor analog equivalent circuit is composed of a multiplier A6, an operational amplifier U 10 And the resistor R 24 , resistor R 25 The output signal W of the memristor analog equivalent circuit is used as the input signal of the multiplier A4 in the first path.

[0061] 3. The improved HR neuron model circuit based on voltage-controlled memristor is characterized by: the operational amplifier U1, operational amplifier U2, operational amplifier U3, operational amplifier U4, operational amplifier U5, operational amplifier U6, operational amplifier U7, operational amplifier U8, operational amplifier U9, operational amplifier U 10 The operational amplifier UA741 is used, and the multiplier A1, the multiplier A2, the multiplier A3, the multiplier A4, the multiplier A5, the multiplier A6 and the multiplier AD633JN are used.

[0062] The second pin of the operational amplifier U1 is connected to the seventh pin of the multiplier A1 through a resistor R1, to the sixth pin of the operational amplifier U5 through a resistor R2, to the seventh pin of the multiplier A3 through a resistor R3, to the seventh pin of the multiplier A4 through a resistor R4, to the external excitation I1 through a resistor R5, to the external excitation I2 through a resistor R6, and to the sixth pin of the operational amplifier U1 through a resistor R7; the sixth pin of the operational amplifier U1 is connected to the second pin of the operational amplifier U2 through a resistor R8, and to the second pin of the operational amplifier U1 through a resistor R7; the third pin is grounded; the fourth pin is connected to the negative voltage source VEE, and the seventh pin is connected to the positive voltage source VCC; the first pin, the fifth pin, and the eighth pin are suspended.

[0063] The second pin of the operational amplifier U2 is connected to the sixth pin of the operational amplifier U1 through the resistor R8, and is connected to the sixth pin of the operational amplifier U2 through the capacitor C1; the sixth pin of the operational amplifier U2 is connected to the second pin of the operational amplifier U3 through the resistor R9, is connected to the second pin of the operational amplifier U2 through the capacitor C1, is directly connected to the third pin of the multiplier A1, is directly connected to the first pin of the multiplier A4, and is connected to the third pin of the multiplier A5 through the resistor R10. 18 Connect the 2nd pin of the operational amplifier U7; the 3rd pin is grounded; the 4th pin is connected to the negative voltage source VEE, and the 7th pin is connected to the positive voltage source VCC; the 1st pin, the 5th pin, and the 8th pin are left floating.

[0064] The second pin of the operational amplifier U3 is connected to the sixth pin of the operational amplifier U2 through the resistor R9. 10 Connect to the 6th pin of the operational amplifier U3; the 6th pin is connected to the 10 Connect the 2nd pin of the operational amplifier U3, directly connect to the 1st pin of the multiplier A1, directly connect to the 1st and 3rd pins of the multiplier A2, directly connect to the 3rd pin of the multiplier A3, directly connect to the 1st and 3rd pins of the multiplier A5; the 3rd pin is grounded; the 4th pin is connected to the negative voltage source VEE, and the 7th pin is connected to the positive voltage source VCC; the 1st, 5th and 8th pins are left floating.

[0065] The second pin of the operational amplifier U4 is connected to the 11 Connect the 7th pin of multiplier A5 through resistor R 12 Connect the negative terminal of the DC voltage source V1 through the resistor R 13 Connect the 6th pin of the operational amplifier U6 through the resistor R 14 Connect to pin 6 of operational amplifier U4; pin 6 is connected to pin 6 through resistor R 14 Connect the second pin of the operational amplifier U4 through the resistor R 15Connect the 2nd pin of the operational amplifier U5; the 3rd pin is grounded; the 4th pin is connected to the negative voltage source VEE, and the 7th pin is connected to the positive voltage source VCC; the 1st pin, the 5th pin, and the 8th pin are left floating.

[0066] The second pin of the operational amplifier U5 is connected to the 15 Connect the 6th pin of the operational amplifier U4 to the 6th pin of the operational amplifier U5 through the capacitor C2; the 6th pin is connected to the 2nd pin of the operational amplifier U5 through the capacitor C2 and connected to the 2nd pin of the operational amplifier U5 through the resistor R 16 Connect the second pin of the operational amplifier U6 to the second pin of the operational amplifier U1 through R2; the third pin is grounded; the fourth pin is connected to the negative voltage source VEE, and the seventh pin is connected to the positive voltage source VCC; the first pin, the fifth pin, and the eighth pin are left floating.

[0067] The second pin of the operational amplifier U6 is connected to the 16 Connect the 6th pin of the operational amplifier U5 through the resistor R 17 Connect to the 6th pin of the operational amplifier U6; the 6th pin is connected to the 17 Connect the second pin of the operational amplifier U6 through the resistor R 13 Connect the 2nd pin of the operational amplifier U4; the 3rd pin is grounded; the 4th pin is connected to the negative voltage source VEE, and the 7th pin is connected to the positive voltage source VCC; the 1st pin, the 5th pin, and the 8th pin are left floating.

[0068] The second pin of the operational amplifier U7 is connected to the 18 Connect the 6th pin of the operational amplifier U2 through the resistor R 19 Connect pins 1 and 3 of multiplier A6 through resistor R 19 Connect the 6th pin of the operational amplifier U9 through the resistor R 20 Connect to pin 6 of operational amplifier U7; pin 6 is connected to pin 6 through resistor R 20 Connect the second pin of the operational amplifier U7 through the resistor R 21 Connect the 2nd pin of the operational amplifier U8; the 3rd pin is grounded; the 4th pin is connected to the negative voltage source VEE, and the 7th pin is connected to the positive voltage source VCC; the 1st pin, the 5th pin, and the 8th pin are left floating.

[0069] The second pin of the operational amplifier U8 is connected to the 21 Connect the 6th pin of the operational amplifier U7 to the 6th pin of the operational amplifier U8 through the capacitor C3; the 6th pin is connected to the 2nd pin of the operational amplifier U8 through the capacitor C3 and connected to the 2nd pin of the operational amplifier U8 through the resistor R 22Connect the 2nd pin of the operational amplifier U9; the 3rd pin is grounded; the 4th pin is connected to the negative voltage source VEE, and the 7th pin is connected to the positive voltage source VCC; the 1st pin, the 5th pin, and the 8th pin are left floating.

[0070] The second pin of the operational amplifier U9 is connected to the 22 Connect the 6th pin of the operational amplifier U8 through the resistor R 23 Connect to pin 6 of operational amplifier U9; pin 6 is connected to pin 6 through resistor R 19 Connect the second pin of the operational amplifier U7 through the resistor R 23 Connect the 2nd pin of the operational amplifier U8, and directly connect the 1st and 3rd pins of the multiplier A6; the 3rd pin is grounded; the 4th pin is connected to the negative voltage source VEE, and the 7th pin is connected to the positive voltage source VCC; the 1st pin, the 5th pin, and the 8th pin are left floating.

[0071] The operational amplifier U 10 The second pin is connected through the resistor R 25 Connecting operational amplifier U 10 The 6th pin of 24 Connect the 7th pin of multiplier A6; the 6th pin through resistor R 25 Connecting operational amplifier U 10 The second pin of is directly connected to the third pin of the multiplier A4; the third pin is grounded; the fourth pin is connected to the negative voltage source VEE, and the seventh pin is connected to the positive voltage source VCC; the first pin, the fifth pin, and the eighth pin are left floating.

[0072] The third pin of the multiplier A1 is directly connected to the sixth pin of the operational amplifier U2, the first pin is directly connected to the sixth pin of the operational amplifier U3; the seventh pin is connected to the second pin of the operational amplifier U1 through the resistor R1.

[0073] The first and third pins of the multiplier A2 are directly connected to the sixth pin of the operational amplifier U3; and the seventh pin is directly connected to the first pin of the multiplier A3.

[0074] The third pin of the multiplier A3 is directly connected to the sixth pin of the operational amplifier U3, and the first pin is directly connected to the seventh pin of the multiplier A2; the seventh pin is connected to the second pin of the operational amplifier U1 through the resistor R3.

[0075] The third pin of the multiplier A4 is directly connected to the operational amplifier U 10 The 6th pin of the operational amplifier U1 is connected to the 1st pin of the operational amplifier U2, and the 7th pin is connected to the 2nd pin of the operational amplifier U1 through the resistor R4.

[0076] The third pin of the multiplier A5 is directly connected to the sixth pin of the operational amplifier U3, and the first pin is directly connected to the sixth pin of the operational amplifier U3; the seventh pin is connected to the operational amplifier U3 through the resistor R 11 Connect to pin 2 of operational amplifier U4.

[0077] The first and third pins of the multiplier A6 are directly connected to the sixth pin of the operational amplifier U9; the seventh pin is connected to the operational amplifier U9 through the resistor R 24 Connecting operational amplifier U 10 Pin 2 of the .

[0078] 4. The improved HR neuron model circuit based on voltage-controlled memristor is characterized in that: in the first channel circuit, resistor R1=10k, resistor R2=300k, resistor R3=3k, resistor R4=30k, resistor R5=300k, resistor R6=300k, resistor R7=300k, resistor R8=2k, resistor R9=10k, resistor R 10 =10k, capacitor C1 = 50nF; resistor R in the second channel circuit 11 =2k, resistor R 12 =100k, resistor R 13 =100k, resistor R 14 =100k, resistor R 15 =2k, resistor R 16 =10k, resistor R 17 =10k, capacitor C2 = 50nF, DC voltage source V1 = 1V; resistor R in the third channel circuit 18 =100k, resistor R 19 =100k, resistor R 20 =100k, resistor R 21 =2k, resistor R 22 =10k, resistor R 23 =10k, capacitor C3 = 50nF; the resistance R in the memristor analog equivalent circuit 24 =100k, resistor R 25 =10k, external excitation I1, I2 are sinusoidal signals generated by the function signal generator, the value of the positive voltage source VCC is +15V, and the value of the negative voltage source VEE is -15V.

[0079] 5. The circuit of the present invention realizes an improved HR neuron circuit based on voltage-controlled memristor, which is composed of three channels plus a memristor circuit module. The circuit is designed and verified using Multisim simulation software. When the amplitude of external excitation I1 and I2 is set to 3V and the frequency of I1 is 5kHz, the frequency of I2 is adjusted to 20Hz, 200Hz, 400Hz, and 700Hz in sequence, the improved memristor HR neuron circuit shows a periodic cluster discharge mode with chaotic spikes in each cluster, such as Figure 2 As shown, the periodic cluster discharge pattern with three spikes in each cluster is as follows Figure 3 As shown, the peak discharge pattern of cycle 2 is as follows Figure 4 As shown, the chaotic spike discharge mode is as follows Figure 5 As shown in Figure 3, the feasibility and physical feasibility of the system design are verified.

Claims

1. An improved HR neuron model circuit based on voltage-controlled memristor, characterized in that: The following steps are involved: (1) Voltage-controlled memristor model, which is described as: in is the memetic derivative, is the magnetic flux, α and β are constants; (2) An improved HR neuron model based on voltage-controlled memristor is shown below: Where U1 = A1sin(2πf1t), U2 = A2sin(2πf2t), k is the memristor coupling strength; x, y and represent the neuron's membrane potential, the recovery variable associated with the neuron's intracellular current, and the transmembrane magnetic flux on the neuron's membrane, respectively; (3) According to Kirchhoff's circuit law, the circuit characteristics of the operational amplifier and the voltage-current relationship of the circuit elements, when k = 1, the circuit equivalent equation can be derived as follows: Among them, 2. According to the above mathematical model, an improved HR neuron circuit based on voltage-controlled memristor is designed, which mainly includes the first channel circuit, the second channel circuit, the third channel circuit, and the memristor analog equivalent circuit: The first channel module is composed of an operational amplifier U1, an operational amplifier U2, an operational amplifier U3, a memristor analog equivalent module, a capacitor C1, a multiplier A1, a multiplier A2, a multiplier A3, a multiplier A4, and resistors R1, R2, R3, R4, R5, R6, R7, R8, R9, and R 10 The output signal -x of the first path is used as the input signal of the multiplier A1 and the multiplier A4 in the first path, and acts on the first path. The output signal -x is used as the resistor R in the third path. 18 The input signal of one channel acts on the third channel, the output signal -x of the first channel is connected to the operational amplifier U3 to become the x signal, which acts as the input signal of the multipliers A1, A2 and A3 in the first channel module and acts on the first channel, and the output signal x acts as the input signal of the multiplier A5 in the second channel module and acts on the second channel; The second channel module is composed of a multiplier A5, an operational amplifier U4, an operational amplifier U5, an operational amplifier U6 and a resistor R 11 , resistor R 12 , resistor R 13 , resistor R 14 , resistor R 15 , resistor R 16 , resistor R 17 , capacitor C2, and DC voltage source V1. The output signal -y of the second path acts as the input signal of the resistor R2 in the first path and acts on the first path. The output signal -y is connected to the operational amplifier U6 and becomes the y signal as the second path resistor R 13 The input signal of one path acts on the second path; The third channel module is composed of an operational amplifier U7, an operational amplifier U8, an operational amplifier U9 and a resistor R 18 , resistor R 19 , resistor R 20 , resistor R 21 , resistor R 22 , resistor R 23 , capacitor C3. The third path outputs a signal Connecting operational amplifier U9 turns the output signal As the third path resistor R 19 The input signal of one channel acts on the third channel, and the output signal As the input signal of multiplier A6 in the memristor analog equivalent circuit, it acts on the memristor analog equivalent circuit; The memristor analog equivalent circuit is composed of a multiplier A6, an operational amplifier U 10 And the resistor R 24 , resistor R 25 The output signal W of the memristor analog equivalent circuit is used as the input signal of the multiplier A4 in the first path.

3. The improved HR neuron circuit based on voltage-controlled memristor according to claim 2, characterized in that: The operational amplifier U1, operational amplifier U2, operational amplifier U3, operational amplifier U4, operational amplifier U5, operational amplifier U6, operational amplifier U7, operational amplifier U8, operational amplifier U9, operational amplifier U 10 The operational amplifier UA741 is used, and the multiplier A1, the multiplier A2, the multiplier A3, the multiplier A4, the multiplier A5, the multiplier A6 and the multiplier AD633JN are used.

4. The improved HR neuron circuit based on voltage-controlled memristor according to claim 3, characterized in that: In the first channel circuit, resistor R1=10k, resistor R2=300k, resistor R3=3k, resistor R4=30k, resistor R5=300k, resistor R6=300k, resistor R7=300k, resistor R8=2k, resistor R9=10k, resistor R 10 =10k, capacitor C1 = 50nF; resistor R in the second channel circuit 11 =2k, resistor R 12 =100k, resistor R 13 =100k, resistor R 14 =100k, resistor R 15 =2k, resistor R 16 =10k, resistor R 17 =10k, capacitor C2 = 50nF, DC voltage source V1 = 1V; resistor R in the third channel circuit 18 =100k, resistor R 19 =100k, resistor R 20 =100k, resistor R 21 =2k, resistor R 22 =10k, resistor R 23 =10k, capacitor C3 = 50nF; the resistance R in the memristor analog equivalent circuit 24 =100k, resistor R 25 =10k; the external excitation I1 and I2 are sinusoidal signals generated by the function generator, the value of the positive voltage source VCC is +15V, and the value of the negative voltage source VEE is -15V.

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