Semiconductor laser device and preparation method thereof

Abstract

The invention provides a semiconductor laser device and a preparation method thereof, and relates to the technical field of semiconductor lasers. The semiconductor laser device sequentially comprises a substrate layer, a buffer layer, a lower limiting layer, a lower composite waveguide layer, a quantum well, an upper composite waveguide layer, an upper limiting layer, a transition layer and a cap layer from bottom to top. And the lower composite waveguide layer sequentially comprises a (Al < x > 2 > Ga < 1-x > 2) < y > 2 < In < 1-y > 2 first lower waveguide layer, a (Al < x > 3 > Ga < 1-x > 3 < y > 3 < In < 1-y > 3 second lower waveguide layer and a (Al < x > 4 > Ga < 1-x > 4) < y > 4 < In < 1-y > 4 third lower waveguide layer from bottom to top. And the upper composite waveguide layer sequentially comprises a (Al < x > 6 > Ga < 1-x > 6) < y > 5 < In < 1-y > 5 first upper waveguide layer, a (Al < x > 7 > Ga < 1-x > 7) < y > 6 < In < 1-y > 6 second upper waveguide layer and a (Al < x > 8 > Ga < 1-x > 8) < y > 7 < In < 1-y > 7 third upper waveguide layer from bottom to top. The lower limiting layer is (Al < x > < 1 > Ga < 1-x > 1) < y > < 1 > In < 1-y > < 1 > P, and the upper limiting layer is (Al < x > < 9 > Ga < 1-x > 9) < y > < 8 > In < 1-y > < 8 > P. Wherein x3 > x1 > x2 = x4, and x7 > x9 > x6 = x8. The semiconductor laser device adopts a wide-strip-shaped structure, so that the light beam quality is effectively ensured, and light spots are prevented from being disordered.

Description

Technical Field

[0001] The invention relates to the technical field of semiconductor lasers, in particular to a semiconductor laser device and a preparation method thereof. Background Art

[0002] As a red light source, 640nm semiconductor lasers are widely used in laser display, laser projection and other fields, bringing eye-protection sensory experience with more realistic colors and stronger immersion. As consumers' demand for large-size and multi-scene applications increases, laser projection has entered a critical period of development and has huge room for development in terms of consumer groups, scene applications and other aspects.

[0003] Short wavelength and high power can improve the human eye's recognition and increase color sensitivity. In order to increase the output power, it is usually necessary to adopt a wide-strip structure, increase the current injection area, and increase the light-emitting size. However, the AlGaInP thermal resistance used in existing semiconductor laser devices is relatively large. If a wide-strip structure is used, it often leads to multi-mode lasing, resulting in poor beam quality in the slow axis direction and a messy light spot. Summary of the invention

[0004] In view of the above problems, the present application provides a semiconductor laser device and a method for preparing the same. The semiconductor laser device adopts a wide stripe structure to effectively ensure the beam quality and avoid cluttered light spots.

[0005] The technical solution adopted by the present invention to solve the technical problem is:

[0006] A semiconductor laser device comprises, from bottom to top, a substrate layer, a buffer layer, a lower confinement layer, a lower composite waveguide layer, a quantum well, an upper composite waveguide layer, an upper confinement layer, a transition layer and a cap layer;

[0007] The lower composite waveguide layer includes (Al x2 Ga 1-x2 ) y2 In 1-y2 P first lower waveguide layer, (Al x3 Ga 1-x3 ) y3 In 1-y3 The second lower waveguide layer and (Al x4 Ga 1-x4 ) y4 In 1-y4 P third lower waveguide layer;

[0008] The upper composite waveguide layer includes (Al x6 Ga 1-x6 ) y5 In 1-y5 The first upper waveguide layer (Al x7 Ga 1-x7 )y6 In 1-y6 The second upper waveguide layer and (Al x8 Ga 1-x8 ) y7 In 1-y7 P third upper waveguide layer;

[0009] The lower limiting layer is (Al x1 Ga 1-x1 ) y1 In 1-y1 P, the upper limiting layer is (Al x9 Ga 1-x9 ) y8 In 1-y8 P;

[0010] Among them, x3>x1>x2=x4, x7>x9>x6=x8.

[0011] Furthermore, the value ranges of parameters x1, y1, x2, y2, x3, y3, x4, y4, x6, y5, x7, y6, x8, y7, x9 and y8 are,

[0012] 0.6≤x1≤0.7, 0.4≤y1≤0.6, 0.4≤x2≤0.55, 0.4≤y2≤0.6; 0.7≤x3≤0.8, 0.5≤y3≤0.65; 0.4≤x4≤0.55, 0.4≤y4≤0.6, 0.4≤x6≤0.55, 0.4≤y5≤0.6; 0.7≤x7≤0.8, 0.5≤y6≤0.66; 0.4≤x8≤0.55, 0.4≤y7≤0.6, 0.6≤x9≤0.7, 0.4≤y8≤0.6.

[0013] Furthermore, the quantum well is Ga 1-x5 In x5 P, and the value range of parameter x5 is 0.55≤x5≤0.65.

[0014] Further, y2>0.5, y6>0.5, x5>0.55.

[0015] Further, the thickness of the upper composite waveguide layer is greater than the thickness of the lower composite waveguide layer.

[0016] Further, the thickness of the first lower waveguide layer is equal to the thickness of the third upper waveguide layer, the thickness of the second lower waveguide layer is equal to the thickness of the second upper waveguide layer, and the thickness of the third lower waveguide layer is less than the thickness of the first upper waveguide layer.

[0017] Further, the thickness of the first lower waveguide layer is equal to the thickness of the second lower waveguide layer.

[0018] Further, the thickness of the first lower waveguide layer, the second lower waveguide layer, the second upper waveguide layer and the third upper waveguide layer are all 20 nm, the thickness of the third lower waveguide layer is 40 nm, and the thickness of the first upper waveguide layer is 80 nm.

[0019] Furthermore, the transition layer includes (Al x10 Ga 1-x10 ) y9 In 1-y9 P first transition layer and Ga 0.5 In 0.5 P second transition layer.

[0020] A method for preparing a semiconductor laser device comprises the following steps:

[0021] S1, placing the substrate in the growth chamber of the equipment, heating it to 720±10℃ in a H2 environment, and introducing AsH3 to perform surface heat treatment on the substrate;

[0022] S2, the temperature is slowly lowered to 680±10℃, and then TMGa and AsH3 are introduced to grow a buffer layer on the substrate;

[0023] S3, the temperature is maintained at 680±10°C, and the Group V source (100% AsH3) and Group III source (TMGa) are stopped, and PH3 is introduced to achieve growth pause on the buffer layer;

[0024] S4, the temperature is slowly changed to 700±10°C, and then TMAl, TMIn, TMGa and PH3 are introduced to grow a lower confinement layer on the buffer layer;

[0025] S5, maintaining the temperature at 700±10° C., introducing TMAl, TMIn, TMGa and PH3, and growing a first lower waveguide layer on the lower confinement layer;

[0026] S6, maintaining the temperature at 700±10° C., introducing TMAl, TMIn, TMGa and PH3, and growing a second lower waveguide layer on the first lower waveguide layer;

[0027] S7, the temperature is slowly changed to 640±10° C., TMAl, TMIn, TMGa and PH3 are introduced, and a third lower waveguide layer is grown on the second lower waveguide layer;

[0028] S8, maintaining the temperature at 640±10° C., introducing TMIn, TMGa and PH3 to grow a quantum well on the third lower waveguide layer;

[0029] S9, the temperature is slowly changed to 700±10° C., TMAl, TMIn, TMGa and PH3 are introduced, and a first upper waveguide layer is grown on the quantum well;

[0030] S10, maintaining the temperature at 700±10° C., introducing TMAl, TMIn, TMGa and PH3, and growing a second upper waveguide layer on the first upper waveguide layer;

[0031] S11, the temperature is maintained at 700±10° C., TMAl, TMIn, TMGa and PH3 are introduced, and a third upper waveguide layer is grown on the second upper waveguide layer;

[0032] S12, maintaining the temperature at 700±10° C., introducing TMAl, TMIn, TMGa and PH3, and growing an upper confinement layer on the third upper waveguide layer;

[0033] S13, the temperature is slowly changed to 670±10°C, TMAl, TMIn, TMGa and PH3 are introduced, and a first transition layer is grown on the upper confinement layer;

[0034] S14, maintaining the temperature at 670±10° C., introducing TMIn, TMGa and PH3, and growing a second transition layer on the first transition layer;

[0035] S15, the temperature is slowly changed to 540±10℃, and PH3 is introduced during the cooling process to protect the growth interface;

[0036] S16, maintaining the temperature at 540±10°C, introducing TMGa and AsH3, and growing a cap layer on the second transition layer.

[0037] The beneficial effects of the present invention are:

[0038] A semiconductor laser device provided in an embodiment of the present application adopts a composite waveguide layer, and the high Al component AlGaInP of the waveguide layer can expand the incoming light spot, reduce the light confinement factor through low refractive index light expansion, increase the high-order mode loss drop, and at the same time, utilize the high Al component AlGaInP to have a larger conduction band order, which can improve the carrier confinement ability and high-temperature working characteristics, thereby utilizing the thermal lens effect to increase the slow axis divergence angle, ensure the beam quality in the slow axis direction, and avoid messy light spots. The semiconductor laser device adopts a wide strip structure, and at the same time, by adding a high Al component AlGaInP in the waveguide layer, the problem of poor beam quality and messy light spots in the slow axis direction caused by the wide strip structure is solved.

[0039] In addition, by utilizing the high Al content AlGaInP in the waveguide layer, quantum well stress compensation can be achieved, the defect proliferation caused by the difference in well barrier lattice constants can be reduced, the stress in the active area can be reduced, and the working reliability can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1This is a structural diagram of a semiconductor laser device provided in this application.

[0041] In the figure: 1, substrate layer; 2, buffer layer; 3, lower confinement layer; 41, first lower waveguide layer; 42, second lower waveguide layer; 43, third lower waveguide layer; 5, quantum well; 61, first upper waveguide layer; 62, second upper waveguide layer; 63, third upper waveguide layer; 7, upper confinement layer; 81, first transition layer; 82, second transition layer; 9, cap layer. DETAILED DESCRIPTION

[0042] In order to enable those skilled in the art to better understand the technical solutions in the present application, the technical solutions in the embodiments of the present application will be described in detail below in conjunction with the drawings in the embodiments of the present application, and the described embodiments are only part of the embodiments of the present application, not all of the embodiments. All other embodiments obtained by those skilled in the art without creative work on the basis of the embodiments of the present application shall belong to the protection scope of the present application.

[0043] like Figure 1 As shown, a semiconductor laser device includes, from bottom to top, a substrate layer 1, a buffer layer 2, a lower confinement layer 3, a lower composite waveguide layer, a quantum well 5, an upper composite waveguide layer, an upper confinement layer 7, a transition layer and a cap layer 9.

[0044] The lower composite waveguide layer includes a first lower waveguide layer 41, a second lower waveguide layer 42 and a third lower waveguide layer 43 from bottom to top. The first lower waveguide layer 41 is (Al x2 Ga 1-x2 ) y2 In 1-y2 P, the second lower waveguide layer 42 is (Al x3 Ga 1-x3 ) y3 In 1-y3 P, the third lower waveguide layer 43 is (Al x4 Ga 1-x4 ) y4 In 1-y4 P.

[0045] The upper composite waveguide layer includes a first upper waveguide layer 61, a second upper waveguide layer 62 and a third upper waveguide layer 63 from bottom to top. The first upper waveguide layer 61 is (Al x6 Ga 1-x6 ) y5 In 1-y5 P, the second upper waveguide layer 62 is (Al x7 Ga 1-x7 ) y6 In 1-y6 P, the third upper waveguide layer 63 is (Alx8 Ga 1-x8 ) y7 In 1-y7 P.

[0046] The lower limiting layer 3 is (Al x1 Ga 1-x1 ) y1 In 1-y1 P, the upper limiting layer 7 is (Al x9 Ga 1-x9 ) y8 In 1- y8 P.

[0047] The value ranges of parameters x1, y1, x2, y2, x3, y3, x4, y4, x6, y5, x7, y6, x8, y7, x9 and y8 are: 0.6≤x1≤0.7, 0.4≤y1≤0.6, 0.4≤x2≤0.55, 0.4≤y2≤0.6; 0.7≤x3≤0.8, 0.5≤y3≤0.65; 0.4≤x4≤ 0.55, 0.4≤y4≤0.6, 0.4≤x6≤0.55, 0.4≤y5≤0.6; 0.7≤x7≤0.8, 0.5≤y6≤0.66; 0.4≤ x8≤0.55, 0.4≤y7≤0.6, 0.6≤x9≤0.7, 0.4≤y8≤0.6, and x3>x1>x2=x4, x7>x9>x6=x8.

[0048] As a specific implementation manner, in this embodiment, x1=0.65, y1=0.5, x2=0.5, y2=0.5, x3=0.75, y3=0.58, x4=0.5, y4=0.5, x6=0.5, y5=0.5, x7=0.75, y6=0.58, x8=0.5, y7=0.5, x9=0.65, y8=0.5.

[0049] The first lower waveguide layer 41 as a transition layer can reduce the band gap difference between the lower confinement layer 3 and the third lower waveguide layer 43, thereby reducing the voltage drop and reducing the voltage. The third lower waveguide layer 43 is used to provide photoelectric confinement for the quantum well 5. The first upper waveguide layer 61 is used to provide photoelectric confinement for the quantum well 5. The third upper waveguide layer 63 as a transition layer can reduce the band gap difference between the upper confinement layer 7 and the first upper waveguide layer 61, thereby reducing the voltage drop and reducing the voltage.

[0050] By adding AlGaInP with a high Al component to the upper composite waveguide layer and the lower composite waveguide layer, a low refractive index extension layer is formed, the light confinement factor is reduced, and the thermal lens phenomenon is increased, resulting in an increase in the slow axis divergence angle. In addition, by inserting the second lower waveguide layer 42 with a high Al component between the first lower waveguide layer 41 with a low Al component and the third lower waveguide layer 43 to form the lower composite waveguide layer, and inserting the second upper waveguide layer 62 with a high Al component between the first upper waveguide layer 61 with a low Al component and the third upper waveguide layer 63 to form the upper composite waveguide layer, the carrier suppression capability can be improved, the carrier overflow can be suppressed, the expansion of the light field to the confinement layer can be reduced, and the photoelectric conversion efficiency can be improved.

[0051] The quantum well 5 is Ga 1-x5 In x5 P, and the value range of parameter x5 is 0.55≤x5≤0.65. As a specific implementation, in this embodiment, x5=0.6.

[0052] Furthermore, y2, y6>0.5, x5>0.55. Since y2 and y6 are both greater than 0.5, the upper composite waveguide layer and the lower composite waveguide layer are subjected to compressive strain, and x5 is greater than 0.55, so the quantum well 5 is subjected to tensile strain. In this way, the upper composite waveguide layer and the lower composite waveguide layer can form stress compensation with the quantum well 5. By using strain compensation, the problem of increased defects and poor reliability caused by stress in the active region can be reduced.

[0053] Furthermore, the thickness of the upper composite waveguide layer is greater than that of the lower composite waveguide layer. The asymmetric design of the upper composite waveguide layer and the lower composite waveguide layer can compress the light field to shift upward, increase the high-order mode absorption loss, and solve the problem of poor light spot quality caused by high-order mode lasing.

[0054] Further, the thickness of the first lower waveguide layer 41 is equal to the thickness of the third upper waveguide layer 63 , the thickness of the second lower waveguide layer 42 is equal to the thickness of the second upper waveguide layer 62 , and the thickness of the third lower waveguide layer 43 is less than the thickness of the first upper waveguide layer 61 .

[0055] Further, the thickness of the first lower waveguide layer 41 is equal to the thickness of the second lower waveguide layer 42 .

[0056] As a specific implementation, in this embodiment, the thickness of the first lower waveguide layer 41, the second lower waveguide layer 42, the second upper waveguide layer 62 and the third upper waveguide layer 63 are all 20 nm, the thickness of the third lower waveguide layer 43 is 40 nm, and the thickness of the first upper waveguide layer 61 is 80 nm.

[0057] Furthermore, the transition layer includes a first transition layer 81 and a second transition layer 82 from bottom to top, wherein the first transition layer 81 is (Alx10 Ga 1-x10 ) y9 In 1-y9 P, the second transition layer 82 is Ga 0.5 In 0.5 P. The value ranges of the parameters x10 and y9 are 0.4≤x10≤0.6, 0.4≤y9≤0.6. As a specific implementation, in this embodiment, x10=0.5, y9=0.5.

[0058] The first transition layer 81 and the second transition layer 82 can reduce the band gap difference between the upper confinement layer 7 and the cap layer 9, thereby reducing the voltage.

[0059] As a specific implementation, the substrate layer 1 described in this embodiment is GaAs, the buffer layer 2 is GaAs, and the cap layer 9 is GaAs.

[0060] A method for preparing a semiconductor laser device comprises the following steps:

[0061] S1, placing the GaAs substrate in the growth chamber of a metal organic chemical vapor deposition (MOCVD) device, heating it to 720±10° C. in a H2 environment, and introducing AsH3 to perform surface heat treatment on the GaAs substrate.

[0062] S2, the temperature is slowly lowered to 680±10℃, and the cooling rate is not higher than 30℃ / min, and then TMGa and AsH3 are introduced to grow GaAs buffer layer 2 on the GaAs substrate, in order to prevent defects from spreading from the substrate into the confinement layer, provide a fresh growth interface, and improve the quality of material growth.

[0063] S3, the temperature is maintained at 680±10°C, and the Group V source (100% AsH3) and the Group III source (TMGa) are stopped, PH3 is introduced to achieve a growth pause on the GaAs buffer layer 2, and the pause time is 3s to 30s, thereby depleting the As atoms in the reaction chamber.

[0064] S4, the temperature is slowly changed to 700±10°C, the heating rate is not higher than 60°C / min, and then TMAl, TMIn, TMGa and PH3 are introduced to grow (Al) on the GaAs buffer layer 2. x1 Ga 1-x1 ) y1 In 1-y1 P lower confinement layer 3 to confine the light field in the active area.

[0065] S5, the temperature is maintained at 700±10°C, TMAl, TMIn, TMGa and PH3 are introduced, and (Al x2 Ga 1-x2 )y2 In 1-y2 The first lower waveguide layer 41, as a transition layer, reduces the lower confinement layer 3 and (Al x3 Ga 1-x3 ) y3 In 1-y3 The band gap difference between the P and the third lower waveguide layers 43 reduces the voltage drop and reduces the voltage.

[0066] S6, the temperature is maintained at 700±10℃, TMAl, TMIn, TMGa and PH3 are introduced, and in the (Al x2 Ga 1-x2 ) y2 In 1- y2 The first lower waveguide layer 41 is grown on the x3 Ga 1-x3 ) y3 In 1-y3 P second lower waveguide layer 42.

[0067] S7, the temperature is slowly changed to 640±10℃, TMAl, TMIn, TMGa and PH3 are introduced, and the x3 Ga 1-x3 ) y3 In 1- y3 The second lower waveguide layer 42 is grown on the x4 Ga 1-x4 ) y4 In 1-y4 The third lower waveguide layer 43 provides photoelectric confinement for the quantum well 5 .

[0068] S8, the temperature is maintained at 640±10℃, TMIn, TMGa and PH3 are introduced, and the (Al x4 Ga 1-x4 ) y4 In 1-y4 Ga is grown on the third lower waveguide layer 43 1-x5 In x5 P quantum well 5.

[0069] S9, the temperature is slowly changed to 700±10℃, TMAl, TMIn, TMGa and PH3 are introduced, and the Ga 1-x5 In x5 P quantum well 5 is grown on x6 Ga 1-x6 ) y5 In 1-y5 The first upper waveguide layer 61 provides photoelectric confinement for the quantum well 5 .

[0070] S10, the temperature is maintained at 700±10℃, TMAl, TMIn, TMGa and PH3 are introduced, and in the (Al x6 Ga 1-x6 ) y5 In 1-y5 The first upper waveguide layer 61 is grown on the x7 Ga 1-x7 ) y6 In 1-y6 P second upper waveguide layer 62.

[0071] S11, the temperature is maintained at 700±10℃, TMAl, TMIn, TMGa and PH3 are introduced, and in the (Al x7 Ga 1-x7 ) y6 In 1-y6 The second upper waveguide layer 62 is grown on the x8 Ga 1-x8 ) y7 In 1-y7 The third upper waveguide layer 63, as a transition layer, reduces the upper confinement layer 7 and (Al x6 Ga 1-x6 ) y5 In 1-y5 The band gap difference between the P first upper waveguide layer 61 reduces the voltage drop and reduces the voltage.

[0072] S12, the temperature is maintained at 700±10℃, TMAl, TMIn, TMGa and PH3 are introduced, and in the (Al x8 Ga 1-x8 ) y7 In 1-y7 The third upper waveguide layer 63 is grown on the x9 Ga 1-x9 ) y8 In 1-y8 The confinement layer 7 on P limits the optical field in the active area.

[0073] S13, the temperature is slowly changed to 670±10℃, TMAl, TMIn, TMGa and PH3 are introduced, and in the (Al x9 Ga 1-x9 ) y8 In 1-y8 The growth of Al x10 Ga 1-x10 ) y9 In 1-y9 The P first transition layer 81 reduces the band gap difference between the upper limiting layer 7 and the cap layer 9, thereby reducing the voltage.

[0074] S14, the temperature is maintained at 670±10°C, TMIn, TMGa and PH3 are introduced, and in the (Alx10 Ga 1-x10 ) y9 In 1-y9 Ga is grown on the first transition layer 81 0.5 In 0.5 P second transition layer 82, reduces the band gap difference between the restriction layer and the cap layer 9, and reduces the voltage;

[0075] S15, the temperature is slowly changed to 540±10°C, the cooling rate does not exceed 40°C / min, and PH3 is introduced during the cooling process to protect the growth interface until the cooling process is completed.

[0076] S16, maintaining the temperature at 540±10°C, introducing TMGa and AsH3, growing a GaAs cap layer 9 on the second transition layer 82, and providing an ohmic alloy layer for subsequent processes.

[0077] Furthermore, in step S2, the doping source of the GaAs buffer layer 2 is Si2H6, and the doping concentration is 2E18-5E18 atoms / cm 3 , the thickness of the GaAs buffer layer 2 is 0.1-0.3 μm. As a specific implementation, in this embodiment, the thickness of the GaAs buffer layer 2 is 0.2 μm, and the doping concentration of the doping source is 2E18 atoms / cm 3 .

[0078] Further, in step S4, the (A1 x1 Ga 1-x1 ) y1 In 1-y1 The doping source of the P lower confinement layer 3 is Si2H6, and the doping concentration is 5E17-2E18 atoms / cm 3 , the (Al x1 Ga 1-x1 ) y1 In 1-y1 The thickness of the P lower limiting layer 3 is 0.5-1.5 μm. As a specific implementation, the (Al x1 Ga 1-x1 ) y1 In 1-y1 The thickness of the P lower confinement layer 3 is 1 μm, and the doping concentration of the doping source is 8E17 atoms / cm 3 .

[0079] Further, in step S5, the (A1 x2 Ga 1-x2 ) y2 In 1-y2 The first lower waveguide layer 41 is not intentionally doped and has a thickness of 10-30 nm. x2Ga 1-x2 ) y2 In 1-y2 The thickness of the first lower waveguide layer 41 is 20 nm.

[0080] Further, in step S6, the (Al x3 Ga 1-x3 ) y3 In 1-y3 The second lower waveguide layer 42 is not intentionally doped and has a thickness of 10-30 nm. x3 Ga 1-x3 ) y3 In 1-y3 The thickness of the second lower waveguide layer 42 is 20 nm.

[0081] Further, in step S7, the (A1 x4 Ga 1-x4 ) y4 In 1-y4 The third lower waveguide layer 43 is not intentionally doped and has a thickness of 20-100 nm. x4 Ga 1-x4 ) y4 In 1-y4 The thickness of the third lower waveguide layer 43 is 40 nm.

[0082] Further, in step S8, the Ga 1-x5 In x5 The P quantum well 5 is not intentionally doped and has a thickness of 9-15 nm. 1-x5 In x5 The thickness of the P quantum well 5 is 11 nm, achieving a PL lasing wavelength of 627 nm.

[0083] Further, in step S9, the (Al x6 Ga 1-x6 ) y5 In 1-y5 The first upper waveguide layer 61 is not intentionally doped and has a thickness of 20-100 nm. x6 Ga 1-x6 ) y5 In 1-y5 The thickness of the first upper waveguide layer 61 is 80 nm. By utilizing the asymmetric thickness of the third lower waveguide layer 43 and the first upper waveguide layer 61, the light field is shifted upward, the absorption loss is increased, and the high-order mode lasing threshold is improved.

[0084] Further, in step S10, the (Alx7 Ga 1-x7 ) y6 In 1-y6 The second upper waveguide layer 62 is not intentionally doped and has a thickness of 10-30 nm. x7 Ga 1-x7 ) y6 In 1-y6 The thickness of the second upper waveguide layer 62 is 20 nm. Compressive strain is used to compensate for the tensile strain of the quantum well 5 and reduce the stress in the active region.

[0085] Further, in step S11, the (Al x8 Ga 1-x8 ) y7 In 1-y7 The third upper waveguide layer 63 is not intentionally doped and has a thickness of 10-30 nm. x8 Ga 1-x8 ) y7 In 1-y7 The thickness of the third upper waveguide layer 63 is 20 nm.

[0086] Further, in step S12, the (A1 x9 Ga 1-x9 ) y8 In 1-y8 The doping source of the P-top confinement layer 7 is Cp2Mg, and the doping concentration of the doping source is 5E17-1.5E18 atoms / cm 3 , the (Al x9 Ga 1-x9 ) y8 In 1-y8 The thickness of the upper limiting layer 7 of P is 1-2 μm. As a specific implementation, the (Al x9 Ga 1-x9 ) y8 In 1-y8 The thickness of the P-top confinement layer 7 is 1.3 μm, and the doping concentration of the doping source is 1E18 atoms / cm 3 .

[0087] Further, in step S13, the (A1 x10 Ga 1-x10 ) y9 In 1-y9 The doping source of the first transition layer 81 is Cp2Mg, and the doping concentration of the doping source is 1E18-3E18 atoms / cm 3 , the (Al x10 Ga 1-x10 ) y9 In1-y9 The thickness of the first transition layer 81 is 10-50 nm. x10 Ga 1-x10 ) y9 In 1-y9 The thickness of the first transition layer 81 is 20 nm, and the doping concentration of the doping source is 2E18 atoms / cm 3 .

[0088] Further, in step S14, the Ga 0.5 In 0.5 The doping source of the second transition layer 82 is Cp2Mg, and the doping concentration of the doping source is 1E18-3E18 atoms / cm 3 , the Ga 0.5 In 0.5 The thickness of the second transition layer 82 is 10-50 nm. 0.5 In 0.5 The thickness of the second transition layer 82 is 20 nm, and the doping concentration of the doping source is 2E18 atoms / cm 3 .

[0089] Furthermore, in step S16, the thickness of the GaAs cap layer 9 is 0.1-0.5 μm, the doping source is CBr4 or DEZn, and the doping concentration of the doping source is 4E19-1E20 atoms / cm 3 As a specific implementation, the thickness of the GaAs cap layer 9 in this embodiment is 0.3 μm, and the doping concentration of the doping source is 7E19 atoms / cm 3 .

[0090] Other embodiments obtained by those skilled in the art by combining, splitting, reorganizing, etc. the embodiments of the present application on the basis of the embodiments provided in the present application do not exceed the protection scope of the present application.

[0091] The above specific implementation methods have detailed the purpose, technical solutions and beneficial effects of the embodiments of the present application. The above are only specific implementation methods of the embodiments of the present application and are not used to limit the protection scope of the embodiments of the present application. That is, any modifications, equivalent substitutions, improvements, etc. made on the basis of the embodiments of the present application should be included in the protection scope of the embodiments of the present application.

Claims

1. A semiconductor laser device, characterized in that: The system comprises, from bottom to top, a substrate layer (1), a buffer layer (2), a lower confinement layer (3), a lower composite waveguide layer, a quantum well (5), an upper composite waveguide layer, an upper confinement layer (7), a transition layer and a cap layer (9); The lower composite waveguide layer includes (Al x2 Ga 1-x2 ) y2 In 1-y2 The first lower waveguide layer (41), (Al x3 Ga 1-x3 ) y3 In 1-y3 The second lower waveguide layer (42) and (Al x4 Ga 1-x4 ) y4 In 1-y4 P third lower waveguide layer (43); The upper composite waveguide layer includes (Al x6 Ga 1-x6 ) y5 In 1-y5 The first upper waveguide layer (61), (Al x7 Ga 1-x7 ) y6 In 1-y6 The second upper waveguide layer (62) and (Al x8 Ga 1-x8 ) y7 In 1-y7 P third upper waveguide layer (63); The lower limiting layer (3) is (Al x1 Ga 1-x1 ) y1 In 1-y1 P, the upper limiting layer (7) is (Al x9 Ga 1-x9 ) y8 In 1- y8 P; Among them, x3>x1>x2=x4, x7>x9>x6=x8.

2. A semiconductor laser device according to claim 1, characterized in that: The value ranges of parameters x1, y1, x2, y2, x3, y3, x4, y4, x6, y5, x7, y6, x8, y7, x9, and y8 are, 0.6≤x1≤0.7, 0.4≤y1≤0.6, 0.4≤x2≤0.55, 0.4≤y2≤0.6; 0.7≤x3≤0.8, 0.5≤y3≤0.65; 0.4≤x4≤0.55, 0.4≤y4≤0.6, 0.4≤x6≤0.55, 0.4≤y5≤0.6; 0.7≤x7≤0.8, 0.5≤y6≤0.66; 0.4≤x8≤0.55, 0.4≤y7≤0.6, 0.6≤x9≤0.7, 0.4≤y8≤0.

6.

3. A semiconductor laser device according to claim 2, characterized in that: The quantum well (5) is Ga 1- x5 In x5 P, and the value range of parameter x5 is 0.55≤x5≤0.

65.

4. A semiconductor laser device according to claim 3, characterized in that: y2>0.5, y6>0.5, x5>0.

55.

5. A semiconductor laser device according to claim 1, characterized in that: The thickness of the upper composite waveguide layer is greater than the thickness of the lower composite waveguide layer.

6. A semiconductor laser device according to claim 5, characterized in that: The thickness of the first lower waveguide layer (41) is equal to the thickness of the third upper waveguide layer (63), the thickness of the second lower waveguide layer (42) is equal to the thickness of the second upper waveguide layer (62), and the thickness of the third lower waveguide layer (43) is less than the thickness of the first upper waveguide layer (61).

7. A semiconductor laser device according to claim 6, characterized in that: The thickness of the first lower waveguide layer (41) is equal to the thickness of the second lower waveguide layer (42).

8. A semiconductor laser device according to claim 7, characterized in that: The thickness of the first lower waveguide layer (41), the second lower waveguide layer (42), the second upper waveguide layer (62) and the third upper waveguide layer (63) are all 20 nm, the thickness of the third lower waveguide layer (43) is 40 nm, and the thickness of the first upper waveguide layer (61) is 80 nm.

9. A semiconductor laser device according to claim 1, characterized in that: The transition layer includes (Al x10 Ga 1-x10 ) y9 In 1-y9 P first transition layer (81) and Ga 0.5 In 0.5 P second transition layer (82).

10. A method for preparing a semiconductor laser device according to claim 9, characterized in that: The following steps are included: S1, placing the substrate in the growth chamber of the equipment, heating it to 720±10℃ in a H2 environment, and introducing AsH3 to perform surface heat treatment on the substrate; S2, the temperature is slowly lowered to 680±10°C, and then TMGa and AsH3 are introduced to grow a buffer layer (2) on the substrate; S3, the temperature is maintained at 680±10°C, and the Group V source (100% AsH3) and the Group III source (TMGa) are stopped and PH3 is introduced to achieve growth pause on the buffer layer (2); S4, the temperature is slowly changed to 700±10° C., and then TMAl, TMIn, TMGa and PH3 are introduced to grow a lower confinement layer (3) on the buffer layer (2); S5, the temperature is maintained at 700±10° C., TMAl, TMIn, TMGa and PH3 are introduced, and a first lower waveguide layer (41) is grown on the lower confinement layer (3); S6, the temperature is maintained at 700±10° C., TMAl, TMIn, TMGa and PH3 are introduced, and a second lower waveguide layer (42) is grown on the first lower waveguide layer (41); S7, the temperature is slowly changed to 640±10° C., TMAl, TMIn, TMGa and PH3 are introduced, and a third lower waveguide layer (43) is grown on the second lower waveguide layer (42); S8, maintaining the temperature at 640±10° C., introducing TMIn, TMGa and PH3, and growing a quantum well (5) on the third lower waveguide layer (43); S9, the temperature is slowly changed to 700±10° C., TMAl, TMIn, TMGa and PH3 are introduced, and a first upper waveguide layer (61) is grown on the quantum well (5); S10, maintaining the temperature at 700±10° C., introducing TMAl, TMIn, TMGa and PH3, and growing a second upper waveguide layer (62) on the first upper waveguide layer (61); S11, the temperature is maintained at 700±10° C., TMAl, TMIn, TMGa and PH3 are introduced, and a third upper waveguide layer (63) is grown on the second upper waveguide layer (62); S12, maintaining the temperature at 700±10° C., introducing TMAl, TMIn, TMGa and PH3, and growing an upper confinement layer (7) on the third upper waveguide layer (63); S13, the temperature is slowly changed to 670±10° C., TMAl, TMIn, TMGa and PH3 are introduced, and a first transition layer (81) is grown on the upper confinement layer (7); S14, the temperature is maintained at 670±10° C., TMIn, TMGa and PH3 are introduced, and a second transition layer (82) is grown on the first transition layer (81); S15, the temperature is slowly changed to 540±10℃, and PH3 is introduced during the cooling process to protect the growth interface; S16, maintaining the temperature at 540±10°C, introducing TMGa and AsH3, and growing a cap layer (9) on the second transition layer (82).

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