Semiconductor laser device and method for manufacturing the same

Abstract

This application provides a semiconductor laser device and its fabrication method, relating to the field of semiconductor laser technology. The semiconductor laser device, from bottom to top, comprises a substrate layer, a buffer layer, a lower confinement layer, a lower composite waveguide layer, a quantum well, an upper composite waveguide layer, an upper confinement layer, a transition layer, and a cap layer. The lower composite waveguide layer, from bottom to top, comprises (Al...) x2 Ga 1‑x2 ) y2 In 1‑y2 P first lower waveguide layer, (Al) x3 Ga 1‑x3 ) y3 In 1‑y3 P second lower waveguide layer and (Al) x4 Ga 1‑x4 ) y4 In 1‑y4 P is the third lower waveguide layer. The upper composite waveguide layer, from bottom to top, includes (A1) x6 Ga 1‑x6 ) y5 In 1‑y5 P First upper waveguide layer, (Al) x7 Ga 1‑x7 ) y6 In 1‑y6 P second upper waveguide layer and (Al) x8 Ga 1‑x8 ) y7 In 1‑y7 P is the third upper waveguide layer. The lower confinement layer is (Al). x1 Ga 1‑x1 ) y1 In 1‑y1 P, the upper limiting layer is (Al) x9 Ga 1‑x9 ) y8 In 1‑y8 P. Where x3 > x1 > x2 = x4, x7 > x9 > x6 = x8. This semiconductor laser device adopts a wide stripe structure to effectively ensure beam quality and avoid beam clutter.

Description

Technical Field

[0001] This invention relates to the field of semiconductor laser technology, specifically to a semiconductor laser device and its fabrication method. Background Technology

[0002] 640nm semiconductor lasers, as red light sources, are widely used in laser display, laser projection and other fields, bringing more realistic colors and a more immersive eye-friendly sensory experience. With the increasing demand from consumers for large-screen and multi-scenario applications, laser projection has entered a critical period of development and has huge development potential in terms of consumer groups and application scenarios.

[0003] Short wavelength and high power can improve human visual recognition and increase color sensitivity. To improve output power, a wide strip structure is usually required to increase the current injection area and increase the emission size. However, the AlGaInP used in existing semiconductor laser devices has a large thermal resistance. If a wide strip structure is used, it often leads to multimode lasing, resulting in poor beam quality and messy beam spots in the slow axis direction. Summary of the Invention

[0004] To address the aforementioned issues, this application provides a semiconductor laser device and its fabrication method. The semiconductor laser device employs a wide stripe structure to effectively ensure beam quality and avoid cluttered beam spots.

[0005] The technical solution adopted by this invention to solve its technical problem is:

[0006] A semiconductor laser device comprises, from bottom to top, a substrate layer, a buffer layer, a lower confinement layer, a lower composite waveguide layer, a quantum well, an upper composite waveguide layer, an upper confinement layer, a transition layer, and a cap layer;

[0007] The lower composite waveguide layer, from bottom to top, includes (A1) x2 Ga 1-x2 ) y2 In 1-y2 P first lower waveguide layer, (Al) x3 Ga 1-x3 ) y3 In 1-y3 P second lower waveguide layer and (Al) x4 Ga 1-x4 ) y4 In 1-y4 P Third lower waveguide layer;

[0008] The upper composite waveguide layer, from bottom to top, includes (A1) x6 Ga 1-x6 ) y5 In 1-y5 P First upper waveguide layer, (Al) x7 Ga 1-x7 )y6 In 1-y6 P second upper waveguide layer and (Al) x8 Ga 1-x8 ) y7 In 1-y7 P Third upper waveguide layer;

[0009] The lower limiting layer is (Al) x1 Ga 1-x1 ) y1 In 1-y1 P, the upper limiting layer is (Al) x9 Ga 1-x9 ) y8 In 1-y8 P;

[0010] Among them, x3>x1>x2=x4, x7>x9>x6=x8.

[0011] Furthermore, the range of values ​​for parameters x1, y1, x2, y2, x3, y3, x4, y4, x6, y5, x7, y6, x8, y7, x9, and y8 is as follows:

[0012] 0.6≤x1≤0.7, 0.4≤y1≤0.6, 0.4≤x2≤0.55, 0.4≤y2≤0.6; 0.7≤x3≤0.8, 0.5≤y3≤0.65; 0.4≤x4≤0.55, 0.4≤y4≤0.6, 0.4≤x6≤0.55, 0.4≤y5≤0.6; 0.7≤x7≤0.8, 0.5≤y6≤0.66; 0.4≤x8≤0.55, 0.4≤y7≤0.6, 0.6≤x9≤0.7, 0.4≤y8≤0.6.

[0013] Furthermore, the quantum well is Ga 1-x5 In x5 P, and the range of parameter x5 is 0.55≤x5≤0.65.

[0014] Furthermore, y2 > 0.5, y6 > 0.5, and x5 > 0.55.

[0015] Furthermore, the thickness of the upper composite waveguide layer is greater than the thickness of the lower composite waveguide layer.

[0016] Furthermore, the thickness of the first lower waveguide layer is equal to the thickness of the third upper waveguide layer, the thickness of the second lower waveguide layer is equal to the thickness of the second upper waveguide layer, and the thickness of the third lower waveguide layer is less than the thickness of the first upper waveguide layer.

[0017] Furthermore, the thickness of the first lower waveguide layer is equal to the thickness of the second lower waveguide layer.

[0018] Furthermore, the thickness of the first lower waveguide layer, the second lower waveguide layer, the second upper waveguide layer, and the third upper waveguide layer is 20 nm, the thickness of the third lower waveguide layer is 40 nm, and the thickness of the first upper waveguide layer is 80 nm.

[0019] Furthermore, the transition layer, from bottom to top, includes (A1) x10 Ga 1-x10 ) y9 In 1-y9 P first transition layer and Ga 0.5 In 0.5 P is the second transition layer.

[0020] A method for fabricating a semiconductor laser device includes the following steps:

[0021] S1. Place the substrate in the growth chamber of the equipment, heat it to 720±10℃ in H2 environment and bake it, and introduce AsH3 to perform surface heat treatment on the substrate.

[0022] S2, the temperature is slowly reduced to 680±10℃, and then TMGa and AsH3 are introduced to grow a buffer layer on the substrate;

[0023] S3, the temperature is maintained at 680±10℃, and the V group source (100% AsH3) and III group source (TMGa) are stopped and PH3 is introduced to stop the growth on the buffer layer.

[0024] S4, the temperature is gradually reduced to 700±10℃, and then TMAl, TMIn, TMGa and PH3 are introduced to grow a lower confinement layer on the buffer layer;

[0025] S5, the temperature is maintained at 700±10℃, TMAl, TMIn, TMGa and PH3 are introduced, and the first lower waveguide layer is grown on the lower confinement layer;

[0026] S6, the temperature is maintained at 700±10℃, TMAl, TMIn, TMGa and PH3 are introduced, and a second lower waveguide layer is grown on the first lower waveguide layer;

[0027] S7, the temperature is gradually changed to 640±10℃, TMAl, TMIn, TMGa and PH3 are introduced, and a third lower waveguide layer is grown on the second lower waveguide layer;

[0028] S8, the temperature is maintained at 640±10℃, and TMI, TMGa and PH3 are introduced to grow a quantum well on the third lower waveguide layer;

[0029] S9, the temperature is gradually changed to 700±10℃, and TMAl, TMIn, TMGa and PH3 are introduced to grow the first upper waveguide layer on the quantum well;

[0030] S10, the temperature is maintained at 700±10℃, TMAl, TMIn, TMGa and PH3 are introduced, and a second upper waveguide layer is grown on the first upper waveguide layer;

[0031] S11, the temperature is maintained at 700±10℃, TMAl, TMIn, TMGa and PH3 are introduced, and a third upper waveguide layer is grown on the second upper waveguide layer;

[0032] S12, the temperature is maintained at 700±10℃, TMAl, TMIn, TMGa and PH3 are introduced, and an upper confinement layer is grown on the third upper waveguide layer;

[0033] S13, the temperature is gradually changed to 670±10℃, TMAl, TMIn, TMGa and PH3 are introduced, and a first transition layer is grown on the upper confinement layer;

[0034] S14, the temperature is maintained at 670±10℃, TMI, TMGa and PH3 are introduced, and a second transition layer is grown on the first transition layer;

[0035] S15, the temperature is gradually reduced to 540±10℃, and PH3 is introduced during the cooling process to protect the growth interface;

[0036] S16, the temperature is maintained at 540±10℃, and TMGa and AsH3 are introduced to grow a cap layer on the second transition layer.

[0037] The beneficial effects of this invention are:

[0038] This application provides a semiconductor laser device employing a composite waveguide layer. The high Al content (AlGaInP) in the waveguide layer can expand the incoming beam spot. Through low refractive index beam expansion, the optical confinement factor is reduced, and the loss drop of higher-order modes is increased. Simultaneously, the high Al content AlGaInP has a larger conduction band order, which improves carrier confinement capability and high-temperature operating characteristics. This utilizes the thermal lensing effect to increase the slow-axis divergence angle, ensuring beam quality in the slow-axis direction and avoiding beam clutter. This semiconductor laser device adopts a wide-strip structure, and by adding high Al content AlGaInP to the waveguide layer, the problems of poor beam quality and beam clutter in the slow-axis direction caused by the wide-strip structure are solved.

[0039] In addition, by utilizing the high Al content AlGaInP in the waveguide layer, it is possible to achieve stress compensation with the quantum well, reduce defect proliferation caused by the difference in lattice constants of the well and barrier, reduce the stress in the active region, and improve the reliability of operation. Attached Figure Description

[0040] Figure 1This is a structural diagram of a semiconductor laser device provided in this application.

[0041] In the figure: 1. Substrate layer; 2. Buffer layer; 3. Lower confinement layer; 41. First lower waveguide layer; 42. Second lower waveguide layer; 43. Third lower waveguide layer; 5. Quantum well; 61. First upper waveguide layer; 62. Second upper waveguide layer; 63. Third upper waveguide layer; 7. Upper confinement layer; 81. First transition layer; 82. Second transition layer; 9. Cap layer. Detailed Implementation

[0042] To enable those skilled in the art to better understand the technical solutions in this application, the technical solutions in the embodiments of this application will be described in detail below with reference to the accompanying drawings. The described embodiments are merely a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort should fall within the protection scope of this application.

[0043] like Figure 1 As shown, a semiconductor laser device comprises, from bottom to top, a substrate layer 1, a buffer layer 2, a lower confinement layer 3, a lower composite waveguide layer, a quantum well 5, an upper composite waveguide layer, an upper confinement layer 7, a transition layer, and a cap layer 9.

[0044] The lower composite waveguide layer comprises, from bottom to top, a first lower waveguide layer 41, a second lower waveguide layer 42, and a third lower waveguide layer 43. The first lower waveguide layer 41 is (Al) x2 Ga 1-x2 ) y2 In 1-y2 P, the second lower waveguide layer 42 is (Al) x3 Ga 1-x3 ) y3 In 1-y3 P, the third lower waveguide layer 43 is (Al) x4 Ga 1-x4 ) y4 In 1-y4 P.

[0045] The upper composite waveguide layer comprises, from bottom to top, a first upper waveguide layer 61, a second upper waveguide layer 62, and a third upper waveguide layer 63. The first upper waveguide layer 61 is (Al) x6 Ga 1-x6 ) y5 In 1-y5 P, the second upper waveguide layer 62 is (Al) x7 Ga 1-x7 ) y6 In 1-y6 P, the third upper waveguide layer 63 is (Al)x8 Ga 1-x8 ) y7 In 1-y7 P.

[0046] The lower limiting layer 3 is (A1) x1 Ga 1-x1 ) y1 In 1-y1 P, the upper limiting layer 7 is (Al) x9 Ga 1-x9 ) y8 In 1- y8 P.

[0047] The range of values ​​for parameters x1, y1, x2, y2, x3, y3, x4, y4, x6, y5, x7, y6, x8, y7, x9, and y8 is as follows: 0.6≤x1≤0.7, 0.4≤y1≤0.6, 0.4≤x2≤0.55, 0.4≤y2≤0.6; 0.7≤x3≤0.8, 0.5≤y3≤0.65; 0.4≤x4≤ 0.55, 0.4≤y4≤0.6, 0.4≤x6≤0.55, 0.4≤y5≤0.6; 0.7≤x7≤0.8, 0.5≤y6≤0.66; 0.4≤ x8≤0.55, 0.4≤y7≤0.6, 0.6≤x9≤0.7, 0.4≤y8≤0.6, and x3>x1>x2=x4, x7>x9>x6=x8.

[0048] In one specific implementation, in this embodiment, x1 = 0.65, y1 = 0.5, x2 = 0.5, y2 = 0.5, x3 = 0.75, y3 = 0.58, x4 = 0.5, y4 = 0.5, x6 = 0.5, y5 = 0.5, x7 = 0.75, y6 = 0.58, x8 = 0.5, y7 = 0.5, x9 = 0.65, y8 = 0.5.

[0049] The first lower waveguide layer 41 serves as a transition layer, reducing the bandgap difference between the lower confinement layer 3 and the third lower waveguide layer 43, thereby reducing voltage drop and voltage. The third lower waveguide layer 43 provides photoelectric confinement for the quantum well 5. The first upper waveguide layer 61 provides photoelectric confinement for the quantum well 5. The third upper waveguide layer 63 serves as a transition layer, reducing the bandgap difference between the upper confinement layer 7 and the first upper waveguide layer 61, thereby reducing voltage drop and voltage.

[0050] By adding high-Al composition AlGaInP to the upper and lower composite waveguide layers, a low-refractive-index extension layer is formed, reducing the optical confinement factor and increasing the thermal lensing phenomenon, leading to a larger slow-axis divergence angle. Furthermore, by inserting a high-Al composition second lower waveguide layer 42 between the low-Al composition first lower waveguide layer 41 and the third lower waveguide layer 43 to form a lower composite waveguide layer, and by inserting a high-Al composition second upper waveguide layer 62 between the low-Al composition first upper waveguide layer 61 and the third upper waveguide layer 63 to form an upper composite waveguide layer, carrier suppression capability can be improved, carrier overflow can be suppressed, the extension of the optical field into the confinement layer can be reduced, and photoelectric conversion efficiency can be improved.

[0051] The quantum well 5 is Ga 1-x5 In x5 P, and the value range of parameter x5 is 0.55≤x5≤0.65. In this specific implementation, x5=0.6.

[0052] Furthermore, y2 and y6 > 0.5, and x5 > 0.55. Since y2 and y6 are both greater than 0.5, the upper and lower composite waveguide layers are subjected to compressive strain, while x5 is greater than 0.55, thus the quantum well 5 is subjected to tensile strain. In this way, the upper and lower composite waveguide layers can form stress compensation with the quantum well 5. By utilizing strain compensation, the problem of increased defects and decreased reliability caused by stress in the active region can be reduced.

[0053] Furthermore, the thickness of the upper composite waveguide layer is greater than the thickness of the lower composite waveguide layer. Utilizing the asymmetric design of the upper and lower composite waveguide layers, the optical field can be compressed and shifted upwards, increasing the absorption loss of higher-order modes and solving the problem of degraded beam quality caused by higher-order mode lasing.

[0054] Furthermore, the thickness of the first lower waveguide layer 41 is equal to the thickness of the third upper waveguide layer 63, the thickness of the second lower waveguide layer 42 is equal to the thickness of the second upper waveguide layer 62, and the thickness of the third lower waveguide layer 43 is less than the thickness of the first upper waveguide layer 61.

[0055] Furthermore, the thickness of the first lower waveguide layer 41 is equal to the thickness of the second lower waveguide layer 42.

[0056] In one specific implementation, the thickness of the first lower waveguide layer 41, the second lower waveguide layer 42, the second upper waveguide layer 62 and the third upper waveguide layer 63 in this embodiment is 20nm, the thickness of the third lower waveguide layer 43 is 40nm, and the thickness of the first upper waveguide layer 61 is 80nm.

[0057] Furthermore, the transition layer comprises, from bottom to top, a first transition layer 81 and a second transition layer 82, wherein the first transition layer 81 is (Al)x10 Ga 1-x10 ) y9 In 1-y9 P, the second transition layer 82 is Ga 0.5 In 0.5 P. The values ​​of parameters x10 and y9 are in the range of 0.4 ≤ x10 ≤ 0.6 and 0.4 ≤ y9 ≤ 0.6. In this specific implementation, x10 = 0.5 and y9 = 0.5.

[0058] The first transition layer 81 and the second transition layer 82 can reduce the bandgap difference between the upper limiting layer 7 and the cap layer 9, thereby reducing the voltage.

[0059] In one specific embodiment, the substrate layer 1 is GaAs, the buffer layer 2 is GaAs, and the cap layer 9 is GaAs.

[0060] A method for fabricating a semiconductor laser device includes the following steps:

[0061] S1. The GaAs substrate is placed in the growth chamber of the metal-organic chemical vapor deposition (MOCVD) equipment, heated to 720±10℃ in H2 environment for baking, and AsH3 is introduced to perform surface heat treatment on the GaAs substrate.

[0062] S2, the temperature is slowly reduced to 680±10℃, with a cooling rate not exceeding 30℃ / min, and then TMGa and AsH3 are introduced to grow a GaAs buffer layer 2 on the GaAs substrate. The purpose is to prevent defects from spreading from the substrate into the confinement layer, provide a fresh growth interface, and improve the material growth quality.

[0063] S3, the temperature is maintained at 680±10℃, and the group V source (100% AsH3) and group III source (TMGa) are stopped. PH3 is introduced to achieve growth stop on GaAs buffer layer 2. The stop time is 3s to 30s, thereby depleting the As atoms in the reaction chamber.

[0064] S4, the temperature is gradually reduced to 700±10℃, with a heating rate not exceeding 60℃ / min, and then TMAl, TMIn, TMGa and PH3 are introduced to grow (Al) on the GaAs buffer layer 2. x1 Ga 1-x1 ) y1 In 1-y1 P is confined by layer 3 to restrict the optical field in the active region.

[0065] S5, the temperature is maintained at 700±10℃, TMAl, TMIn, TMGa and PH3 are introduced, and Al is grown on the lower confinement layer 3. x2 Ga 1-x2 )y2 In 1-y2 P is the first lower waveguide layer 41, which serves as a transition layer to reduce the interaction between the lower confinement layer 3 and (Al). x3 Ga 1-x3 ) y3 In 1-y3 The bandgap difference between the third lower waveguide layer 43 reduces the voltage drop and decreases the voltage.

[0066] S6, the temperature is maintained at 700±10℃, and TMAl, TMIn, TMGa and PH3 are introduced, in which (Al) x2 Ga 1-x2 ) y2 In 1- y2 (Al) is grown on the first lower waveguide layer 41. x3 Ga 1-x3 ) y3 In 1-y3 P Second lower waveguide layer 42.

[0067] S7, the temperature is gradually reduced to 640±10℃, and TMAl, TMIn, TMGa and PH3 are introduced, in which (Al) x3 Ga 1-x3 ) y3 In 1- y3 (Al) is grown on the second lower waveguide layer 42. x4 Ga 1-x4 ) y4 In 1-y4 The third lower waveguide layer 43 provides photoelectric confinement for the quantum well 5.

[0068] S8, the temperature is maintained at 640±10℃, and TMI, TMGa and PH3 are introduced, in the (Al) x4 Ga 1-x4 ) y4 In 1-y4 Ga is grown on the third lower waveguide layer 43 of P. 1-x5 In x5 P-quantum well 5.

[0069] S9, the temperature is gradually reduced to 700±10℃, and TMAl, TMIn, TMGa and PH3 are introduced. 1-x5 In x5 Growth on P quantum well 5 (Al) x6 Ga 1-x6 ) y5 In 1-y5 The first upper waveguide layer 61 provides photoelectric confinement for the quantum well 5.

[0070] S10, the temperature is maintained at 700±10℃, and TMAl, TMIn, TMGa and PH3 are introduced, in which (Al) x6 Ga 1-x6 ) y5 In 1-y5 (Al) is grown on the first upper waveguide layer 61. x7 Ga 1-x7 ) y6 In 1-y6 P Second upper waveguide layer 62.

[0071] S11, the temperature is maintained at 700±10℃, and TMAl, TMIn, TMGa and PH3 are introduced, in which (Al) x7 Ga 1-x7 ) y6 In 1-y6 (Al) is grown on the second upper waveguide layer 62. x8 Ga 1-x8 ) y7 In 1-y7 The third upper waveguide layer 63 serves as a transition layer, reducing the interaction between the upper confinement layer 7 and (Al). x6 Ga 1-x6 ) y5 In 1-y5 The bandgap difference between the first upper waveguide layer 61 reduces the voltage drop and decreases the voltage.

[0072] S12, the temperature is maintained at 700±10℃, and TMAl, TMIn, TMGa and PH3 are introduced, in which (Al) x8 Ga 1-x8 ) y7 In 1-y7 (Al) is grown on the third upper waveguide layer 63. x9 Ga 1-x9 ) y8 In 1-y8 Layer 7 on P restricts the light field in the active region.

[0073] S13, the temperature is gradually reduced to 670±10℃, and TMAl, TMIn, TMGa and PH3 are introduced, in which (Al) x9 Ga 1-x9 ) y8 In 1-y8 Growth on P-restricted layer 7 (Al) x10 Ga 1-x10 ) y9 In 1-y9 The first transition layer 81 reduces the bandgap difference between the upper confinement layer 7 and the cap layer 9, thereby reducing the voltage.

[0074] S14, temperature maintained at 670±10℃, TMI, TMGa and PH3 are introduced, in the (Al)x10 Ga 1-x10 ) y9 In 1-y9 Ga is grown on the first transition layer 81 of P. 0.5 In 0.5 The second transition layer 82 reduces the bandgap difference between the confinement layer and the cap layer 9, thereby reducing the voltage.

[0075] S15, the temperature is gradually reduced to 540±10℃, the cooling rate does not exceed 40℃ / min, and PH3 is introduced during the cooling process to protect the growth interface until the cooling process is completed.

[0076] S16, the temperature is maintained at 540±10℃, and TMGa and AsH3 are introduced to grow a GaAs cap layer 9 on the second transition layer 82, providing an ohmic alloy layer for subsequent processes.

[0077] Further, in step S2, the doping source of the GaAs buffer layer 2 is Si2H6, and the doping concentration is 2E18-5E18 atoms / cm³. 3 The thickness of the GaAs buffer layer 2 is 0.1-0.3 μm. In one specific embodiment, the thickness of the GaAs buffer layer 2 is 0.2 μm, and the doping concentration of the doping source is 2E18 atoms / cm². 3 .

[0078] Further, in step S4, the (Al) x1 Ga 1-x1 ) y1 In 1-y1 The doping source for the lower confinement layer 3 is Si₂H₆, with a doping concentration of 5E¹⁷-2E¹⁸ atoms / cm². 3 The (Al) x1 Ga 1-x1 ) y1 In 1-y1 The thickness of the lower confinement layer 3 is 0.5-1.5 μm. As a specific implementation, in this embodiment, (Al) x1 Ga 1-x1 ) y1 In 1-y1 The thickness of the P-confinement layer 3 is 1 μm, and the doping concentration of the dopant source is 8E17 atoms / cm². 3 .

[0079] Furthermore, in step S5, the (Al) x2 Ga 1-x2 ) y2 In 1-y2 The first lower waveguide layer 41 is unintentionally doped and has a thickness of 10-30 nm. As a specific implementation, the layer described in this embodiment (Al) x2Ga 1-x2 ) y2 In 1-y2 The thickness of the first lower waveguide layer 41 is 20 nm.

[0080] Furthermore, in step S6, the (Al) x3 Ga 1-x3 ) y3 In 1-y3 The second lower waveguide layer 42 is unintentionally doped and has a thickness of 10-30 nm. As a specific implementation, the (Al) described in this embodiment... x3 Ga 1-x3 ) y3 In 1-y3 The thickness of the second lower waveguide layer 42 is 20 nm.

[0081] Furthermore, in step S7, the (Al) x4 Ga 1-x4 ) y4 In 1-y4 The third lower waveguide layer 43 is unintentionally doped, with a thickness of 20-100 nm. As a specific implementation, the (Al) described in this embodiment... x4 Ga 1-x4 ) y4 In 1-y4 The thickness of the third lower waveguide layer 43 is 40 nm.

[0082] Further, in step S8, the Ga 1-x5 In x5 The p-quantum well 5 is unintentionally doped and has a thickness of 9-15 nm. As a specific implementation, the Ga in this embodiment... 1-x5 In x5 The thickness of the P quantum well 5 is 11 nm, achieving a PL lasing wavelength of 627 nm.

[0083] Furthermore, in step S9, the (Al) x6 Ga 1-x6 ) y5 In 1-y5 The first upper waveguide layer 61 is unintentionally doped, with a thickness of 20-100 nm. As a specific implementation, the layer described in this embodiment (Al) x6 Ga 1-x6 ) y5 In 1-y5 The thickness of the first upper waveguide layer 61 is 80 nm. By utilizing the asymmetry in thickness between the third lower waveguide layer 43 and the first upper waveguide layer 61, the optical field is shifted upwards, increasing absorption loss and improving the lasing threshold of higher-order modes.

[0084] Further, in step S10, the (Al)x7 Ga 1-x7 ) y6 In 1-y6 The second upper waveguide layer 62 is unintentionally doped and has a thickness of 10-30 nm. As a specific implementation, the (Al) described in this embodiment... x7 Ga 1-x7 ) y6 In 1-y6 The thickness of the second upper waveguide layer 62 is 20 nm. Compressive strain is used to compensate for the tensile strain of the quantum well 5, reducing the stress in the active region.

[0085] Further, in step S11, the (Al) x8 Ga 1-x8 ) y7 In 1-y7 The third upper waveguide layer 63 is unintentionally doped, with a thickness of 10-30 nm. As a specific implementation, the (Al) described in this embodiment... x8 Ga 1-x8 ) y7 In 1-y7 The thickness of the third upper waveguide layer 63 is 20 nm.

[0086] Further, in step S12, the (Al) x9 Ga 1-x9 ) y8 In 1-y8 The doping source for the confinement layer 7 on P is Cp₂Mg, and the doping concentration of the doping source is 5E¹⁷-1.5E¹⁸ atoms / cm². 3 The (Al) x9 Ga 1-x9 ) y8 In 1-y8 The thickness of the confinement layer 7 on P is 1-2 μm. As a specific implementation, in this embodiment, (Al) x9 Ga 1-x9 ) y8 In 1-y8 The thickness of the confinement layer 7 on P is 1.3 μm, and the doping concentration of the dopant source is 1E18 atoms / cm². 3 .

[0087] Further, in step S13, the (Al) x10 Ga 1-x10 ) y9 In 1-y9 The doping source for the first transition layer 81 is Cp₂Mg, and the doping concentration of the doping source is 1E¹⁸-3E¹⁸ atoms / cm². 3 The (Al) x10 Ga 1-x10 ) y9 In1-y9 The thickness of the first transition layer 81 is 10-50 nm. As a specific implementation, in this embodiment, (Al) x10 Ga 1-x10 ) y9 In 1-y9 The thickness of the first transition layer 81 is 20 nm, and the doping concentration of the dopant source is 2E18 atoms / cm². 3 .

[0088] Further, in step S14, the Ga 0.5 In 0.5 The doping source for the second transition layer 82 is Cp2Mg, and the doping concentration of the doping source is 1E18-3E18 atoms / cm³. 3 The Ga 0.5 In 0.5 The thickness of the second transition layer 82 is 10-50 nm. As a specific embodiment, the Ga in this example... 0.5 In 0.5 The thickness of the second transition layer 82 is 20 nm, and the doping concentration of the dopant source is 2E18 atoms / cm². 3 .

[0089] Further, in step S16, the thickness of the GaAs cap layer 9 is 0.1-0.5 μm, the doping source is CBr4 or DEZn, and the doping concentration of the doping source is 4E19-1E20 atoms / cm². 3 In one specific embodiment, the thickness of the GaAs cap layer 9 is 0.3 μm, and the doping concentration of the doping source is 7E19 atoms / cm². 3 .

[0090] Other embodiments obtained by those skilled in the art based on the embodiments provided in this application by combining, splitting, or reorganizing the embodiments of this application do not exceed the protection scope of this application.

[0091] The above detailed embodiments have provided a detailed explanation of the purpose, technical solutions, and beneficial effects of the embodiments of this application. The above are merely specific embodiments of the embodiments of this application and are not intended to limit the protection scope of the embodiments of this application. That is, any modifications, equivalent substitutions, improvements, etc., made on the basis of the embodiments of this application should be included within the protection scope of the embodiments of this application.

Claims

1. A semiconductor laser device, characterized in that: From bottom to top, it includes a substrate layer (1), a buffer layer (2), a lower confinement layer (3), a lower composite waveguide layer, a quantum well (5), an upper composite waveguide layer, an upper confinement layer (7), a transition layer, and a cap layer (9). The lower composite waveguide layer, from bottom to top, includes (A1) x2 Ga 1-x2 ) y2 In 1-y2 P First lower waveguide layer (41), (Al) x3 Ga 1-x3 ) y3 In 1-y3 P second lower waveguide layer (42) and (Al) x4 Ga 1-x4 ) y4 In 1-y4 P Third lower waveguide layer (43); The upper composite waveguide layer, from bottom to top, includes (A1) x6 Ga 1-x6 ) y5 In 1-y5 P First upper waveguide layer (61), (Al) x7 Ga 1-x7 ) y6 In 1-y6 P second upper waveguide layer (62) and (Al) x8 Ga 1-x8 ) y7 In 1-y7 P Third upper waveguide layer (63); The lower limiting layer (3) is (Al) x1 Ga 1-x1 ) y1 In 1-y1 P, the upper limiting layer (7) is (Al) x9 Ga 1-x9 ) y8 In 1- y8 P; Among them, x3 > x1 > x2 = x4, x7 > x9 > x6 = x8; The range of values ​​for parameters x1, y1, x2, y2, x3, y3, x4, y4, x6, y5, x7, y6, x8, y7, x9, and y8 is as follows: 0.6≤x1≤0.7, 0.4≤y1≤0.6, 0.4≤x2≤0.55, 0.4≤y2≤0.6; 0.7≤x3≤0.8, 0.5≤y3≤0.65; 0.4≤x4≤0.55, 0.4≤y4≤0.6, 0.4≤x6≤0.55, 0.4≤y5≤0.6; 0.7≤x7≤0.8, 0.5≤y6≤0.66; 0.4≤x8≤0.55, 0.4≤y7≤0.6, 0.6≤x9≤0.7, 0.4≤y8≤0.

6.

2. A semiconductor laser device according to claim 1, characterized in that: The quantum well (5) is Ga 1- x5 In x5 P, and the range of parameter x5 is 0.55≤x5≤0.

65.

3. A semiconductor laser device according to claim 2, characterized in that: 0.5 <y2≤0.6,0.5<y6≤0.66,0.55<x5≤0.65。 4. A semiconductor laser device according to claim 1, characterized in that: The thickness of the upper composite waveguide layer is greater than the thickness of the lower composite waveguide layer.

5. A semiconductor laser device according to claim 4, characterized in that: The thickness of the first lower waveguide layer (41) is equal to the thickness of the third upper waveguide layer (63), the thickness of the second lower waveguide layer (42) is equal to the thickness of the second upper waveguide layer (62), and the thickness of the third lower waveguide layer (43) is less than the thickness of the first upper waveguide layer (61).

6. A semiconductor laser device according to claim 5, characterized in that: The thickness of the first lower waveguide layer (41) is equal to the thickness of the second lower waveguide layer (42).

7. A semiconductor laser device according to claim 6, characterized in that: The thickness of the first lower waveguide layer (41), the second lower waveguide layer (42), the second upper waveguide layer (62) and the third upper waveguide layer (63) is 20 nm, the thickness of the third lower waveguide layer (43) is 40 nm, and the thickness of the first upper waveguide layer (61) is 80 nm.

8. A semiconductor laser device according to claim 1, characterized in that: The transition layer, from bottom to top, includes (A1) x10 Ga 1-x10 ) y9 In 1-y9 P first transition layer (81) and Ga 0.5 In 0.5 P Second Transition Layer (82).

9. A method for fabricating a semiconductor laser device according to claim 8, characterized in that: Includes the following steps, S1. Place the substrate in the growth chamber of the equipment, heat it to 720±10℃ in H2 environment and bake it, and introduce AsH3 to perform surface heat treatment on the substrate. S2, the temperature is slowly reduced to 680±10℃, and then TMGa and AsH3 are introduced to grow a buffer layer on the substrate (2). S3, the temperature is maintained at 680±10℃, and the V group source 100% AsH3 and the III group source TMGa are stopped and PH3 is introduced to achieve growth stop on the buffer layer (2); S4, the temperature is gradually changed to 700±10℃, and then TMAl, TMIn, TMGa and PH3 are introduced to grow the lower confinement layer (3) on the buffer layer (2). S5, the temperature is maintained at 700±10℃, and TMAl, TMIn, TMGa and PH3 are introduced to grow the first lower waveguide layer (41) on the lower confinement layer (3). S6, the temperature is maintained at 700±10℃, and TMAl, TMIn, TMGa and PH3 are introduced to grow a second lower waveguide layer (42) on the first lower waveguide layer (41). S7, the temperature is gradually changed to 640±10℃, and TMAl, TMIn, TMGa and PH3 are introduced to grow a third lower waveguide layer (43) on the second lower waveguide layer (42). S8, the temperature is maintained at 640±10℃, TMI, TMGa and PH3 are introduced, and a quantum well (5) is grown on the third lower waveguide layer (43). S9, the temperature is gradually changed to 700±10℃, and TMAl, TMIn, TMGa and PH3 are introduced to grow the first upper waveguide layer (61) on the quantum well (5). S10, the temperature is maintained at 700±10℃, and TMAl, TMIn, TMGa and PH3 are introduced to grow a second upper waveguide layer (62) on the first upper waveguide layer (61). S11, the temperature is maintained at 700±10℃, TMAl, TMIn, TMGa and PH3 are introduced, and a third upper waveguide layer (63) is grown on the second upper waveguide layer (62). S12, the temperature is maintained at 700±10℃, and TMAl, TMIn, TMGa and PH3 are introduced to grow an upper confinement layer (7) on the third upper waveguide layer (63). S13, the temperature is gradually changed to 670±10℃, and TMAl, TMIn, TMGa and PH3 are introduced to grow a first transition layer (81) on the upper confinement layer (7). S14, the temperature is maintained at 670±10℃, TMI, TMGa and PH3 are introduced, and a second transition layer (82) is grown on the first transition layer (81). S15, the temperature is gradually reduced to 540±10℃, and PH3 is introduced during the cooling process to protect the growth interface; S16, the temperature is maintained at 540±10℃ and TMGa and AsH3 are introduced to grow a cap layer (9) on the second transition layer (82).

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