Intelligent metasurface phase regulation and control method and device

Through the intelligent metasurface phase control method of the FPGA core, the user's position is quickly relocated, solving the problem of communication lag when the user's position changes in the prior art, and significantly improving the user's communication experience.

CN119496543APending Publication Date: 2025-02-21BEIJING UNIV OF POSTS & TELECOMM
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Patent Information

Application Number
CN202411532472.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-10-30
Publication Date
2025-02-21

AI Technical Summary

Technical Problem

When the existing metasurface assisted communication system changes, rescanning the user's location requires traversing all preset orientations, resulting in long processing time and lag in communication, which seriously affects the user's communication experience.

Method used

Using the intelligent metasurface phase control method with FPGA as the core, the data receiving module receives and analyzes user feedback data, the data processing module calculates the average value of the user's communication signal strength, the metasurface array element control module hops the address and reads the codebook information, and generates The DAC module controls the excitation signal, regulates the metasurface phase, and quickly repositions the user position.

Benefits of technology

It significantly reduces the time for the metasurface to relocate the user's real-time location, improves the quality of user communication services, and reduces the occurrence of communication lags.

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Abstract

The embodiment of the invention provides an intelligent metasurface phase regulation and control method and device, and the method comprises the steps: a feedback data receiving module receives and analyzes user feedback data containing communication signal intensity information, and obtains the communication service quality of a user; the data processing module stores the analyzed user communication signal strength information, performs floating point operation on the stored data to obtain a mean value, and compares the mean value with a preset threshold value; the metasurface array element control module reads codebook information in an address hopping mode, generates a DAC module control excitation signal, changes module output voltage, regulates and controls metasurface phases and repositions user positions. The problem that when the metasurface control system regulates and controls the phase of the voltage-controlled metasurface, the speed of positioning the real-time position of the user is low is solved.
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Description

Technical Field

[0001] The present invention relates to the field of wireless communication technology, and in particular to FPGA control of the phase of a pressure-controlled metasurface array element under the background of existing metasurface-assisted communication. Background Art

[0002] The rapid development of metasurface technology has brought about many new applications: wireless communication, wireless energy transmission, signal focusing, etc. It is an important research direction to improve user service quality at a lower cost by arranging additional metasurfaces in the communication system.

[0003] However, since the software system is used to control the metasurface array elements, the processing time is relatively long. When the user's position changes, rescanning the user's position requires traversing all preset positions, resulting in long periods of communication jams, which seriously affects the user's communication experience.

[0004] FPGA deployment is highly flexible and can speed up processing through parallel computing. It is increasingly used in embedded systems with low latency requirements.

[0005] Therefore, how to use the metasurface array element phase control device with FPGA as the core to speed up the metasurface's response to the user's real-time position and improve the user's communication quality is an urgent problem to be solved. Summary of the invention

[0006] The purpose of the present invention is to provide a method and device for controlling the phase of an intelligent metasurface, so as to speed up the repositioning speed of the metasurface to the real-time position of the user. The specific technical solution is as follows:

[0007] Step 200: The data receiving module receives and parses user feedback data including communication signal strength information to obtain user communication service quality.

[0008] Step 210: The data processing module stores the analyzed user communication signal strength information, performs floating-point operations on the stored data and calculates the average value, and compares it with a preset threshold value.

[0009] Step 220, the metasurface array element control module jumps the address to read the codebook information, generates a DAC module control excitation signal, changes the module output voltage, adjusts the metasurface phase, and relocates the user position.

[0010] Optionally, the data receiving module receives and parses user feedback data including communication signal strength information to obtain user communication service quality, specifically including:

[0011] The communication source sends communication data, which is reflected and refracted by the metasurface and transmitted to the user, providing communication services to the user;

[0012] The user sends a feedback signal to the metasurface control board in a wireless communication manner according to the quality of the received communication signal in a floating point format;

[0013] The control device receives the signal and sends it to the FPGA in the device. The FPGA parses the data sent by the user and completes the data splicing.

[0014] Optionally, the control device receives a signal and sends the signal to an FPGA in the device, and the FPGA parses the data sent by the user to complete data splicing, which specifically includes:

[0015] The control device obtains the wireless data sent by the user, inserts a synchronization frame into the data, and forwards the data to the FPGA;

[0016] The FPGA obtains the starting position of the data according to the synchronization frame, and re-shifts and splices the data after receiving it to obtain floating-point data containing user communication quality information.

[0017] Optionally, the data processing module stores the parsed user communication signal strength information, and performs floating-point operations on the stored data to calculate the average value, and compares the average value with a preset threshold value, specifically including:

[0018] The analyzed signal is stored in the on-chip memory, and the number of stored data is counted. When a certain number is reached, the data storage is stopped, and the metasurface phase is updated and the storage is restarted;

[0019] The stored data is read out from the on-chip memory in sequence as a reference for the current user's communication effect and used for floating-point operations;

[0020] In the current application scenario, the received signal strength when the user cannot resolve the communication signal reflected or refracted by the metasurface is used as the threshold as the judgment condition for whether the metasurface array element needs to change the phase according to the current user position;

[0021] Perform floating-point operations on user communication quality data, calculate the user's average receiving strength, and compare it with the preset threshold.

[0022] Optionally, the received signal strength when the user cannot resolve the communication signal reflected or refracted by the metasurface in the current application scenario is used as a threshold as a judgment condition for whether the metasurface array element needs to change the phase according to the current user position, specifically including:

[0023] Set the receiving antenna at the direction where the metasurface refracts or reflects the signal in the application scenario, and move the receiving antenna gradually away from the direction;

[0024] The eye diagram of the received signal is observed until the eye diagram is closed and the signal has bit errors. It is considered that the signal strength at this time cannot meet the user's inability to normally parse the communication signal. The communication signal strength at this time is used as the threshold, and the antenna deviation angle at this time is used as the maximum deviation angle for user relocation.

[0025] Optionally, performing floating-point operations on user communication quality data to calculate user average receiving strength and comparing it with a preset threshold specifically includes:

[0026] Use the floating-point data in the current time group read from the on-chip memory to complete the sum of the signal strength data in the group by floating-point addition operation;

[0027] According to the summation result and the number of data in the memory, floating point division is performed to obtain the average value of the user received signal strength;

[0028] The average value result is compared with the preset threshold to determine whether the user position has changed. If changed, the metasurface phase is adjusted to relocate the user position.

[0029] Optionally, the metasurface array element control module jumps the address to read the codebook information, generates a DAC module control excitation signal, changes the module output voltage, adjusts the metasurface phase, and relocates the user position, specifically including:

[0030] Test in application scenarios. Each round of test makes the codebook step by a fixed value in the horizontal or pitch direction to determine the best codebook for the user in each orientation of the metasurface and store it in the FPGA.

[0031] Jump address to read the pre-stored codebook as the phase change state of the next array element, and scan to determine the user's current position;

[0032] Generate a DAC module to control the excitation signal, change the output status of each DAC module, adjust the phase of the voltage-controlled metasurface array element, and display the metasurface phase status with RGB colored lights.

[0033] Optionally, the test is conducted in an application scenario, and each round of the test steps a fixed value in the horizontal or pitch direction to obtain the best codebook for the user in each orientation of the metasurface, and stores it in the FPGA, specifically including:

[0034] Set a receiving antenna, place it at a preset azimuth, traverse the metasurface phase codebook, and take the point where the intensity of the received metasurface reflected signal is the maximum as the optimal codebook for the azimuth;

[0035] Change the receiving antenna to the next orientation. The amount of each orientation change is the positioning accuracy in the current application scenario until the best codebook is obtained for all orientations. The codebook is stored in the block memory in the FPGA.

[0036] Optionally, the jump address reads a pre-stored codebook as the next array element phase change state, specifically including:

[0037] Each time, the address bits are incremented in the horizontal or elevation direction, and the codebook is read from the block memory in turn. The metasurface phase is changed according to the codebook, and the average received signal strength of the user is re-determined until the received signal strength fed back by the user is higher than the preset threshold.

[0038] Taking the codebook at the position higher than the preset threshold as the center, traverse the storage address in the horizontal or pitch direction dimension each time, and read the codebook from the block memory in sequence until all the codebooks within the maximum deviation angle are read;

[0039] The metasurface phase is updated according to the codebook, and the codebook corresponding to the maximum average received signal strength of the current user position is found, and the current user position is relocated with this codebook.

[0040] Optionally, the generating of the DAC module to control the excitation signal, changing the output voltages of the DAC module, adjusting the phase of the metasurface array element, and displaying the phase state of the metasurface with RGB colored lights specifically includes:

[0041] Generate excitation signal, access DAC module, write to change DAC module register state, and change DAC module output voltage;

[0042] The excitation signal clock is generated by dividing the system clock. Under this clock, the DAC module and its voltage output register are traversed and addressed in turn, and the corresponding codebook information of each channel is input to change the output voltage of each channel of the DAC module to adjust the phase of the metasurface.

[0043] RGB colored lights are attached in series next to the metasurface array elements. Each colored light corresponds to one metasurface array element or a group of metasurface array elements, and different colors are used to indicate different codebook states.

[0044] After each update of the codebook, the color light output is reset, and the logic level value is represented by different duty cycles per unit time. The corresponding RGB value of each color light is input into the control signal line in turn, so that the color of the color light corresponds to the metasurface array element codebook one by one.

[0045] Beneficial Effects

[0046] From the above description, it can be seen that the present invention provides an intelligent metasurface phase control method and device, which receives user feedback data, uses FPGA to parse the user communication signal strength, and performs floating-point operations to calculate the average strength of the user communication signal. Then, it jumps to the address to read the code book information, generates a DAC module control excitation signal, changes the module output voltage, regulates the metasurface phase state, and tracks the user's real-time position, thereby reducing the time required for the metasurface to relocate the user position and improving the quality of user communication services. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] Figure 1 This is an application scenario diagram of an intelligent metasurface phase control method and device.

[0048] Figure 2 It is a flow chart of the device implementation of the present invention.

[0049] Figure 3 The invention discloses a method for controlling phase of an intelligent metasurface and a schematic diagram of a device for jumping address and reading a code book.

[0050] Figure 4 The present invention is a schematic diagram of the structure of a metasurface control module of an intelligent metasurface phase control method and device. Specific implementation methods

[0052] In order to clarify the purpose, implementation scheme and technical advantages of the present invention, the present invention is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

[0053] Figure 1 This is an application scenario of an intelligent metasurface phase control method and device of the present invention: after the metasurface phase control device is attached to the metasurface, it receives user feedback data and controls the metasurface phase, so that the metasurface directs the communication signal to the user's position by reflection and refraction. The present invention aims to use a metasurface control board to complete metasurface phase control with lower latency, locate the user's real-time position, and optimize the user's communication service experience in the metasurface-assisted communication system.

[0054] Figure 2 The present invention is a flow chart of a smart metasurface phase control method and device, including:

[0055] Step 200: The data receiving module receives and parses user feedback data including communication signal strength information to obtain user communication service quality.

[0056] Step 210: The data processing module stores the analyzed user communication signal strength information, performs floating-point operations on the stored data and calculates the average value, and compares it with a preset threshold value.

[0057] Step 220, the metasurface array element control module jumps the address to read the codebook information, generates a DAC module control excitation signal, changes the module output voltage, adjusts the metasurface phase, and relocates the user position.

[0058] In step 200, the control device receives the received signal strength information fed back by the user and forwards it to the data receiving module. The data receiving module synchronizes and parses the data and reassembles the data into floating-point data fed back by the user. When the control device forwards the data, it agrees on the data format, including: synchronization frame format, data transmission rate, and data arrangement method. The FPGA needs to complete data parsing and splicing according to the agreed format.

[0059] In step 210, the data processing module groups the results of several data analysis and splicing as a group, which is used as the received signal strength at the current user's location. When receiving data, the data is stored in the FPGA on-chip memory. After a group of data is full, the data storage is suspended, and the floating-point operation and the metasurface phase update are waited for to be completed. During the floating-point averaging operation, the summation part quantizes the data uniformly to prevent the processing delay from increasing exponentially with the increase in the number of data in the group. The floating-point bit subtraction of the data replaces the floating-point division to reduce the complexity of the operation. The signal strength measured in the experimental scenario when the user deviates from the signal direction and can still correctly parse the communication signal is used as the judgment threshold, and a comparison is made to determine whether it is necessary to change the metasurface phase to relocate the user position, and the deviation angle is used as the maximum deviation angle for relocation.

[0060] In step 220, when the metasurface array element control module jumps the address to read the codebook information, the time required to relocate the user position is reduced. The codebook data is read step by step with the address bit corresponding to the maximum deviation angle of relocation to roughly estimate the user's position; with the roughly estimated position as the center, the codebook is traversed and read in sequence to accurately locate the user. The positioning result is used as the current user position, and the codebook at this time is used to provide communication services for the user.

[0061] The present invention provides an intelligent metasurface phase control method and device. After the device receives and forwards user feedback data, parses and re-joins the user communication signal strength, and calculates the average strength of the user communication signal through floating-point calculation, it jumps to the address to read the code book information, generates a DAC module control excitation signal, changes the module output voltage, regulates the metasurface phase state, and locates the user's real-time position, thereby reducing the metasurface response time to user position changes and improving the user communication service quality.

[0062] In some optional examples, step 200, the data receiving module receives and parses user feedback data including communication signal strength information to obtain user communication service quality, specifically including:

[0063] Step 300, the information source sends communication data, which is reflected and refracted by the metasurface and transmitted to the user, providing communication services for the user;

[0064] Step 310, the user sends a feedback signal to the metasurface control board in a wireless communication manner according to the quality of the communication signal received by the user in a floating point format;

[0065] Step 320, the control device receives the signal and sends the signal to the FPGA in the device, and the FPGA parses the data sent by the user to complete data splicing.

[0066] Preferably, in another optional embodiment, in step 320, the control device receives the signal and sends the signal to the FPGA in the device, and the FPGA parses the data sent by the user to complete the data splicing, which specifically includes:

[0067] Step 400, the control device obtains wireless data sent by the user, inserts a synchronization frame into the data, and forwards the data to the FPGA;

[0068] Step 410, the FPGA obtains the starting position of the data according to the synchronization frame, and re-shifts and splices the data after receiving it to obtain floating-point data containing user communication quality information.

[0069] Optionally, in step 410, when the control device forwards data, an additional frame header identification code is inserted to synchronize multi-byte data to avoid data misalignment during data parsing. For the transmission of feedback data, the data forwarding module in the device and the FPGA data receiving and parsing module agree on the same data transmission rate and data arrangement. In order to reduce the impact of possible data errors during the transmission process, a check code is added. When the FPGA receives, it is parsed according to the agreed format and performs the same check operation to determine possible errors in the data forwarding process.

[0070] Preferably, in another optional embodiment, in step 210, the data processing module stores the parsed user communication signal strength information, and performs floating-point operations on the stored data to average the value, and compares the value with a preset threshold, specifically including:

[0071] Step 500, the analyzed signal is stored in the on-chip memory, the number of stored data is counted, and after a certain number is reached, the data storage is stopped, and the metasurface phase is updated and the storage is restarted;

[0072] Step 510, the stored data is read out from the on-chip memory in sequence and used as a reference for the communication effect of the current user for floating-point calculation;

[0073] Step 520, taking the received signal strength when the user cannot resolve the communication signal reflected or refracted by the metasurface in the current application scenario as a threshold as a judgment condition for whether the metasurface array element needs to change the phase according to the current user position;

[0074] Step 530: Perform floating point operations on the user communication quality data to calculate the user average receiving strength and compare it with a preset threshold.

[0075] Optionally, in step 500, the signal analysis data is stored in the on-chip memory. When storing the data, the maximum floating-point bit value in the data and the number of stored data are recorded. Using a positive integer power of 2 as a group of data simplifies the complexity of floating-point division operations in subsequent operations and reduces the delay caused by floating-point operations. After storing a group of data, the storage is paused and the floating-point operation is waited for to be completed. If the user is still in the direction of reflection or refraction of the communication signal beam, continue to parse the forwarded data. If it is determined that the user has left the direction of the signal beam, wait for the metasurface phase control to be completed, and then restart the parsing of the forwarded data to reduce the computing pressure of the computing module and prevent misjudgment of the user's location.

[0076] Preferably, in another optional embodiment, step 520, taking the received signal strength when the user cannot resolve the communication signal reflected or refracted by the metasurface in the current application scenario as a threshold, as a judgment condition for whether the metasurface array element needs to change the phase according to the current user position, specifically includes:

[0077] Step 600, setting the receiving antenna at the direction where the metasurface refracts or reflects the signal in the application scenario, and moving the receiving antenna to gradually deviate from the direction;

[0078] Step 610, observe the eye diagram of the received signal until the eye diagram is closed and the signal has bit errors. It is considered that the signal strength at this time cannot meet the user's inability to normally parse the communication signal. The communication signal strength at this time is used as the threshold, and the antenna deviation angle at this time is used as the maximum deviation angle for user relocation.

[0079] Preferably, in another optional embodiment, step 530, performing floating point operations on the user communication quality data, calculating the user average receiving strength, and comparing it with a preset threshold, specifically includes:

[0080] Step 700, using the floating point data in the current time group read from the on-chip memory, and performing floating point addition operation to sum the signal strength data in the group;

[0081] Step 710, performing floating-point division according to the summation result and the amount of data in the memory to obtain the average value of the user received signal strength;

[0082] Step 720, compare the average value result with a preset threshold to determine whether the user position has changed. If changed, adjust the metasurface phase and relocate the user position.

[0083] Optionally, in step 700, during the floating-point addition process, when reading data from the on-chip memory, the fixed-point bits are widened, and the data is converted to floating-point bits consistent with the maximum floating-point bits recorded during storage. In the addition operation, all data are uniformly quantized and summed and then converted into the original floating-point representation, so that each data only brings an additional FPGA clock cycle delay in the addition.

[0084] Optionally, in step 710, in the average division operation, the number of data in each group is a power of 2, and the division operation is completed only by floating-point bit subtraction, thereby reducing the complexity of the division operation and reducing the delay caused by the operation.

[0085] Preferably, in another optional embodiment, step 220, the metasurface array element control module jumps the address to read the codebook information, generates a DAC module control excitation signal, changes the module output voltage, adjusts the metasurface phase, and relocates the user position, specifically including:

[0086] Step 800, testing in an application scenario, each round of testing makes the codebook step by a fixed value in the horizontal or pitch direction, determines the best codebook when the user is in each orientation of the metasurface, and stores it in the FPGA;

[0087] Step 810, jump address to read pre-stored codebook as the next array element phase change state, scan and determine the user's current position;

[0088] Step 820, generate a DAC module control excitation signal, change the output state of each DAC module, adjust the phase of the voltage-controlled metasurface array element, and display the metasurface phase state with RGB colored lights.

[0089] Preferably, in another optional embodiment, step 800, testing in an application scenario, each round of testing steps a fixed value in the horizontal or pitch direction, obtains the best codebook when the user is in each orientation of the metasurface, and stores it in the FPGA, specifically including:

[0090] Step 900, setting a receiving antenna, placing it at a preset azimuth, traversing the metasurface phase codebook, and taking the point where the intensity of the received metasurface reflected signal is the maximum as the best codebook for the azimuth;

[0091] Step 910, change the receiving antenna to the next orientation, and the amount of each orientation change is the positioning accuracy in the current application scenario, until the best codebook in all orientations is obtained, and the codebook is stored in the block memory in the FPGA.

[0092] Preferably, in another optional embodiment, step 810, jumping the address to read the pre-stored codebook as the next array element phase change state, specifically includes:

[0093] Step 1000, each time a number of address bits are incremented in the horizontal or elevation direction, the codebook is read from the block memory in sequence, the metasurface phase is changed according to the codebook, and the average received signal strength of the user is re-determined until the received signal strength fed back by the user is higher than a preset threshold;

[0094] Step 1010, taking the codebook at the position higher than the preset threshold as the center, traversing the storage address in the horizontal or pitch direction dimension each time, and reading the codebook from the block memory in sequence until all codebooks within the maximum deviation angle are read;

[0095] Step 1020, update the metasurface phase according to the codebook, find the codebook corresponding to the maximum value of the average received signal strength at the current user position, and use this codebook to relocate the current user's position.

[0096] Optionally, in step 1000, the codebook is read by incrementing a number of address bits in the horizontal or elevation direction each time, and the incremented address step corresponds to the maximum deviation angle of user relocation in the current application scenario according to the application scenario. After each codebook read, the metasurface phase is changed according to the codebook, and the mean value of the user received signal strength under the new codebook is recalculated and compared with a preset threshold until the user received signal strength is higher than the threshold as a rough positioning result of the user position.

[0097] Preferably, in another optional embodiment, step 820, generating a DAC module control excitation signal, changing the output voltages of the DAC module, adjusting the phase of the metasurface array element, and displaying the metasurface phase state with RGB colored lights, specifically includes:

[0098] Step 1100, generating an excitation signal, accessing the DAC module, writing and changing the DAC module register state, and changing the DAC module output voltage;

[0099] Step 1110, the excitation signal clock is generated by dividing the system clock. Under the clock, the DAC module and its voltage output register are sequentially traversed and addressed, the corresponding codebook information of each channel is input, the output voltage of each channel of the DAC module is changed, and the phase of the metasurface is adjusted;

[0100] Step 1120, RGB colored lights are attached in series next to the metasurface array elements, each colored light corresponds to one metasurface array element or a group of metasurface array elements, and different colors are used to indicate different codebook states;

[0101] Step 1130, after each update of the codebook, reset the color light output, use different duty cycles per unit time to represent the logic level value, and input the RGB value corresponding to each color light in the control signal line in turn, so that the color of the color light corresponds to the metasurface array element codebook one by one.

[0102] Optionally, in step 1110, when the DAC control module clock signal is generated by the system crystal oscillator frequency division, the control module clock signal frequency reaches the maximum allowable clock frequency of the selected DAC module, thereby reducing the time required to send the control instruction. When sending data, the DAC control instruction data line is addressed to specify the controlled DAC module subsystem, and the output voltage control register address of the module is written, and then the corresponding voltage value of each port of the DAC module is input on the control instruction data line, so that the output voltage value corresponds to the metasurface phase codebook. When writing data to the DAC module clock line and the control instruction data line, the IOB resources in the FPGA are used to temporarily store the signal at the output port and output it at the same time, eliminating the influence of the inconsistent length of the signal path of each signal in the FPGA on the DAC module judgment signal.

[0103] Optionally, in step 1130, the FPGA output is used to provide a voltage source for the colored lights, and the FPGA output generates colored light control instructions. Each time the code book is updated, a reset signal is sent to reset the colored light state. After the reset is completed, the colored light state is updated, and different duty cycle signals are used to represent different logic levels in the RGB colored lights, and a colored light RGB state signal composed of several logic levels is used to represent the color state of a single colored light. The series-connected colored light RGB signals are sent in sequence to make the colored light colors correspond to the array element code books. In addition to obtaining the code book information from the metasurface array element control module, the colored light control module should be independent of other modules to avoid the colored light control module affecting the response rate of the metasurface to the user's position.

[0104] Figure 3 This is a schematic diagram of a method for controlling the phase of an intelligent metasurface and a device for jumping address reading codebooks. Assuming that each address stores an angle azimuth codebook with the same value as the address, the user moves to a position with an azimuth of 14 degrees, and in this application scenario, the maximum deviation angle of user repositioning is measured to be 5 degrees. Starting from an azimuth of 0 degrees, after each calculation result is compared with a preset threshold, if it is lower than the threshold, the corresponding address is read after the azimuth is increased by 5 degrees until the calculation result is higher than the threshold. Then, with this azimuth as the center and 1 degree azimuth as the accuracy, read the codebooks corresponding to the 4 azimuths, find the maximum value of the calculation result, and finally adjust the address to the point where the calculation result is the maximum value.

[0105] Figure 4 The present invention is a schematic diagram of the structure of a metasurface control module of an intelligent metasurface phase control method and device. The system crystal oscillator clock is used as the reference clock period of each signal, and the reference clock signal transmitted to the digital-to-analog converter is obtained by dividing the crystal oscillator clock. The floating-point operation comparison result is sent to the mode selection submodule as the codebook switching start signal, and the mode selection submodule selects the enable subsystem switching signal module or the voltage switching signal. The subsystem switching submodule generates a signal to select the controlled DAC module subsystem, and the voltage switching module inputs the codebook to the currently controlled subsystem, changes the output voltage of the corresponding subsystem, and changes the phase of the metasurface array connected to the subsystem.

Claims

1. A method and device for controlling phase of an intelligent metasurface, characterized in that: include: The data receiving module receives and analyzes user feedback data including communication signal strength information to obtain user communication service quality; The data processing module stores the analyzed user communication signal strength information, and performs floating-point operations on the stored data to calculate the average value, and compares it with a preset threshold value; The metasurface array element control module jumps the address to read the codebook information, generates a DAC module control excitation signal, changes the module output voltage, adjusts the metasurface phase, and relocates the user's position.

2. The device according to claim 1, characterized in that The data receiving module receives and analyzes user feedback data including communication signal strength information to obtain user communication service quality, specifically including: The communication source sends communication data, which is reflected and refracted by the metasurface and transmitted to the user, providing communication services to the user; The user sends a feedback signal to the metasurface control board in a wireless communication manner according to the quality of the received communication signal in a floating point format; The control device receives the signal and sends it to the FPGA in the device. The FPGA parses the data sent by the user and completes the data splicing.

3. According to the device of claim 2, the control device receives the signal and sends the signal to the FPGA in the device, and the FPGA analyzes the data sent by the user to complete the data splicing, which specifically includes: The control device obtains the wireless data sent by the user, inserts a synchronization frame into the data, and forwards the data to the FPGA; The FPGA obtains the starting position of the data according to the synchronization frame, and re-shifts and splices the data after receiving it to obtain floating-point data containing user communication quality information.

4. The device according to claim 1, characterized in that The data processing module stores the analyzed user communication signal strength information, and performs floating point operations on the stored data to calculate the average value, and compares it with the preset threshold value, specifically including: The analyzed signal is stored in the on-chip memory, and the number of stored data is counted. When a certain number is reached, the data storage is stopped, and the metasurface phase is updated and the storage is restarted; The stored data is read out from the on-chip memory in sequence as a reference for the current user's communication effect and used for floating-point operations; In the current application scenario, the received signal strength when the user cannot resolve the communication signal reflected or refracted by the metasurface is used as the threshold as the judgment condition for whether the metasurface array element needs to change the phase according to the current user position; Perform floating-point operations on user communication quality data, calculate the user's average receiving strength, and compare it with the preset threshold.

5. The device according to claim 4, characterized in that In the current application scenario, the received signal strength when the user cannot resolve the communication signal reflected or refracted by the metasurface is used as the threshold as the judgment condition for whether the metasurface array element needs to change the phase according to the current user position, specifically including: Set the receiving antenna at the direction where the metasurface refracts or reflects the signal in the application scenario, and move the receiving antenna gradually away from the direction; The eye diagram of the received signal is observed until the eye diagram is closed and the signal has bit errors. It is considered that the signal strength at this time cannot meet the user's inability to normally parse the communication signal. The communication signal strength at this time is used as the threshold, and the antenna deviation angle at this time is used as the maximum deviation angle for user relocation.

6. The device according to claim 4, characterized in that Perform floating point operations on user communication quality data, calculate the average receiving strength of the user, and compare it with the preset threshold, specifically including: Use the floating-point data in the current time group read from the on-chip memory to complete the sum of the signal strength data in the group by floating-point addition operation; According to the summation result and the number of data in the memory, floating point division is performed to obtain the average value of the user received signal strength; The average value result is compared with the preset threshold to determine whether the user position has changed. If changed, the metasurface phase is adjusted to relocate the user position.

7. The device according to claim 1, characterized in that The metasurface array element control module jumps the address to read the codebook information, generates a DAC module control excitation signal, changes the module output voltage, adjusts the metasurface phase, and relocates the user position, specifically including: Test in application scenarios. Each round of test makes the codebook step by a fixed value in the horizontal or pitch direction to determine the best codebook for the user in each orientation of the metasurface and store it in the FPGA. Jump address to read the pre-stored codebook as the phase change state of the next array element, and scan to determine the current position of the user; Generate a DAC module to control the excitation signal, change the output status of each DAC module, adjust the phase of the voltage-controlled metasurface array element, and display the metasurface phase status with RGB colored lights.

8. The device according to claim 7, characterized in that The test in the application scenario, each round of testing steps a fixed value in the horizontal or pitch direction, obtains the best codebook when the user is in each orientation of the metasurface, and stores it in the FPGA, specifically including: Set a receiving antenna, place it at a preset azimuth, traverse the metasurface phase codebook, and take the point where the intensity of the received metasurface reflected signal is the maximum as the optimal codebook for the azimuth; Change the receiving antenna to the next orientation. The amount of each orientation change is the positioning accuracy in the current application scenario until the best codebook is obtained for all orientations. The codebook is stored in the block memory in the FPGA.

9. The device according to claim 7, characterized in that The jump address reads the pre-stored codebook as the next array element phase change state, specifically including: Each time, the address bits are incremented in the horizontal or elevation direction, and the codebook is read from the block memory in turn. The metasurface phase is changed according to the codebook, and the average received signal strength of the user is re-determined until the received signal strength fed back by the user is higher than the preset threshold. Taking the codebook at the position higher than the preset threshold as the center, traverse the storage address in the horizontal or pitch direction dimension each time, and read the codebook from the block memory in sequence until all the codebooks within the maximum deviation angle are read; The metasurface phase is updated according to the codebook, and the codebook corresponding to the maximum average received signal strength of the current user position is found, and the current user position is relocated with this codebook.

10. The device according to claim 7, characterized in that The generating DAC module controls the excitation signal, changes the output voltages of the DAC module, adjusts the phase of the metasurface array element, and displays the phase state of the metasurface with RGB colored lights, specifically including: Generate excitation signal, access DAC module, write to change DAC module register state, and change DAC module output voltage; The excitation signal clock is generated by dividing the system clock. Under this clock, the DAC module and its voltage output register are traversed and addressed in turn, and the corresponding codebook information of each channel is input to change the output voltage of each channel of the DAC module to adjust the phase of the metasurface. RGB colored lights are attached in series next to the metasurface array elements. Each colored light corresponds to one metasurface array element or a group of metasurface array elements, and different colors are used to indicate different codebook states. After each update of the codebook, the color light output is reset, and the logic level value is represented by different duty cycles per unit time. The corresponding RGB value of each color light is input into the control signal line in turn, so that the color of the color light corresponds to the metasurface array element codebook one by one.