Method and apparatus for intra prediction

Abstract

The invention discloses a method for performing intra-frame prediction on a block. The method comprises the following steps: acquiring an intra-frame prediction mode of the block; and when the intra-frame prediction mode of the block is a wide-angle mode, obtaining the prediction pixel points of the block through the filtered reference pixel points.

Description

[0001] This application is a divisional application. The application number of the original application is 201980072829.3, and the original application date is November 14, 2019. The entire contents of the original application are incorporated into this application by reference.

[0002] CROSS-REFERENCE TO RELATED APPLICATIONS

[0003] This application claims the benefit of U.S. Provisional Application No. 62 / 767,496, filed on November 14, 2018, entitled “Method and Apparatus for Prediction,” which is incorporated herein by reference. Technical Field

[0004] The present invention relates to the technical field of image and / or video coding and decoding, and in particular to a method and device for intra-frame / inter-frame prediction. Background Art

[0005] Digital video has been widely used since the advent of DVD discs. Video is encoded before being sent and then sent over a transmission medium. The viewer receives the video and uses a viewing device to decode and display it. Video quality has improved over the years due to increases in resolution, color depth, frame rate, etc. This has resulted in larger data streams currently being transmitted over the Internet and mobile communication networks.

[0006] However, higher resolution videos usually have more information and therefore require more bandwidth. To reduce bandwidth requirements, video coding standards were introduced that involve video compression. When encoding a video, the bandwidth requirements (or corresponding memory requirements when storing it) are reduced. This reduction often comes at the expense of quality. Therefore, video coding standards try to find a balance between bandwidth requirements and quality.

[0007] High Efficiency Video Coding (HEVC) is an example of a video coding standard that is well known to those skilled in the art. In HEVC, a coding unit (CU) is divided into a prediction unit (PU) or a transform unit (TU). The next generation standard of Versatile Video Coding (VVC) is a recent joint video project of the ITU-T Video Coding Experts Group (VCEG) and the ISO / IEC Moving Picture Experts Group (MPEG). The two standardization organizations work together, and their partnership is called the Joint Video Exploration Team (JVET). VVC is also known as the ITU-T H.266 / Next Generation Video Coding (NGVC) standard. VVC removes the concept of multiple partition types, that is, it does not distinguish between the concepts of CU, PU, ​​and TU (unless the size of the CU is too large for the maximum transform length), and supports more flexible CU partition shapes.

[0008] The processing of these coding units (CUs), also called blocks, depends on their size, spatial location, and the coding mode specified by the encoder. Based on the prediction type, the coding modes can be divided into two categories: intra prediction mode and inter prediction mode. Intra prediction mode uses pixels of the same picture (picture / image) (also called frame) to generate reference pixels to calculate the predicted values ​​of the pixels of the reconstructed block. Intra prediction is also called spatial prediction. Inter prediction mode is designed for temporal prediction and uses reference pixels of previous or subsequent images to predict the pixels of the block of the current image.

[0009] ITU-T VCEG (Q6 / 16) and ISO / IEC MPEG (JTC 1 / SC 29 / WG 11) are studying the potential need for standardization of future video coding technologies, where the compression capabilities of future video coding technologies will significantly exceed the compression capabilities of the current HEVC standard (including current and near-term extensions for screen content coding and high dynamic range coding). The two expert groups are jointly conducting this exploration activity, called the Joint Video Exploration Team (JVET), to evaluate the compression technology designs proposed by the expert groups in this area.

[0010] The Versatile Test Model (VTM) standard uses 35 intra modes, while the Benchmark Set (BMS) uses 67 intra modes.

[0011] The intra prediction scheme is more complicated. Summary of the invention

[0012] The invention discloses an intra-frame prediction device and method.

[0013] According to a first aspect, the present invention relates to a method for performing intra-frame prediction on a current image block in a current image of a video, the method comprising: obtaining an intra-frame prediction mode of the block; when the intra-frame prediction mode of the block is a wide-angle mode, obtaining predicted pixel points of the block by filtering reference pixel points.

[0014] In a possible implementation manner of the method provided in the first aspect, the intra prediction mode of the block is an integer slope wide-angle mode. The integer slope wide-angle mode is at least one of the following: -14, -12, -10, -6, 72, 76, 78, 80.

[0015] The first aspect aims to unify the reference pixel processing with the combination of the output of the directional prediction and the additional prediction signal used to improve the visual quality of the predicted block. As a result of this unification, the reference pixels are only processed once and the results of this processing are reused through the directional intra prediction process and the generation of additional predictions. For example, the filtered reference pixels are used for the wide angle mode, so only one filtered reference pixel buffer is needed.

[0016] The following steps can be performed to implement the intra prediction method:

[0017] Step 1: Perform reference pixel filtering according to the reference pixel, intra prediction mode intraPredMode and / or block size (width and height).

[0018] Step 2: According to intraPredAngle, perform directional intra prediction based on the processed (filtered or unfiltered) reference pixels (the result of step 1).

[0019] Step 3: Update the result obtained in step 2 using a joint prediction, where the joint prediction may be PDPC or simplified PDPC, wherein the input reference pixel used in step 3 is the same as the reference pixel of the integer slope wide-angle mode (e.g., -14, -12, -10, -6, 72, 76, 78, 80, as shown in Tables X and Y below) obtained in step 1 and used in step 2.

[0020] Optionally, depending on predModeIntra, it is determined whether a filtered or unfiltered reference pixel buffer should be used. This can be performed by applying one of the filters listed in Table 5 below. In VVC, filters with indices 0 and 1 are used.

[0021] When predMode is equal to 2, 34, or 66 and when nTbS>2, the reference pixel is filtered (using filter index "1" in Table 5).

[0022] An alternative embodiment of the above method is to use an angle parameter (further denoted as intraPredAngle) in this step instead of the intra prediction mode predModeIntra. In this case, if the value of intraPredAngle is a multiple of 32 and when nTbS>2, the reference pixel point is filtered (using the filter index "1" of Table 5).

[0023] The method provided in the first aspect of the present invention may be performed by the device provided in the second aspect of the present invention. For example, the device may include an acquisition unit and a wide-angle prediction unit. The acquisition unit is used to acquire the intra-frame prediction mode of the block; the wide-angle prediction unit is used to obtain the predicted pixel points of the block through the filtered reference pixel points when the intra-frame prediction mode of the block is the wide-angle mode.

[0024] Other features and implementations of the method provided in the second aspect of the present invention correspond to the features and implementations of the device provided in the first aspect of the present invention.

[0025] The advantages of the device provided by the second aspect are the same as the advantages of the corresponding implementation of the method provided by the first aspect.

[0026] According to a third aspect, the present invention relates to an apparatus for decoding a video stream, comprising a processor and a memory, wherein the memory stores instructions, and the instructions enable the processor to execute the method provided in the first aspect.

[0027] According to a fourth aspect, the present invention relates to an apparatus for encoding a video stream, comprising a processor and a memory, wherein the memory stores instructions, and the instructions enable the processor to execute the method provided in the first aspect.

[0028] According to a fifth aspect, a computer-readable storage medium storing instructions is provided, wherein when executed, the instructions cause one or more processors to decode video data. The instructions cause the one or more processors to perform the method provided by the first aspect or any possible embodiment of the first aspect.

[0029] According to a sixth aspect, the present invention relates to a computer program, comprising a program code, wherein the program code is used to execute the method provided by the first aspect or any possible embodiment of the first aspect when executed in a computer.

[0030] One or more embodiments will be described in detail in the drawings and the following description. Other features, objects, and advantages will be apparent from the description, drawings, and claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The following embodiments are described in detail with reference to the accompanying drawings, in which:

[0032] Figure 1 A block diagram of an example of a video decoding system for implementing an embodiment of the present invention;

[0033] Figure 2 A block diagram of an example of a video encoder for implementing an embodiment of the present invention;

[0034] Figure 3 A block diagram of an example of a video decoder for implementing an embodiment of the present invention;

[0035] Figure 4A Schematic diagram of the proposed 67 intra prediction modes;

[0036] Figure 4B A schematic diagram of the proposed 93 intra prediction modes is shown, where the dashed direction is associated with the wide-angle mode that is only applied to non-square blocks;

[0037] Figure 5-Figure 11 Different examples of interpolation filters are shown;

[0038] Fig.12 An example of repeatedly using a 4-tap interpolation filter in inter-frame prediction and intra-frame prediction is shown;

[0039] Fig.13 An exemplary implementation of the proposed application is shown;

[0040] Fig.14 An exemplary implementation of the proposed application based on a LUT of reused coefficients is shown;

[0041] Fig.15 An example of interpolation filter selection is shown;

[0042] Fig.16 An example of a QTBT is shown;

[0043] Fig.17 An example of a rectangular block orientation is shown;

[0044] Fig.18An example of edge length dependent reference filter selection is shown;

[0045] Fig.19 Examples of alternative directions for thresholding intra-prediction modes in the interpolation filter selection process are shown;

[0046] Fig. 20 shows the use of different interpolation filters, depending on which side the reference pixel used belongs to;

[0047] Fig.21 The DC-mode PDPC weights for the (0, 0) and (1, 0) positions within a 4×4 block are shown;

[0048] Fig. 22 The definition of the pixel points used for PDPC extension to diagonal mode and adjacent angle intra mode is shown;

[0049] Fig.23 An exemplary implementation of a simplified PDPC is shown;

[0050] Fig.24 An exemplary unified implementation is shown;

[0051] Fig.25 is a block diagram of an example structure of an apparatus for performing intra-frame prediction on a current image block in a current image of a video;

[0052] Fig.26 is a block diagram of an apparatus 1500 that may be used to implement various embodiments;

[0053] Fig. 27 A block diagram of an example structure of a content provision system for providing content distribution services;

[0054] Fig.28 A block diagram of an example structure of a terminal device. DETAILED DESCRIPTION

[0055] Definition of Abbreviations and Terms

[0056] JEM Joint Exploration Model (software code library for future video decoding exploration)

[0057] JVET Joint Video Experts Team

[0058] LUT Look-Up Table

[0059] PDPCP Position-Dependent Prediction Combination Position-Dependent Prediction Combination

[0060] QT QuadTree quadtree

[0061] QTBT QuadTree plus Binary Tree QuadTree plus Binary Tree

[0062] RDO Rate-distortion Optimization

[0063] ROM Read-Only Memory

[0064] VTM VVC Test Model VVC Test Model

[0065] VVC Versatile Video Coding is a standardization project developed by JVET.

[0066] CTU / CTB - Coding Tree Unit / Coding Tree Block

[0067] CU / CB - Coding Unit / Coding Block

[0068] PU / PB - Prediction Unit / Prediction Block

[0069] TU / TB - Transform Unit / Transform Block

[0070] HEVC - High Efficiency Video Coding

[0071] Video coding schemes such as H.264 / AVC and HEVC are designed based on the successful principle of block-based hybrid video coding, which first divides the image into blocks and then predicts each block by using intra-frame or inter-frame prediction.

[0072] Several video coding standards since H.261 belong to the group of "lossy hybrid video codecs" (i.e., combining spatial prediction and temporal prediction in the pixel domain with 2D transform coding in the transform domain for applying quantization). Each image in a video sequence is usually divided into a set of non-overlapping blocks, which are usually decoded at the block level. In other words, the encoder usually processes the video at the block (image block) level, i.e., encodes it, for example, by generating a prediction block through spatial (intra-frame) prediction and temporal (inter-frame) prediction; subtracting the prediction block from the current block (currently processed / to be processed block) to obtain a residual block; transforming the residual block in the transform domain and quantizing the residual block to reduce the amount of data to be transmitted (compressed), while the decoder applies the inverse processing part relative to the encoder to the coded or compressed block to reconstruct the current block for representation. In addition, the encoder repeats the processing steps of the decoder, so that the encoder and the decoder generate the same prediction (e.g., intra-frame prediction and inter-frame prediction) and / or reconstruction for processing (i.e., decoding) subsequent blocks.

[0073] As used herein, the term "block" may be a part of an image or a frame. For ease of description, this document describes embodiments of the present invention with reference to the High-Efficiency Video Coding (HEVC) or Versatile Video Coding (VVC) reference software developed by the Joint Collaboration Team on Video Coding (JCT-VC) of the ITU-T Video Coding Experts Group (VCEG) and the ISO / IEC Motion Picture Experts Group (MPEG). It should be understood by those of ordinary skill in the art that embodiments of the present invention are not limited to HEVC or VVC. It may refer to CU, PU, ​​and TU. In HEVC, a CTU is divided into CUs by a quadtree structure represented as a coding tree. It is decided at the CU level whether to use inter-frame (temporal) prediction or intra-frame (spatial) prediction to decode the image area. Each CU can be further divided into one, two, or four PUs according to the PU partition type. The same prediction process is applied within a PU, and relevant information is transmitted to the decoder in units of PUs. After applying the prediction process according to the PU partition type to obtain the residual block, the CU can be partitioned into transform units (TUs) according to another quadtree structure similar to the decoding tree used for the CU. In the latest advances in video compression technology, quadtree and binary tree (QTBT) partitioning is used to partition the decoding block. In the QTBT block structure, the CU can be square or rectangular. For example, the coding tree unit (CTU) is first partitioned by the quadtree structure. The quadtree leaf nodes are further partitioned by the binary tree structure. The binary leaf nodes are called coding units (CUs), and the segmentation is used for prediction and transformation processing without any further partitioning. That is, in the QTBT decoding block structure, the block sizes of CU, PU, ​​and TU are the same. At the same time, it is also proposed to combine multiple partitions such as ternary tree partitioning with the QTBT block structure.

[0074] ITU-T VCEG (Q6 / 16) and ISO / IEC MPEG (JTC 1 / SC 29 / WG 11) are studying the potential need for standardization of future video coding technologies, where the compression capabilities of future video coding technologies will significantly exceed the compression capabilities of the current HEVC standard (including current and near-term extensions for screen content coding and high dynamic range coding). The two expert groups are jointly conducting this exploration activity, called the Joint Video Exploration Team (JVET), to evaluate the compression technology designs proposed by the expert groups in this area.

[0075] The Versatile Test Model (VTM) uses 35 intra modes, while the Benchmark Set (BMS) uses 67 intra modes. Intra prediction is a mechanism used in many video coding frameworks to improve compression efficiency when only a given frame is involved.

[0076] Figure 1 1 is a conceptual or schematic block diagram showing an exemplary decoding system 10, such as a video decoding system 10, that can utilize the techniques of the present application (the present invention). The encoder 20 (e.g., video encoder 20) and the decoder 30 (e.g., video decoder 30) of the video decoding system 10 represent examples of devices that can be used to perform various techniques according to various examples described in the present application. Figure 1 As shown, the decoding system 10 includes a source device 12 for providing encoded data 13 (eg, an encoded image 13 ) to a destination device 14 , etc., to decode the encoded data 13 .

[0077] The source device 12 includes an encoder 20 and may additionally (ie, optionally) include an image source 16 , a pre-processing unit 18 (eg, an image pre-processing unit 18 ), and a communication interface or communication unit 22 .

[0078] The image source 16 may include or may be any type of image capture device, such as a device for capturing real-world images, and / or any type of image or comment (for screen content decoding, some text on the screen is also considered to be part of the picture / image to be encoded) generating device, such as a computer graphics processor for generating computer-animated images, or any type of device for acquiring and / or providing real-world images, computer-animated images (e.g., screen content, virtual reality (VR) images) and / or any combination thereof (e.g., augmented reality (AR) images).

[0079] A (digital) image is or can be considered as a two-dimensional array or matrix of pixels with intensity values. The pixels in the array can also be called pixels (pixel or pel) (short for picture elements). The number of pixels in the array or image in the horizontal and vertical directions (or axes) defines the size and / or resolution of the image. Three color components are usually used to represent the color, that is, the image can be represented as or includes three pixel arrays. In the RGB format or color space, the image includes corresponding red, green and blue pixel arrays. However, in video decoding, each pixel is usually represented by a brightness / chrominance format or in a color space, for example, YCbCr, including a brightness component represented by Y (sometimes also indicated by L) and two chrominance components represented by Cb and Cr. The brightness (or luma for short) component Y represents the brightness or grayscale intensity (for example, in a grayscale image), while the two chrominance (or chroma for short) components Cb and Cr represent the chrominance or color information components. Thus, an image in the YCbCr format includes a luma pixel array of luma pixel values ​​(Y) and two chroma pixel arrays of chroma values ​​(Cb and Cr). An image in the RGB format can be converted or transformed to the YCbCr format and vice versa, a process also known as color conversion or conversion. If the image is monochrome, the image may include only a luma pixel array.

[0080] The image source 16 (e.g., video source 16) can be a camera for capturing images, a memory (e.g., image memory) that includes or stores previously captured or generated images, and / or any type of (internal or external) interface for acquiring or receiving images, etc. For example, the camera can be a local or integrated camera integrated in the source device, and the memory can be a local or integrated memory integrated in the source device, for example. For example, the interface can be an external interface for receiving images from an external video source, wherein the external video source is, for example, an external image capture device such as a camera, an external memory, or an external image generating device such as an external computer graphics processor, a computer or a server. The interface can be any type of interface according to any proprietary or standardized interface protocol, such as a wired or wireless interface, an optical interface. The interface for acquiring the image data 17 can be the same interface as the communication interface 22, or be a part of the communication interface 22.

[0081] In distinction from the pre-processing unit 18 and the processing performed by the pre-processing unit 18 , the image or image data 17 (eg, the video data 16 ) may also be referred to as a raw image or raw image data 17 .

[0082] The preprocessing unit 18 is used to receive (raw) image data 17 and preprocess the image data 17 to obtain a preprocessed image 19 or preprocessed image data 19. The preprocessing performed by the preprocessing unit 18 may include cropping, color format conversion (e.g., from RGB to YCbCr), color correction or denoising, etc. It can be understood that the preprocessing unit 18 may be an optional component.

[0083] The encoder 20 (eg, a video encoder 20) is configured to receive the pre-processed image data 19 and provide encoded image data 21 (hereinafter referred to as Figure 2 etc. for further description of details).

[0084] The communication interface 22 of the source device 12 can be used to receive the encoded image data 21 and send it to other devices (e.g., the destination device 14 or any other device for storage or direct reconstruction); or to process the encoded image data 21 before storing the encoded data 13 and / or sending the encoded data 13 to other devices (e.g., the destination device 14 or any other device for decoding or storage), respectively.

[0085] The destination device 14 includes a decoder 30 (eg, a video decoder 30 ), and may additionally (ie, optionally) include a communication interface or communication unit 28 , a post-processing unit 32 , and a display device 34 .

[0086] The communication interface 28 of the destination device 14 is used to receive the encoded image data 21 or the encoded data 13, for example, directly from the source device 12 or any other source (eg, a storage device such as an encoded image data storage device).

[0087] Communication interface 22 and communication interface 28 can be used to send or receive encoded image data 21 or encoded data 13 via a direct communication link (e.g., a direct wired or wireless connection) between source device 12 and destination device 14, or via any type of network (e.g., a wired or wireless network or any combination thereof, or any type of private and public networks), or any combination thereof.

[0088] For example, the communication interface 22 may be used to package the encoded image data 21 into a suitable format (eg, data packets) for transmission over a communication link or communication network.

[0089] The communication interface 28, which forms a corresponding part of the communication interface 22, may be used, for example, to unpack the encoded data 13 to obtain the encoded image data 21 or the like.

[0090] Both the communication interface 22 and the communication interface 28 can be configured as a one-way communication interface (eg Figure 1The invention can be used to transmit and receive messages, for example, to establish a connection, confirm and exchange any other information related to the communication link and / or data transmission (e.g., encoded image data transmission).

[0091] The decoder 30 is used to receive the encoded image data 21 and provide decoded image data 31 or decoded image 31 (hereinafter referred to as Figure 3 etc. are described in further detail).

[0092] The post-processor 32 of the destination device 14 is used to post-process the decoded image data 31 (also referred to as reconstructed image data) (e.g., decoded image 31) to obtain post-processed image data 33 (e.g., post-processed image 33). For example, the post-processing performed by the post-processing unit 32 may include color format conversion (e.g., from YCbCr to RGB), color correction, cropping or resampling, or any other processing, for example, for preparing the decoded image data 31 for display by a display device 34 or the like.

[0093] The display device 34 of the destination device 14 is used to receive the post-processed image data 33 to display the image to a user or viewer, etc. The display device 34 can be or include any type of display for displaying the reconstructed image, such as an integrated or external display or monitor. For example, the display can include a liquid crystal display (LCD), an organic light emitting diode (OLED) display, a plasma display, a projector, a micro LED display, a liquid crystal on silicon (LCoS), a digital light processor (DLP), or any other type of display.

[0094] although Figure 1 The source device 12 and the destination device 14 are described as separate devices, but the device embodiment may also include two devices or two functions, namely the source device 12 or the corresponding function and the destination device 14 or the corresponding function. In such embodiments, the source device 12 or the corresponding function and the destination device 14 or the corresponding function may be implemented using the same hardware and / or software or by separate hardware and / or software or any combination thereof.

[0095] From the description, it is obvious to the technician that Figure 1The presence and (precise) division of different units or functionalities in the source device 12 and / or destination device 14 shown may vary depending on the actual device and application.

[0096] The encoder 20 (e.g., video encoder 20) and the decoder 30 (e.g., video decoder 30) can each be implemented as any of a variety of suitable circuits, such as one or more microprocessors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), discrete logic, hardware, or any combination thereof. If the technology is partially implemented in software, the device can store the instructions of the software in a suitable non-transitory computer-readable medium, and can use one or more processors to execute the instructions in the hardware to perform the technology of the present invention. Any of the above (including hardware, software, a combination of hardware and software, etc.) can be considered to be one or more processors. The video encoder 20 and the video decoder 30 can each be included in one or more encoders or decoders, either of which can be integrated in the corresponding device as part of a combined encoder / decoder (codec).

[0097] Figure 2 Schematic / conceptual block diagram of an exemplary video encoder 20 for implementing the technology of the present application is shown. Figure 2 In the example of , the video encoder 20 includes a residual calculation unit 204, a transform processing unit 206, a quantization unit 208, an inverse quantization unit 210 and an inverse transform processing unit 212, a reconstruction unit 214, a buffer 216, a loop filter unit 220, a decoded picture buffer (DPB) 230, a prediction processing unit 260, and an entropy coding unit 270. The prediction processing unit 260 may include an inter-frame prediction unit 244, an intra-frame prediction unit 254, and a mode selection unit 262. The inter-frame prediction unit 244 may include a motion estimation unit and a motion compensation unit (not shown). Figure 2 The illustrated video encoder 20 may also be referred to as a hybrid video encoder or a video encoder according to a hybrid video codec.

[0098] For example, the residual calculation unit 204, the transform processing unit 206, the quantization unit 208, the prediction processing unit 260 and the entropy coding unit 270 form a forward signal path of the encoder 20, while the inverse quantization unit 210, the inverse transform processing unit 212, the reconstruction unit 214, the buffer 216, the loop filter 220, the decoded picture buffer (DPB) 230, and the prediction processing unit 260 form a reverse signal path of the encoder, wherein the reverse signal path of the encoder is similar to that of the decoder (see Figure 3 The signal path of the decoder 30) corresponds to that in FIG.

[0099] The encoder 20 is used to receive a picture 201 or a block 203 of the picture 201 (e.g., a picture of a picture sequence forming a video or a video sequence) through an input terminal 202 or the like. The picture block 203 may also be referred to as a current picture block or a picture block to be decoded, and the picture 201 may also be referred to as a current picture or a picture to be decoded (particularly in video decoding, in order to distinguish the current picture from other pictures (e.g., previously encoded and / or decoded pictures of the same video sequence (i.e., a video sequence also including the current picture))).

[0100] The prediction processing unit 260 (also referred to as the block prediction processing unit 260) is used to: receive or obtain block 203 (current block 203 of the current image 201) and reconstructed image data, for example, reference pixel points of the same (current) image from the buffer 216 and / or reference image data 231 of one or more previously decoded images from the decoded image buffer 230, and process such data for prediction, i.e., provide a prediction block 265, wherein the prediction block 265 can be an inter-frame prediction block 245 or an intra-frame prediction block 255.

[0101] The mode selection unit 262 may be used to select a prediction mode (eg, intra prediction or inter prediction mode) and / or a corresponding prediction block 245 or 255 to be used as the prediction block 265 for calculating the residual block 205 and reconstructing the reconstructed block 215 .

[0102] Embodiments of the mode selection unit 262 may be used to select a prediction mode (e.g., from prediction modes supported by the prediction processing unit 260) that provides the best match or minimum residual (minimum residual means better compression in transmission or storage), or provides minimum signaling overhead (minimum signaling overhead means better compression in transmission or storage), or both. The mode selection unit 262 may be used to determine the prediction mode based on rate distortion optimization (RDO), i.e., select a prediction mode that provides minimum rate distortion optimization, or select a prediction mode that at least satisfies the relevant rate distortion of the prediction mode selection criteria.

[0103] The intra-prediction unit 254 is further configured to determine an intra-prediction block 255 based on the intra-prediction parameters (e.g., the selected intra-prediction mode). In any case, after selecting the intra-prediction mode for the block, the intra-prediction unit 254 is further configured to provide the intra-prediction parameters, i.e., information indicating the selected intra-prediction mode for the block, to the entropy encoding unit 270. In one example, the intra-prediction unit 254 can be used to perform any combination of the intra-prediction techniques described below.

[0104] Figure 3 1 is an exemplary video decoder 30 for implementing the technology of the present application. The video decoder 30 is used to receive the encoded image data (e.g., the encoded code stream) 21 encoded by the encoder 100, for example, to obtain a decoded image 131. In the decoding process, the video decoder 30 receives video data from the video encoder 100, such as the encoded video code stream representing the image blocks of the encoded video slice (slice) and the associated syntax elements.

[0105] exist Figure 3 In the example of , decoder 30 includes entropy decoding unit 304, inverse quantization unit 310, inverse transform processing unit 312, reconstruction unit 314 (e.g., summer 314), buffer 316, loop filter 320, decoded image buffer 330, and prediction processing unit 360. Prediction processing unit 360 may include inter-frame prediction unit 344, intra-frame prediction unit 354, and mode selection unit 362. In some examples, video decoder 30 may perform operations generally related to Figure 2 The decoding process of the video encoder 100 is the reverse of the encoding process described above.

[0106] The entropy decoding unit 304 is used to perform entropy decoding on the encoded image data 21 to obtain quantization coefficients 309 and / or encoded decoding parameters ( Figure 3 The entropy decoding unit 304 is further configured to forward the inter-frame prediction parameters, intra-frame prediction parameters and / or other syntax elements to the prediction processing unit 360. The video decoder 30 may receive syntax elements at the video slice level and / or the video block level.

[0107] The function of the inverse quantization unit 310 may be the same as that of the inverse quantization unit 110; the function of the inverse transform processing unit 312 may be the same as that of the inverse transform processing unit 112; the function of the reconstruction unit 314 may be the same as that of the reconstruction unit 114; the function of the buffer 316 may be the same as that of the buffer 116; the function of the loop filter 320 may be the same as that of the loop filter 120; and the function of the decoded image buffer 330 may be the same as that of the decoded image buffer 130.

[0108] The prediction processing unit 360 may include an inter-frame prediction unit 344 and an intra-frame prediction unit 354, wherein the function of the inter-frame prediction unit 344 may be similar to that of the inter-frame prediction unit 144, and the function of the intra-frame prediction unit 354 may be similar to that of the intra-frame prediction unit 154. The prediction processing unit 360 is generally used to perform block prediction and / or obtain a prediction block 365 according to the encoded data 21, and to receive or obtain (explicitly or implicitly) prediction-related parameters and / or information about the selected prediction mode from the entropy decoding unit 304, etc.

[0109] When the video slice is decoded as an intra-coded (I) slice, the intra-prediction unit 354 of the prediction processing unit 360 is used to generate a prediction block 365 for the image block of the current video slice based on the indicated intra-prediction mode and data from a previously decoded block of the current frame or image. When the video frame is decoded as an inter-coded (i.e., B or P) slice, the inter-prediction unit 344 (e.g., motion compensation unit) of the prediction processing unit 360 is used to generate the prediction block 365 for the video block of the current video slice based on the motion vector and other syntax elements received from the entropy decoding unit 304. For inter-prediction, these prediction blocks may be generated from one of the reference pictures in one of the reference picture lists. The video decoder 30 may construct the reference frames, list 0 and list 1, using a default construction technique based on the reference pictures stored in the DPB 330.

[0110] The prediction processing unit 360 is used to determine the prediction information of the video block of the current video slice by parsing the motion vector and other syntax elements, and use the prediction information to generate a prediction block for the decoded current video block. For example, the prediction processing unit 360 uses some received syntax elements to determine the prediction mode (e.g., intra prediction or inter prediction) for decoding the video block of the video slice, the inter prediction slice type (e.g., B slice, P slice or GPB slice), the construction information of one or more reference picture lists of the slice, the motion vector of each inter-frame coded video block of the slice, the inter-frame prediction state of each inter-frame decoded video block of the slice, and other information to decode the video block in the current video slice.

[0111] The inverse quantization unit 310 is used to inverse quantize, i.e., dequantize, the quantized transform coefficients provided in the bitstream and decoded by the entropy decoding unit 304. The inverse quantization process may include using the quantization parameter calculated by the video encoder 100 for each video block in the video slice to determine the degree of quantization, and similarly determine the degree of inverse quantization that needs to be applied.

[0112] The inverse transform processing unit 312 is used to apply an inverse transform, such as an inverse DCT, an inverse integer transform, or a conceptually similar inverse transform process, to the transform coefficients to generate a residual block in the pixel domain.

[0113] The reconstruction unit 314 (e.g., the summer 314) is used to add the inverse transform block 313 (i.e., the reconstructed residual block 313) to the prediction block 365 by adding the pixel point values ​​of the reconstructed residual block 313 and the pixel point values ​​of the prediction block 365, etc., to obtain the reconstructed block 315 in the pixel point domain.

[0114] The loop filter unit 320 (in the decoding loop or after the decoding loop) is used to filter the reconstructed block 315 to obtain a filtered block 321, for example, to smooth pixel transitions or otherwise improve video quality. In one example, the loop filter unit 320 can be used to perform any combination of the filtering techniques described below. The loop filter unit 320 is used to represent one or more loop filters, such as a deblocking filter, a sample-adaptive offset (SAO) filter, or other filters, such as a bilateral filter or an adaptive loop filter (ALF) or a sharpening or smoothing filter or a collaborative filter. Although the loop filter unit 320 is in Figure 3 3. Although shown as a loop filter in FIG. 3, in other configurations, the loop filter unit 320 may be implemented as a post-loop filter.

[0115] The decoded video blocks 321 in a given frame or picture are then stored in a decoded picture buffer 330, which stores reference pictures for subsequent motion compensation.

[0116] The decoder 30 is used to output the decoded image 331 through the output terminal 332, etc., to present it to the user or for the user to watch.

[0117] Other forms of video decoders 30 may be used to decode the compressed code stream. For example, the decoder 30 may generate an output video stream without the loop filter unit 320. For example, a non-transform based decoder 30 may directly dequantize the residual signal of certain blocks or frames without the inverse transform processing unit 312. In another implementation, the video decoder 30 may have the dequantization unit 310 and the inverse transform processing unit 312 combined into a single unit.

[0118] like Figure 4A and Figure 4B As shown, the latest version of JEM has some modes corresponding to oblique intra prediction directions. For any of these modes, if the corresponding position within the block edge is a fraction, interpolation of a set of adjacent reference pixels should be performed to predict the pixel within the block. HEVC and VVC use linear interpolation between two adjacent reference pixels. JEM uses a more complex 4-tap interpolation filter. Depending on the width value or the height value, a Gaussian filter coefficient or a cubic filter coefficient is selected. The decision to use width or height is consistent with the decision to select the main reference edge: when the intra prediction mode is greater than or equal to the diagonal mode, the top edge of the reference pixel is selected as the main reference edge, and the width value is selected to determine the interpolation filter being used. Otherwise, the main reference edge is selected from the left side of the block, and the height value is used to control the filter selection process. Specifically, if the length of the selected edge is less than or equal to 8 pixels, a 4-tap cubic interpolation filter is used. Otherwise, the interpolation filter is a 4-tap Gaussian filter.

[0119] Figure 4A An example of 67 intra prediction modes proposed for VVC is shown, and multiple intra prediction modes of the 67 intra prediction modes include: a plane mode (indexed by 0), a DC mode (indexed by 1), and an angle mode (indexed by 2 to 66), wherein, Figure 4A The lower left angle mode in refers to index 2, and the indexes are numbered incrementally until index 66 corresponds to Figure 4A The upper right angle mode is as follows. Figure 4B As shown, the latest version of VVC has some modes corresponding to oblique intra prediction directions, including a wide-angle mode (shown as a dotted line). For any of these modes, if the corresponding position within the block edge is a fraction, an interpolation of a set of adjacent reference pixels should be performed to predict the pixel within the block.

[0120] The specific filter coefficients used in JEM are shown in Table 1. According to the sub-pixel offset and filter type, the predicted pixel point is calculated by performing a convolution operation using the coefficients selected from Table 1, as shown below:

[0121]

[0122] In this equation, “>>” indicates a bitwise right shift operation.

[0123] If a cubic filter is selected, the predicted pixels are further clipped to be within the allowed value range, which is defined in the SPS or derived from the bit depth of the selected component.

[0124] Table 1. Intra-frame prediction interpolation filters

[0125]

[0126]

[0127] The motion compensation process also uses filtering to predict pixel values ​​when the displacement of the pixels of the reference block is fractional. In JEM, 8-tap filtering is used for the luminance component and 4-tap filtering is used for the chrominance component. The motion interpolation filter is first applied horizontally, and the output of the horizontal filtering is further filtered vertically. The coefficients of the 4-tap chrominance filter are given in Table 2.

[0128] Table 2: Chroma motion interpolation filter coefficients

[0129]

[0130]

[0131] Advanced video decoding solutions also use different interpolation filters for intra-frame prediction and inter-frame prediction. Specifically, Figure 5-Figure 11 Different examples of interpolation filters are shown. For example, Figure 5 shows the interpolation filter used in JEM; Figure 6 The interpolation filter proposed for core experiment CE3-3.1.3 (JVET-K1023) is shown.

[0132] The lookup tables and hardware blocks of the chroma motion compensation sub-pixel filters used to interpolate pixel values ​​can be reused in the intra predictor if they are at fractional positions between reference pixels. Since the same hardware is expected to be used for inter prediction and intra prediction, the precision of the filter coefficients should be consistent, i.e., the number of bits representing the filter coefficients used for interpolation of intra reference pixels should be consistent with the coefficient precision of the motion sub-pixel motion compensation interpolation filter.

[0133] Fig.12 An embodiment of the present invention is shown. A 4-tap interpolation filter with 6-bit chroma coefficients (also called "unified intra / inter filter") can be used for two processes: interpolation of intra-prediction pixels and interpolation of inter-prediction pixels.

[0134] Fig.13 A specific embodiment using this design is shown in . In this implementation, the filtering module is implemented as a separate unit that participates in predicting chrominance pixels in motion compensation and predicting luma and chrominance pixels when performing intra prediction. In this implementation, the hardware filtering part is used for intra prediction and inter prediction processes.

[0135] Another embodiment shows an embodiment when only the LUT of filter coefficients is reused (see Fig.14). In this implementation, the hardware filtering module loads coefficients from a LUT stored in ROM. The switches shown in the intra prediction process determine the type of filter to be used depending on the main edge length selected for the intra prediction process.

[0136] A practical embodiment of the proposed application may use the following coefficients (see Table 3a and Table 3b).

[0137] Table 3a: Intra-frame and inter-frame interpolation filters

[0138]

[0139]

[0140]

[0141] Table 3b: Intra-frame and inter-frame interpolation filters

[0142]

[0143]

[0144] Depending on the sub-pixel offset and filter type, the intra-predicted pixel is calculated by performing a convolution operation using the coefficients selected from Table 3a or Table 3b as follows:

[0145]

[0146] In this equation, “>>” indicates a bitwise right shift operation.

[0147] If Unified Intra / Inter Filter is selected, the predicted pixels are further corrected to be within the allowed value range, which is defined in the SPS or derived from the bit depth of the selected component.

[0148] For intra-frame reference pixel interpolation and sub-pixel motion compensation interpolation, the same filters can be used to reuse hardware modules and reduce the overall required memory size.

[0149] In addition to the reused filter, the accuracy of the filter coefficients used for interpolation of reference pixels within the frame should be consistent with the accuracy of the above-mentioned reused filter coefficients.

[0150] The brightness processing in motion compensation does not necessarily use 8-tap filtering, but can also use 4-tap filtering. In this case, a 4-tap filter can be selected for unification.

[0151] The embodiments can be applied to different parts of the intra prediction process, which may involve interpolation. In particular, when extending the main reference pixels, the side reference pixels can also be filtered using a unified interpolation filter (see JVET-K0211 for details).

[0152] The intra-block copy operation also involves an interpolation step that can use the provided invention (for the description of intra-block copy, see [XiaozhongXu, Shan Liu, Tzu-Der Chuang, Yu-Wen Huang, Shawmin Lei, Krishnakanth Rapaka, Chao Pang, Vadim Seregin, Ye-Kui Wang, Marta Karczewicz: "Intra Block Copy in HEVC Screen Content Coding Extensions". IEEE J. Emerg. Sel. Topics Circuits Syst. 6(4): 409-419 (2016)]).

[0153] A method for aspect ratio dependent filtering for intra prediction is disclosed, the method comprising:

[0154] An interpolation filter is selected for the block to be predicted based on the aspect ratio of the block.

[0155] In one example, the selection of the interpolation filter depends on the direction of the intra prediction mode used for thresholding the block to be predicted.

[0156] In one example, the direction corresponds to the angle of the main diagonal of the block to be predicted.

[0157] In one example, the angle of the direction is calculated as:

[0158]

[0159] Among them, W and H are the width and height of the block to be predicted respectively.

[0160] In one example, where the aspect ratio

[0161] R A =log2(W)-log2(H), where W and H are the width and height of the block to be predicted respectively.

[0162] In one example, the angle of the main diagonal line of the block to be predicted is determined according to the aspect ratio.

[0163] In one example, the threshold of the intra prediction mode of the block is determined according to the angle of the main diagonal line of the block to be predicted.

[0164] In one example, the interpolation filter is selected according to which edge the used edge reference pixel belongs to.

[0165] In one example, a straight line with an angle corresponding to the intra direction divides the block into two regions.

[0166] In one example, different interpolation filters are used to predict reference pixels belonging to different regions.

[0167] In one example, the filter comprises a cubic interpolation filter or a Gaussian interpolation filter.

[0168] In one implementation of the present application, a frame is the same as an image.

[0169] In one implementation of the present application, the value corresponding to VER_IDX is 50; the value corresponding to HOR_IDX is 18; the value corresponding to VDIA_IDX is 66, which can be the maximum value among the values ​​corresponding to the angle mode; the value 2 corresponding to intra-frame mode 2 can be the minimum value among the values ​​corresponding to the angle mode; and the value corresponding to DIA_IDX is 34.

[0170] The present invention aims to improve the intra-frame mode indication scheme. The present invention provides a video decoding method and a video decoder.

[0171] In another aspect of the present application, a decoder including a processing circuit is disclosed for executing the above decoding method.

[0172] In another aspect of the present application, a computer program product is disclosed, which includes a program code for executing the above decoding method.

[0173] In another aspect of the present application, a decoder for decoding video data is disclosed, wherein the decoder includes: one or more processors; a non-transitory computer-readable storage medium, coupled to the processor and storing a program for execution by the processor, wherein when the processor executes the program, the decoder is configured to perform the above-mentioned decoding method.

[0174] The processing circuitry may be implemented in hardware or a combination of hardware and software, such as by a software programmable processor or the like.

[0175] The processing circuitry may be implemented in hardware or a combination of hardware and software, such as by a software programmable processor or the like.

[0176] H.264 / AVC and HEVC specify that a low-pass filter can be applied to reference pixels before being used in the intra prediction process. Whether to use a reference pixel filter is determined by the intra prediction mode and block size. This mechanism can be called Mode Dependent Intra Smoothing (MDIS). There are also multiple methods related to MDIS. For example, the Adaptive Reference Sample Smoothing (ARSS) method can indicate whether to filter the predicted pixels explicitly (i.e., the mark is included in the bitstream) or implicitly (i.e., for example, using data hiding to avoid putting the mark in the bitstream to reduce the indication overhead). In this case, the encoder can decide to smooth by testing the rate-distortion (RD) cost of all potential intra prediction modes.

[0177] like Figure 4A and Figure 4B As shown, the latest version of JEM (JEM-7.2) has some modes corresponding to oblique intra prediction directions. For any of these modes, if the corresponding position within the block edge is a fraction, interpolation of a set of adjacent reference pixels should be performed to predict the pixel within the block. HEVC and VVC use linear interpolation between two adjacent reference pixels. JEM uses a more complex 4-tap interpolation filter. Depending on the width value or the height value, a Gaussian filter coefficient or a cubic filter coefficient is selected. The decision to use width or height is consistent with the decision to select the main reference edge: when the intra prediction mode is greater than or equal to the diagonal mode, the top edge of the reference pixel is selected as the main reference edge, and the width value is selected to determine the interpolation filter being used. Otherwise, the main reference edge is selected from the left side of the block, and the height value is used to control the filter selection process. Specifically, if the length of the selected edge is less than or equal to 8 pixels, a 4-tap cubic interpolation filter is used. Otherwise, the interpolation filter is a 4-tap Gaussian filter.

[0178] exist Fig.15 Examples of interpolation filter selection for smaller and larger than diagonal modes (denoted as 45°) in the case of 32×4 blocks are shown in FIG.

[0179] In VVC, a segmentation mechanism based on quadtree and binary tree is used, called QTBT. Fig.16As shown in the figure, QTBT segmentation can provide not only square blocks but also rectangular blocks. Of course, compared with the traditional quadtree-based segmentation used in the HEVC / H.265 standard, QTBT segmentation will generate some indication overhead at the encoding end and increase the computational complexity at the encoder side. However, QTBT-based segmentation has better segmentation characteristics and is therefore more efficient than traditional quadtree segmentation in decoding.

[0180] However, VVC in its current state uses the same filter for both sides (left and top) of the reference pixel. The reference pixel filter is the same for both reference pixel sides, regardless of whether the block is vertically or horizontally oriented.

[0181] In this paper, the terms "vertical block" ("the vertical direction of the block") and "horizontal block" ("the horizontal direction of the block") are applied to the rectangular blocks generated by the QTBT framework. The meaning of these terms is the same as Fig.17 Same as shown.

[0182] The present invention proposes a mechanism for selecting different reference pixel filters so as to take into account the orientation of the block. Specifically, the width and height of the block are checked separately so as to apply different reference pixel filters to reference pixels located at different sides of the block to be predicted.

[0183] In the prior art overview, it was described that the selection of the interpolation filter is consistent with the decision of the primary reference edge selection. Both decisions are currently based on the comparison of the intra prediction mode with the diagonal (45 degree) direction.

[0184] However, it should be noted that this design has serious drawbacks for the extension block. Fig.18 It can be observed that even if the shorter side is selected as the primary reference according to the pattern comparison criterion, most of the predicted pixels will still be derived from the reference pixels of the longer side (shown as the dashed area).

[0185] The present invention provides for using an alternative direction to determine the threshold of the intra prediction mode in the interpolation filter selection process. Specifically, the direction corresponds to the angle of the main diagonal of the block to be predicted. For example, for blocks of size 32×4 and 4×32, the threshold mode mT for determining the reference pixel point filter is as follows: Fig.19 Definition shown.

[0186] The specific value of the threshold intra prediction angle can be calculated by the following formula:

[0187]

[0188] Where W and H are the block width and height respectively.

[0189] Another embodiment of the present invention is to use different interpolation filters, depending on which side the used reference pixel belongs to. Fig. 20 An example of such a determination is shown in .

[0190] The straight line with the angle corresponding to the intra-frame direction m divides the prediction block into two regions. Different interpolation filters are used to predict the pixels belonging to different regions.

[0191] Example value m T (for the intra prediction mode set defined in BMS1.0) and the corresponding angles are given in Table 4. The angle α is Figure 19-20 Given in.

[0192] Table 4.m T Example values ​​of (for the set of intra prediction modes defined in BMS1.0)

[0193]

[0194] Compared with the prior art and solutions, the present invention uses pixels predicted by different interpolation filters within a block, wherein the interpolation filter used to predict the pixel is selected according to the block shape, horizontal or vertical direction and intra-prediction mode angle.

[0195] The present invention can be applied in the reference pixel filtering stage. Specifically, the reference pixel smoothing filter can be determined using similar rules as those used in the interpolation filter selection process.

[0196] In addition to interpolation filtering, reference pixel filtering can also be applied to reference pixels immediately before predicting pixels in the intra predictor. The filtered reference pixels obtained after reference pixel filtering can be used to copy the filtered reference pixels to corresponding pixels in the intra predictor according to the selected direction of the intra prediction mode, or for further interpolation filtering. The following filters can be applied to reference pixels in this way:

[0197] Table 5. Exemplary reference pixel filtering

[0198] index Filter length Filter coefficient 0 1 [1], i.e., since no filtering is performed in this case, bypass mode applies 1 3 [1,2,1] 2 5 [2,3,6,3,2] 3 5 [1,4,6,4,1]

[0199] The results of the directional prediction can be combined with prediction results obtained by different means, including the following:

[0200] Boundary smoothing,

[0201] PDPC and simplified PDPC

[0202] In the case of boundary smoothing and PDPC, the first columns or rows of the prediction block are combined together with additional prediction signals generated from neighboring pixels.

[0203] Depending on the intra prediction mode, the specific implementation of simplified PDPC can be performed in different ways:

[0204] For planar, DC, HOR / VER intra prediction modes (in Figure 4A and Figure 4B , respectively, are represented as 0, 1, 18, and 50), perform the following steps:

[0205] The predicted pixel point P(x,y) at (x,y) is calculated as follows:

[0206] P(x,y)=(wL×R -1,y +wT×R x,-1 +wTL×R -1,-1 +(64-wl-wT-wTL)×P(x,y)+32)>>6

[0207] Among them, R x,–1 , R -1,y Represents the reference pixel located at the top and left of the current pixel (x, y), R -1,–1 Represents the reference pixel located at the upper left vertex of the current block. The DC mode weight is calculated as follows:

[0208] wT=32>>((y<<1)>>shift), wL=32>>((x<<1)>>shift), wTL=-(wL>>4)-(wT>>4), where

[0209] shift=(log2(width)+log2(height)+2)>>2.

[0210] For planar mode, wTL=0, while for horizontal mode, wTL=wT, and for vertical mode, wTL=wL. The DC mode PDPC weights (wL, wT, wTL) for the (0,0) and (1,0) positions within a 4x4 block are shown.

[0211] For diagonal mode (in Figure 4A and Figure 4B 2 and 66 in the Figure 4A or Figure 4B The following processing is performed:

[0212] Fig. 22 (a) shows the PDPC extended to the reference pixel R in the upper right diagonal pattern. x,-1 , R –1,y and R -1,-1The prediction pixel point pred(x',y') is located at (x',y') in the prediction block. The reference pixel point R x,–1 The coordinate x of is obtained by the following equation: x = x' + y' + 1, with reference to the pixel point R -1,y The coordinate y of is similarly obtained by the following equation: y=x'+y'+1.

[0213] The PDPC weights for the upper right diagonal pattern are:

[0214] wT=16>>((y'<<1)>>shift), wL=16>>((x'<<1)>>shift), wTL=0.

[0215] Similarly, Fig. 22 (b) shows the PDPC extended to the reference pixel R in the lower left diagonal pattern. x,–1 , R -1,y and R -1,-1 Definition of reference pixel R x,-1 The coordinate x of is obtained by the following equation: x = x' + y' + 1, with reference to the pixel point R –1,y The coordinate y is: y = x' + y' + 1. The PDPC weights of the upper right diagonal pattern are: wT = 16 >> ((y' << 1) >> shift), wL = 16 >> ((x' << 1) >> shift), wTL = 0. The adjacent upper right diagonal pattern is as follows Fig. 22 (c) shows that the PDPC weights of the adjacent upper right diagonal pattern are: wT = 32 >> ((y' << 1) >> shift), wL = 0, wTL = 0. Similarly, the adjacent lower left diagonal pattern is as follows Fig. 22 (d) is shown. The PDPC weights for the adjacent lower left diagonal pattern are: wL=32>>((x'<<1)>>shift), wT=0, wTL=0. The reference pixel coordinates for the last two cases are calculated using the table already used for angle mode intra prediction. If fractional reference pixel coordinates are calculated, linear interpolation of the reference pixels is used.

[0216] However, the processing (e.g., filtering) of the neighboring pixels used as the input process of the directional intra prediction side may be different from the processing of the neighboring pixels passed to the input process of PDPC or simplified PDPC. For example, the directional intra prediction may use filtered reference pixels, while PDPC or simplified PDPC uses unfiltered reference pixels. In particular, when the directional intra prediction mode is a wide angle mode (intraPredAngle, as given in Table X and further described) with integer pixel sub-pixel offsets, the reference pixels may be filtered, while PDPC uses unfiltered reference pixels.

[0217] In the case of simplified PDPC, the current implementation is as follows Fig.23 shown.

[0218] exist Fig.23 , a dashed box can represent one of the following:

[0219] Simplify the PDPC process;

[0220] PDPC process (e.g., as specified in JEM);

[0221] • Boundary smoothing (eg, as specified in HEVC).

[0222] Other methods using linear combinations to update intra prediction results

[0223] In all these cases, the process consists of an update step, i.e. a linear combination of the output of the intra prediction and an additional part generation step.

[0224] In a specific implementation, the steps of "reference pixel filtering #1" and intra prediction can be merged by convolving the subpixel interpolation filter coefficients with the reference pixel filter coefficients. However, for intra prediction modes with non-fractional displacement (when intraPredAngle is a multiple of 32), this merge is redundant because in this case, the filtering operation is performed for each predicted pixel instead of for each reference pixel, such as Fig.23 shown.

[0225] from Fig.23 As can be seen from the figure, the reference pixel can be filtered differently according to the specified intraPredMode. For example, the filter applied to the reference pixel can be determined according to Table X. Table X is represented as follows:

[0226] - "S" indicates that the decision depends on the block size. This size dependency is performed as follows: the block size parameter nTbS set to (log2(nTbW)+Log2(nTbH))>>1 is compared with a predetermined threshold T S For comparison. S In the case of , the same processing is applied to the value of "1" as described further. Otherwise, if nTbS≤T S , the same processing is applied to the value of "0" as further described. Where nTbW and nTbH represent the width and height of the prediction block, respectively, and ">>" represents a right shift operation. T S The value of may be set to 2 etc., or defined according to the intra prediction mode (e.g. as done in the case of MDIS for HEVC);

[0227] - "1" means enabling the processing. In case of reference pixel filtering, a value of "1" means that the reference pixel is processed by the [1 21] filter;

[0228] - "0" means that the processing is not enabled. In the case of reference pixel filtering, a value of "1" means that the reference pixel is processed by the [1] filter.

[0229] That is, no filtering is applied to the reference pixels.

[0230] Table X. Decisions on filtering reference pixels according to the direction intraPredMode (e.g. Figure 4B (shown)

[0231]

[0232] An object of an embodiment of the present invention is to unify the processing of reference pixels with the combination of the output of a directional prediction and an additional prediction signal for improving the visual quality of the predicted block. As a result of this unification, the reference pixels are processed only once and the result of this processing is reused by the directional intra prediction process and by generating additional predictions (see Fig.24 ).

[0233] It should be noted that in Fig.24 In the case shown in FIG. 1 , only one step of reference pixel filtering is required. Therefore, the filtering decision is made according to Table Y.

[0234] Table Y. Decisions on filtering reference pixels according to the direction intraPredMode (e.g. Figure 4B (shown)

[0235]

[0236] In the case of simplified PDPC, the additional part can be performed as specified in the VVC specification. The following representation is further used:

[0237] is the value of the inverse angle

[0238] Round(x)=Sign(x)*Floor(Abs(x)+0.5),

[0239]

[0240] Floor(x) is the largest integer less than or equal to x.

[0241] Log2(x) is the base 2 logarithm of x.

[0242] intraPredAngle is the angle parameter specified in Table X or Table Y,

[0243] A=C? B:D is a ternary assignment operation, where if condition C is true, A is equal to B. Otherwise, if condition C is false, A is equal to D.

[0244] INTRA_PLANAR is the planar intra prediction mode (),

[0245] INTRA_DC is the DC intra prediction mode,

[0246] INTRA_ANGULARXX is one of the directional intra prediction modes, where XX represents its number and corresponding direction, such as Figure 4B shown.

[0247] Given the above representation, the steps to simplify PDPC can be defined as follows:

[0248] The inputs to this process are:

[0249] - Intra prediction mode predModeIntra,

[0250] - variable nTbW, representing the transform block width,

[0251] - variable nTbH, representing the transform block height,

[0252] - The variable refW indicates the reference pixel width,

[0253] -Variable refH, represents the reference pixel height,

[0254] -Predicted pixel point predSamples[x][y], where x=0...nTbW-1, y=0...nTbH-1.

[0255] - Neighboring pixel points p[x][y], where x=-1, y=-1...refH-1, x=0...refW-1, y=-1.

[0256] -Variable cIdx, representing the color component of the current block.

[0257] The output of this process is the corrected predicted pixel points predSamples[x][y], where x=0...nTbW-1, y=0...nTbH-1.

[0258] Depending on the value of cIdx, the function clip1Cmp is set as follows:

[0259] - If cIdx is equal to 0, then clip1Cmp is equal to Clip1 Y .

[0260] - Otherwise, set clip1Cmp equal to Clip1 C .

[0261] The variable nScale is set to ((Log2(nTbW)+Log2(nTbH)-2)>2).

[0262] The reference pixel arrays mainRef[x] and sideRef[y] for x=0...refW-1 and y=0...refH-1 are derived as follows:

[0263] mainRef[x]=p[x][-1]

[0264] sideRef[y]=p[-1][y]

[0265] The variables refL[x][y], refT[x][y], wT[y], wL[x] and wTL[x][y], where x=0...nTbW-1 and y=0...nTbH-1, are derived as follows:

[0266] - When predModeIntra is equal to INTRA_PLANAR, INTRA_DC, INTRA_ANGULAR18, or INTRA_ANGULAR50, the following applies:

[0267] refL[x][y]=p[-1][y]

[0268] refT[x][y]=p[x][-1]

[0269] wT[y]=32>>((y<<1)>>nScale)

[0270] wL[x]=32>>((x<<1)>>nScale)

[0271] wTL[x][y]=(predModeIntra==INTRA_DC)? ((wL[x]>4)+(wT[y]>4)):0

[0272] - Otherwise, if predModeIntra is equal to INTRA_ANGULAR2 or INTRA_ANGULAR66, the following applies:

[0273] refL[x][y]=p[-1][x+y+1]

[0274] refT[x][y]=p[x+y+1][-1]

[0275] wT[y]=(32>>1)>>((y<<1)>>nScale)

[0276] wL[x]=(32>>1)>>((x<<1)>>nScale)

[0277] wTL[x][y]=0

[0278] - Otherwise, if predModeIntra is less than or equal to INTRA_ANGULAR10, the following sequential steps apply:

[0279] 1. The variables dXPos[y], dXFrac[y], dXInt[y], and dX[x][y] are derived using invAngle as follows:

[0280] dXPos[y]=((y+1)*invAngle+2)>>2

[0281] dXFrac[y]=dXPos[y]&63

[0282] dXInt[y]=dXPos[y]>>6

[0283] dX[x][y]=x+dXInt[y]

[0284] 2. The variables refL[x][y], refT[x][y], wT[y], wL[x], and wTL[x][y] are derived as follows:

[0285] refL[x][y]=0

[0286] refT[x][y]=(dX[x][y] <refW-1)?((64-dXFrac[y])*mainRef[dX[x][y]]+

[0287] dXFrac[y]*mainRef[dX[x][y]+1]+32)>>6

[0288] :0 (Equation 1)

[0289] wT[y]=(dX[x][y]<refW-1)?32> >((y<<1)>>nScale):0

[0290] wL[x]=0

[0291] wTL[x][y]=0

[0292] - Otherwise, if predModeIntra is greater than or equal to INTRA_ANGULAR58 (see Figure 4B), the following sequential steps apply:

[0293] 1. As specified below according to intraPredMode, the variables dYPos[x], dYFrac[x], dYInt[x], and dY[x][y] are derived using invAngle as follows:

[0294] dYPos[x]=((x+1)*invAngle+2)>>2

[0295] dYFrac[x]=dYPos[x]&63

[0296] dYInt[x]=dYPos[x]>>6

[0297] dY[x][y]=y+dYInt[x]

[0298] 2. The variables refL[x][y], refT[x][y], wT[y], wL[x], and wTL[x][y] are derived as follows:

[0299] refL[x][y]=(dY[x][y] <refH-1)?((64-dYFrac[x])*sideRef[dY[x][y]]+

[0300] dYFrac[x]*sideRef[dY[x][y]+1]+32)>>6

[0301] :0 (Equation 2)

[0302] refT[x][y]=0

[0303] wT[y]=0

[0304] wL[x]=(dY[x][y]<refH-1)?32> >((x<<1)>>nScale):0

[0305] wTL[x][y]=0

[0306] Otherwise, refL[x][y], refT[x][y], wT[y], wL[x], and wTL[x][y] are all set to 0.

[0307] The value of the modified predicted pixel point predSamples[x][y] is derived as follows, where x=0...nTbW-1 and y=0...nTbH-1:

[0308] predSamples[x][y]=clip1Cmp((refL[x][y]*wL[x]+refT[x][y]*wT[y]-

[0309] p[-1][-1]*wTL[x][y]+(64-wL[x]-wT[y]+

[0310] wTL[x][y])*predSamples[x][y]+32)>>6)

[0311] In the assignment equation 1, the above simplified PDPC can use nearest neighbor interpolation instead of linear interpolation:

[0312] refT[x][y]=(dX[x][y] <refW-1)?mainRef[dX[x][y]]:0

[0313] Similarly, the assignment equation 2 can also use nearest neighbor interpolation:

[0314] refL[x][y]=(dY[x][y] <refH-1)?SideRef[dY[x][y]]:0

[0315] Therefore, at the encoding and decoding ends, the proposed method uses the following data as input data:

[0316] Directional intra prediction mode (further denoted as predModeIntra, e.g. Figure 4A and Figure 4B (shown)

[0317] The block size parameter nTbS is set to (log2(nTbW)+Log2(nTbH))>>1, where nTbW and nTbH represent the width and height of the prediction block, respectively, and “>>” represents a right shift operation.

[0318] The following steps can be performed to implement the intra prediction method:

[0319] Step 1: Perform reference pixel filtering according to the reference pixel, intra prediction mode intraPredMode and / or block size (width and height).

[0320] Step 2: According to intraPredAngle, perform directional intra prediction based on the processed (filtered or unfiltered) reference pixels (the result of step 1).

[0321] Step 3: Update the result obtained in step 2 using the joint prediction, which can be

[0322] PDPC;

[0323] Simplify PDPC

[0324] Among them, the input reference pixel points used in step 3 are the same as the reference pixel points of the integer slope wide-angle mode (for example: -14, -12, -10, -6, 72, 76, 78, 80, as shown in Tables 6 and 7 below) obtained in step 1 and used in step 2.

[0325] Reference pixel filtering can include:

[0326] According to predModeIntra, determine whether a filtered reference pixel buffer or an unfiltered reference pixel buffer should be used. This can be performed by applying one of the filters listed in Table 5. In VVC, filters with indexes 0 and 1 are used. For example, when predMode is equal to 2, 34, or 66 and nTbS>2, the reference pixels are filtered (using the filter index "1" in Table 5).

[0327] An alternative embodiment of the above method is to use an angle parameter (further denoted as intraPredAngle) in this step instead of the intra prediction mode predModeIntra (also spelled as IntraPredMode). In this case, if the value of intraPredAngle is a multiple of 32 and when nTbS>2, the reference pixel is filtered (using filter index "1" of Table 5).

[0328] Modifications to the VVC specification that enable the use of the proposed method may include replacing “neighboring pixel point p[x][y]” with “reference pixel point p[x][y]” in the section describing simplified PDPC.

[0329] The angle parameter intraPredAngle represents the sub-pixel offset between two adjacent rows of predicted pixels in a fixed-point representation with a fractional part length equal to 5 bits. This parameter can be derived from the intra prediction mode, and intraPredAngle is derived from predModeIntra. An exemplary derivation of intraPredAngle from predModeIntra can be defined by a LUT, for example, as shown in Table 8.

[0330] Table 8. Example LUT for deriving intraPredAngle from predModeIntra

[0331]

[0332]

[0333] For example, it should be understood that what is described about a method is also applicable to a corresponding device or system for performing the method, and vice versa. For example, if a specific method step is described, the corresponding device may include a unit for performing the described method step, even if such a unit is not elaborated or illustrated in detail in the figure. In addition, it should be understood that the features of the various exemplary aspects described herein may be combined with each other unless otherwise specifically stated.

[0334] Video decoding generally refers to the processing of a sequence of images of a video or video sequence. The terms "picture / image" or "frame" may be used synonymously in the field of video decoding and in this application. Each image is typically divided into a set of non-overlapping blocks. The encoding / decoding of an image is typically performed at the block level, for example, at the block level, a prediction block is generated using inter-frame prediction or intra-frame prediction to subtract the prediction block from the current block (currently processed block / block to be processed) to obtain a residual block, which is further transformed and quantized to reduce the amount of data to be transmitted (compressed), and at the decoding end, the encoded / compressed block is inversely processed to reconstruct the block for representation.

[0335] The present application also provides the following embodiments:

[0336] Embodiment 1. An intra-frame prediction method, the method comprising:

[0337] Process reference pixels;

[0338] According to the intra-frame prediction, performing directional intra-frame prediction according to the processed reference pixel points;

[0339] Additional prediction is performed based on the processed reference pixels.

[0340] Embodiment 2. The method according to embodiment 1, wherein the processing of reference pixels includes reference pixel filtering or sub-pixel interpolation filtering.

[0341] Embodiment 3. The method according to embodiment 1, wherein the directional intra prediction mode belongs to at least one of the following groups:

[0342] A. Vertical mode or horizontal mode,

[0343] B. Diagonal mode, indicating angles that are multiples of 45 degrees,

[0344] C. Other direction modes.

[0345] Embodiment 4: According to the method described in Embodiment 3, when the directional intra prediction mode is classified as belonging to group A, no filter is applied to the reference pixel points to generate the intra prediction value.

[0346] Embodiment 5. According to the method described in Embodiment 3, when the directional mode belongs to group B, a reference pixel point filter is applied to the reference pixel point to copy the filtered value to the intra-frame predictor according to the selected direction (without applying the interpolation filter).

[0347] Example 6. According to the method described in Example 3, when the directional mode is classified as belonging to group C, only the intra-frame reference pixel interpolation filter is applied to the reference pixel to generate a predicted pixel that falls into a fractional or integer position between the reference pixels according to the selected direction (reference pixel filtering is not performed).

[0348] Embodiment 7. A method according to any one of embodiments 1 to 6, wherein reference pixel filtering is performed based on at least one of the following: reference pixel, intra prediction mode (IntraPredMode) or block size parameter.

[0349] Embodiment 8. The method according to embodiment 7, wherein the processed reference pixel points include filtered reference pixel points or unfiltered reference pixel points.

[0350] Embodiment 9. The method according to embodiment 7, wherein the method further comprises:

[0351] Determine whether to use the filtered reference pixel buffer or the unfiltered reference pixel buffer according to predModeIntra.

[0352] Embodiment 10. The method according to embodiment 9 uses a filter with index 0 or 1.

[0353] Embodiment 11. According to the method described in Embodiment 9, when predMode is equal to 2, 34 or 66 and when nTbS>2, the reference pixel points are filtered (using the filter index "1" in Table 5).

[0354] Embodiment 12. The method according to embodiment 7, wherein the method further comprises:

[0355] Whether to use a filtered reference pixel buffer or an unfiltered reference pixel buffer is determined according to a block size parameter, wherein the block size parameter is an angle parameter (intraPredAngle).

[0356] Embodiment 13. According to the method described in Embodiment 12, if the value of intraPredAngle is a multiple of 32 and when nTbS>2, the reference pixel point is filtered (using the filter index "1" in Table 5).

[0357] Embodiment 14. The method according to any one of embodiments 1 to 13, wherein the additional prediction is a position-dependent joint prediction (Position-Dependent Prediction Combination, PDPC) or a simplified PDPC.

[0358] Embodiment 15. The method according to any one of embodiments 1 to 14, wherein intra prediction and additional prediction are performed in parallel.

[0359] Embodiment 16. A method according to any one of embodiments 1 to 15, wherein directional intra-frame prediction includes integer slope wide-angle mode (e.g., -14, -12, -10, -6, 72, 76, 78, 80, as shown in Tables X and Y).

[0360] A decoder or encoder comprises a processing circuit for executing the above method.

[0361] In the present invention, a computer program product is disclosed, wherein the computer program product comprises a program code for executing the above method.

[0362] In the present invention, a decoder for decoding video data is disclosed, the decoder comprising: one or more processors; a non-transitory computer-readable storage medium coupled to the processor and storing a program for execution by the processor, wherein when the processor executes the program, the decoder is configured to execute the above method.

[0363] Fig.25 is a block diagram of an example structure of an apparatus 2500 for performing intra-frame prediction on a current image block in a current image of a video; in one example, the apparatus 2500 may correspond to Figure 2 In another example, the apparatus 2500 may correspond to the intra-frame prediction unit 254 in Figure 3 The intra-frame prediction unit 354 in the apparatus 2500 is used to perform the above method, which may include:

[0364] The acquisition unit 2502 is used to acquire the intra-frame prediction mode of the block; the wide-angle prediction unit 2504 is used to obtain the predicted pixel points of the block through the filtered reference pixel points when the intra-frame prediction mode of the block is the wide-angle mode.

[0365] The apparatus 2500 may further include a determination unit ( Fig.25 (not shown) is used to determine whether the intra-frame prediction mode of the block is the wide-angle mode.

[0366] Fig.26 1 is a block diagram of an apparatus 1500 that can be used to implement various embodiments. The apparatus 1500 can be Figure 1 The source device 102 shown, or Figure 2 The video encoder 200 shown, or Figure 1 The destination device 104 shown, or Figure 3 The video decoder 300 shown. In addition, the device 1500 may include one or more of the described elements. In some embodiments, the device 1500 is equipped with one or more input / output devices, such as a speaker, a microphone, a mouse, a touch screen, a keypad, a keyboard, a printer, a display, etc. The device 1500 may include one or more central processing units (CPUs) 1510, a memory 1520, a mass storage 1530, a video adapter 1540, and an I / O interface 1560 connected to a bus. The bus is one or more of any type of several bus architectures, including a memory bus or a memory controller, a peripheral bus, a video bus, etc.

[0367] CPU 1510 may have any type of electronic data processor. Memory 1520 may have or may be any type of system memory, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous DRAM (SDRAM), read-only memory (ROM), combinations thereof, etc. In one embodiment, memory 1520 may include ROM used at boot time and DRAM used to store programs and data when executing programs. In an embodiment, memory 1520 is a non-transient memory. Mass storage 1530 includes any type of storage device that stores data, programs, and other information and enables data, programs, and other information to be accessed through a bus. For example, mass storage 1530 includes one or more of a solid state drive, a hard disk drive, a magnetic disk drive, an optical disk drive, and the like.

[0368] Video adapter 1540 and I / O interface 1560 provide interfaces to couple external input and output devices to apparatus 1500. For example, apparatus 1500 may provide a SQL command interface to a client. As shown, examples of input and output devices include any combination of a display 1590 coupled to video adapter 1540 and a mouse / keyboard / printer 1570 coupled to I / O interface 1560. Other devices may be coupled to apparatus 1500, and additional or fewer interface cards may be used. For example, a serial interface card (not shown) may be used to provide a serial interface for a printer.

[0369] The device 1500 also includes one or more network interfaces 1550, or one or more networks 1580, wherein the network interface 1550 includes a wired link such as an Ethernet cable, and / or a wireless link for accessing a node. The network interface 1550 enables the device 1500 to communicate with a remote unit through the network 1580. For example, the network interface 1550 can provide communication with a database. In one embodiment, the device 1500 is coupled to a local area network or a wide area network for data processing and communication with remote devices such as other processing units, the Internet, remote storage facilities, etc.

[0370] The following describes the encoding method and decoding method shown in the above-mentioned embodiments and applications of a system using these methods.

[0371] Fig. 27 A block diagram of a content supply system 3100 for implementing a content distribution service. The content supply system 3100 includes a capture device 3102, a terminal device 3106, and an (optional) display 3126. The capture device 3102 communicates with the terminal device 3106 via a communication link 3104. The communication link may include the above-mentioned communication channel 13. The communication link 3104 includes, but is not limited to, WIFI, Ethernet, wired, wireless (3G / 4G / 5G), USB, or any combination thereof.

[0372] Capture device 3102 generates data, and can use the coding method shown in the above embodiment to encode the data. Alternatively, capture device 3102 can distribute data to a streaming media server (not shown in the figure), which encodes the data and sends the encoded data to terminal device 3106. Capture device 3102 includes but is not limited to a camera, a smart phone or a tablet computer, a computer or a laptop computer, a video conferencing system, a PDA, a vehicle-mounted device or any combination thereof. For example, capture device 3102 may include the above-mentioned source device 12. When data includes video, the video encoder 20 included in capture device 3102 can actually perform video encoding processing. When data includes audio (i.e., sound), the audio encoder included in capture device 3102 can actually perform audio encoding processing. In some actual scenarios, capture device 3102 distributes encoded video data and encoded audio data by multiplexing the encoded video data and the encoded audio data together. In other actual scenarios, for example, in a video conferencing system, the encoded audio data and the encoded video data are not multiplexed. Capture device 3102 distributes the encoded audio data and the encoded video data to terminal device 3106 respectively.

[0373] The terminal device 310 in the content supply system 3100 receives and reproduces the encoded data. The terminal device 3106 can be a device with data reception and recovery capabilities, such as a smart phone or tablet computer 3108, a computer or laptop computer 3110, a network video recorder (NVR) / digital video recorder (DVR) 3112, a TV 3114, a set top box (STB) 3116, a video conferencing system 3118, a video surveillance system 3120, a personal digital assistant (PDA) 3122, a vehicle-mounted device 3124 or any combination thereof, or such a device capable of decoding the above-mentioned encoded data. For example, the terminal device 3106 can include the above-mentioned destination device 14. When the encoded data includes video, the video decoder 30 included in the terminal device prioritizes video decoding. When the encoded data includes audio, the audio decoder included in the terminal device prioritizes audio decoding processing.

[0374] For a terminal device with a display, such as a smartphone or tablet 3108, a computer or laptop 3110, a network video recorder (NVR) / digital video recorder (DVR) 3112, a TV 3114, a personal digital assistant (PDA) 3122, or a vehicle-mounted device 3124, the terminal device can feed the decoded data to its display. For a terminal device without a display, such as an STB 3116, a video conferencing system 3118, or a video surveillance system 3120, an external display 3126 is connected to the terminal device to receive and display the decoded data.

[0375] When each device in the system performs encoding or decoding, the image encoding device or image decoding device shown in the above embodiments may be used.

[0376] Fig.2831 is a schematic diagram showing an example structure of the terminal device 3106. After the terminal device 3106 receives the stream from the capture device 3102, the protocol processing unit 3202 analyzes the transmission protocol of the stream. The protocol includes but is not limited to Real Time Streaming Protocol (RTSP), Hyper Text Transfer Protocol (HTTP), HTTP Live streaming protocol (HLS), MPEG-DASH, Real-time Transport Protocol (RTP), Real Time Messaging Protocol (RTMP) or any combination thereof.

[0377] After the protocol processing unit 3202 processes the stream, a stream file is generated. The file is output to the demultiplexing unit 3204. The demultiplexing unit 3204 can separate the multiplexed data into coded audio data and coded video data. As mentioned above, in some actual scenarios, such as in a video conferencing system, the coded audio data and the coded video data are not multiplexed. In this case, the coded data is not transmitted to the video decoder 3206 and the audio decoder 3208 by the demultiplexing unit 3204.

[0378] Through the demultiplexing process, a video elementary stream (ES), an audio ES, and optional subtitles are generated. The video decoder 3206, including the video decoder 30 explained in the above embodiment, decodes the video ES to generate a video frame by the decoding method shown in the above embodiment, and feeds the data to the synchronization unit 3212. The audio decoder 3208 decodes the audio ES to generate an audio frame, and feeds the data to the synchronization unit 3212. Alternatively, the video frame can be stored in a buffer (not shown in Figure Y) before being fed to the synchronization unit 3212. Similarly, the audio frame can be stored in a buffer (not shown in Figure Y) before being sent to the synchronization unit 3212.

[0379] The synchronization unit 3212 synchronizes the video frames and the audio frames and supplies the video / audio to the video / audio display 3214. For example, the synchronization unit 3212 synchronizes the presentation of the video and audio information. The information may be decoded in the syntax using timestamps associated with the presentation of the decoded audio and visual data and timestamps associated with the transmission of the data stream.

[0380] If subtitles are included in the stream, the subtitle decoder 3210 decodes the subtitles, synchronizes the subtitles with the video frames and the audio frames, and provides the video / audio / subtitles to the video / audio / subtitle display 3216.

[0381] The present invention is not limited to the above-mentioned system, and the image encoding device or the image decoding device in the above-mentioned embodiments may be included in other systems such as automobile systems.

[0382] The subject matter and operations described in the present invention may be implemented in digital electronic circuits, or in computer software, firmware or hardware, including in the structures disclosed in the present invention and their structural equivalents, or in a combination of one or more thereof. The subject matter described in the present invention may be implemented as one or more computer programs, i.e., one or more modules of computer program instructions, which are encoded on a computer storage medium to be executed by a data processing device or to control the operation of a data processing device. Alternatively or additionally, the program instructions may be encoded on an artificially generated propagation signal (e.g., a machine-generated electrical, optical or electromagnetic signal), which is generated to encode information for transmission to a suitable receiver device for execution by a data processing device. A computer storage medium, such as a computer-readable medium, may be or be contained in a computer-readable storage device, a computer-readable storage substrate, a random or serial access storage array or device, or a combination of one or more thereof. In addition, although a computer storage medium is not a propagation signal, a computer storage medium may be a source or target of computer program instructions encoded into an artificially generated propagation signal. The computer storage medium may also be or be contained in one or more separate physical and / or non-transient components or media (e.g., multiple CDs, disks or other storage devices).

[0383] In some implementations, the operations described in the present invention may be implemented as a hosted service provided on a server in a cloud computing network. For example, computer-readable storage media may be logically grouped and accessed within a cloud computing network. Servers in a cloud computing network may include a cloud computing platform for providing cloud services. The terms "cloud," "cloud computing," and "cloud-based" may be used interchangeably as appropriate without departing from the scope of the present invention. A cloud service may be a hosted service that is provided by a server and transmitted to a client platform over a network to enhance, supplement, or replace an application program executed locally on a client computer. The circuit may use a cloud service to quickly receive software upgrades, applications, and other resources that would otherwise take a long time to be transmitted to the circuit.

[0384] A computer program (also referred to as a program, software, software application, script, or code) may be written in any form of programming language, including compiled or interpreted languages, declarative languages, or procedural languages, and may be deployed in any form, for example, as a stand-alone program or as a module, component, subroutine, object, or other unit suitable for use in a computing environment. A computer program may (but need not) correspond to a file in a file system. A program may be stored in a portion of a file that includes other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to a related program, or in multiple coordinated files (e.g., files storing one or more modules, subroutines, or portions of code). A computer program may be deployed for execution on a single computer, or on multiple computers located at a single site or distributed across multiple sites and interconnected by a communications network.

[0385] The processes and logic flows described in the present invention may be performed by one or more programmable processors executing one or more computer programs to perform actions by operating on input data and generating outputs. The processes and logic flows may also be performed by, and the apparatus may be implemented as, a dedicated logic circuit such as a field programmable gate array (FPGA) or an application-specific integrated circuit (ASIC).

[0386] For example, processors suitable for executing computer programs include general and special microprocessors, and any one or more processors of any type of digital computer. Typically, the processor will receive instructions and data from a read-only memory or a random access memory or both. The basic elements of a computer are a processor for performing actions according to instructions and one or more storage devices for storing instructions and data. Typically, the computer also includes one or more large-capacity storage devices (such as magnetic disks, magneto-optical disks, or optical disks) for storing data, or is operably coupled to one or more large-capacity storage devices for storing data to receive data from the large-capacity storage device and / or to transmit data to the large-capacity storage device. However, the computer does not have to have such a device. In addition, the computer can be embedded in other devices, such as mobile phones, personal digital assistants (personal digital assistants, PDAs), mobile audio or video players, game consoles, global positioning system (Global Positioning System, GPS) receivers or portable storage devices (for example, universal serial bus (universal serial bus, USB) flash drives), etc. Devices suitable for storing computer program instructions and data include various forms of nonvolatile memory, media and storage devices, including, for example, semiconductor memory devices such as EPROM, EEPROM and flash memory devices; magnetic disks such as internal or removable hard disks; magneto-optical disks; and CD-ROM and DVD-ROM disks. The processor and memory may be supplemented by, or incorporated in, special purpose logic circuitry.

[0387] Although the present invention includes details of many specific implementations, these should not limit the scope of any implementation or the scope required, but should be used as a description of the features of a specific implementation for a specific implementation. In the context of separate implementations, certain features described in the present invention may also be implemented in combination in a single implementation. Conversely, various features described in the context of a single implementation may also be implemented separately in multiple implementations or in any suitable sub-combination. In addition, although features may be described above as being implemented in certain combinations, or even initially claimed, in some cases, one or more features in the combination may be removed from the claimed combination, and the claimed combination may be directed to a sub-combination or a variation of the sub-combination.

[0388] Likewise, although the drawings depict operations in a particular order, this should not be construed as requiring that the operations be performed in the particular order shown or in sequence, or that all of the operations shown be performed to achieve the desired result. In some cases, multitasking and parallel processing may be performed. In addition, the separation of various system components in the above implementations should not be construed as requiring such separation in all implementations. It should be understood that the described program components and systems may generally be integrated together into a single software product or packaged into multiple software products.

[0389] Thus, specific implementations of the subject matter have been described. Other implementations are within the scope of the following claims. In some cases, the actions recited in the claims may be performed in a different order and still achieve the desired results. Furthermore, the processes depicted in the accompanying drawings do not necessarily require that they be performed in the particular order shown or in a sequential order in order to achieve the desired results. In some implementations, multitasking and parallel processing may be performed.

[0390] Although several embodiments have been provided in the present invention, it should be understood that the disclosed systems and methods may be embodied in a variety of other specific forms without departing from the spirit or scope of the present invention. The present examples should be considered illustrative rather than restrictive, and the present invention is not limited to the details given herein. For example, various elements or components may be combined or integrated in another system, or certain features may be omitted or not implemented.

[0391] In addition, without departing from the scope of the present invention, the techniques, systems, subsystems and methods described and illustrated as independent or separate in various embodiments may be combined or integrated with other systems, modules, techniques or methods. Other items shown or described as coupled to each other, or directly coupled, or communicating with each other may be indirectly coupled or communicated with each other electrically, mechanically, etc. through some interface, device or intermediate component. Other examples of changes, substitutions and modifications may be determined by those skilled in the art and may be exemplified without departing from the spirit and scope disclosed herein.

Claims

1. A method for performing intra-frame prediction on a block, characterized in that: The method comprises: Obtaining an intra prediction mode of the block; When the intra prediction mode of the block is the wide-angle mode, the prediction pixels of the block are obtained by using filtered reference samples without applying an interpolation filter.

2. The method according to claim 1, characterized in that: The wide-angle mode is at least one of the following: -14、-12、-10、-6、72、76、78、80。 3. The method according to claim 1 or 2, characterized in that: The filter used to filter the reference pixel is defined by the following coefficients: [1, 2, 1] / 4.

4. The method according to any one of claims 1 to 3, characterized in that The method further comprises: Whether to use a filtered reference pixel buffer or an unfiltered reference pixel buffer is determined according to whether the intra prediction mode of the block is a wide-angle mode.

5. The method according to any one of claims 1 to 4, characterized in that Position-Dependent Prediction Combination (PDPC) is performed on reference pixels and the predicted pixels of the block obtained through the reference pixels, wherein the reference pixels are reference pixels that are filtered or unfiltered according to whether the intra-frame prediction mode of the block is a wide-angle mode.

6. The method according to any one of claims 1 to 5, characterized in that The filter includes a unified intra / inter filter or a Gaussian filter.

7. The method according to any one of claims 1 to 6, characterized in that The method further comprises: It is determined whether the intra prediction mode of the block is a wide mode.

8. A device for performing intra-frame prediction on a block, characterized in that The device comprises: A memory for storing instructions; A processor is coupled to the memory and configured to obtain an intra-frame prediction mode of the block, and when the intra-frame prediction mode of the block is a wide-angle mode, obtain the prediction pixel points of the block by using filtered reference samples without applying an interpolation filter.

9. The device according to claim 8, characterized in that The wide-angle mode is at least one of the following: -14、-12、-10、-6、72、76、78、80。 10. The device according to claim 8 or 9, characterized in that The filter used to filter the reference pixel is defined by the following coefficients: [1, 2, 1] / 4.

11. The device according to any one of claims 8 to 10, characterized in that The processor is further configured to: Whether to use a filtered reference pixel buffer or an unfiltered reference pixel buffer is determined according to whether the intra prediction mode of the block is a wide-angle mode.

12. The device according to any one of claims 8 to 11, characterized in that Position-Dependent Prediction Combination (PDPC) is performed on reference pixels and the predicted pixels of the block obtained through the reference pixels, wherein the reference pixels are reference pixels that are filtered or unfiltered according to whether the intra-frame prediction mode of the block is a wide-angle mode.

13. The device according to any one of claims 8 to 12, characterized in that The filter includes a unified intra / inter filter or a Gaussian filter.

14. A method for performing intra-frame prediction on a block, characterized in that: The method comprises: Obtaining an intra prediction mode of the block; When the intra prediction mode of the block is a wide-angle mode, the predicted pixels of the block are obtained by filtered reference samples, wherein the processing of the reference pixels is consistent for directional intra prediction and position-dependent prediction combination (PDPC).

15. An encoder, characterized in that: Comprising processing circuitry for performing the method of any one of claims 1 to 7 or 14.

16. A decoder, characterized in that: Comprising processing circuitry for performing the method of any one of claims 1 to 7 or 14.

17. A computer-readable medium storing instructions, characterized in that: When the instructions are executed by a processor in a device, the device is caused to perform the method according to any one of claims 1 to 7 or 14.

18. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a code stream obtained by the method of any one of claims 1 to 7 or 14 executed by one or more processors.

19. A chip system, characterized in that: The chip system includes a logic circuit and an input and output interface, wherein: The input-output interface is used to communicate with other communication devices outside the chip system, and the logic circuit is used to execute the method as described in any one of claims 1 to 7 or 14.

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