Circuit board with capacitor and preparation method thereof

Abstract

The invention provides a circuit board with a capacitor and a preparation method thereof. The open hole is formed in the substrate, the metal is arranged on the side wall of the open hole to form the first electrode layer, the open hole is filled with the dielectric material to form the first dielectric layer, then the separation capacitor is fixed in a rivet riveting mode, the rivet serves as the second electrode layer, and therefore the capacitor is formed. And then the circuit board with the capacitor is prepared. The capacitor is vertically embedded into the circuit board body, is filled and protected by the second dielectric layer, is completely not in contact with the surface, has a better electrical environment and is more resistant to chemical corrosion. The cylindrical surface area of the rivet can be controlled by controlling the diameter of the rivet, so that the opposite area of the two electrode layers and the distance between the first dielectric layers are changed, the capacitance value can be controlled, and the machining and using flexibility is improved.

Description

Technical Field

[0001] The present application relates to the technical field of circuit boards, and in particular to a circuit board with a capacitor and a preparation method thereof. Background Art

[0002] As the wiring density of printed circuit boards (PCBs) increases, the space on PCBs becomes more and more valuable, and the wiring becomes more and more complicated. In order to improve the utilization of PCB space, embedded capacitors (embedded capacitance) and embedded resistors can be used to directly integrate components with PCBs to save more crimping space, while also reducing the process of crimping components, improving efficiency and reducing costs.

[0003] The existing buried capacitor technology usually adds dielectric material between the first surface of the power layer and the first surface of the ground layer, and then presses the printed circuit board to form an inter-plate capacitor. There are many problems in the production process, such as deformation, metal infiltration, delamination, bubbling, etc., which makes the PCB production process more difficult. Summary of the invention

[0004] In view of this, the present application proposes a circuit board with a capacitor and a manufacturing method thereof to solve at least one of the above problems.

[0005] An embodiment of the present application provides a method for preparing a circuit board having a capacitor, comprising the following steps:

[0006] Prepare a substrate, the substrate comprising a first base material layer, a first copper foil layer and a first metal layer, the first copper foil layer is located between the first base material layer and the first metal layer, the substrate has an opening penetrating the substrate in a thickness direction, a first electrode layer is provided on a side wall of the opening, and the opening is filled with a dielectric material to form a first dielectric layer;

[0007] Laminating a copper-clad laminate on at least one side of the substrate in a thickness direction, wherein the copper-clad laminate comprises a second base material layer and a second copper foil layer, and the second base material layer is located between the first metal layer and the second copper foil layer;

[0008] forming a groove on the second copper-clad laminate, wherein a position of the groove corresponds to the first dielectric layer;

[0009] A rivet is arranged in the groove and the first dielectric layer, the rivet is a second electrode layer, the first electrode layer, the first dielectric layer and the second electrode layer constitute the capacitor, and the rivet has a through hole penetrating the rivet in a height direction;

[0010] Filling a dielectric material in the through hole to form a second dielectric layer;

[0011] The second copper foil layer is manufactured to form a conductive circuit layer, and the conductive circuit layer is electrically connected to the first electrode layer to obtain the circuit board.

[0012] In one embodiment, the preparation method further comprises: providing a protective layer on the outer side of the conductive circuit layer.

[0013] In one embodiment, the step of preparing the substrate includes: forming an opening on a laminate, the laminate including a first substrate layer and a first copper foil layer disposed on the surface of the first substrate layer, the opening penetrating the first substrate layer and the first copper foil layer in a thickness direction; providing a first metal layer on the surface of the first copper foil layer and on the side wall of the opening, the first metal layer on the side wall forming the first electrode layer; filling the opening with a dielectric material to form the first dielectric layer, thereby obtaining the substrate.

[0014] In one embodiment, before the step of forming the second copper foil layer into a conductive circuit layer, the preparation method further includes: forming a blind hole on the second copper clad laminate, and a portion of the surface of the first metal layer is exposed from the blind hole; and a second metal layer is arranged on the surface of the second copper foil layer facing away from the second substrate layer and in the blind hole, and the blind hole and the second metal layer in the blind hole form a conductive structure.

[0015] In one embodiment, in the step of forming the conductive circuit layer from the second copper foil layer, the second copper foil layer and the second metal layer on the surface of the second copper foil layer are jointly formed to form the conductive circuit layer.

[0016] One embodiment of the present application provides a circuit board with a capacitor, which includes a circuit board body and a capacitor arranged in the circuit board body. The circuit board body includes a substrate, a circuit board arranged on the surface of the substrate, and a rivet for riveting the substrate and the circuit board. The substrate has an opening that penetrates the substrate in the thickness direction, the side wall of the opening is provided with a first metal layer, and the opening is filled with a dielectric material. The capacitor includes a first electrode layer, a first dielectric layer, and a second electrode layer. The first electrode layer is the first metal layer on the side wall of the opening, the second electrode layer is the rivet, and the second electrode layer is arranged corresponding to the opening and penetrates the dielectric material in the opening. The first dielectric layer is the dielectric material between the first electrode layer and the second electrode layer.

[0017] In one embodiment, the rivet has a through hole that penetrates the rivet along a height direction, and the through hole is filled with a dielectric material to form a second dielectric layer.

[0018] In one embodiment, the substrate comprises a first substrate layer, a first copper foil layer and a first metal layer, wherein the first copper foil layer is located between the first substrate layer and the first metal layer. The circuit board comprises a second substrate layer and a conductive circuit layer formed on a surface of the second substrate layer facing away from the first metal layer.

[0019] In one embodiment, the circuit board further includes a conductive structure, and the conductive structure electrically connects the conductive circuit layer and the first metal layer.

[0020] In one embodiment, the circuit board further includes a protective layer, and the protective layer is disposed on a surface of the conductive circuit layer facing away from the second substrate layer.

[0021] The present application forms a first electrode layer by arranging an opening on a substrate and arranging a metal on the side wall of the opening, filling a dielectric material in the opening to form a first dielectric layer, and then fixing the separated capacitor by riveting with rivets, and using the rivets as the second electrode layer, thereby forming a capacitor, and then preparing a circuit board with a capacitor. The present application directly integrates the capacitor inside the circuit board, improves the compactness of the structure and the space utilization rate, and the structure is relatively simple, reducing the difficulty of processing. In addition, compared with the traditional way of exposing the capacitor material of the capacitor element on the surface of the circuit board, the capacitor of the present application is vertically embedded in the circuit board body, and is protected by the second dielectric layer filling, and has no contact with the surface, and has a better electrical environment and is more resistant to chemical corrosion. In addition, the second electrode layer of the capacitor of the present application is a rivet, and the cylindrical surface area of ​​the rivet can be controlled by controlling the diameter of the rivet, thereby changing the distance between the opposite area of ​​the two electrode layers and the first dielectric layer, and then the capacitance value can be controlled, which improves the flexibility of processing and use. The capacitor described in the present application can be set in multiple on the circuit board body, and multiple capacitors can be designed in series, parallel or series-parallel combination according to functional requirements, and the application range is wider. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figures 1 to 3 A cross-sectional view of a prepared substrate provided in accordance with one embodiment of the present application.

[0023] Figure 4 For Figure 3 A cross-sectional view of the copper-clad laminates laminated on both sides of the substrate shown.

[0024] Figure 5 For Figure 4 A cross-sectional view of the copper-clad laminate of the structure shown having a groove.

[0025] Figure 6 For Figure 5 The structure shown is a cross-sectional view of riveting.

[0026] Figure 7 For Figure 6 A cross-sectional view of a rivet with a structure shown filled with dielectric material.

[0027] Figure 8 For Figure 7 A cross-sectional view of a conductive structure and a second metal layer are disposed on the structure shown.

[0028] Fig. 9 For Figure 8 A cross-sectional view of the structure shown for circuit fabrication.

[0029] Fig.10 For Fig. 9 A cross-sectional view of a circuit board obtained after a protective layer is provided on the structure shown in one embodiment.

[0030] Fig.11 A cross-sectional view of a circuit board provided in accordance with another embodiment of the present application.

[0031] Fig.12 A cross-sectional view of a circuit board provided in accordance with another embodiment of the present application.

[0032] Main component symbols

[0033] Circuit board 100

[0034] Capacitor 101

[0035] First electrode layer 102

[0036] First dielectric layer 103

[0037] The second electrode layer 104

[0038] Circuit board body 200

[0039] Substrate 10

[0040] Laminate 11

[0041] Opening 110

[0042] First base material layer 12

[0043] The first copper foil layer 13

[0044] First metal layer 14, 15

[0045] Circuit board 20

[0046] Copper clad laminate 21

[0047] Second base material layer 22

[0048] The second copper foil layer 23

[0049] The second metal layer 24

[0050] Conductive structure 25

[0051] Conductive circuit layer 26

[0052] Pad 27

[0053] Groove 201

[0054] Blind hole 202

[0055] Rivet 30

[0056] Nailhead 31

[0057] Nail rod 32

[0058] The second dielectric layer 33

[0059] Through hole 301

[0060] Protective layer 40

[0061] The following specific implementation manner will further illustrate the embodiments of the present application in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION

[0062] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the technical field of the present application. The terms used herein are only for the purpose of describing specific implementation methods and are not intended to limit the present application embodiments.

[0063] It should be noted that all directional indications in the embodiments of the present application (such as up, down, left, right, front, back, etc.) are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0064] Here, the embodiments of the present application are described with reference to the cross-sectional views, which are schematic diagrams of the idealized embodiments (and intermediate configurations) of the present application. Thus, it is foreseeable that the shapes of the diagrams are different due to manufacturing processes and / or tolerances. Therefore, the embodiments of the present application should not be interpreted as being limited to the specific shapes of the regions illustrated here, but should include deviations in shapes such as those produced due to manufacturing. The regions shown in the figures are themselves only schematic, and their shapes are not intended to illustrate the actual shapes of the devices, and are not intended to limit the scope of the present application.

[0065] Some embodiments of the present application are described in detail below in conjunction with the accompanying drawings. In the absence of conflict, the following embodiments and features in the embodiments can be combined with each other.

[0066] See also Figures 1 to 10In a first aspect, the present application provides a method for preparing a circuit board 100 having a capacitor 101, which includes steps S10 to S60. It is understandable that the numbering of the steps is intended to clearly describe the specific preparation method, and is not intended to limit the order of the steps.

[0067] See also Figures 1 to 3 , step S10, preparing a substrate 10. The step S10 of preparing the substrate 10 may include steps S11 to S13.

[0068] like Figure 1 As shown, in step S11, an opening 110 may be formed on the laminate 11 by, but not limited to, laser, mechanical drilling, etc. The laminate 11 includes a first substrate layer 12 and a first copper foil layer 13 disposed on the surface of the first substrate layer 12, and the opening 110 penetrates the first substrate layer 12 and the first copper foil layer 13 along the thickness direction. In this embodiment, the first copper foil layer 13 is disposed on two opposite surfaces of the first substrate layer 12. That is, in this embodiment, the laminate 11 is a double-sided copper clad laminate.

[0069] In some embodiments, the first substrate layer 12 can be made of epoxy resin, polyimide resin, BT resin (bismaleimide triazine resin), phenolic resin or thermoplastic liquid crystal polymer, and can also contain glass fiber and other materials that can enhance mechanical strength and heat resistance. The first substrate layer 12 has electrical insulation properties and a certain mechanical strength, and can maintain the dimensional stability of the circuit board 100.

[0070] In some embodiments, after forming the opening 110, a deburring step may be performed to remove burrs generated by drilling and dust adhering to the sidewall of the opening 110 and the surface of the first copper foil layer 13. In addition, the deburring step may also make the surface of the first copper foil layer 13 rough, thereby improving the bonding strength between the first metal layer 14 and the first copper foil layer 13 in subsequent processes.

[0071] like Figure 2 As shown, in step S12, the first metal layer 14 may be disposed on the surface of the first copper foil layer 13 away from the first substrate layer 12 and the first metal layer 15 may be disposed on the side wall of the opening 110 by, but not limited to, electroplating. The side wall of the opening 110 is covered by the first metal layer 15, and the first metal layer 15 on the side wall of the opening 110 is connected to the first metal layer 14 on the surface of the first copper foil layer 13. The first metal layer 15 on the side wall of the opening 110 forms the first electrode layer 102 of the capacitor 101.

[0072] The first metal layers 14 and 15 may be, but are not limited to, copper (Cu), gold (Au), nickel (Ni) or tin (Sn), etc. In this embodiment, the material of the first metal layers 14 and 15 is copper.

[0073] like Figure 3 As shown, in step S13 , a dielectric material is filled in the opening 110 to form a first dielectric layer 103 , thereby obtaining the substrate 10 .

[0074] The upper and lower surfaces of the first dielectric layer 103 can be aligned with the surface of the first metal layer 14 facing away from the first copper foil layer 13 by grinding or the like. Figure 3 The first dielectric layer 103 is in contact with the first metal layer 15 on the sidewall of the opening 110 on one side away from the center of the opening 110. The dielectric material forming the first dielectric layer 103 may be, but is not limited to, polyimide, polypropylene, liquid crystal polymer, polyetheretherketone, polyethylene terephthalate, polyethylene naphthalate, etc.

[0075] See also Figure 4 , step S20, laminating a copper clad laminate 21 on at least one side of the substrate 10. The copper clad laminate 21 includes a second base material layer 22 and a second copper foil layer 23, and the second base material layer 22 is located between the first metal layer 14 and the second copper foil layer 23. In this embodiment, a copper clad laminate 21 is laminated on both the upper and lower sides of the substrate 10. In other embodiments, a copper clad laminate 21 may be laminated only on the upper side or the lower side of the substrate 10.

[0076] The second substrate layer 22 may be made of the same material as or different from the first substrate layer 12 . The second substrate layer 22 may be made of, but not limited to, epoxy resin, polyimide resin, BT resin (bismaleimide triazine resin), phenolic resin or thermoplastic liquid crystal polymer.

[0077] See also Figure 5 , step S30, forming a groove 201 (i.e., a fishing groove) on the second copper clad laminate 21. The position of the groove 201 corresponds to the first dielectric layer 103, and the orthographic projection of the first dielectric layer 103 on the second copper clad laminate 21 can cover the groove 201. The groove 201 is used to facilitate the rivet riveting of the substrate 10 and the copper clad laminate 21 in the subsequent riveting step.

[0078] In this embodiment, the cross-section of the groove 201 is a trapezoid. In other embodiments, the cross-section of the groove 201 can also be a rectangular shape or the like. The depth of the groove 201 can be adjusted according to actual needs. For example, if a countersunk rivet is used in the subsequent process, the depth of the groove 201 can be the height of the head of the countersunk rivet, which can be up to 1.0 mm. In this embodiment, the groove 201 penetrates the second copper clad laminate 21 along the thickness direction, that is, the bottom wall of the groove 201 is the first dielectric layer 103, and part of the surface of the first dielectric layer 103 can be exposed through the groove 201. In other embodiments, the groove 201 can only penetrate part of the second copper clad laminate 21 along the thickness direction, and the bottom wall of the groove 201 can be the second substrate layer 22.

[0079] See also Figure 6 , step S40, rivets 30 are arranged in the groove 201 and the first dielectric layer 103, and the height direction of the rivet 30 is parallel to the thickness direction of the substrate 10 and the copper clad plate 21. The rivet 30 includes a nail head 31 and a nail rod 32, and the nail head 31 is connected to the end of the nail rod 32. The nail head 31 sinks into the groove 201, and the surface of the nail head 31 away from the nail rod 32 can be flush with the surface of the second copper foil layer 23 away from the second substrate layer 22, and the nail rod 32 passes through the first dielectric layer 103 in the opening 110 approximately vertically. The rivet 30 has a through hole 301 that penetrates the nail head 31 and the nail rod 32 along the height direction.

[0080] The rivet 30 can be used as the second electrode layer 104, and the second electrode layer 104 contacts the first dielectric layer 103. The first metal layer 15 can be used as the first electrode layer 102, and the first electrode layer 102, the first dielectric layer 103 and the second electrode layer 104 together constitute the capacitor 101.

[0081] In this embodiment, the rivet 30 is a countersunk rivet. In other embodiments, the rivet 30 may also be a flanging rivet, a flaring rivet, a closing rivet, etc. It is understandable that when the rivet 30 is a flanging rivet or a closing rivet, the step of forming the groove 201 on the copper clad plate 21 may be omitted.

[0082] See also Figure 7 In step S50, a dielectric material is filled in the through hole 301 to form a second dielectric layer 33. The second dielectric layer 33 can protect the capacitor 101 from chemical corrosion, provide a better electrical environment for the capacitor 101, and enhance the strength of the circuit board 100.

[0083] The dielectric material forming the second dielectric layer 33 may be, but is not limited to, polyimide, polypropylene, liquid crystal polymer, polyetheretherketone, polyethylene terephthalate, polyethylene naphthalate, etc. The dielectric material of the second dielectric layer 33 may be the same as or different from the dielectric material of the first dielectric layer 103, and the present application does not limit this.

[0084] See also Figure 8 In step S50, a blind hole 202 may be formed on the second copper clad laminate 21 by means of, but not limited to, laser or mechanical drilling, and then a second metal layer 24 may be disposed on the surface of the second copper foil layer 23 facing away from the second substrate layer 22 and in the blind hole 202 by means of, but not limited to, electroplating.

[0085] Before electroplating, part of the surface of the first metal layer 14 may be exposed from the blind hole 202, that is, the bottom wall of the blind hole 202 is the first metal layer 14. After electroplating, the blind hole 202 and the second metal layer 24 in the blind hole 202 form a conductive structure 25, and the conductive structure 25 may be, but is not limited to, a conductive hole. The second metal layer 24 may be, but is not limited to, copper, gold, nickel, or tin. In this embodiment, the material of the second metal layer 24 is copper.

[0086] See also Fig. 9 , step S50, the second copper foil layer 23 and the second metal layer 24 on the surface of the second copper foil layer 23 are jointly made into a conductive circuit layer 26, and a circuit board 100 having a capacitor 101 is obtained. It can be understood that when the second metal layer 24 is not provided, the second copper foil layer 23 is made into a conductive circuit layer 26. The conductive circuit layer 26 can be formed by lamination, exposure, development, etching, film removal and other steps, which are commonly used technical means in the art and will not be repeated here.

[0087] In the circuit board 100, the conductive circuit layer 26 is electrically connected to the first electrode layer 102 via the conductive structure 25. The first electrode layer 102 can be led to the surface of the circuit board 100 via the conductive structure 25, thereby facilitating connection with external components (not shown).

[0088] See also Fig.10 In step S60, a protective layer 40 may be provided on the outer side of the conductive circuit layer 26 (the side away from the second substrate layer 22). The protective layer 40 is used to protect the circuit board 100 from being invaded by external water vapor or scratched by foreign objects. The protective layer 40 may expose the portion of the conductive circuit layer 26 connected to the conductive structure 25 to form a pad 27 for connection with external components. In this embodiment, the protective layer 40 is a solder mask.

[0089] Please continue reading Fig.10 In a second aspect, the present application provides a circuit board 100 having a capacitor 101 , which includes a circuit board body 200 and the capacitor 101 disposed in the circuit board body 200 .

[0090] The circuit board body 200 includes a substrate 10, a circuit board 20 disposed on the surface of the substrate 10, and a rivet 30 for riveting the substrate 10 and the circuit board 20. In this embodiment, the circuit board 20 is disposed on both the upper and lower surfaces of the substrate 10. In other embodiments, the substrate 10 may be disposed on only one surface of the substrate 10. The substrate 10 has an opening 110 that penetrates the substrate 10 in the thickness direction, and the side wall of the opening 110 is provided with a first metal layer 15, and the opening 110 is filled with a dielectric material. The capacitor 101 includes a first electrode layer 102, a first dielectric layer 103, and a second electrode layer 104. The first electrode layer 102 is the first metal layer 15 on the side wall of the opening 110, and the second electrode layer 104 is the rivet 30, and the second electrode layer 104 is disposed corresponding to the opening 110 and penetrates the dielectric material in the opening 110. The first dielectric layer 103 is a dielectric material between the first electrode layer 102 and the second electrode layer 104.

[0091] In some embodiments, Fig.10 As shown, the rivet 30 has a height direction (i.e., the thickness direction of the circuit board 100, i.e., Fig.10 The through hole 301 (in the vertical direction in FIG. 1 ) penetrates the rivet 30, and the through hole 301 is filled with a dielectric material to form a second dielectric layer 33. The second dielectric layer 33 can protect the capacitor 101 from chemical corrosion, provide a better electrical environment for the capacitor 101, and improve the strength of the circuit board 100.

[0092] In some embodiments, Fig.10 As shown, the substrate 10 includes a first substrate layer 12, a first copper foil layer 13 and a first metal layer 14, wherein the first copper foil layer 13 is located between the first substrate layer 12 and the first metal layer 14. The circuit board 20 includes a second substrate layer 22 and a conductive circuit layer 26 formed on a surface of the second substrate layer 22 facing away from the first metal layer 14, wherein the second substrate layer 22 is located between the conductive circuit layer 26 and the first metal layer 14.

[0093] In some embodiments, Fig.10 As shown, the circuit board 100 further includes a conductive structure 25 . The conductive structure 25 electrically connects the conductive line layer 26 and the first metal layer 14 .

[0094] In some embodiments, Fig.10 As shown, the circuit board 100 further includes a protective layer 40, which is disposed on the surface of the conductive circuit layer 26 away from the second substrate layer 22. The protective layer 40 can expose the portion of the conductive circuit layer 26 connected to the conductive structure 25 to form a pad 27 for connection with external components.

[0095] In some embodiments, the number of capacitors 101 in the circuit board 100 may be more than one. Fig.11 and Fig.12As shown, the number of capacitors 101 is two. In other embodiments, the number of capacitors 101 may be greater than two. The capacitors 101 may be connected in series or in parallel. Fig.11 , which shows a situation where two capacitors 101 are connected in series: the second electrode layer 104 of one capacitor 101 is electrically connected to the first electrode layer 102 of the other capacitor. Fig.12 , which shows a situation where two capacitors 101 are connected in parallel: the second electrode layer 104 of one capacitor 101 is electrically connected to the second electrode layer 104 of the other capacitor.

[0096] The present application forms a first electrode layer 102 by arranging an opening 110 on the substrate 10 and arranging a metal on the sidewall of the opening 110, filling a dielectric material in the opening 110 to form a first dielectric layer 103, and then fixing the separated capacitor by riveting with a rivet 30, and using the rivet 30 as the second electrode layer 104, thereby forming a capacitor 101, and then preparing a circuit board 100 with a capacitor 101. The present application integrates the capacitor 101 directly inside the circuit board 100, improves the compactness of the structure and the space utilization rate, and the structure is relatively simple, reducing the difficulty of processing. In addition, compared with the traditional method of exposing the capacitor material of the capacitor element packaged on the surface of the circuit board 100, the capacitor 101 of the present application is vertically embedded in the circuit board body 200, and is protected by the second dielectric layer 33, and is completely non-contact with the surface, and has a better electrical environment and is more resistant to chemical corrosion. Furthermore, the second electrode layer 104 of the capacitor 101 of the present application is a rivet 30, and the cylindrical surface area of ​​the rivet 30 can be controlled by controlling the diameter of the rivet 30, thereby changing the facing area of ​​the two electrode layers and the distance between the first dielectric layer 103, thereby controlling the capacitance value, and improving the flexibility of processing and use. The capacitor 101 described in the present application can be arranged in multiple on the circuit board body 200, and multiple capacitors 101 can be designed in series, parallel or a combination of series and parallel according to functional requirements, and the application range is wider.

[0097] The above descriptions are some specific implementations of the present application, but they are not limited to these implementations in actual application. For ordinary technicians in this field, other variations and changes made according to the technical concept of the present application should all fall within the protection scope of the present application.

Claims

1. A method for preparing a circuit board having a capacitor, characterized in that: The following steps are involved: Prepare a substrate, the substrate comprising a first base material layer, a first copper foil layer and a first metal layer, the first copper foil layer is located between the first base material layer and the first metal layer, the substrate has an opening penetrating the substrate in a thickness direction, a first electrode layer is provided on a side wall of the opening, and the opening is filled with a dielectric material to form a first dielectric layer; Laminating a copper-clad laminate on at least one side of the substrate in a thickness direction, wherein the copper-clad laminate comprises a second base material layer and a second copper foil layer, and the second base material layer is located between the first metal layer and the second copper foil layer; forming a groove on the second copper-clad laminate, wherein a position of the groove corresponds to the first dielectric layer; A rivet is arranged in the groove and the first dielectric layer, the rivet is a second electrode layer, the first electrode layer, the first dielectric layer and the second electrode layer constitute the capacitor, and the rivet has a through hole penetrating the rivet in a height direction; Filling a dielectric material in the through hole to form a second dielectric layer; The second copper foil layer is manufactured to form a conductive circuit layer, and the conductive circuit layer is electrically connected to the first electrode layer to obtain the circuit board.

2. The preparation method according to claim 1, characterized in that The preparation method further comprises: arranging a protective layer on the outer side of the conductive circuit layer.

3. The preparation method according to claim 1, characterized in that: The step of preparing the substrate comprises: forming an opening on a laminate, wherein the laminate comprises a first substrate layer and a first copper foil layer disposed on a surface of the first substrate layer, wherein the opening penetrates the first substrate layer and the first copper foil layer in a thickness direction; A first metal layer is disposed on the surface of the first copper foil layer and the side wall of the opening, and the first metal layer on the side wall forms the first electrode layer; The opening is filled with a dielectric material to form the first dielectric layer, thereby obtaining the substrate.

4. The preparation method according to claim 1, characterized in that: Before the step of forming the conductive circuit layer from the second copper foil layer, the preparation method further includes: forming a blind hole on the second copper clad laminate, and a portion of the surface of the first metal layer is exposed from the blind hole; and arranging a second metal layer on the surface of the second copper foil layer facing away from the second substrate layer and in the blind hole, and the blind hole and the second metal layer in the blind hole form a conductive structure.

5. The preparation method according to claim 4, characterized in that: In the step of forming the conductive circuit layer from the second copper foil layer, the second copper foil layer and the second metal layer on the surface of the second copper foil layer are jointly formed to form the conductive circuit layer.

6. A circuit board having a capacitor, characterized in that: It comprises a circuit board body and a capacitor arranged in the circuit board body; the circuit board body comprises a substrate, a circuit board arranged on the surface of the substrate, and a rivet for riveting the substrate and the circuit board, the substrate has an opening penetrating the substrate along the thickness direction, the side wall of the opening is provided with a first metal layer, and the opening is filled with a dielectric material; the capacitor comprises a first electrode layer, a first dielectric layer, and a second electrode layer, the first electrode layer is the first metal layer on the side wall of the opening, the second electrode layer is the rivet, the second electrode layer is arranged corresponding to the opening and penetrates the dielectric material in the opening, and the first dielectric layer is the dielectric material between the first electrode layer and the second electrode layer.

7. The circuit board with capacitors according to claim 6, wherein: The rivet has a through hole penetrating the rivet in a height direction, and the through hole is filled with a dielectric material to form a second dielectric layer.

8. The circuit board with capacitors according to claim 6, wherein: The substrate includes a first base material layer, a first copper foil layer and a first metal layer, wherein the first copper foil layer is located between the first base material layer and the first metal layer; the circuit board includes a second base material layer and a conductive circuit layer formed on a surface of the second base material layer facing away from the first metal layer.

9. The circuit board with capacitors according to claim 8, wherein: The circuit board also includes a conductive structure, which electrically connects the conductive circuit layer and the first metal layer.

10. The circuit board with capacitors according to claim 8, wherein: The circuit board further comprises a protection layer, and the protection layer is arranged on a surface of the conductive circuit layer away from the second substrate layer.

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