Circuit board communication address distribution system, method and device and storage medium

Abstract

The invention discloses a circuit board communication address distribution system, method and device and a storage medium. The system comprises a main circuit board and a plurality of sub-circuit boards, wherein the main circuit board is electrically connected with the input ends of resistors in the adjacent sub-circuit boards through voltage division power supply wires; the main circuit board forms a series loop with the resistor in the sub-circuit board through the field-effect tube in the sub-circuit board; and the MCU of the main circuit board is in communication connection with the MCU of the sub circuit board. According to the technical scheme provided by the embodiment of the invention, the communication addresses of the sub-circuit boards can be quickly and accurately distributed, and the problems of low efficiency and large workload of distribution of the communication addresses of the sub-circuit boards are solved.

Description

Technical Field

[0001] The present invention relates to the field of communication technology, and in particular to a circuit board communication address allocation system, method, device and storage medium. Background Art

[0002] In the process of device development, a main control board is usually connected in series with multiple sub-boards to form a complete device. The main board and sub-boards can exchange data through communication interfaces such as RS485, I2C or CAN.

[0003] At present, in this device series structure, a unique communication address needs to be assigned to each daughter board so that the daughter board can stably exchange data with the main board or other daughter boards. The existing daughter board communication address assignment methods mainly include: 1) hard-coding the communication address in the software code; 2) setting the communication address through the hardware DIP switch; 3) developing a set of upper computer tools, and using the upper computer tools to connect each daughter board to set the communication address.

[0004] However, the first method requires each sub-board to be configured with the corresponding firmware, which can easily cause difficulties in firmware management when there are a large number of sub-boards. The disadvantage of the second method is that each serially connected sub-board needs to be manually dialed before the device is powered on, which affects work efficiency. The disadvantage of the third method is that the development of the host computer tool requires a certain amount of work, and the communication address setting of each sub-board using the host computer tool on site also affects work efficiency. The existing sub-board communication address allocation method has problems such as low efficiency or large configuration workload. Summary of the invention

[0005] The present invention provides a circuit board communication address allocation system, method, device and storage medium to solve the problems of low efficiency and heavy workload in daughter board communication address allocation.

[0006] In a first aspect, the present invention provides a circuit board communication address allocation system, the circuit board communication address allocation system comprising a main circuit board and a plurality of sub-circuit boards, wherein:

[0007] The main circuit board is electrically connected to the input end of the resistor in the adjacent sub-circuit board through a voltage-dividing power supply wire; the main circuit board forms a series loop with the resistor in the sub-circuit board through the field effect transistor in the sub-circuit board; the MCU of the main circuit board is communicatively connected with the MCU of the sub-circuit board.

[0008] In a second aspect, the present invention provides a circuit board communication address allocation method, which is applied to a main circuit board in the circuit board communication address allocation system described in the first aspect. The method comprises:

[0009] Obtain the residual voltage sent by each sub-circuit board and the chip identifier of its own built-in chip through the acquisition port, wherein the residual voltage is the residual loop voltage measured at the position of the current sub-circuit board in the series loop, and the residual voltage sent by different sub-circuit boards is different;

[0010] The communication address of the sub-circuit board is configured according to the residual voltage and the chip identification.

[0011] In a third aspect, the present invention provides a circuit board communication address allocation device, which is applied to a main circuit board in the circuit board communication address allocation system described in the first aspect, and the device comprises:

[0012] An information acquisition unit module is used to acquire the residual voltage sent by each sub-circuit board and the chip identifier of its own built-in chip through the acquisition port, wherein the residual voltage is the residual loop voltage measured at the position of the current sub-circuit board in the series loop, and the residual voltage sent by different sub-circuit boards is different;

[0013] A communication address configuration module is used to configure the communication address of the sub-circuit board according to the residual voltage and the chip identification.

[0014] In a fourth aspect, the present invention provides a computer-readable storage medium storing computer instructions, which are used to implement the circuit board communication address allocation method of the second aspect when executed by a processor.

[0015] The circuit board communication address allocation system provided by the present invention includes a main circuit board and multiple sub-circuit boards, wherein: the main circuit board is electrically connected to the input end of the resistor in the adjacent sub-circuit board through a voltage-dividing power supply wire; the main circuit board forms a series loop with the resistor in the sub-circuit board through the field effect tube in the sub-circuit board; the MCU of the main circuit board is communicatively connected with the MCU of the sub-circuit board. The above system uses the resistor series voltage division method, without adding firmware or hardware dial switches, and the main circuit board can quickly and accurately realize the allocation of communication addresses to the sub-circuit boards, solving the problems of low efficiency and heavy workload in the allocation of communication addresses of sub-boards.

[0016] The circuit board communication address allocation scheme provided by the present invention obtains the residual voltage sent by each sub-circuit board and the chip identification of its own built-in chip through the acquisition port, wherein the residual voltage is the residual circuit voltage measured at the position of the current sub-circuit board in the series circuit, and the residual voltage sent by different sub-circuit boards is different. The communication address of the sub-circuit board is configured according to the residual voltage and the chip identification. By adopting the above technical scheme, the communication address of the sub-circuit board is allocated quickly and accurately through the different residual voltage values ​​and corresponding chip identifications collected by each sub-circuit board, solving the problems of low efficiency and large workload of sub-board communication address allocation.

[0017] It should be understood that the content described in this section is not intended to identify the key or important features of the present invention, nor is it intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0019] Figure 1 This is a schematic diagram of the architecture of a circuit board communication address allocation system provided according to Embodiment 1 of the present invention;

[0020] Figure 2 This is a circuit connection diagram of a circuit board communication address allocation system provided according to Embodiment 2 of the present invention;

[0021] Figure 3 is a flow chart of a circuit board communication address allocation method provided according to Embodiment 3 of the present invention;

[0022] Figure 4 is a flow chart of a circuit board communication address allocation method provided according to a fourth embodiment of the present invention;

[0023] Figure 5 It is a structural schematic diagram of a circuit board communication address allocation device provided according to Embodiment 5 of the present invention. DETAILED DESCRIPTION

[0024] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0025] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In the description of the present invention, unless otherwise specified, "multiple" refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist, for example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the objects associated before and after are an "or" relationship. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0026] Embodiment 1

[0027] Figure 1 This is a schematic diagram of the architecture of a circuit board communication address allocation system provided in Embodiment 1 of the present invention. This embodiment is applicable to the situation of allocating communication addresses of sub-circuit boards.

[0028] The circuit board communication address allocation system includes a main circuit board and multiple sub-circuit boards, wherein: the main circuit board is electrically connected to the input end of the resistor in the adjacent sub-circuit board through a voltage-dividing power supply wire; the main circuit board forms a series loop with the resistor in the sub-circuit board through the field effect transistor in the sub-circuit board; the MCU of the main circuit board is communicatively connected with the MCU of the sub-circuit board.

[0029] For example, Figure 1As shown, the circuit board communication address allocation system includes a main circuit board 101 and four sub-circuit boards 102, wherein: the main circuit board 101 is electrically connected to the input end of the resistor in the adjacent sub-circuit board 102 through the voltage-dividing power supply wire 103; the main circuit board 101 forms a series loop with the resistor 105 in the sub-circuit board 102 through the field effect tube 104 in the sub-circuit board 102; the MCU 106 of the main circuit board 101 is communicatively connected with the MCU 107 of the sub-circuit board 102. Among the four sub-circuit boards, only the field effect tube of the last-stage sub-circuit board (i.e., circuit board 4) is turned on and grounded, so that the output end of the resistor is connected to the ground, forming a series loop including the resistors of the four sub-circuit boards.

[0030] In this embodiment, the MCU of the main circuit board and the MCU of the sub-circuit board can form a communication connection through wired or wireless means. The MCU of the main circuit board can be used to receive information sent by the MCU of the sub-circuit board, and assign a communication address to the sub-circuit board according to the information. Among them, the MCU of the sub-circuit board can be used to receive information and send the information to the main circuit board. The information includes a residual voltage, and the residual voltage is the residual loop voltage measured at the position of the current sub-circuit board in the series circuit, that is, in the series circuit composed of the field effect tube in the sub-circuit board and the resistor in the sub-circuit board, the residual loop voltage measured at the series position of the resistor in the current sub-circuit board.

[0031] In the circuit board communication address allocation system provided by the embodiment of the present invention, the main circuit board forms a series loop with the resistor in the sub-circuit board through the field effect tube in the sub-circuit board. No firmware or hardware DIP switches are required. By means of resistor series voltage division, the MCU of the main circuit board can quickly and accurately allocate the communication address of the sub-circuit board according to the information sent by the sub-circuit board, thereby solving the problems of low efficiency and heavy workload in allocating the communication address of the sub-circuit board.

[0032] Embodiment 2

[0033] Figure 2 A circuit connection diagram of a circuit board communication address allocation system provided in Embodiment 2 of the present invention. The system in the embodiment of the present invention is further optimized based on the above system, and provides specific details of the circuit board communication address allocation system.

[0034] Optionally, the main circuit board supplies power to an adjacent sub-circuit board; the sub-circuit board supplies power to an adjacent next-level sub-circuit board; the output end of the resistor in the sub-circuit board is respectively electrically connected to the resistor input end of the adjacent next-level sub-circuit, the acquisition port of its own built-in MCU, and the source level of its own built-in field effect transistor; the acquisition port includes an analog-to-digital converter acquisition port.

[0035] Furthermore, the drain of the field effect tube is grounded, and the gate of the field effect tube is electrically connected to the power supply output terminal of the adjacent next-level sub-circuit board; the source and drain in the last-level sub-circuit board are turned on.

[0036] Optionally, the field effect transistor includes a PMOS transistor or an NMOS transistor.

[0037] For example, Figure 2 As shown, it is assumed that there are currently 5 boards connected in series, namely 1 main (circuit) board and 4 sub-boards (circuit) boards. The power output of the main board supplies power to sub-board 1, and the power output of sub-board 1 supplies power to sub-board 2, and so on. Each sub-board is powered by the previous sub-board. A voltage-dividing power line is drawn out from the main board and connected to the resistor input end of sub-board 1. The output end of the resistor of sub-board 1 is connected to the input end of the resistor of sub-board 2, the output end of the resistor of sub-board 2 is connected to the input end of the resistor of sub-board 3, and the output end of the resistor of sub-board 3 is connected to the input end of the resistor of sub-board 4, so that this voltage-dividing power line is connected in series through the resistors of each sub-board. The output end of the resistor of each sub-board is connected to the ADC (analog-to-digital converter) acquisition port of the sub-board MCU to collect the residual voltage. Each sub-board can contain 1 PMOS tube. The source of the PMOS tube is connected to the output end of the resistor of the sub-board, the drain is grounded, and the gate is connected to the output end of the power supply of the next-level sub-board. If the current sub-board is the middle sub-board, the PMOS tube is not turned on because the power supply of the next sub-board is output to the gate of the current sub-board. The gate of the PMOS tube of the second-to-last sub-board is connected to the power input terminal of the next sub-board. If the current sub-board is the last sub-board, the PMOS tube is turned on because the gate does not have the power supply input of the next sub-board, so that the output terminal of the resistor is connected to the ground, forming a loop.

[0038] The circuit board communication address allocation system provided by the embodiment of the present invention can automatically determine whether the current sub-board is the last sub-board by the way that the next-level sub-board supplies power to the gate of the PMOS tube of the previous-level sub-board. If it is not the last sub-board, the next-level sub-board will supply power to the gate of the PMOS tube, causing the PMOS tube to be disconnected and the voltage divider circuit to not form a loop. If it is the last sub-board, the PMOS tube has no voltage, causing the PMOS tube to be closed and the voltage divider circuit to form a loop. The main board can quickly identify the position of the sub-board based on the residual voltage sent by the collected sub-board, and realize fast and accurate allocation of the communication address of the sub-circuit board based on the position, thereby solving the problems of low efficiency and heavy workload in the allocation of communication addresses of sub-boards.

[0039] Embodiment 3

[0040] Figure 3This is a flowchart of a circuit board communication address allocation method provided in Embodiment 3 of the present invention. This embodiment is applicable to the case of allocating circuit board communication addresses and is applied to the main circuit board in the circuit board communication address allocation system described in the above embodiment. This method can be executed by a circuit board communication address allocation device, which can be implemented in the form of hardware and / or software.

[0041] like Figure 3 As shown, the circuit board communication address allocation method provided by the third embodiment of the present invention specifically includes the following steps:

[0042] S301. Obtain the residual voltage sent by each sub-circuit board and the chip identifier of its own built-in chip through the acquisition port, wherein the residual voltage is the residual loop voltage measured at the position of the current sub-circuit board in the series loop, and the residual voltage sent by different sub-circuit boards is different.

[0043] S302: Configure the communication address of the sub-circuit board according to the residual voltage and the chip identifier.

[0044] In this embodiment, the main circuit board can obtain the residual voltage sent by the sub-circuit board and the chip identification of its own built-in chip. Since the resistors in the main circuit board and the sub-circuit board form a series voltage divider circuit, the residual voltages sent by the sub-circuit boards at different series positions are different. The series position of the sub-circuit board can be determined based on the residual voltage, and different communication addresses can be assigned according to the distance of the position, and then the communication address is sent to the corresponding sub-circuit board according to the chip identification, thereby completing the configuration of the communication address of the sub-circuit board.

[0045] The circuit board communication address allocation method provided in the embodiment of the present invention obtains the residual voltage sent by each sub-circuit board and the chip identification of its own built-in chip through the acquisition port, wherein the residual voltage is the residual circuit voltage measured at the position of the current sub-circuit board in the series circuit, and the residual voltage sent by different sub-circuit boards is different. The communication address of the sub-circuit board is configured according to the residual voltage and the chip identification. The technical solution of the embodiment of the present invention quickly and accurately implements the allocation of the communication address of the sub-circuit board through the different residual voltage values ​​and corresponding chip identifications collected by each sub-circuit board, thereby solving the problems of low efficiency and heavy workload in the allocation of communication addresses of sub-boards.

[0046] Embodiment 4

[0047] Figure 4 A flowchart of a circuit board communication address allocation method provided in Embodiment 4 of the present invention. The technical solution of the embodiment of the present invention is further optimized on the basis of the above-mentioned optional technical solutions, and a specific method for allocating circuit board communication addresses is given.

[0048] Optionally, configuring the communication address of the sub-circuit board according to the residual voltage and the chip identifier includes: sorting the numerical values ​​of the residual voltage to obtain a sorting result; generating the communication address of the sub-circuit board according to the sorting result, and sending the communication address and the corresponding chip identifier to the sub-circuit board so that the sub-circuit board obtains the corresponding communication address according to the chip identifier to complete the configuration of the communication address of the sub-circuit board. The advantage of this setting is that by sorting the numerical values ​​of the residual voltage, the serial position of the corresponding sub-circuit board can be quickly determined, so that the mainboard can reasonably allocate the communication address according to the position.

[0049] like Figure 4 As shown, a circuit board communication address allocation method provided by Embodiment 4 of the present invention specifically includes the following steps:

[0050] S401. Obtain the residual voltage sent by each sub-circuit board and the chip identifier of its own built-in chip through the acquisition port, wherein the residual voltage is the residual loop voltage measured at the position of the current sub-circuit board in the series loop, and the residual voltage sent by different sub-circuit boards is different.

[0051] S402: sort the values ​​of the residual voltages to obtain a sorting result.

[0052] S403, generating a communication address of the sub-circuit board according to the sorting result, and sending the communication address and the corresponding chip identifier to the sub-circuit board so that the sub-circuit board obtains the corresponding communication address according to the chip identifier to complete the configuration of the communication address of the sub-circuit board.

[0053] Optionally, when the communication address is a number, the communication address and the residual voltage are negatively correlated or positively correlated.

[0054] Optionally, the closer the series position of the sub-circuit board is to the main circuit board, the greater the residual voltage sent by the sub-circuit board.

[0055] Specifically, the sub-circuit board can send the residual voltage value collected by itself and the chip identifier of the chip in the MCU configured by itself to the MCU of the main circuit board through the communication interface. The main circuit board sorts the residual voltage values ​​reported by each sub-circuit board. For example, the communication address of the sub-circuit board corresponding to the largest residual voltage can be determined as 1, the communication address of the sub-circuit board corresponding to the second largest residual voltage can be determined as 2, the communication address of the sub-circuit board corresponding to the third largest residual voltage can be determined as 3, and so on. The communication address assigned in this way matches the series position of the sub-circuit board in the series loop. After the sorting is completed, the main circuit board can send the assigned communication address and the corresponding chip identifier to the sub-circuit board through the communication interface of its own MCU. The sub-circuit board matches according to the chip identifier of its own MCU and obtains the corresponding communication address to realize the configuration of the communication address of the sub-circuit board.

[0056] The circuit board communication address allocation method provided in the embodiment of the present invention can quickly determine the series position of the corresponding sub-circuit board by sorting the numerical values ​​of the remaining voltage, so that the main board can reasonably allocate the communication address according to the position, and quickly and accurately allocate the communication address of the sub-circuit board, thereby solving the problems of low efficiency and large workload in allocating the communication address of the sub-board.

[0057] Embodiment 5

[0058] Figure 5 This is a schematic diagram of the structure of a circuit board communication address allocation device provided in Embodiment 5 of the present invention. Figure 5 As shown, the device includes: an information acquisition unit module 501 and a communication address configuration module 502, wherein:

[0059] An information acquisition unit module is used to acquire the residual voltage sent by each sub-circuit board and the chip identifier of its own built-in chip through the acquisition port, wherein the residual voltage is the residual loop voltage measured at the position of the current sub-circuit board in the series loop, and the residual voltage sent by different sub-circuit boards is different;

[0060] A communication address configuration module is used to configure the communication address of the sub-circuit board according to the residual voltage and the chip identification.

[0061] The circuit board communication address allocation device provided in the embodiment of the present invention can quickly and accurately allocate the communication addresses of the sub-circuit boards through the different residual voltage values ​​and corresponding chip identifications collected by each sub-circuit board, thereby solving the problems of low efficiency and large workload in allocating the communication addresses of the sub-boards.

[0062] Optionally, the communication address configuration module includes:

[0063] A sorting unit, used for sorting the values ​​of the residual voltage to obtain a sorting result;

[0064] A communication address configuration unit is used to generate the communication address of the sub-circuit board according to the sorting result, and to send the communication address and the corresponding chip identifier to the sub-circuit board so that the sub-circuit board obtains the corresponding communication address according to the chip identifier to complete the configuration of the communication address of the sub-circuit board.

[0065] Optionally, when the communication address is a number, the communication address and the residual voltage are negatively correlated or positively correlated.

[0066] Optionally, the closer the series position of the sub-circuit board is to the main circuit board, the greater the residual voltage sent by the sub-circuit board.

[0067] The circuit board communication address allocation device provided in the embodiment of the present invention can execute the circuit board communication address allocation method provided in any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of the execution method.

[0068] Embodiment 6

[0069] In the context of the present invention, a computer readable storage medium may be a tangible medium, wherein the computer executable instructions, when executed by a computer processor, are used to perform a circuit board communication address assignment method, the method comprising:

[0070] Obtain the residual voltage sent by each sub-circuit board and the chip identifier of its own built-in chip through the acquisition port, wherein the residual voltage is the residual loop voltage measured at the position of the current sub-circuit board in the series loop, and the residual voltage sent by different sub-circuit boards is different;

[0071] The communication address of the sub-circuit board is configured according to the residual voltage and the chip identification.

[0072] In the context of the present invention, a computer-readable storage medium may be a tangible medium that may contain or store a computer program for use by an instruction execution system, device or equipment or used with an instruction execution system, device or equipment or used in combination with an instruction execution system, device or equipment. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices or equipment, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0073] The computer device provided above can be used to execute the circuit board communication address allocation method provided in any of the above embodiments, and has corresponding functions and beneficial effects.

[0074] It is worth noting that in the embodiment of the above-mentioned circuit board communication address allocation device, the various units and modules included are only divided according to functional logic, but are not limited to the above-mentioned division, as long as the corresponding functions can be achieved; in addition, the specific names of the functional units are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of the present invention.

[0075] Note that the above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A circuit board communication address allocation system, characterized in that: The system comprises a main circuit board and a plurality of sub-circuit boards, wherein: The main circuit board is electrically connected to the input end of the resistor in the adjacent sub-circuit board through a voltage-dividing power supply wire; the main circuit board forms a series loop with the resistor in the sub-circuit board through the field effect transistor in the sub-circuit board; the MCU of the main circuit board is communicatively connected with the MCU of the sub-circuit board.

2. The system according to claim 1, characterized in that The main circuit board supplies power to the adjacent sub-circuit board; the sub-circuit board supplies power to the adjacent next-level sub-circuit board; the output end of the resistor in the sub-circuit board is respectively electrically connected to the resistor input end of the adjacent next-level sub-circuit, the acquisition port of the built-in MCU and the source level of the built-in field effect tube; the acquisition port includes an analog-to-digital converter acquisition port.

3. The system according to claim 1, characterized in that The field effect transistor includes a PMOS transistor or an NMOS transistor.

4. The system according to claim 1 or 2, characterized in that: The drain of the field effect tube is grounded, and the gate of the field effect tube is electrically connected to the power supply output terminal of the adjacent next-stage sub-circuit board; the source and drain in the last-stage sub-circuit board are turned on.

5. A circuit board communication address allocation method, applied to a main circuit board in a circuit board communication address allocation system according to any one of claims 1 to 3, characterized in that: The method comprises: Obtain the residual voltage sent by each sub-circuit board and the chip identifier of its own built-in chip through the acquisition port, wherein the residual voltage is the residual loop voltage measured at the position of the current sub-circuit board in the series loop, and the residual voltage sent by different sub-circuit boards is different; The communication address of the sub-circuit board is configured according to the residual voltage and the chip identification.

6. The method according to claim 5, characterized in that The configuring the communication address of the sub-circuit board according to the residual voltage and the chip identifier includes: Sorting the values ​​of the residual voltages to obtain a sorting result; The communication address of the sub-circuit board is generated according to the sorting result, and the communication address and the corresponding chip identification are sent to the sub-circuit board so that the sub-circuit board obtains the corresponding communication address according to the chip identification to complete the configuration of the communication address of the sub-circuit board.

7. The method according to claim 6, characterized in that When the communication address is a number, the communication address and the residual voltage are in a negative correlation or a positive correlation.

8. The method according to claim 5, characterized in that The closer the serial connection position of the sub-circuit board is to the main circuit board, the greater the residual voltage sent by the sub-circuit board.

9. A circuit board communication address allocation device, applied to a main circuit board in a circuit board communication address allocation system according to any one of claims 1 to 3, characterized in that: The device comprises: An information acquisition unit module is used to acquire the residual voltage sent by each sub-circuit board and the chip identifier of its own built-in chip through the acquisition port, wherein the residual voltage is the residual loop voltage measured at the position of the current sub-circuit board in the series loop, and the residual voltage sent by different sub-circuit boards is different; A communication address configuration module is used to configure the communication address of the sub-circuit board according to the residual voltage and the chip identification.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the circuit board communication address allocation method described in any one of claims 5-8 when executed.

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