Semiconductor device and method for manufacturing semiconductor device

Abstract

The invention provides a semiconductor device and a manufacturing method of the semiconductor device, which can prevent reduction of the service life of a terminal relative to a conductive part. The semiconductor device has a wiring board (11b3) and a second connection terminal. The second connection terminal has a flat-plate-shaped second joining section (23e), the rear surface of which is joined to the wiring board (11b3), and the front surface (23e1) of which is provided with an indentation (28). An indentation front end edge (28a3) at one end of the indentation (28) and a joining front end edge (23e3) at one end of the second joining part (23e) are on the same plane, and the length of an indentation rear end edge (28a5) at the other end of the indentation (28) facing the indentation front end edge (28a3) is shorter than the length of a joining rear end edge (23e5) at the other end of the second joining part (23e) facing the joining front end edge (23e3).

Description

Technical Field

[0001] The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device. Background Art

[0002] In semiconductor devices, a bonding material is bonded to a material to be bonded by ultrasonic bonding (see, for example, Patent Documents 1 and 2). Also, a wire is bonded to a material to be bonded by ultrasonic bonding (see, for example, Patent Document 3).

[0003] Prior art literature Patent Literature Patent Document 1: Japanese Patent Application Publication No. 2010-212645 Patent Document 2: Japanese Patent Application Publication No. 2013-226580 Patent Document 3: Japanese Patent Application Publication No. 2000-299347 Summary of the invention Technical issues An object of the present invention is to provide a semiconductor device and a method for manufacturing the semiconductor device in which a reduction in the bonding life of a terminal to a conductive portion is prevented.

[0004] Technical Solution According to one aspect of the present invention, there is provided a semiconductor device comprising a conductive portion and a terminal, wherein the terminal comprises a flat-plate-shaped joining portion, the back side of the joining portion being joined to the conductive portion, and an indentation being formed on the front side of the joining portion, the front end edge of the indentation at one end of the indentation being on the same plane as the front end edge of the joining portion at one end of the joining portion, and the length of the rear end edge of the indentation at the other end of the indentation opposite to the front end edge of the indentation being shorter than the length of the rear end edge of the joining portion at the other end of the joining portion opposite to the front end edge of the joining portion.

[0005] In addition, the indentation may further include a pair of indentation side edges connecting the indentation front end edge and the indentation rear end edge.

[0006] In addition, the length of the indentation front end side of the indentation may be shorter than the length of the bonding front end side of the bonding portion.

[0007] In addition, the indentation may be rectangular in a plan view, and the length of the front end side of the indentation may be equal to the length of the rear end side of the indentation.

[0008] In addition, the joining portion may further include a pair of joining side edges orthogonal to the joining front end edge and the joining rear end edge, and the pair of joining side edges may be located further outward than the pair of indentation side edges of the indentation.

[0009] In addition, each distance from the pair of indentation sides of the indentation to the pair of joining sides of the joining portion may be 1 mm or more.

[0010] In addition, a length obtained by combining the indentation rear end side and the pair of indentation side sides of the indentation may be longer than a length of the joint front end side of the joint portion.

[0011] In addition, the indentation rear end edge of the indentation may protrude to the opposite side with respect to the indentation front end edge.

[0012] In addition, the rear end edge of the indentation may include a central portion and a pair of connecting portions respectively arranged on both sides of the central portion, and the length of the central portion of the rear end edge of the indentation may be narrower than the length of the rear end edge of the joint of the joint, and the central portion may be most prominent at the rear end edge of the indentation.

[0013] In addition, at the rear end edge of the indentation, the central portion may be parallel to the rear end edge of the engagement, and a connection angle of the pair of connection portions relative to the central portion may be smaller than 90°.

[0014] In addition, the bottom surface of the indentation of the engaging portion may be flat.

[0015] In addition, the indentation of the bonding portion may be composed of a collection of projections and depressions, and the tops of a plurality of projections included in the collection may be in the same plane.

[0016] In addition, the terminal may have: a connecting portion, which is integrally connected to the rear end edge of the front side of the connecting portion and stands upward from the front side; and a wiring portion, which is connected to the end of the connecting portion and extends to a position further outward than the conductive portion when viewed from above. The semiconductor device may also have a housing for accommodating the conductive portion and fixing the wiring portion of the terminal.

[0017] According to one aspect of the present invention, there is provided a semiconductor device comprising a conductive portion and a terminal, wherein the terminal comprises a flat-plate-shaped joining portion, the back side of the joining portion being joined to the conductive portion, and an indentation being formed on the front side of the joining portion, the front end edge of the indentation at one end of the indentation being on the same plane as the front end edge of the joining portion at one end of the joining portion, and the rear end edge of the indentation at the other end of the indentation opposite to the front end edge of the indentation being in the shape of an arc protruding to the opposite side relative to the front end edge of the indentation.

[0018] According to one aspect of the present invention, there is provided a method for manufacturing a semiconductor device, comprising: a preparation step of preparing a conductive portion and a terminal having a flat-plate-shaped joining portion; and a joining step of arranging the back side of the joining portion on the conductive portion, and joining the back side of the joining portion to the conductive portion by vibrating and pressing the front side of the joining portion using a pressing surface included in the front end of a tool, wherein a pressing front end edge of one end included in the pressing surface of the tool is located further outward than a joining front end edge of one end of the joining portion, and a pressing rear end edge of the other end of the pressing surface opposite to the pressing front end edge is shorter than a joining rear end edge of the other end of the joining portion opposite to the joining front end edge.

[0019] In addition, the pressing surface of the tool may further include a pair of pressing side edges connecting the pressing front end edge and the pressing rear end edge.

[0020] In addition, the length of the pressing front end side of the pressing surface of the tool may be shorter than the length of the engaging front end side of the engaging portion.

[0021] In addition, the pressing surface of the tool may be rectangular in a plan view, and the length of the pressing front end side may be equal to the length of the pressing rear end side.

[0022] In addition, the engaging portion may further include a pair of engaging side edges orthogonal to the engaging front end edge and the engaging rear end edge, and the pair of engaging side edges may be located further outward than the pair of pressing side portions of the pressing surface of the tool.

[0023] Furthermore, the distances from the pair of pressing sides of the pressing surface of the tool to the pair of joining sides of the joining portion may each be 1 mm or more.

[0024] In addition, the pressing rear end edge of the pressing surface of the tool may protrude to the opposite side with respect to the pressing front end edge.

[0025] In addition, the pressing rear end edge of the pressing surface of the tool may include a pressing central part and a pair of pressing connecting parts respectively arranged on both sides of the pressing central part, and the length of the pressing central part of the pressing rear end edge may be shorter than the length of the joint rear end edge of the joint, and at the pressing rear end edge, the pressing central part may be most protruding.

[0026] In addition, the pressing surface of the tool may be flat.

[0027] In addition, the pressing surface of the tool may include a collection of concavities and convexities, and the tops of the plurality of convexities included in the collection may be in the same plane.

[0028] In addition, the terminal may have: a connecting portion, which is integrally connected to the rear end edge of the front side of the connecting portion and stands upward from the front side; and a wiring portion, which is connected to the end of the connecting portion and extends to a position further outward than the conductive portion when viewed from above. The semiconductor device may also have a housing for accommodating the conductive portion and fixing the wiring portion of the terminal.

[0029] According to one aspect of the present invention, there is provided a method for manufacturing a semiconductor device, comprising: a preparation step of preparing a conductive portion and a terminal having a flat-plate-shaped joining portion; and a joining step of arranging the back side of the joining portion on the conductive portion, and using a pressing surface included in the front end of a tool to press the front side of the joining portion while vibrating, thereby joining the back side of the joining portion to the conductive portion, wherein a pressing front end edge of one end included in the pressing surface of the tool is located further outward than a joining front end edge of one end of the joining portion, and a pressing rear end edge of the other end of the pressing surface opposite to the pressing front end edge protrudes to the opposite side relative to the pressing front end edge and is in an arc shape.

[0030] It should be noted that the above invention summary does not list all the essential features of the present invention. In addition, sub-combinations of these feature groups can also constitute inventions.

[0031] Technical Effects According to the disclosed technology, it is possible to prevent a reduction in the bonding life of the terminal to the conductive portion, thereby suppressing a reduction in long-term reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 It is a top view of the semiconductor device according to the first embodiment.

[0033] Figure 2 It is a side view of the semiconductor device according to the first embodiment.

[0034] Figure 3 It is a plan view of a semiconductor unit included in the semiconductor device according to the first embodiment.

[0035] Figure 4 This is a first cross-sectional view of a semiconductor unit included in the semiconductor device according to the first embodiment.

[0036] Figure 5 This is a second cross-sectional view of the semiconductor unit included in the semiconductor device according to the first embodiment.

[0037] Figure 6 This is a flowchart of the method for manufacturing the semiconductor device according to the first embodiment.

[0038] Figure 7It is a diagram showing an assembly process included in the method for manufacturing the semiconductor device according to the first embodiment.

[0039] Figure 8 This is an enlarged plan view of a bonding portion after an assembling step included in the method for manufacturing a semiconductor device according to the first embodiment.

[0040] Fig. 9 This is an enlarged cross-sectional view of a bonding portion after an assembling step included in the method for manufacturing a semiconductor device according to the first embodiment.

[0041] Fig.10 It is a side view of a bonding tool used in a wiring step included in the method for manufacturing a semiconductor device according to the first embodiment.

[0042] Fig.11 It is a plan view of a bonding tip portion of a bonding tool used in a wiring step included in the method for manufacturing a semiconductor device according to the first embodiment.

[0043] Fig.12 This is a first cross-sectional view of a bonding tip portion of a bonding tool used in a wiring step included in the method for manufacturing a semiconductor device according to the first embodiment.

[0044] Fig.13 This is a second cross-sectional view of the bonding tip portion of the bonding tool used in the wiring step included in the method for manufacturing the semiconductor device according to the first embodiment.

[0045] Fig.14 This is a plan view showing a wiring step (during bonding) included in the method for manufacturing the semiconductor device according to the first embodiment.

[0046] Fig.15 This is a cross-sectional view showing a wiring step included in the method for manufacturing the semiconductor device according to the first embodiment (during bonding).

[0047] Fig.16 This is a plan view of the main parts (during bonding) showing a wiring step included in the method for manufacturing the semiconductor device according to the first embodiment.

[0048] Fig.17 This is a cross-sectional view of a main part (during bonding) showing a wiring step included in the method for manufacturing the semiconductor device according to the first embodiment.

[0049] Fig.18 This is a plan view of the main parts (after bonding) showing a wiring step included in the method for manufacturing the semiconductor device according to the first embodiment.

[0050] Fig.19 This is a cross-sectional view of a main part (after bonding) showing a wiring step included in the method for manufacturing the semiconductor device according to the first embodiment.

[0051] Fig. 20 It is a main part plan view (during bonding) showing a wiring process included in a method for manufacturing a semiconductor device according to a reference example.

[0052] Fig.21 This is a cross-sectional view of a main part (during bonding) showing a wiring step included in a method for manufacturing a semiconductor device according to a reference example.

[0053] Fig. 22 This is a side view of a main part (after bonding) showing a wiring step included in a method for manufacturing a semiconductor device according to a reference example.

[0054] Fig.23 This is a plan view of a main part (during bonding) showing a wiring step included in the method for manufacturing a semiconductor device according to the second embodiment.

[0055] Fig.24 This is a plan view of the main parts (after bonding) showing a wiring step included in the method for manufacturing a semiconductor device according to the second embodiment.

[0056] Fig.25 It is a plan view showing a wiring step included in the method for manufacturing a semiconductor device according to the third embodiment (during bonding).

[0057] Fig.26 This is a plan view of the main parts (after bonding) showing a wiring step included in the method for manufacturing a semiconductor device according to the third embodiment.

[0058] Explanation of symbols 1: Semiconductor devices 2: Semiconductor module 3: Heat sink 4: Bonding tools 10, 10a, 10b, 10c: Semiconductor unit 11: Insulated circuit board 11a: Insulation board 11b1, 11b2, 11b3: wiring board 11c: Metal Plate 12: Semiconductor chips 12a: Control electrode 12b: Main electrode 13a, 13b: Lead frame 13a1, 13b1: Main electrode joint 13a2, 13b2: First vertical connection portion 13a3, 13b3: Horizontal connection part 13a4, 13b4: Second vertical connection portion 13a5, 13b5: Wiring joint 14a, 14b: Joint parts 20: Shell 21: Outer frame 21a, 21b, 21c, 21d: outer wall 21e, 21f, 21g: unit storage part; 21i: Fastening holes 22a, 22b, 22c: first connection terminals 22b1: First joint 23a, 23b, 23c: second connection terminals 23e: Second joint 23e1: Front 23e2: Back 23e3: Join the front edge 23e4, 23e6: Joining the sides 23e5: Join the back edge 23e7: Indentation part 23f: Second connection part 23g: Second wiring portion 24a: U phase output terminal 24b: V phase output terminal 24c: W phase output terminal 24b1: Third joint 25a, 25b, 25c: Control terminals 26: Wire 28: Indentation 28a3: Front edge of indentation 28a4, 28a6: Indentation side 28a5: Indentation rear edge 28a7: Central part 28a8, 28a9: Side part 50: Joint front end 51: Joining base 51a, 51c: Press the side 51b: Press the front end 51d: Press the rear end 51d1: Press the center 51d2, 51d3: Pressing side part 51e: Front face 52: Protrusion 52a~52d: Side 52e: Pressing surface 53: Gap B: Burr DETAILED DESCRIPTION Hereinafter, the embodiments will be described with reference to the accompanying drawings. Figure 1 The XY plane facing the upper side (+Z direction) in the semiconductor device 1 of the figure. Similarly, "up" indicates the direction of the upper side (+Z direction) in the semiconductor device 1 of the figure. "Back" and "lower surface" indicate the XY plane facing the lower side (-Z direction) in the semiconductor device 1 of the figure. Similarly, "lower" indicates the direction of the lower side (-Z direction) in the semiconductor device 1 of the figure. The same directionality is also indicated in other figures as needed. "High position" and "upper position" indicate the position of the upper side (+Z direction) in the semiconductor device 1 of the figure. Similarly, "lower position" and "lower position" indicate the position of the lower side (-Z direction) in the semiconductor device 1 of the figure. "Front", "upper surface", "up", "back", "lower surface", "lower", "side" are only expressions for the convenience of determining the relative positional relationship, and do not limit the technical idea of ​​the present invention. For example, "up" and "down" do not necessarily indicate the vertical direction relative to the ground. That is, the directions of "up" and "down" are not limited to the direction of gravity. In addition, in the following description, "main component" means the case where it contains more than 80vol%. In addition, “substantially the same” may be within a range of ±10%. In addition, “perpendicular”, “orthogonal”, and “parallel” may be within a range of ±10°.

[0059] [First embodiment] use Figure 1 and Figure 2 A semiconductor device 1 according to the first embodiment will be described. Figure 1 is a top view of the semiconductor device according to the first embodiment, Figure 2 1 is a side view of the semiconductor device of the first embodiment. Figure 2 Observe along the +Y direction Figure 1 A side view of the semiconductor device 1 taken from a side portion parallel to the XZ plane.

[0060] The semiconductor device 1 includes a semiconductor module 2 and a heat sink 3. In addition, the semiconductor module 2 includes semiconductor units 10a, 10b, 10c, and a housing 20 that accommodates the semiconductor units 10a, 10b, 10c. The semiconductor units 10a, 10b, 10c accommodated in the housing 20 are respectively encapsulated by an encapsulation member (not shown). The semiconductor units 10a, 10b, 10c all have the same structure. The semiconductor units 10a, 10b, 10c are described as a semiconductor unit 10 when they are not distinguished. The details of the semiconductor unit 10 will be described later.

[0061] The housing 20 included in the semiconductor module 2 includes an outer frame 21, first connection terminals 22a, 22b, 22c, second connection terminals 23a, 23b, 23c, U-phase output terminal 24a, V-phase output terminal 24b, W-phase output terminal 24c, and control terminals 25a, 25b, 25c.

[0062] The outer frame 21 is substantially rectangular in plan view and is surrounded by outer walls 21a, 21b, 21c, and 21d. The outer walls 21a and 21c correspond to the long sides of the outer frame 21, and the outer walls 21b and 21d correspond to the short sides of the outer frame 21. Figure 1 As shown in the figure, the corners connecting the outer walls 21a, 21b, 21c, and 21d do not have to be right angles, and may be R-chamfered. Fastening holes 21i penetrating the outer frame 21 are formed at the corners of the front surface of the outer frame 21 and the outer walls 21a and 21c, respectively. It should be noted that the fastening holes 21i formed at such corners of the outer frame 21 may be formed at a position lower than the front surface of the outer frame 21.

[0063] The outer frame 21 is divided into unit storage parts 21e, 21f, and 21g along the outer walls 21a and 21c on the front. The unit storage parts 21e, 21f, and 21g are rectangular in a plan view. The semiconductor units 10a, 10b, and 10c are respectively stored in the unit storage parts 21e, 21f, and 21g. The outer frame 21 is mounted on the front of the heat sink 3 on which the semiconductor units 10a, 10b, and 10c are respectively arranged along the X direction. If the outer frame 21 is mounted on the heat sink 3, the unit storage parts 21e, 21f, and 21g of the outer frame 21 respectively surround (store) the semiconductor units 10a, 10b, and 10c arranged along the heat sink 3.

[0064] The outer frame 21 includes first connection terminals 22a, 22b, 22c and second connection terminals 23a, 23b, 23c on the front side of the outer wall 21a in a plan view. The first connection terminals 22a, 22b, 22c and the second connection terminals 23a, 23b, 23c are respectively provided in the unit storage parts 21e, 21f, 21g. One end of the first connection terminal 22a, 22b, 22c and the second connection terminal 23a, 23b, 23c is exposed on the surface of the outer wall 21a side. The other end is exposed in the unit storage parts 21e, 21f, 21g and is electrically connected to the semiconductor units 10a, 10b, 10c.

[0065] In addition, the U-phase output terminal 24a, the V-phase output terminal 24b, and the W-phase output terminal 24c are respectively provided on the front side of the outer wall 21c. The U-phase output terminal 24a, the V-phase output terminal 24b, and the W-phase output terminal 24c are respectively provided in the unit storage parts 21e, 21f, and 21g. One end of the U-phase output terminal 24a, the V-phase output terminal 24b, and the W-phase output terminal 24c is exposed on the front side of the outer wall 21c. The other end is exposed in the unit storage parts 21e, 21f, and 21g and is electrically connected to the semiconductor units 10a, 10b, and 10c.

[0066] In addition, nuts facing the openings are stored at the lower portions of the openings of the first connection terminals 22a, 22b, 22c and the second connection terminals 23a, 23b, 23c of the outer frame 21. Similarly, nuts facing the openings are stored at the lower portions of the openings of the U-phase output terminal 24a, the V-phase output terminal 24b, and the W-phase output terminal 24c of the outer frame 21.

[0067] In addition, the outer frame 21 is provided with control terminals 25a, 25b, and 25c on the front side of the side (outer wall 21c side) on the +Y direction side of the unit storage parts 21e, 21f, and 21g when viewed from above. The control terminals 25a, 25b, and 25c are respectively divided into two and provided. The control terminals 25a, 25b, and 25c are J-shaped (or U-shaped), and one end extends vertically upward (in the +Z direction) from the surface on the outer wall 21c side of the outer frame 21. The other end is exposed from the outer wall 21c side of the unit storage parts 21e, 21f, and 21g toward the -Y direction and inside the unit storage parts 21e, 21f, and 21g.

[0068] Such an outer frame 21 includes first connection terminals 22a, 22b, 22c, second connection terminals 23a, 23b, 23c, U-phase output terminal 24a, V-phase output terminal 24b, W-phase output terminal 24c, and control terminals 25a, 25b, 25c, and is integrally molded by injection molding using a thermoplastic resin. Thus, the housing 20 is formed. The thermoplastic resin is, for example, polyphenylene sulfide resin, polybutylene terephthalate resin, polybutylene succinate resin, polyamide resin, or acrylonitrile butadiene styrene resin.

[0069] In addition, the first connection terminals 22a, 22b, 22c, the second connection terminals 23a, 23b, 23c, the U-phase output terminal 24a, the V-phase output terminal 24b, the W-phase output terminal 24c, and the control terminals 25a, 25b, 25c are made of metal with excellent conductivity. Such metals are, for example, copper, aluminum, or an alloy having at least one of them as a main component. The surfaces of the first connection terminals 22a, 22b, 22c, the second connection terminals 23a, 23b, 23c, the U-phase output terminal 24a, the V-phase output terminal 24b, the W-phase output terminal 24c, and the control terminals 25a, 25b, 25c may also be plated. In this case, the plating material used is, for example, nickel, a nickel-phosphorus alloy, or a nickel-boron alloy. It should be noted that the details of the structure of the end of the second connection terminal 23b will be described later. The ends of the first connecting terminals 22a, 22b, 22c, the second connecting terminals 23a, 23c, the U-phase output terminal 24a, the V-phase output terminal 24b, the W-phase output terminal 24c and the control terminals 25a, 25b, 25c also have the same structure as the end of the second connecting terminal 23b.

[0070] The packaging components are respectively filled in the unit storage parts 21e, 21f, and 21g of the outer frame 21 to package the semiconductor units 10 in the unit storage parts 21e, 21f, and 21g. At this time, the packaging components package the other ends of the first connection terminals 22a, 22b, and 22c, the second connection terminals 23a, 23b, and 23c, the U-phase output terminals 24a, the V-phase output terminals 24b, and the W-phase output terminals 24c, and the control terminals 25a, 25b, and 25c in the unit storage parts 21e, 21f, and 21g. Such packaging components can be thermosetting resins. Thermosetting resins are, for example, epoxy resins, phenolic resins, maleimide resins, and polyester resins. Epoxy resins are preferred. In addition, fillers can be added to the packaging components. The filler is a ceramic with insulation and high thermal conductivity.

[0071] The heat sink 3 is rectangular and flat when viewed from above. The heat sink 3 may also be R-chamfered at the corners when viewed from above. In addition, the heat sink 3 is formed with insertion holes corresponding to the fastening holes 21i when viewed from above. The semiconductor module 2 is arranged on the front side of the heat sink 3 via an adhesive described later. It should be noted that a cooling device may also be formed on the back side of such a heat sink 3 in a range corresponding to the arrangement area of ​​the semiconductor module 2. Such a cooling device is connected to a pump, and the refrigerant is circulated by the pump. The refrigerant is caused to flow into the cooling device by the pump, and the refrigerant that has flowed in circulates in the cooling device. At this time, the refrigerant receives heat from the semiconductor module 2 and cools the semiconductor module 2. The heated refrigerant is discharged to the outside of the cooling device. In this way, the refrigerant is circulated relative to the cooling device by the pump. Alternatively, only a plurality of heat sinks may be formed on the back side of the heat sink 3. In this case, cooling is performed by air cooling.

[0072] Next, use Figure 3~Figure 5 The semiconductor units 10 a , 10 b , and 10 c (semiconductor units 10 ) will be described. Figure 3 It is a plan view of a semiconductor unit included in the semiconductor device according to the first embodiment. Figure 4 is a first cross-sectional view of a semiconductor unit included in the semiconductor device of the first embodiment, Figure 5 1 is a second cross-sectional view of the semiconductor unit included in the semiconductor device of the first embodiment. Figure 4 yes Figure 3 The cross-sectional view at the dashed line XX of Figure 5 yes Figure 3 Cross-sectional view at the single-dot chain line YY.

[0073] The semiconductor unit 10 includes an insulating circuit substrate 11, two semiconductor chips 12, and lead frames 13a and 13b. The semiconductor chip 12 is bonded to the insulating circuit substrate 11 by a bonding member 14a. In addition, the lead frames 13a and 13b are bonded to the main electrode 12b on the front surface of the semiconductor chip 12 by the bonding member 14b. It should be noted that the lead frames 13a and 13b may be bonded to the insulating circuit substrate 11 by ultrasonic bonding instead of the bonding member 14b.

[0074] The insulating circuit substrate 11 includes an insulating plate 11a, wiring plates 11b1, 11b2, 11b3, and a metal plate 11c. The insulating plate 11a and the metal plate 11c are rectangular in a plan view. In addition, the corners of the insulating plate 11a and the metal plate 11c may be R-chamfered or C-chamfered. The size of the metal plate 11c is smaller than that of the insulating plate 11a in a plan view, and the metal plate 11c is formed on the inner side of the insulating plate 11a.

[0075] The insulating plate 11a has insulating properties and is made of a material having excellent thermal conductivity. Such an insulating plate 11a is made of ceramics. Examples of ceramics include alumina, aluminum nitride, and silicon nitride.

[0076] Wiring boards 11b1, 11b2, 11b3 are formed on the front surface of insulating board 11a. Wiring boards 11b1, 11b2, 11b3 are made of metal with excellent conductivity. Such metal is, for example, copper, aluminum, or an alloy having at least one of them as a main component. In addition, the thickness of wiring boards 11b1, 11b2, 11b3 is, for example, not less than 0.1 mm and not more than 2.0 mm. In order to improve corrosion resistance, the surfaces of wiring boards 11b1, 11b2, 11b3 may also be plated. In this case, the plating material used is, for example, nickel, nickel-phosphorus alloy, or nickel-boron alloy.

[0077] The wiring board 11b1 occupies half of the side in the +X direction of the front side of the insulating board 11a, and occupies the entire area from the side in the -Y direction to the side in the +Y direction. The area surrounded by the dotted line shown in the wiring board 11b1 is bonded to the ends of the first connection terminals 22a, 22b, and 22c. Ultrasonic bonding is used for bonding at this time.

[0078] The wiring board 11b2 occupies half of the -X direction side of the front surface of the insulating plate 11a. In addition, the wiring board 11b2 occupies the area from the +Y direction side of the front surface of the insulating plate 11a to the front of the -Y direction side. The area surrounded by the dotted line shown in the wiring board 11b2 is respectively bonded to the ends of the U-phase output terminal 24a, the V-phase output terminal 24b, and the W-phase output terminal 24c. Ultrasonic bonding is used for bonding at this time.

[0079] Wiring board 11b3 occupies the area surrounded by wiring boards 11b1 and 11b2 on the front surface of insulating board 11a. The area surrounded by the dotted line of wiring board 11b3 is bonded to the ends of second connection terminals 23a, 23b, and 23c. Ultrasonic waves are used for bonding.

[0080] Such wiring boards 11b1, 11b2, 11b3 are formed on the front surface of the insulating plate 11a as follows. A metal layer is formed on the front surface of the insulating plate 11a, and the metal layer is etched or processed to obtain wiring boards 11b1, 11b2, 11b3 of a predetermined shape. Alternatively, wiring boards 11b1, 11b2, 11b3 cut out from the metal layer in advance may be bonded to the front surface of the insulating plate 11a using solder such as silver. It should be noted that wiring boards 11b1, 11b2, 11b3 are examples. The number, shape, size, and position of wiring boards 11b1, 11b2, 11b3 may be appropriately selected as needed.

[0081] The metal plate 11c is formed on the back side of the insulating plate 11a. The metal plate 11c is rectangular. The area of ​​the metal plate 11c when viewed from above is smaller than the area of ​​the insulating plate 11a, and is larger than the area of ​​the region where the wiring plates 11b1, 11b2, and 11b3 are formed. The corners of the metal plate 11c may also be R-chamfered or C-chamfered. The metal plate 11c is formed on the entire surface of the insulating plate 11a except for the edge. The metal plate 11c is composed mainly of a metal having excellent thermal conductivity. The metal is, for example, copper, aluminum, or an alloy containing at least one of them.

[0082] As the insulating circuit substrate 11 having such a structure, for example, a DCB (Direct Copper Bonding) substrate or an AMB (Active Metal Brazed) substrate can be used. The insulating circuit substrate 11 can be mounted on the front surface of the heat sink 3 via a bonding member (not shown). The heat generated by the semiconductor chip 12 can be conducted to the heat sink 3 via the wiring boards 11b1, 11b2, the insulating plate 11a, and the metal plate 11c to be dissipated.

[0083] The joining parts 14a and 14b are solders. Lead-free solder is used as the solder. Lead-free solder, for example, has an alloy containing at least two of tin, silver, copper, zinc, antimony, indium, and bismuth as a main component. In addition, the solder may also contain additives. The additives are, for example, nickel, germanium, cobalt, or silicon. By containing additives, the solder improves wettability, gloss, and bonding strength, thereby improving reliability.

[0084] In addition, the bonding component (not shown) that bonds the semiconductor unit 10 to the heat sink 3 may be a solder or a thermal interface material. The solder may be composed, for example, of at least one of a tin alloy, an aluminum alloy, a titanium alloy, a magnesium alloy, a zirconium alloy, and a silicon alloy as a main component. The thermal interface material may be, for example, an elastomer sheet, RTV (Room Temperature Vulcanization) rubber, gel, an adhesive material including a phase change material, or silicone mixed with ceramics. By installing the semiconductor unit 10 on the heat sink 3 via such a solder or a thermal interface material, the heat dissipation of the semiconductor unit 10 can be improved.

[0085] The semiconductor chip 12 includes a power device element made of silicon. The power device element is an RC (Reverse-Conducting)-IGBT (Insulated Gate Bipolar Transistor). The RC-IGBT is a semiconductor element in which an IGBT as a switching element and a FWD (Free Wheeling Diode) as a diode element are reversely connected in parallel within one chip. The front side of such a semiconductor chip 12 is provided with a control electrode 12a (gate electrode) and an output electrode (emitter electrode) as a main electrode 12b. The back side of such a semiconductor chip 12 is provided with an input electrode (collector electrode) as a main electrode. It should be noted that the control electrode 12a is arranged on one side of the front side of the semiconductor chip 12. The output electrode is arranged in the central part of the front side of the semiconductor chip 12.

[0086] Alternatively, the semiconductor chip 12 may be a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor) made of silicon carbide. The body diode of the power MOSFET may function as a FWD. Such a semiconductor chip 12 may include, for example, an input electrode (drain electrode) as a main electrode on the back side, and an output electrode (source electrode) as a main electrode 12 b and a control electrode 12 a (gate electrode) on the front side.

[0087] In addition, the semiconductor chip 12 may also use a set of switching elements and diode elements each made of silicon to replace the RC-IGBT and the power MOSFET. The switching element is, for example, an IGBT or a power MOSFET. Such a semiconductor chip, for example, has an input electrode (drain electrode or collector electrode) as the main electrode on the back, and has a control electrode 12a (gate electrode) and an output electrode (source electrode or emitter electrode) as the main electrode 12b on the front. The diode element, for example, uses an SBD (Schottky Barrier Diode) or a PiN (P-intrinsic-N) diode as a FWD. Such a semiconductor chip has an output electrode (cathode electrode) as the main electrode on the back, and an input electrode (anode electrode) as the main electrode on the front.

[0088] The lead frames 13a and 13b electrically connect the semiconductor chip 12 to the wiring boards 11b1, 11b2, and 11b3 to perform wiring. The semiconductor unit 10 may be a device constituting a 1-phase inverter circuit. The lead frame 13a directly connects the main electrode 12b of the semiconductor chip 12 (on the wiring board 11b2) to the wiring board 11b3. The lead frame 13b directly connects the main electrode 12b of the semiconductor chip 12 (on the wiring board 11b1) to the wiring board 11b2.

[0089] like Figure 3~Figure 5 As shown, the lead frames 13a and 13b integrally include main electrode joints 13a1 and 13b1, first vertical connecting parts 13a2 and 13b2, horizontal connecting parts 13a3 and 13b3, second vertical connecting parts 13a4 and 13b4, and wiring joints 13a5 and 13b5. It should be noted that the lead frames 13a and 13b are of the same thickness as a whole and are in the shape of a flat plate. The lead frames 13a and 13b can be formed by bending these parts. The lead frames 13a and 13b are made of a metal with excellent electrical conductivity. Such a metal is, for example, copper, aluminum, or an alloy having at least one of them as a main component. In order to improve corrosion resistance, the surface of the lead frames 13a and 13b can be plated. At this time, the plating material used is, for example, nickel, nickel-phosphorus alloy, and nickel-boron alloy.

[0090] The main electrode joints 13a1 and 13b1 are in the form of flat plates. The main electrode joints 13a1 and 13b1 are joined to the main electrodes 12b of the semiconductor chip 12 (on the wiring boards 11b2 and 11b1) by the joining components 14b. The joining of the wiring joints 13a5 and 13b5 to the wiring boards 11b3 and 11b2 may be performed by the above-mentioned joining components or by ultrasonic joining.

[0091] The first vertical connection portion 13a2, the horizontal connection portion 13a3, the second vertical connection portion 13a4, and the wiring joint portion 13a5 of the lead frame 13a have the same width. The width refers to the length in the direction (±X direction) orthogonal to the wiring direction (±Y direction) of the lead frame 13a. The first vertical connection portion 13b2, the horizontal connection portion 13b3, and the second vertical connection portion 13b4 of the lead frame 13b have the same width. The width refers to the length in the direction (±Y direction) orthogonal to the wiring direction (±X direction) of the lead frame 13b.

[0092] In addition, the control electrode 12a of the semiconductor chip 12 of the semiconductor unit 10a, 10b, 10c housed in the unit housing 21e, 21f, 21g of the housing 20 is mechanically and electrically connected to the other end of the control terminal 25a, 25b, 25c through the wire 26. The wire 26 is mainly composed of a material with excellent conductivity. Such a material is composed of, for example, gold, copper, aluminum, or an alloy containing at least one of them. Preferably, the wire 26 can be an aluminum alloy containing a trace amount of silicon. In addition, the diameter of the wire 26 is, for example, not less than 100 μm and not more than 400 μm.

[0093] Next, use Figure 6 A method for manufacturing such a semiconductor device 1 will be described. Figure 6 1 is a flowchart of a method for manufacturing a semiconductor device according to a first embodiment. First, a preparation step is performed to prepare components constituting the semiconductor device 1 and a manufacturing device ( Figure 6 Step S1). Prepare, for example, a semiconductor chip 12, an insulating circuit substrate 11, a heat sink 3, a housing 20, a packaging component, and lead frames 13a and 13b as components of the semiconductor device 1. In addition, the semiconductor chip 12 is bonded to the insulating circuit substrate 11 in advance, and the lead frames 13a and 13b are bonded to assemble the semiconductor unit 10. It is not limited to preparing components, but also possible to prepare devices used in the manufacturing method of the semiconductor device 1. Such devices include, for example, ultrasonic bonding devices, wire bonding devices, and dispenser devices for resin packaging. In addition to the components and devices listed here, required components and devices can also be prepared.

[0094] Next, an assembly step is performed in which the semiconductor unit 10 is bonded to the heat sink 3 and the housing 20 is disposed on the heat sink 3. Figure 6 Step S2). The semiconductor unit 10 is bonded to the heat sink 3 via the bonding member. The housing 20 is mounted on the heat sink 3 by an adhesive. Thus, the semiconductor units 10 are housed in the unit housing portions 21e, 21f, and 21g of the housing 20, respectively.

[0095] use Figure 7 The semiconductor unit 10 thus housed in the case 20 will be described. Figure 7 1 is a diagram showing an assembly process included in the method for manufacturing a semiconductor device according to the first embodiment. Figure 7 The semiconductor unit 10b is shown housed in the unit housing portion 21f of the case 20. The semiconductor units 10a and 10c housed in the unit housing portions 21e and 21g are similarly housed.

[0096] exist Figure 6 After step S2, Figure 7As shown, in the unit storage portion 21f, the first joint portion 22b1 included in the first connection terminal 22b is arranged on the wiring board 11b1. The third joint portion 24b1 of the V-phase output terminal 24b is arranged on the wiring board 11b2. In addition, the second joint portion 23e included in the second connection terminal 23b is arranged on the wiring board 11b3.

[0097] Here, as an example, using Figure 8 and Fig. 9 The second connection terminal 23 b disposed in the semiconductor unit 10 will be described in detail. Figure 8 This is an enlarged plan view of a bonding portion after an assembling step included in the method for manufacturing a semiconductor device according to the first embodiment. Fig. 9 This is an enlarged cross-sectional view of a bonding portion after an assembly process included in the method for manufacturing a semiconductor device according to the first embodiment. Figure 8 Zoom in to show Figure 7 The periphery of the second bonding portion 23e included in the second connection terminal 23b. Fig. 9 yes Figure 8 Cross-sectional view at the single-point dash line XX.

[0098] The second connection terminal 23b has the same thickness (in the ±Z direction) as a whole, and integrally includes the second bonding portion 23e, the second connecting portion 23f, and the second wiring portion 23g. The thickness may be 1.2 mm or more and 1.5 mm or less.

[0099] The second joint part 23e is in the shape of a flat plate. The second joint part 23e includes a front surface 23e1 and a back surface 23e2 that are rectangular in a plan view. Figure 6 After the assembly process of step S2, the back surface 23e2 of the second bonding portion 23e faces the wiring board 11b3. At this time, the back surface 23e2 of the second bonding portion 23e may be in contact with the wiring board 11b3, or a small gap may be left.

[0100] The second joint portion 23e includes side surfaces surrounding the front surface 23e1 and the back surface 23e2 in sequence. The four sides of the front surface 23e1 connected to the side surfaces are the joint front end side 23e3, the joint side side 23e4, the joint rear end side 23e5, and the joint side side 23e6.

[0101] The front end side 23e3 of the joint is one end side of the second joint portion 23e, and faces the inside of the unit storage portion 21f (in the +Y direction) when the second joint portion 23e is arranged on the wiring board 11b3. The rear end side 23e5 of the joint is the other end side of the second joint portion 23e, and faces the inner wall of the unit storage portion 21f (in the -Y direction) when the second joint portion 23e is arranged on the wiring board 11b3. The rear end side 23e5 of the joint is opposite to the front end side 23e3 of the joint. The length of the front end side 23e3 of the joint can be the same as the length of the rear end side 23e5 of the joint (in the ±X direction).

[0102] The joint side edges 23e4 and 23e6 are orthogonal to the joint front edge 23e3 and the joint rear edge 23e5, connecting the joint front edge 23e3 and the joint rear edge 23e5. The joint parts of the joint front edge 23e3, the joint side edges 23e4, the joint rear edge 23e5, and the joint side edges 23e6 are not necessarily right angles, but may also have rounded corners.

[0103] The second connecting portion 23f connects the second bonding portion 23e and the second wiring portion 23g. The second connecting portion 23f is integrally connected to the side surface on the bonding rear end side 23e5 side of the second bonding portion 23e, and rises from the front surface 23e1 of the second bonding portion 23e in the +Z direction.

[0104] The second wiring portion 23g is connected to the end of the second connection portion 23f and extends outward from the unit housing portion 21f in a plan view. The second wiring portion 23g extends in the outer frame 21 and is exposed from the front surface of the outer frame 21.

[0105] Although not shown in the figure, the second connection terminals 23a and 23c, the first connection terminals 22a, 22b and 22c, the U-phase output terminal 24a, the V-phase output terminal 24b and the W-phase output terminal 24c are similarly configured.

[0106] Next, a wiring process for wiring the semiconductor unit 10 is performed ( Figure 6 In this wiring process, electrical wiring is performed between each terminal and the semiconductor unit 10 using a wiring member.

[0107] First, the control electrode 12a of the semiconductor chip 12 included in the semiconductor unit 10 housed in the housing 20 is bonded to the control terminals 25a, 25b, and 25c by means of the wire 26 using a bonding device. Figure 1 .

[0108] In addition, each bonding portion of each terminal of the wiring boards 11b1, 11b2, 11b3 disposed on the semiconductor unit 10 is bonded to the wiring boards 11b1, 11b2, 11b3 by ultrasonic bonding using an ultrasonic bonding device. Figure 10~Figure 13 A bonding tool included in the ultrasonic bonding apparatus will be described.

[0109] Fig.10 It is a side view of a bonding tool used in a wiring step included in the method for manufacturing a semiconductor device according to the first embodiment. Fig.11 It is a plan view of a bonding tip portion of a bonding tool used in a wiring step included in the method for manufacturing a semiconductor device according to the first embodiment. Fig.12 is a first cross-sectional view of a bonding tip portion of a bonding tool used in a wiring step included in a method for manufacturing a semiconductor device according to a first embodiment, Fig.13 This is a second cross-sectional view of the bonding tip portion of a bonding tool used in a wiring process included in the method for manufacturing a semiconductor device according to the first embodiment. Fig.10 It is a side view when the vicinity of the front end of the bonding tool 4 is viewed from the +Y direction. Fig.11 It is a top view (back view) of the bonding tool 4 as viewed from the +Z direction. Fig.12 (A) Fig.12 (B) is Fig.11 Respective cross-sectional views at the single-dot chain lines Y1-Y1 and Y2-Y2. Fig.13 yes Fig.11 Respective cross-sectional views at the single-dot chain lines X1-X1 and X2-X2.

[0110] Fig.10 The bonding tool 4 shown is included in the ultrasonic bonding device. The bonding tool 4 is columnar and vibrates in a predetermined direction by a vibration generator also included in the ultrasonic bonding device. The columnar shape can be any of a cylindrical shape and a polygonal column shape. The predetermined direction can be a direction parallel to the XY plane.

[0111] The bonding tool 4 is at the front end ( Fig.10 The bonding front end portion 50 includes a bonding front end portion 50. The bonding front end portion 50 can press the bonding object to bond while contacting the bonding object and vibrating in a specified direction.

[0112] like Fig.11 and Fig.12 As shown, the front end portion 50 includes a bonding base 51 and a plurality of protrusions 52. The bonding base 51 and the plurality of protrusions 52 included in the front end portion 50 can be made of the same material. Such a material can be, for example, a superhard alloy material. The superhard alloy material is, for example, tungsten, tungsten carbide, or an alloy containing at least one of them.

[0113] The joining base 51 is located at the front end of the joining front end portion 50 that contacts the joining object. The joining base 51 is rectangular in a plan view and includes a front end face 51e that is substantially parallel to the XY plane and flat, and a side surface surrounding the front end face 51e. The portion connecting the side surface to the front end face 51e includes a pressing side edge 51a, a pressing front end edge 51b, a pressing side edge 51c, and a pressing rear end edge 51d. The length of the pressing front end edge 51b is equal to the length of the pressing rear end edge 51d, and is shorter than the length of the second joining portion 23e of the second connection terminal 23b in the same direction.

[0114] A plurality of protrusions 52 may be integrally formed on the front end face 51e. That is, the front end face 51e of the bonding base 51 includes a collection of concave and convex parts due to the plurality of protrusions 52. The protrusion 52 is in the shape of a quadrangular pyramid and includes side surfaces 52a to 52d. The protrusion 52 in this case includes a flat pressing surface 52e at the top. In addition, the protrusion 52 arranged along the periphery of the front end face 51e among the plurality of protrusions 52 is a shape obtained by halving a quadrangular pyramid. The protrusion 52 provided on the pressing side edge 51a side of the front end face 51e includes side surfaces 52c and 52d. The protrusion 52 provided on the pressing front end edge 51b side of the front end face 51e includes side surfaces 52a and 52d. The protrusion 52 provided on the pressing side edge 51c side of the front end face 51e includes side surfaces 52a and 52b. The protrusion 52 provided on the pressing rear end edge 51d side of the front end face 51e includes side surfaces 52b and 52c.

[0115] The plurality of protrusions 52 may be formed in a staggered or lattice shape. The configuration of the plurality of protrusions 52 is an example. In addition, the tetrahedral pyramid shape of the protrusion 52 is an example, and it may also be a polygonal pyramid or a cone. A plurality of such protrusions 52 are arranged on the front end face 51e in a manner separated by gaps 53. The heights of the plurality of protrusions 52 are substantially equal. The height refers to the height from the front end face 51e to the pressing surface 52e of the protrusion 52. The pressing surfaces 52e of the plurality of protrusions 52 form the same plane.

[0116] In addition, the height of the plurality of protrusions 52 from the front end face 51e is greater than 15% of the thickness of the object to be joined and less than 90% of the thickness of the object to be joined. In the case where the height of the plurality of protrusions 52 from the front end face 51e is less than 15% of the thickness of the object to be joined, if the joining front end portion 50 including such a plurality of protrusions 52 is used for joining, the object to be joined will be ground and damaged. In addition, if the height of the plurality of protrusions 52 from the front end face 51e exceeds 90% of the thickness of the object to be joined, the object to be joined may break. It should be noted that in the present embodiment, the height of the plurality of protrusions 52 from the front end face 51e is, for example, greater than 0.15 mm.

[0117] use Figure 14~Figure 17 The bonding in the wiring process performed using such a bonding tool 4 will be described. Fig.14 This is a plan view showing a wiring step (during bonding) included in the method for manufacturing the semiconductor device according to the first embodiment. Fig.15 This is a cross-sectional view showing a wiring step included in the method for manufacturing the semiconductor device according to the first embodiment (during bonding). Fig.16 This is a plan view of the main parts (during bonding) showing a wiring step included in the method for manufacturing the semiconductor device according to the first embodiment. Fig.17 This is a cross-sectional view of the main parts showing the wiring process included in the manufacturing method of the semiconductor device of the first embodiment (during bonding). Here, the bonding of the second bonding portion 23e of the second connection terminal 23b and the wiring board 11b3 is described. The bonding of the other bonding portions and the wiring boards 11b1 and 11b2 is also performed in the same manner.

[0118] It should be noted that Fig.14 In FIG. 1 , the periphery of the dotted line on the front surface of the second bonding portion 23 e of the second connection terminal 23 b shows the arrangement position of the bonding base 51 of the bonding tool 4 provided on the front surface of the second bonding portion 23 e. Fig.15 yes Fig.14 of Figure 8 Cross-sectional view at the single-dot chain line XX at the corresponding position. Fig.16 yes Fig.14 The enlarged view of the second bonding portion 23e within the dotted circle. Fig.16 The arrangement position of the joint tip portion 50 (and the plurality of protrusions 52 ) is indicated by a dotted line. Fig.17 yes Fig.16 The cross-sectional view at the dashed line YY. Fig.17 , only the bonding tip portion 50 of the bonding tool 4 that presses the second bonding portion 23e is described.

[0119] In order to bond the second bonding portion 23e of the second connection terminal 23b to the wiring board 11b3 of the insulating circuit substrate 11, the bonding tip 50 of the bonding tool 4 is set on the front surface 23e1 of the second bonding portion 23e. Fig.14 and Fig.15 As shown, the pressing front end edge 51b of the joint front end portion 50 (joining base 51) is located at a position further outward (+Y direction: the center side of the unit storage portion 21f) than the joint front end edge 23e3 of the second joint portion 23e. In addition, at this time, the pressing side edges 51a and 51c of the joint front end portion 50 (joining base 51) are located at a position further inward (±X direction) than the joint side edges 23e4 and 23e6 of the second joint portion 23e.

[0120] In this state, the second joining portion 23 e of the second connection terminal 23 b is pressed toward the wiring board 11 b 3 of the insulating circuit substrate 11 while the joining tip portion 50 of the bonding tool 4 is vibrated at a predetermined vibration frequency.

[0121] So, like Fig.16 and Fig.17 As shown, the bonding tip 50 of the bonding tool 4 enters the front surface 23 e 1 of the second bonding portion 23 e of the second connection terminal 23 b and generates burrs B from the pressing sides 51 a and 51 c of the bonding tip 50 (bonding base 51 ).

[0122] As described above, the second joint portion 23e of the second connection terminal 23b can be joined to the wiring board 11b3 of the insulating circuit substrate 11. Fig.18 and Fig.19 The situation after such joining will be described. Fig.18 This is a plan view of the main parts (after bonding) showing a wiring step included in the method for manufacturing the semiconductor device according to the first embodiment. Fig.19 1 is a cross-sectional view of a main part (after bonding) showing a wiring process included in the method for manufacturing a semiconductor device according to the first embodiment. Fig.18 and Fig.19 Corresponding to Fig.16 and Fig.17 The bonding tool 4 is removed after bonding. Fig.19 Corresponds to Fig.18 Cross-sectional view at the single-dot chain line YY.

[0123] like Fig.16 and Fig.17 As described in the above, after the second connecting portion 23e of the second connecting terminal 23b is bonded to the wiring board 11b3 of the insulating circuit substrate 11 using the bonding tool 4, the bonding tool 4 is removed. Fig.18 and Fig.19 As shown, an indentation 28 is generated on the front surface 23e1 of the second engaging portion 23e of the second connecting terminal 23b.

[0124] like Fig.18 As shown, the indentation 28 is a structure in which a plurality of projections 52 included in the bonding tip 50 of the bonding tool 4 are transferred to the front surface 23e1 of the second bonding portion 23e of the second connection terminal 23b. Fig.19As shown in FIG. 1 , the indentation portion 23e7 on which the indentation 28 is transferred to the second bonding portion 23e is recessed relative to the front surface 23e1 of the second bonding portion 23e of the second connection terminal 23b and is located below the front surface 23e1. It should be noted that the depth of the indentation portion 23e7 relative to the front surface 23e1 of the second bonding portion 23e is, for example, 250 μm or more and 700 μm or less. Such an indentation 28 includes an indentation front end edge 28a3, an indentation side edge 28a4, an indentation rear end edge 28a5, and an indentation side edge 28a6 when viewed from above.

[0125] The indentation front end 28a3 is located at one end of the indentation 28 (the +Y direction side and the center side of the unit storage portion 21f) and is flush with the bonding front end 23e3 of the second bonding portion 23e of the second connection terminal 23b. The length of the indentation rear end 28a5 in the ±X direction is length L5.

[0126] The indentation rear end side 28a5 is opposite to the indentation front end side 28a3 and is the other end side (-Y direction side) of the indentation 28. The length of the indentation rear end side 28a5 in the ±X direction is the same as the indentation front end side 28a3, which is the length L5. The length L5 of the indentation rear end side 28a5 is shorter than the length L0 of the bonding rear end side 23e5 of the second bonding portion 23e of the second connection terminal 23b.

[0127] The indentation side edges 28a4 and 28a6 are orthogonal to the indentation front end edge 28a3 and the indentation rear end edge 28a5, and connect the indentation front end edge 28a3 and the indentation rear end edge 28a5 respectively. The lengths L4 and L6 (±Y direction) of the indentation side edges 28a4 and 28a6 are equal. The indentation side edges 28a4 and 28a6 are located further inside in the ±X direction than the bonding side edges 23e4 and 23e6 of the second bonding portion 23e of the second connecting terminal 23b. The distance between the indentation side edges 28a4 and 28a6 and the bonding side edges 23e4 and 23e6 of the second bonding portion 23e of the second connecting terminal 23b is the distance W. The distance W can be, for example, greater than 1 mm, and more preferably greater than 1.5 mm. In addition, burrs B can be generated on the indentation side edges 28a4 and 28a6. Fig.18 and Fig.19, the case where the burr B extends continuously to the outside (on the side of the joint side 23e4, 23e6 of the second joint portion 23e) along the entire indentation side 28a4, 28a6 is shown. It should be noted that the shape, size, length in the ±X direction and ±Y direction, and thickness in the ±Z direction of the burr B are only an example. The burr B can be generated discontinuously along the entire indentation side 28a4, 28a6. In addition, the length of the burr B extending to the outside from the indentation side 28a4, 28a6 can be different depending on the position (in the ±Y direction) of the indentation side 28a4, 28a6. The burr B extending from the indentation side 28a4, 28a6 does not have to be symmetrical.

[0128] Next, a sealing step is performed in which the unit storage portions 21e, 21f, and 21g of the housing 20 that store the semiconductor unit 10 are filled with sealing components for sealing. Figure 6 Step S4). After the unit housing portions 21e, 21f, and 21g are filled with a sealing member, the sealing member is cured to seal the semiconductor unit 10 and the like, thereby obtaining the semiconductor device 1.

[0129] Here, a method for manufacturing the semiconductor device 1 of the reference example will be described. The semiconductor device 1 of the reference example can also be manufactured according to Figure 6 However, in the reference example, the length of the bonding base 51 of the bonding tip 50 of the bonding tool 4 in the ±X direction is longer than the length of the bonding portion of each terminal in the same direction. Therefore, a plurality of protrusions 52 are also uniformly formed on the expanded bonding base 51. It should be noted that the semiconductor device 1 and the method for manufacturing the semiconductor device 1 are the same as those of the first embodiment except for this.

[0130] Similar to the first embodiment, the preparation step of step S1 and the assembly step of step S2 are performed. Next, a wiring step ( Figure 6 Step S3). Use Fig. 20 and Fig.21 The bonding between the second bonding portion 23e of the second connection terminal 23b and the wiring board 11b3 by the bonding tool 4 included in the wiring step will be described.

[0131] Fig. 20 It is a main part plan view (during bonding) showing a wiring process included in a method for manufacturing a semiconductor device according to a reference example. Fig.21 1 is a cross-sectional view of a main part showing a wiring process included in a method for manufacturing a semiconductor device according to a reference example (during bonding). Fig. 20 and Fig.21 Corresponding to Fig.16 and Fig.17 .in addition, Fig. 20The arrangement position of the joint tip portion 50 (and the plurality of protrusions 52 ) is indicated by a dotted line. Fig.21 yes Fig. 20 Cross-sectional view at the single-dot chain line YY.

[0132] As in the first embodiment, the bonding tip 50 of the bonding tool 4 is disposed on the front surface 23e1 of the second bonding portion 23e. Then, the second bonding portion 23e of the second connection terminal 23b is pressed toward the wiring board 11b3 of the insulating circuit substrate 11 while the bonding tip 50 of the bonding tool 4 is vibrated at a predetermined vibration frequency.

[0133] So, like Fig. 20 and Fig.21 As shown, the bonding tip 50 of the bonding tool 4 enters the front surface 23e1 of the second bonding portion 23e of the second connection terminal 23b and generates burrs B extending outward (in the ±X direction) from the bonding side edges 23e4 and 23e6 of the second bonding portion 23e.

[0134] use Fig. 22 The situation after the bonding tool 4 is removed after the bonding is completed will be described. Fig. 22 1 is a side view of a main part (after bonding) showing a wiring process included in a method for manufacturing a semiconductor device according to a reference example. Fig. 22 1 is a side view of the second connecting terminal 23b and the wiring board 11b3, as viewed from the +X direction. It should be noted that although the top view of the front side 23e1 of the second connecting terminal 23b's second connecting portion 23e is omitted in this case, Fig.18 In the embodiment, the indentation sides 28a4, 28a6 of the indentation 28 coincide with the bonding sides 23e4, 23e6 of the second bonding portion 23e of the second connection terminal 23b.

[0135] After the joining in step S3, Fig. 22 As shown, an indentation 28 is formed on the front surface 23e1 of the second bonding portion 23e of the second connection terminal 23b. Then, a packaging process is performed in step S4 to manufacture the semiconductor device 1.

[0136] When such semiconductor device 1 is subjected to a heat cycle test, stress is generated inside due to differences in linear expansion coefficients of components of semiconductor device 1. Such stress also affects the joints of the terminals to wiring boards 11b1, 11b2, and 11b3.

[0137] For example, in the manufacturing method of the semiconductor device 1 of the reference example, if Fig. 20As shown, the front end portion 50 of the bonding tool 4 is used to press the front side 23e1 of the second bonding portion 23e of the second connecting terminal 23b. Then, cracks are generated at the corners C1 and C2 of the front side 23e1 of the second bonding portion 23e due to the front end portion 50, and the cracks develop from the corners C1 and C2 along the arrows.

[0138] A thermal cycle test was performed on the semiconductor device 1 including the second connection terminal 23b having such a crack. The second bonding portion 23e of the second connection terminal 23b was fixed to the wiring board 11b3, and the second wiring portion 23g was fixed to the outer frame 21. If the semiconductor device 1 is warped, stress is generated in the second connection terminal 23b. In this way, the cracks along the second connection terminal 23b are Fig. 22 As the arrow F indicates, the second bonding portion 23e has an indentation 28 transferred thereto, which is left on the wiring board 11b3 and causes breakage. Therefore, in the reference example, the semiconductor device 1 tends to have a shorter lifespan and lower long-term reliability.

[0139] On the other hand, in the bonding front end portion 50 (bonding base 51) of the bonding tool 4 used in the manufacturing method of the semiconductor device 1 of the first embodiment, the pressing front end edge 51b is located at a position farther outward than the bonding front end edge 23e3 of one end of the second bonding portion 23e, and the length of the pressing rear end edge 51d opposite to the pressing front end edge 51b is narrower than the length of the bonding rear end edge 23e5 of the other end of the second bonding portion 23e.

[0140] When the front surface 23e1 of the second bonding portion 23e of the second connection terminal 23b is pressed by the bonding tip 50 of the bonding tool 4, cracks are generated at the corners C1 and C2 of the front surface 23e1 of the second bonding portion 23e, and the cracks spread from the corners C1 and C2 along the arrows (see FIG. Fig.16 However, in this case, since the length of the pressing rear end side 51d opposite to the pressing front end side 51b is shorter than the length of the bonding rear end side 23e5 at the other end of the second bonding portion 23e, the stress applied to the corners C1 and C2 is in two directions ( Fig.16 The cracks are dispersed as shown in the arrows F1 and F2 of FIG. 1 . Therefore, the development of cracks in various directions can be delayed. Therefore, even if the semiconductor device 1 of the first embodiment is subjected to a thermal cycle test, the development of cracks can be delayed, and the breakage of the second connection terminal 23 b (second bonding portion 23 e) can be delayed. As a result, the durability of the semiconductor device 1 of the first embodiment can be prevented from being reduced, and the long-term reliability can be improved.

[0141] In addition, the pressing area of ​​the bonding front end portion 50 of such a bonding tool 4 is smaller than that of the reference example. Therefore, the volume of the front face 23e1 of the second bonding portion 23e of the second connecting terminal 23b that is pressed is also reduced. As a result, the amount of burrs B generated on the front face 23e1 of the second bonding portion 23e of the second connecting terminal 23b is also reduced. Depending on its extension condition, the burrs B may contact other structures that can be energized. In addition, the burrs B may become the cause of noise. In the manufacturing method of the semiconductor device 1 of the first embodiment, since the amount of burrs B generated is suppressed, the possibility of contact with other structures that can be energized is reduced, and the generation of noise is also suppressed.

[0142] The semiconductor device 1 manufactured by the above manufacturing method includes a wiring board 11b3 and a second connection terminal 23b. The second connection terminal 23b includes a flat second bonding portion 23e, the back surface 23e2 of which is bonded to the wiring board 11b3, and an indentation 28 is formed on the front surface 23e1. The indentation front end edge 28a3 at one end of the indentation 28 is on the same plane as the bonding front end edge 23e3 at one end of the second bonding portion 23e, and the length of the indentation rear end edge 28a5 at the other end of the indentation 28 opposite to the indentation front end edge 28a3 is shorter than the length of the bonding rear end edge 23e5 at the other end of the second bonding portion 23e opposite to the bonding front end edge 23e3. Thus, the development of cracks generated at the bonding rear end edge 23e5 of the second bonding portion 23e can be delayed. As a result, the durability of the semiconductor device 1 of the first embodiment can be prevented from being reduced, and the long-term reliability can be improved.

[0143] In addition, the length L5 of the indentation rear end side 28a5 of the indentation 28 and the lengths L4 and L6 of the indentation side sides 28a4 and 28a6 (L4+L5+L6) is preferably longer than the length L0 of the joint front end side 23e3 of the second joint portion 23e of the second connection terminal 23b. This can further slow down the development of cracks.

[0144] In addition, as described above, the distance W between the indentation side edges 28a4, 28a6 and the bonding side edges 23e4, 23e6 of the second bonding portion 23e of the second connection terminal 23b can be, for example, 1 mm or more, and more preferably 1.5 mm or more. For example, when the distance W is greater than 0 mm and less than 0.5 mm, the adjacent portion of the indentation portion 23e7 of the second bonding portion 23e in the ±X direction is easily broken by the thermal cycle test. This is believed to be due to the indentation portion 23e7 of the second bonding portion 23e (see Fig.19Therefore, the distance W between the indentation sides 28a4, 28a6 and the bonding sides 23e4, 23e6 of the second bonding portion 23e of the second connection terminal 23b is greater than 1 mm, preferably greater than 1.5 mm.

[0145] [Second embodiment] In a second embodiment, using Fig.23 , a method for manufacturing the semiconductor device 1 using the bonding tip portion 50 of the bonding tool 4 having a shape different from that of the first embodiment will be described. Fig.23 This is a plan view of a main part (during bonding) showing a wiring step included in the method for manufacturing a semiconductor device according to the second embodiment.

[0146] The semiconductor device of the second embodiment can also be Figure 6 However, in the second embodiment, the shape of the bonding base 51 of the bonding tip portion 50 of the bonding tool 4 in a plan view is different from that of the first embodiment.

[0147] The bonding base 51 of the second embodiment is hexagonal in plan view, and the side of the bonding base 51 opposite to the bonding rear end edge 23e5 of the second connection terminal 23b protrudes toward the bonding rear end edge 23e5. That is, the bonding base 51 of the second embodiment includes a front end face 51e that is substantially parallel to the XY plane and flat, and side faces surrounding the front end face 51e. Fig.23 As shown, the portion connecting the side surface and the front end surface 51e includes a pressing side edge 51a, a pressing front end edge 51b, a pressing side edge 51c, and a pressing rear end edge 51d.

[0148] The pressing front end side 51b is located outside (in the +Y direction) the joint front end side 23e3 of the second joint portion 23e of the second connection terminal 23b. The length of the pressing front end side 51b in the ±X direction is greater than the length of the joint front end side 23e3 of the second joint portion 23e of the second connection terminal 23b in the same direction.

[0149] The pressing side edges 51a and 51c are connected to the ends of the pressing front edge 51b in the ±X direction and are perpendicular to the pressing front edge 51b. The lengths (±Y direction) of the pressing side edges 51a and 51c are equal as long as the connection angle of the pressing side portions 51d2 and 51d3 described later relative to the pressing central portion 51d1 is less than 90°.

[0150] The two ends of the pressing rear end edge 51d are connected to the pressing side edges 51a and 51c. The pressing rear end edge 51d also includes a pressing central portion 51d1 and pressing side portions 51d2 and 51d3. The pressing central portion 51d1 is the central portion of the pressing rear end edge 51d and is parallel to the pressing front end edge 51b. The length of the pressing central portion 51d1 in the ±X direction is shorter than the length of the joint rear end edge 23e5 of the second joint portion 23e of the second connecting terminal 23b in the same direction. In addition, the pressing central portion 51d1 is closer to the joint rear end edge 23e5 of the second joint portion 23e than the ends of the pressing side edges 51a and 51c in the -Y direction. That is, the pressing central portion 51d1 of the pressing rear end edge 51d protrudes to the opposite side relative to the pressing front end edge 51b.

[0151] The pressing side portions 51d2 and 51d3 connect the two ends of the pressing center portion 51d1 in the ±X direction with the ends of the pressing side edges 51a and 51c in the -Y direction. The lengths of the pressing side portions 51d2 and 51d3 are equal, although they depend on the protruding state of the pressing center portion 51d1. The connection angles of the pressing side portions 51d2 and 51d3 with respect to the pressing center portion 51d1 are respectively less than 90°.

[0152] In such a pressing rear end side 51d, the connection between the pressing center portion 51d1 and the pressing side portions 51d2 and 51d3 forms corners C1 and C2. The angles of the corners C1 and C2 are larger than those of the first embodiment and are larger than 90 degrees.

[0153] A plurality of protrusions 52 are uniformly formed on the entire front end surface 51e of such a bonding base 51. In addition, in the second embodiment, the heights of the plurality of protrusions 52 are also substantially equal. The height refers to the height from the front end surface 51e to the pressing surface 52e of the protrusion 52. The pressing surfaces 52e of the plurality of protrusions 52 form the same plane.

[0154] Using such a bonding tool 4 Figure 6 The bonding tip 50 of the bonding tool 4 of the second embodiment is set on the front surface 23e1 of the second bonding part 23e (see Fig.23 ).

[0155] In this state, the second joining portion 23 e of the second connection terminal 23 b is pressed toward the wiring board 11 b 3 of the insulating circuit substrate 11 while the joining tip portion 50 of the bonding tool 4 is vibrated at a predetermined vibration frequency.

[0156] So, like Fig.23As shown, the front end 50 of the bonding tool 4 enters the front face 23e1 of the second bonding portion 23e of the second connection terminal 23b. It should be noted that, in this case, although not shown in the figure, burrs B are also generated from the portions of the bonding sides 23e4 and 23e6 of the second connection terminal 23b (second bonding portion 23e) that are in contact with the front end 50 (bonding base 51).

[0157] As described above, the second joint portion 23e of the second connection terminal 23b can be joined to the wiring board 11b3 of the insulating circuit substrate 11. Fig.24 The situation after such joining will be described. Fig.24 1 is a top view of the main part (after bonding) showing the wiring process included in the manufacturing method of the semiconductor device of the second embodiment. Fig.24 Shown in Fig.23 FIG. 2 is a diagram showing the front surface 23e1 of the second bonding portion 23e of the second connection terminal 23b after the bonding tool 4 is removed. In addition, the description of the burr B is omitted.

[0158] like Fig.23 As described in the above, after the second connecting portion 23e of the second connecting terminal 23b is bonded to the wiring board 11b3 of the insulating circuit substrate 11 using the bonding tool 4, the bonding tool 4 is removed. Fig.24 As shown, an indentation 28 is generated on the front surface 23e1 of the second engaging portion 23e of the second connecting terminal 23b.

[0159] The indentation 28 is a structure in which a plurality of projections 52 included in the bonding front end portion 50 of the bonding tool 4 are transferred to the front face 23e1 of the second bonding portion 23e of the second connection terminal 23b. In addition, although the indentation portion to which the indentation 28 is transferred to the second bonding portion 23e is omitted in the figure, as described above, it is recessed relative to the front face 23e1 of the second bonding portion 23e of the second connection terminal 23b and is located at a position lower than the front face 23e1. Such an indentation 28 includes an indentation front end edge 28a3, an indentation side edge 28a4, an indentation rear end edge 28a5, and an indentation side edge 28a6 when viewed from above.

[0160] The indentation front end edge 28a3 is located at one end side of the indentation 28 (the +Y direction side and the center side of the unit storage portion 21f), and is in the same plane as the joint front end edge 23e3 of the second connection terminal 23b (the second joint portion 23e). The length of the indentation front end edge 28a3 in the ±X direction is the same as the joint front end edge 23e3 of the second joint portion 23e.

[0161] The indentation side edges 28a4 and 28a6 are connected to the ends of the indentation front edge 28a3 in the ±X direction and are orthogonal to the indentation front edge 28a3. The indentation side edges 28a4 and 28a6 are on the same plane as the bonding side edges 23e4 and 23e6 of the second connection terminal 23b (second bonding portion 23e). The lengths (±Y direction) of the indentation side edges 28a4 and 28a6 are equal.

[0162] The indentation rear end edge 28a5 is connected to the indentation side edges 28a4 and 28a6. The indentation rear end edge 28a5 also includes a central portion 28a7 and side portions 28a8 and 28a9. The central portion 28a7 is the central portion of the indentation rear end edge 28a5 and is parallel to the indentation front end edge 28a3. The length of the central portion 28a7 in the ±X direction is shorter than the length in the same direction of the bonding rear end edge 23e5 of the second connection terminal 23b (second bonding portion 23e). In addition, the central portion 28a7 is closer to the bonding rear end edge 23e5 of the second bonding portion 23e than the ends of the indentation side edges 28a4 and 28a6 in the -Y direction. That is, the central portion 28a7 of the indentation rear end edge 28a5 protrudes to the opposite side relative to the indentation front end edge 28a3.

[0163] The side portions 28a8 and 28a9 connect the ends of the central portion 28a7 in the ±X direction with the ends of the indentation side edges 28a4 and 28a6 in the -Y direction. The lengths of the side portions 28a8 and 28a9 correspond to the protrusion of the central portion 28a7 and are equal. The connection angles of the side portions 28a8 and 28a9 with respect to the central portion 28a7 are less than 90°.

[0164] In the thermal cycle test, cracks generated at the corners C1 and C2 of the front surface 23e1 of the second joint 23e develop from the corners C1 and C2 along the arrows. However, in this case, since the length of the pressing center portion 51d1 of the pressing rear end side 51d opposite to the pressing front end side 51b is shorter than the length of the joint rear end side 23e5 at the other end of the second joint 23e, the stress applied to the corners C1 and C2 is in two directions ( Fig.23 Therefore, as in the first embodiment, the development of the crack in all directions can be delayed. In addition, the crack develops and connects the bonding side edges 23e4 and 23e6 of the second bonding portion 23e, so that the length until the second bonding portion 23e breaks (the length of the indentation rear end edge 28a5) is shorter than Fig. 20In the case of the reference example, the length between the corner C1 and the corner C2 of the second bonding portion 23e is long. Therefore, even if the semiconductor device of the second embodiment is subjected to a thermal cycle test, the development of cracks can be delayed, and the breakage of the second connection terminal 23b (second bonding portion 23e) can be delayed. As a result, the durability of the semiconductor device of the second embodiment can be prevented from being reduced, and the long-term reliability can be improved.

[0165] It should be noted that the shape of the bonding tip portion 50 (bonding base 51) of the bonding tool 4 of the second embodiment can be formed as long as Fig.24 Therefore, the pressing side edges 51a, 51c and the pressing front end edge 51b of the bonding base 51 may not be the same as Fig.23 The side may be formed in such a way, for example, in an arc shape.

[0166] [Third Embodiment] In a third embodiment, using Fig.25 , a method for manufacturing the semiconductor device 1 using the bonding tip portion 50 of the bonding tool 4 having a shape different from that of the first embodiment will be described. Fig.25 FIG. 1 is a top view showing a wiring process (during bonding) included in the method for manufacturing a semiconductor device according to the third embodiment. Fig.25 In FIG. 1 , the arrangement position of the bonding base 51 is shown by a dotted circle.

[0167] The semiconductor device of the third embodiment can also be Figure 6 However, in the third embodiment, the shape of the bonding base 51 of the bonding tip portion 50 of the bonding tool 4 in a plan view is different from that of the first embodiment.

[0168] The bonding base 51 of the third embodiment includes an arc-shaped portion on the outer circumference when viewed from above. Such a bonding base 51 may be, for example, an ellipse (including a circle). Alternatively, as long as the bonding base 51 includes an arc-shaped portion on the outer circumference, it may be, for example, a rectangular shape with one of the four sides protruding outward. Alternatively, in the bonding base 51 of the first embodiment, the rear end side 51d of the pressing part may also be an arc-shaped.

[0169] In the third embodiment, the case where the shape of the bonding base 51 is circular is used as an example for explanation. The bonding base 51 of the bonding tool 4 is circular. Here, a case where the diameter of the bonding base 51 is longer than the length of the bonding front end edge 23e3 of the second bonding portion 23e of the second connection terminal 23b is shown. In addition, in this case, a plurality of protrusions 52 are also uniformly formed on the entire front end surface 51e of the bonding base 51. In addition, in the third embodiment, the heights of the plurality of protrusions 52 are also approximately equal. The height refers to the height from the front end surface 51e to the pressing surface 52e of the protrusion 52. The pressing surfaces 52e of the plurality of protrusions 52 form the same plane.

[0170] Using such a bonding tool 4 Figure 6 The connection in the wiring process of step S3. Fig.25 As shown, the bonding tip 50 of the bonding tool 4 of the third embodiment is set on the front surface 23e1 of the second bonding portion 23e. In this case, the bonding base 51 is set so that its arc-shaped portion crosses the length of the second bonding portion 23e of the second connection terminal 23b in the ±X direction.

[0171] In this state, the second joining portion 23 e of the second connection terminal 23 b is pressed toward the wiring board 11 b 3 of the insulating circuit substrate 11 while the joining tip portion 50 of the bonding tool 4 is vibrated at a predetermined vibration frequency.

[0172] In this way, the front end 50 of the bonding tool 4 enters the front surface 23e1 of the second bonding portion 23e of the second connection terminal 23b. It should be noted that, in this case, although not shown in the figure, burrs B are also generated from the portions of the bonding sides 23e4 and 23e6 of the second connection terminal 23b (second bonding portion 23e) that are in contact with the front end 50 (bonding base 51).

[0173] As described above, the second joint portion 23e of the second connection terminal 23b can be joined to the wiring board 11b3 of the insulating circuit substrate 11. Fig.26 The situation after such joining will be described. Fig.26 1 is a top view of the main part (after bonding) showing the wiring process included in the method for manufacturing a semiconductor device according to the third embodiment. Fig.26 Corresponding to Fig.25 The case where bonding tool 4 is removed.

[0174] After the second connecting portion 23e of the second connecting terminal 23b is bonded to the wiring board 11b3 of the insulating circuit substrate 11 using the bonding tool 4, the bonding tool 4 is removed. Fig.26 As shown, an indentation 28 is generated on the front surface 23e1 of the second engaging portion 23e of the second connecting terminal 23b.

[0175] As in the first and second embodiments, the indentation 28 is a collection of projections and depressions of a plurality of protrusions 52 included in the bonding front end portion 50 of the bonding tool 4, which is transferred to the front face 23e1 of the second bonding portion 23e of the second connection terminal 23b. In addition, although not shown in the figure, as described above, the indentation portion 23e7 to which the indentation 28 is transferred to the second bonding portion 23e is recessed relative to the front face 23e1 of the second bonding portion 23e of the second connection terminal 23b and is located below the front face 23e1. Such an indentation 28 includes an indentation front end edge 28a3, an indentation side edge 28a4, an indentation rear end edge 28a5, and an indentation side edge 28a6 when viewed from above.

[0176] The indentation front end edge 28a3 is located at one end side of the indentation 28 (the +Y direction side and the center side of the unit storage portion 21f), and is in the same plane as the joint front end edge 23e3 of the second connection terminal 23b (the second joint portion 23e). The length of the indentation front end edge 28a3 in the ±X direction is the same as the joint front end edge 23e3 of the second joint portion 23e.

[0177] The indentation side edges 28a4 and 28a6 are connected to the ends of the indentation front edge 28a3 in the ±X direction and are orthogonal to the indentation front edge 28a3. The indentation side edges 28a4 and 28a6 are on the same plane as the joint side edges 23e4 and 23e6 of the second joint portion 23e of the second connection terminal 23b. The lengths (±Y direction) of the indentation side edges 28a4 and 28a6 are equal.

[0178] The indentation rear end edge 28a5 is connected to the indentation side edges 28a4 and 28a6. The center of the indentation rear end edge 28a5 protrudes to the opposite side with respect to the indentation front end edge 28a3. That is, the indentation rear end edge 28a5 is in an arc shape.

[0179] The front face 23e1 of the second bonding portion 23e of the second connection terminal 23b is pressed by the bonding front end 50 of the bonding tool 4 of the third embodiment. In this case, the bonding front end 50 (bonding base 51) of the bonding tool 4 has an arc-shaped portion at a part of the outer periphery. Therefore, the indentation rear end side 28a5 of the indentation 28 on the front face 23e1 of the second bonding portion 23e obtained thereby is also in an arc shape, and the generation of cracks is suppressed more than in the first and second embodiments.

[0180] Even if a crack occurs at any of the indentation rear end edge 28a5 of the indentation 28 on the front side 23e1 of the second bonding portion 23e, since the indentation rear end edge 28a5 of the indentation 28 is in the shape of an arc, the stress of the crack is also dispersed in two directions along the arc. Therefore, as in the first embodiment and the second embodiment, the development of the crack in all directions can be delayed. Therefore, even if the semiconductor device of the third embodiment is subjected to a thermal cycle test, the development of the crack can be delayed, and the fracture of the second connection terminal 23b (second bonding portion 23e) can be delayed. As a result, the durability of the semiconductor device of the third embodiment can be prevented from being reduced, and the long-term reliability can be improved.

Claims

1. A semiconductor device, characterized in that: having a conductive portion and a terminal, The terminal has a flat plate-shaped joint portion, the back side of the joint portion is joined to the conductive portion, and an indentation is formed on the front side of the joint portion. The front end edge of the indentation at one end of the indentation and the front end edge of the joint at one end of the joint portion are on the same plane, The length of the indentation rear end side at the other end of the indentation opposite to the indentation front end side is shorter than the length of the joint rear end side at the other end of the joint portion opposite to the joint front end side.

2. The semiconductor device according to claim 1, wherein: The indentation further includes a pair of indentation side edges connecting the indentation front end edge and the indentation rear end edge.

3. The semiconductor device according to claim 2, wherein: The length of the indentation front end side of the indentation is shorter than the length of the joining front end side of the joining portion.

4. The semiconductor device according to claim 3, wherein: The indentation is rectangular in a plan view, and the length of the front end side of the indentation is equal to the length of the rear end side of the indentation.

5. The semiconductor device according to claim 4, wherein: The joint portion further includes a pair of joint side edges orthogonal to the joint front end edge and the joint rear end edge. The pair of engaging sides are located outside the pair of indentation sides of the indentation.

6. The semiconductor device according to claim 5, wherein: The distances from the pair of indentation sides of the indentation to the pair of joining sides of the joining portion are each 1 mm or more.

7. The semiconductor device according to claim 5, wherein: A length obtained by combining the indentation rear end side and the pair of indentation side sides of the indentation is longer than a length of the joining front end side of the joining portion.

8. The semiconductor device according to claim 1 or 2, characterized in that: The indentation rear end edge of the indentation protrudes toward the opposite side to the indentation front end edge.

9. The semiconductor device according to claim 8, wherein: The indentation rear end edge of the indentation includes a central portion and a pair of connecting portions respectively arranged on both sides of the central portion, The length of the central portion of the rear end edge of the indentation is narrower than the length of the joint rear end edge of the joint portion, At the rear end edge of the indentation, the central portion is most prominent.

10. The semiconductor device according to claim 9, wherein: At the rear end edge of the indentation, the central portion is parallel to the joint rear end edge, and the connection angle of the pair of connection portions relative to the central portion is less than 90°.

11. The semiconductor device according to claim 1, wherein: The bottom surface of the indentation of the joint portion is flat.

12. The semiconductor device according to claim 11, wherein: The indentation of the bonding portion is composed of a collection of projections and depressions, and the tops of a plurality of projections included in the collection are in the same plane.

13. The semiconductor device according to claim 1, wherein: The terminal has: a connecting portion integrally connected to the joint rear end edge of the front surface of the joint portion and rising upward from the front surface; and a wiring portion connected to an end of the connecting portion and extending to a position further outward than the conductive portion in a plan view, The semiconductor device further includes a housing that accommodates the conductive portion and fixes the wiring portion of the terminal.

14. A semiconductor device, characterized in that: having a conductive portion and a terminal, The terminal has a flat plate-shaped joint portion, the back side of the joint portion is joined to the conductive portion, and an indentation is formed on the front side of the joint portion. The front end edge of the indentation at one end of the indentation and the front end edge of the joint at one end of the joint portion are on the same plane, The indentation rear end side at the other end of the indentation that is opposite to the indentation front end side is in an arc shape that protrudes to the opposite side to the indentation front end side.

15. A method for manufacturing a semiconductor device, characterized in that: include: A preparation step of preparing a conductive portion and a terminal having a flat-plate-shaped joining portion; as well as The bonding step comprises placing the back side of the bonding part on the conductive part, and using a pressing surface included in the front end of the tool to press the front side of the bonding part while vibrating, thereby bonding the back side of the bonding part to the conductive part. The pressing front end side of one end portion included in the pressing surface of the tool is located outside the bonding front end side of one end portion of the bonding portion, The length of the pressing rear end side of the other end of the pressing surface opposite to the pressing front end side is shorter than the length of the joining rear end side of the other end of the joining portion opposite to the joining front end side.

16. The method for manufacturing a semiconductor device according to claim 15, wherein: The pressing surface of the tool further includes a pair of pressing side edges connecting the pressing front end edge and the pressing rear end edge.

17. The method for manufacturing a semiconductor device according to claim 16, wherein: The length of the pressing front end side of the pressing surface of the tool is shorter than the length of the engaging front end side of the engaging portion.

18. The method for manufacturing a semiconductor device according to claim 17, wherein: The pressing surface of the tool is rectangular in a plan view, and the length of the pressing front end side is equal to the length of the pressing rear end side.

19. The method for manufacturing a semiconductor device according to claim 18, wherein: The joint portion further includes a pair of joint side edges orthogonal to the joint front end edge and the joint rear end edge. The pair of engaging sides are located outside the pair of pressing side portions of the pressing surface of the tool.

20. The method for manufacturing a semiconductor device according to claim 19, wherein: The distances from the pair of pressing sides of the pressing surface of the tool to the pair of joining sides of the joining portion are each 1 mm or more.

21. The method for manufacturing a semiconductor device according to claim 15, wherein: The pressing rear end edge of the pressing surface of the tool protrudes toward the opposite side to the pressing front end edge.

22. The method for manufacturing a semiconductor device according to claim 21, wherein: The pressing rear end edge of the pressing surface of the tool includes a pressing central portion and a pair of pressing connecting portions respectively arranged on both sides of the pressing central portion. The length of the pressing center portion of the pressing rear end side is shorter than the length of the engaging rear end side of the engaging portion, At the rear edge of the pressing end, the pressing center portion is most prominent.

23. The method for manufacturing a semiconductor device according to claim 15, wherein: The pressing surface of the tool is flat.

24. The method for manufacturing a semiconductor device according to claim 23, wherein: The pressing surface of the tool includes a collection of concavities and convexities, and the tops of the plurality of convexities included in the collection are in the same plane.

25. The method for manufacturing a semiconductor device according to claim 15, wherein: The terminal has: a connecting portion integrally connected to the joint rear end edge of the front surface of the joint portion and rising upward from the front surface; and a wiring portion connected to an end of the connecting portion and extending to a position further outward than the conductive portion in a plan view, The semiconductor device further includes a housing that accommodates the conductive portion and fixes the wiring portion of the terminal.

26. A method for manufacturing a semiconductor device, characterized in that: include: A preparation step of preparing a conductive portion and a terminal having a flat-plate-shaped joining portion; as well as A bonding step of placing the back side of the bonding portion on the conductive portion, and using a pressing surface included in the front end of a tool to press the front side of the bonding portion while vibrating, thereby bonding the back side of the bonding portion to the conductive portion; The pressing front end side of one end portion included in the pressing surface of the tool is located outside the bonding front end side of one end portion of the bonding portion, A pressing rear end side at the other end of the pressing surface that is opposite to the pressing front end side projects toward the opposite side relative to the pressing front end side and forms an arc shape.

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