Individually addressable light emitter array

Abstract

The invention relates to an individual addressable light emitter array. In some implementations, an optical module includes a plurality of bottom emitting vertical cavity surface emitting lasers (VCSELs), a plurality of anodes corresponding to and connected to the plurality of VCSELs; and a single cathode connected to the plurality of light emitters, wherein the single cathode is paired with each anode of the plurality of anodes.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This patent application claims priority to U.S. Provisional Patent Application No. 63 / 578,559, entitled “VERTICAL CAVITY SURFACEEMITTING LASER ARRAYS,” filed on August 24, 2023. The disclosure of that prior application is considered a part of and incorporated by reference into this patent application. Technical Field

[0003] The present disclosure relates generally to light emitters and arrays of individually addressable bottom-emitting vertical-cavity surface-emitting lasers (VCSELs). Background Art

[0004] Light emitter devices such as vertical cavity surface emitting lasers (VCSELs) may include lasers, light emitters, etc., in which a light beam is emitted in a direction perpendicular to a substrate surface (e.g., emitted perpendicularly from a surface of a semiconductor wafer). Multiple light emitter devices may be arranged in one or more emitter arrays (e.g., a VCSEL array) on a common substrate. Summary of the invention

[0005] In some implementations, an optical module includes a plurality of bottom-emitting vertical cavity surface emitting lasers (VCSELs), a plurality of anodes corresponding to and connected to the plurality of VCSELs; and a single cathode connected to a plurality of light emitters, wherein the single cathode is paired with each of the plurality of anodes.

[0006] In some implementations, an optical module includes a plurality of light emitters, a plurality of anodes corresponding to and connected to the plurality of light emitters, and one or more cathodes connected to the plurality of light emitters, wherein a light emitter among the plurality of light emitters includes a lower distributed Bragg reflector (DBR).

[0007] In some implementations, an optical module includes a plurality of light emitters, a plurality of p-type pads corresponding to and connected to the plurality of light emitters, and a single n-type pad connected to and paired with the plurality of p-type pads, wherein the light emitters in the plurality of light emitters include a lower distributed DBR.

[0008] In some implementations, an optical module includes: a plurality of bottom-emitting vertical cavity surface emitting lasers (VCSELs); a plurality of anodes corresponding to and connected to the plurality of bottom-emitting VCSELs; and a single cathode connected to the plurality of bottom-emitting VCSELs, wherein the single cathode is paired with each of the plurality of anodes.

[0009] In some implementations, the optical module further includes: a control component for individually controlling each anode of the plurality of anodes.

[0010] In some implementations, multiple anodes are arranged in a hexagonal lattice arrangement around a single cathode.

[0011] In some implementations, the plurality of anodes are arranged around a single cathode in at least one of: a tilted lattice, a square lattice, a rectangular lattice, or a diamond lattice.

[0012] In some implementations, multiple anodes are arranged in a linear arrangement around a single cathode.

[0013] In some implementations, a spacing between a first bottom emitting VCSEL in the plurality of bottom emitting VCSELs and a second bottom emitting VCSEL in the plurality of bottom emitting VCSELs is less than about 250 microns.

[0014] In some implementations, a spacing between a first bottom emitting VCSEL in the plurality of bottom emitting VCSELs and a second bottom emitting VCSEL in the plurality of bottom emitting VCSELs is less than about 50 microns.

[0015] In some implementations, an optical module includes: a plurality of light emitters, the light emitters of the plurality of light emitters including: a lower distributed Bragg reflector DBR, an upper DBR, an active region disposed between the lower DBR and the upper DBR, wherein the plurality of light emitters include a plurality of vertical cavity surface emitting lasers VCSELs, wherein the plurality of VCSELs are a plurality of bottom emitting VCSELs; a plurality of anodes corresponding to the plurality of light emitters and connected to the plurality of light emitters; and one or more cathodes connected to the plurality of light emitters, wherein each of the one or more cathodes is paired with corresponding two or more anodes of the plurality of anodes.

[0016] In some implementations, a first cathode of the one or more cathodes is paired with a first group of two or more anodes of the plurality of anodes, and wherein a second cathode of the one or more cathodes is paired with a second group of two or more anodes of the plurality of anodes.

[0017] In some implementations, the first set of two or more anodes is disjoint from the second set of two or more anodes.

[0018] In some implementations, at least one anode of the plurality of anodes is included in a first set of two or more anodes and is included in a second set of two or more anodes.

[0019] In some implementations, each group of two or more anodes in the plurality of anodes is arranged in a ring around a corresponding cathode in the one or more cathodes.

[0020] In some implementations, the rings form a hexagonal close-packed arrangement.

[0021] In some implementations, the optical module further includes a controller for controlling the plurality of anodes and the one or more cathodes to individually activate each of the plurality of light emitters.

[0022] In some implementations, the optical module further includes: a plurality of optical fibers for receiving a plurality of light beams from a plurality of light transmitters.

[0023] In some implementations, the optical module further includes: a detector array for receiving the plurality of light beams from the plurality of light emitters.

[0024] In some implementations, an optical module includes: a plurality of light emitters, wherein a light emitter of the plurality of light emitters includes: a lower distributed Bragg reflector DBR, an upper DBR, an active region disposed between the lower DBR and the upper DBR; a plurality of p-type pads corresponding to the plurality of light emitters and connected to the plurality of light emitters; and a single n-type pad connected to the plurality of light emitters and paired with the plurality of p-type pads.

[0025] In some implementations, the plurality of p-type pads includes a plurality of positively doped material regions disposed on a substrate.

[0026] In some implementations, the single n-type pad is a single region of negatively doped material disposed on the substrate.

[0027] In some implementations, the plurality of optical transmitters are each configured for less than a threshold data rate. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1A and 1B They are diagrams depicting an example transmitter;

[0029] Figure 2 is a diagram of an example optical module associated with an array of individually addressable light emitters; and

[0030] Figures 3A-3C is a diagram of an example implementation associated with an array of individually addressable light emitters. DETAILED DESCRIPTION

[0031] The following detailed description of example implementations refers to the accompanying drawings.The same reference numbers in different drawings may identify the same or similar elements.

[0032] Multiple light emitters, such as vertical cavity surface emitting lasers (VCSELs), can be arranged to form an array. For example, multiple bottom emitting VCSELs can form a VCSEL array, such as a linear emitter array (e.g., where multiple bottom emitting VCSELs are aligned in a linear arrangement and have uniform or non-uniform spacing), a grid emitter array (e.g., where multiple bottom emitting VCSELs are uniformly spaced in two dimensions and an oxidation trench can be shared by two or more emitters), or a non-grid emitter array (e.g., where multiple emitters are non-uniformly spaced in two dimensions and each emitter requires a set of oxidation trenches that may or may not be shared), etc.

[0033] In this arrangement, the VCSEL-to-VCSEL pitch (e.g., the spacing between the respective center points of each VCSEL) may be about 250 microns (μm), which may match a corresponding parallel optical fiber array. However, the density of VCSELs with a pitch of about 250 μm may not be sufficient to meet the needs of increasingly miniaturized optical systems. Additionally or alternatively, increasingly miniaturized and dense optical systems may have power consumption requirements and speed requirements that cannot be achieved with a VCSEL array with a pitch of about 250 μm.

[0034] Some implementations described herein provide an optical module with shared components. For example, the optical module may include multiple bottom-emitting VCSELs that share a single cathode. In this way, by sharing the cathode between multiple bottom-emitting VCSELs, the VCSEL array can achieve a pitch of less than 250 μm, less than 100 μm, greater than 50 μm, or less than 10 μm, etc. Additionally or alternatively, the optical module may include multiple anodes corresponding to multiple bottom-emitting VCSELs. In this way, by pairing multiple anodes with a shared cathode, the VCSEL array achieves a pitch reduction while also enabling each VCSEL of the VCSEL array to be individually addressed and / or activated by a controller or control component. In some implementations, the optical module may have a shared cathode surrounded by individual anodes arranged in a lattice, such as a hexagonal close-packed arrangement, which can achieve high density (e.g., a pitch of about 10 μm) in an individually addressable VCSEL array. In addition, by increasing the density of VCSELs within the VCSEL array of the optical module, the optical module can achieve high data rates from high density low data rate VCSELs. In other words, instead of using a low-density array of relatively high data rate VCSELs (which may result in high power consumption requirements of the optical module), the optical module may use a high-density array of relatively low data rate VCSELs (which may result in relatively low power consumption requirements of the optical module) to achieve the same or higher net data rate.

[0035] Figure 1A and 1BA top view of an example transmitter 100 and a cross-sectional view 150 of an example transmitter 100 along line XX are depicted, respectively. Figure 1A As shown, emitter 100 may include a set of emitter layers constructed in an emitter architecture. In some implementations, emitter 100 may correspond to one or more vertical emitting devices described herein.

[0036] like Figure 1A As shown, in this example, the emitter 100 can include a circular-shaped implant protection layer 102. In some implementations, the implant protection layer 102 can have another shape, such as an ellipse, a polygon, etc. The implant protection layer 102 is defined based on the space between the segments of the implant material (not shown) included in the emitter 100.

[0037] like Figure 1A As shown, the emitter 100 includes an ohmic metal layer 104 (e.g., a P-type ohmic metal layer or an N-type ohmic metal layer) configured in a partial ring shape (e.g., having an inner radius and an outer radius). A first region of the ohmic metal layer 104 is covered by a protective layer (e.g., a dielectric layer or a passivation layer) of the emitter 100, and a second region of the ohmic metal layer 104 is exposed by a via 106, as described below. As shown, the ohmic metal layer 104 overlaps the implant protective layer 102. For example, in the case of a P-type upper / top emitting emitter 100, this configuration can be used. In the case of a bottom emitting emitter 100, the configuration can be adjusted as needed.

[0038] Figure 1A 1 , the transmitter 100 includes a protective layer in which a via 106 is formed (e.g., etched). The first region shows a portion of the ohmic metal layer 104 exposed by the via 106 (e.g., the shape of the first region can be a result of the shape of the via 106), while the second region shows a portion of the ohmic metal layer 104 covered by a protective layer. The protective layer can cover all portions of the transmitter except the via. As shown, the via 106 is formed as a partial ring (e.g., similar to the ohmic metal layer 104) and is formed on the ohmic metal layer 104 so that the metallization on the protective layer contacts the ohmic metal layer 104. In some implementations, the via 106 and / or the ohmic metal layer 104 can be formed into another shape, such as a full ring shape or an open ring shape.

[0039] As further shown, the emitter 100 includes an optical aperture 108 in a portion of the emitter 100 located within the inner radius of the partial annular shape of the ohmic metal layer 104. The emitter 100 emits the laser beam via the optical aperture 108. As further shown, the emitter 100 also includes a current limiting aperture 110 (e.g., an oxide aperture formed by an oxide layer (not shown) of the emitter 100). The current limiting aperture 110 is formed below the optical aperture 108.

[0040] like Figure 1A As further shown, the emitter 100 includes a set of trenches 112 (e.g., oxide trenches) that are spaced (e.g., equally, unequally) around the circumference of the implant protection layer 102. How closely the trenches 112 can be positioned relative to the optical aperture 108 depends on the application and is generally limited by the implant protection layer 102, the ohmic metal layer 104, the vias 106, and manufacturing tolerances.

[0041] Figure 1A The number and arrangement of layers shown are provided as examples only. Figure 1A Compared to that shown, the emitter 100 may include more layers, fewer layers, different layers, or differently arranged layers. For example, although the emitter 100 includes a set of six grooves 112, in practice, other configurations are also possible, such as a compact emitter including five grooves 112, seven grooves 112, or another number of grooves. In some implementations, the grooves 112 can surround the emitter 100 to form a mesa structure dt. As another example, although the emitter 100 is a circular emitter design, in practice, other designs may be used, such as a rectangular emitter, a hexagonal emitter, an elliptical emitter, etc. Additionally or alternatively, a set of layers (e.g., one or more layers) of the emitter 100 can respectively perform one or more functions described as being performed by another set of layers of the emitter 100.

[0042] It is worth noting that while the design of emitter 100 is described as including a VCSEL, other implementations are possible. For example, the design of emitter 100 can be applied in the context of another type of optical device, such as a light emitting diode (LED), or another type of vertical emitting (e.g., top emitting or bottom emitting) optical device. In addition, the design of emitter 100 can be applied to emitters of any wavelength, power level, and / or emission profile. In other words, emitter 100 is not specific to an emitter having given performance characteristics.

[0043] like Figure 1B As shown, the example cross-sectional view may represent a cross-section of the emitter 100 through or between a pair of trenches 112 (eg, as shown in FIG. Figure 1AAs shown, the emitter 100 may include a back cathode layer 128, a substrate layer 126, a bottom reflector 124, an active region 122, an oxide layer 120, a top reflector 118, an implant isolation material 116, a protective layer 114 (e.g., a dielectric passivation / reflector layer), and an ohmic metal layer 104. As shown, for example, the total height of the emitter 100 may be about 10 μm.

[0044] The back cathode layer 128 may include a layer in electrical contact with the substrate layer 126. For example, the back cathode layer 128 may include an annealed metallization layer, such as an AuGeNi layer, a PdGeAu layer, or the like.

[0045] The substrate layer 126 may include a base substrate layer on which an epitaxial layer is grown. For example, the substrate layer 126 may include a semiconductor layer, such as a GaAs layer, an InP layer, and / or another type of semiconductor layer.

[0046] The bottom reflector 124 may include a bottom reflector layer of the transmitter 100. For example, the bottom reflector 124 may include a distributed Bragg reflector (DBR).

[0047] The active region 122 may include a layer that confines electrons and defines the emission wavelength of the emitter 100. For example, the active region 122 may be a quantum well.

[0048] The oxide layer 120 may include an oxide layer that provides optical and electrical confinement of the emitter 100. In some implementations, the oxide layer 120 may be formed as a result of wet oxidation of an epitaxial layer. For example, the oxide layer 120 may be an Al2O3 layer formed as a result of oxidation of an AlAs or AlGaAs layer. The trench 112 may include an opening that allows oxygen (e.g., dry oxygen, wet oxygen) to enter the epitaxial layer that forms the oxide layer 120.

[0049] The current confining aperture 110 may include an optically active aperture defined by an oxide layer 120. The size of the current confining aperture 110 may range, for example, from about 4 μm to about 20 μm. In some implementations, the size of the current confining aperture 110 may depend on the distance between the trenches 112 surrounding the emitter 100. For example, the trenches 112 may be etched to expose the epitaxial layer forming the oxide layer 120. Here, before the protective layer 114 is formed (e.g., deposited), the oxidation of the epitaxial layer may be at a specific distance toward the center of the emitter 100 (e.g., such as Figure 1B1 ), thereby forming an oxide layer 120 and a current confining aperture 110. In some implementations, the current confining aperture 110 may include an oxide aperture. Additionally or alternatively, the current confining aperture 110 may include an aperture associated with another type of current confinement technology, such as an etched mesa, an area without ion implantation, a lithographically defined intracavity mesa and regrowth, etc.

[0050] The top reflector 118 may include a top reflector layer of the emitter 100. For example, the top reflector 118 may include a DBR.

[0051] The implant isolation material 116 may include a material that provides electrical isolation. For example, the implant isolation material 116 may include an ion implant material, such as a hydrogen / proton implant material or similar implant elements, to reduce electrical conductivity. In some implementations, the implant isolation material 116 may define the implant protection layer 102.

[0052] The protective layer 114 may include a layer that functions as a protective passivation layer and may function as an additional DBR. For example, the protective layer 114 may include one or more sublayers (e.g., a dielectric passivation layer and / or a reflector layer, a SiO2 layer, a Si3N4 layer, an Al2O3 layer, or other layers) deposited (e.g., by chemical vapor deposition, atomic layer deposition, or other techniques) on one or more other layers of the emitter 100.

[0053] As shown, the protective layer 114 may include one or more vias 106 that provide electrical access to the ohmic metal layer 104. For example, the vias 106 may be formed as an etched portion of the protective layer 114 or a stripped portion of the protective layer 114. The optical aperture 108 may include a portion of the protective layer 114 located above the current confining aperture 110 through which light may be emitted.

[0054] The ohmic metal layer 104 may include a layer for making electrical contact, and current may flow through the layer. For example, the ohmic metal layer 104 may include a Ti and Au layer, a Ti and Pt layer, and / or an Au layer, etc., and current may flow through these layers (e.g., through a bonding pad (not shown), which contacts the ohmic metal layer 104 through a via 106). The ohmic metal layer 104 may be a P-type ohmic, an N-type ohmic, or other forms known in the art. The selection of a particular type of ohmic metal layer 104 may depend on the architecture of the emitter and is well within the knowledge of those skilled in the art. The ohmic metal layer 104 may provide an ohmic contact between a metal and a semiconductor, and / or may provide a non-rectifying electrical junction, and / or may provide a low resistance contact. In some implementations, the emitter 100 may be manufactured using a series of steps. For example, the bottom reflector 124, the active area 122, the oxide layer 120, and the top reflector 118 may be epitaxially grown on the substrate layer 126, after which the ohmic metal layer 104 may be deposited on the top reflector 118. Next, the trenches 112 may be etched to expose the oxide layer 120 for oxidation. The implant isolation material 116 may be produced via ion implantation, after which the protective layer 114 may be deposited. The vias 106 may be etched in the protective layer 114 (e.g., to expose the ohmic metal layer 104 for contact). Plating, seeding, and etching may be performed, after which the substrate layer 126 may be thinned and / or ground to a target thickness. Finally, a back cathode layer 128 may be deposited on the bottom surface of the substrate layer 126.

[0055] Figure 1B The number, arrangement, thickness, order, symmetry, etc. of the layers shown are provided as examples only. Figure 1B Transmitter 100 may include more layers, fewer layers, different layers, differently constructed layers, or differently arranged layers than shown. Additionally or alternatively, a set of layers (e.g., one or more layers) of transmitter 100 may perform one or more functions described as being performed by another set of layers of transmitter 100, and any layer may include more than one layer.

[0056] Figure 2 is a schematic diagram of an example optical module 200 associated with an array of individually addressable light emitters.

[0057] like Figure 2 As shown, the exemplary optical module 200 includes a first distributed Bragg reflector (DBR) 210-1 (e.g., upper DBR) and a second DBR 210-2 (e.g., lower DBR) sandwiching an active region 220. The DBR 210 and the active region 220 form a light emitter that is addressable by controlling, for example, a cathode and an anode. Figure 2As further shown, the example optical module 200 includes a shared cathode pad 230 and one or more anode pads 240. The cathode pad 230 may include a negatively doped (N-type doped) material, which may be referred to as an "n-type pad". Similarly, the anode pad 240 may include a positively doped (P-type doped) material, which may be referred to as a "p-type pad". The cathode pad 230 and the anode pad 240 are configured to receive a cathode and an anode, respectively. For example, the cathode may be disposed on the cathode pad 230 and controlled by a controller (not shown), and the anode may be disposed on the anode pad 240 and controlled by the controller. In this case, the controller may be disposed in the optical module 200 or connected to the optical module 200 to apply a signal (e.g., a current) to the cathode pad 230 and / or the anode pad 240. The optical module 200 may emit a light beam 250, which may extend from the substrate 260. In some implementations, an emitter of the optical module 200 (or an emitter of a group of optical modules 200) may emit multiple light beams 250.

[0058] In some implementations, each optical emitter of the optical module 200 may be a low data rate optical emitter for emitting the light beam 250 or a component of the light beam 250. For example, by implementing a high density of optical emitters, the optical module may use a dense arrangement of low data rate optical emitters to achieve a threshold data rate. In this example, the data rate of each optical emitter may be less than a threshold, such as less than 1 gigabit per second (Gb / s), less than 10 Gb / s, or less than 25 Gb / s, etc. In this way, the optical module 200 reduces power consumption. Additionally or alternatively, by using low data rate optical emitters, the optical module 200 may be able to use lower complexity optical emitters or lower complexity or lower performance optical drivers for the optical emitters, etc. Additionally or alternatively, by using low data rate optical emitters, the optical module 200 may eliminate the need for some components, such as eliminating the need for a digital signal processor (DSP) or a clock and data recovery (CDR) component. In this case, the optical module can use a non-return-to-zero (NRZ) modulation scheme and / or direct drive from an application specific integrated circuit (ASIC) instead of using, for example, a pulse amplitude modulation 4-level (PAM4) modulation scheme with digital signal processing. Alternatively, the optical module 200 can use high data rate optical transmitters, DSP, CDR components, and / or a higher complexity modulation scheme with a dense array of optical transmitters to achieve higher data rates and / or greater miniaturization than a lower density array of optical transmitters. For example, the optical module 200 can include optical transmitters with a data rate greater than or equal to a threshold, such as greater than 1 Gb / s, greater than 10 Gb / s, or greater than 25 Gb / s, etc.

[0059] In some implementations, each light emitter of the optical module 200 can be associated with a different anode pad 240. For example, the optical module 200 can include multiple pairs of DBRs 210 and multiple corresponding active regions 220, each of which can have an individual anode pad 240. In this example, a first light emitter (e.g., a first pair of DBRs 210 and corresponding active regions 220) and a second light emitter (e.g., a second pair of DBRs 210 and corresponding active regions 220) can share a common cathode pad 230. In some implementations, one or more anode pads 240 can be shared by multiple light emitters of the optical module 200. For example, a first light emitter (e.g., a first pair of DBRs 210 and corresponding active regions 220) and a second light emitter (e.g., a second pair of DBRs 210 and corresponding active regions 220) can share a single anode pad 240 (and can have the same or different cathode pads 230).

[0060] In some implementations, all light emitters of the optical module 200 may share a single cathode pad 230. For example, the single cathode pad 230 may have a single cathode connected to each light emitter (e.g., each pair of DBRs 210 and corresponding active regions 220). Additionally or alternatively, some groups of light emitters may be associated with different cathode pads 230. For example, a first group of light emitters (e.g., a first group of pairs of DBRs 210 and corresponding active regions 220) may share a first cathode pad 230, and a second group of light emitters (e.g., a second group of pairs of DBRs 210 and corresponding active regions 220) may share a second cathode pad 230. In some examples, the first group of light emitters and the second group of light emitters may not intersect. In other words, each cathode pad 230 may be associated with a group of two or more anode pads 240 that are specific to the cathode pad 230. Alternatively, the first group of light emitters and the second group of light emitters may overlap. In other words, one or more anode pads 240 may be associated with both the first cathode pad 230 and the second cathode pad 230 .

[0061] In some implementations, the optical module 200 can be included in an optical system or coupled to an optical system. For example, the optical module 200 can be included in or coupled to an optical communication system, an optical sensing system, an optical measurement system, or an optical manufacturing system, etc. Additionally or alternatively, components of the optical module 200 can be coupled to components of an optical system. For example, the optical transmitter of the optical module 200 can be coupled into an optical fiber or to an optical detector array (e.g., a group of photodetectors). In this example, the optical transmitter of the optical module 200 can be coupled using free space optics or optical fibers.

[0062] Although some implementations are described herein with respect to the specific example of a bottom emitting VCSEL, it is contemplated that other implementations are possible, such as other configurations for bottom emitting VCSELs, other types of bottom emitters, non-bottom emitting VCSELs, or other types of emitters.

[0063] As mentioned above, Figure 2 Provided as an example only. Other examples may be found in Figure 2 Different from what is described. Figure 2 The number and arrangement of the devices shown are provided as examples only. Figure 2 There may be more devices, fewer devices, different devices, or differently arranged devices than shown. Figure 2 Two or more of the devices shown may be implemented in a single device, or Figure 2 The single device shown may be implemented as multiple distributed devices. Additionally or alternatively, Figure 2 The illustrated set of devices (e.g., one or more devices) may perform the operations described as being performed by Figure 2 Another group of devices is shown performing one or more functions.

[0064] Figures 3A-3C is a diagram of an example implementation associated with an array of individually addressable light emitters.

[0065] Figure 3A An optical module as described herein (e.g., Figure 2 An example of a first arrangement 300 of anodes and cathodes in an optical module 200 of FIG. 1 . The first arrangement 300 includes a hexagonal lattice arrangement. The hexagonal lattice may include n-type pads that are spaced at a pitch b along the x-axis and spaced at a pitch a along the y-axis, where a=b. In addition, the angle between n-type pads adjacent to a particular n-type pad in the hexagonal lattice may be γ, where γ=120°. For example, in the first arrangement 300, the n-type pad for the cathode is surrounded by 6 p-type pads for the anode. As shown, different n-type pads may share different p-type pads. For example, p-type pad 302 is shared by two different n-type pads. In this example, control signals (e.g., applied currents) to two different n-type pads and / or p-type pads 302 may be used to individually control p-type pads 302. In some implementations, a hexagonal lattice (or an approximation thereof) may be selected to achieve the highest level of emitter density.

[0066] In some implementations, the arrangement of anodes and cathodes (such as the first arrangement 300) can have a specific density (e.g., a pitch less than a specific value). For example, the pitch (e.g., a or b) of the optical modules described herein can be less than 250 μm, less than 200 μm, less than 100 μm, less than 50 μm, less than 25 μm, or less than 10 μm. Although some implementations are described in terms of anodes and cathodes of light emitters, the implementations described herein can achieve a pitch less than a threshold of another type of optical device (such as for a detector array).

[0067] Figure 3B The optical modules described herein (eg, Figure 2 310-320 of arrangements of anodes and cathodes in an optical module 200 of FIG. 310. The second arrangement 310 includes a tilted lattice. In the tilted lattice, the n-type pads are associated with a pitch b along the x-axis and a pitch a along the y-axis, where a≠b. In addition, in the tilted lattice, the angle between n-type pads adjacent to a particular n-type pad is γ, where γ>0°. The third arrangement 320 includes a square lattice, where a=b, and γ=90°. Figure 3C An optical module as described herein (e.g., Figure 2 3. Examples of arrangements 330-340 of anodes and cathodes in an optical module 200 of FIG. 3. The fourth arrangement 330 includes a rectangular lattice, where a≠b, and γ=90°. The fifth arrangement 340 includes a rhombus lattice, where a=b and γ>0°.

[0068] Although a two-dimensional regular lattice arrangement is described herein, other arrangements may also be used. For example, the arrangement of the n-type pads and p-type pads may be in the form of an irregular two-dimensional lattice. Additionally or alternatively, the arrangement of the n-type pads and p-type pads may be in the form of one or more one-dimensional linear arrangements. Additionally or alternatively, the arrangement of the n-type pads and p-type pads may be in the form of a three-dimensional lattice (e.g., a regular or irregular lattice). For example, multiple lattices may be stacked on top of each other so that each emitter may emit in the gap between other emitters of the lattice. Additionally or alternatively, although a certain number of n-type pads and p-type pads are described herein, various implementations may be used for other numbers of n-type pads and p-type pads, such as a one-dimensional array of 1×4 or 1×12 light emitters, a two-dimensional array of 2×2, 4×4, 16×16, 2×8, or 4×12 light emitters, or a three-dimensional array of 2×2×2, 4×4×4, or 2×8×8 light emitters, or another combination.

[0069] As mentioned above, Figures 3A-3C Provided as an example only. Other examples may be found in Figures 3A-3C Different from what is described. Figures 3A-3C The number and arrangement of the devices shown are provided as examples only. Figures 3A-3CThere may be more devices, fewer devices, different devices, or differently arranged devices than shown. Figures 3A-3C Two or more of the devices shown may be implemented in a single device, or Figures 3A-3C The single device shown may be implemented as multiple distributed devices. Additionally or alternatively, Figures 3A-3C The illustrated set of devices (e.g., one or more devices) may perform the operations described as being performed by Figures 3A-3C One or more functions performed by another set of devices.

[0070] The above disclosure provides illustration and description, but is not intended to be exhaustive or to limit the implementation to the precise form disclosed. Modifications and variations may be made based on the above disclosure, or may be obtained from the practice of the implementation. In addition, any implementation described herein may be combined, unless the above disclosure explicitly provides reasons why one or more implementations cannot be combined.

[0071] As used herein, satisfying a threshold may refer to a value being greater than a threshold, greater than or equal to a threshold, less than a threshold, less than or equal to a threshold, equal to a threshold, not equal to a threshold, etc., depending on the context.

[0072] Although specific feature combinations are cited in the claims and / or these combinations are disclosed in the specification, these combinations are not intended to limit the disclosure of various implementations. In fact, many of these features can be combined in a manner that is not specifically cited in the claims and / or not disclosed in the specification. Although each dependent claim listed below can only directly depend on one claim, the disclosure of various implementations includes the combination of each dependent claim with each other claim in the claim set. As used herein, the phrase referring to "at least one of" in the list of items refers to any combination of these items, including single members. For example, "at least one of a, b or c" is intended to cover a, b, c, ab, ac, bc and abc, and multiple combinations of the same items.

[0073] When a component or one or more components (e.g., a laser emitter or one or more laser emitters) is described or claimed (either within a single claim or across multiple claims) as performing multiple operations or being configured to perform multiple operations, such language is intended to broadly cover a variety of architectures and environments. For example, unless otherwise expressly required (e.g., by using "first component" and "second component" or other language that distinguishes components in a claim), the language is intended to cover a single component performing or being configured to perform all operations, a group of components collectively performing or being configured to perform all operations, a first component performing or being configured to perform a first operation and a second component performing or being configured to perform a second operation, or any combination of components performing or being configured to perform the operations. For example, when a claim is of the form "One or more components are configured to: perform X; perform Y; and perform Z," the claim should be interpreted as "One or more components are configured to perform X; one or more (possibly different) components are configured to perform Y; and one or more (possibly different) components are configured to perform Z."

[0074] Unless explicitly stated, any element, behavior or indication used in this article should not be interpreted as critical or essential. In addition, as used in this article, the articles "one" and "an" are intended to include one or more projects and can be used interchangeably with "one or more". In addition, as used in the text, the article "said" is intended to include one or more projects quoted in combination with the article "said", and can be used interchangeably with "one or more". In addition, the term "set" used in this article is intended to include one or more projects (for example, a combination of related projects, unrelated projects, or related and unrelated projects), and can be used interchangeably with "one or more". If only one project is intended to be used, the phrase "only one" or similar language is used. In addition, as used in this article, the terms "have", "have", "contain" etc. are intended to become open terms. In addition, unless otherwise explicitly stated, the phrase "based on" is intended to mean "at least partially based on". In addition, as used in this article, the term "or" is inclusive when used in series, and can be used interchangeably with "and / or", unless otherwise explicitly stated (for example, if used in combination with "any one of" or "only one of..."). Additionally, for ease of description, spatially relative terms (such as "below," "lower," "above," "upper," etc.) may be used herein to describe the relationship of one element or feature to other elements or features shown in the figures. Spatially relative terms are intended to encompass different orientations of the device, equipment, and / or elements in use or operation in addition to the orientations shown in the figures. The device may be otherwise oriented (rotated 90 degrees or in other orientations), and the spatially relative descriptors used herein may be interpreted accordingly.

Claims

1. An optical module, comprising: Multiple bottom-emitting vertical cavity surface emitting lasers VCSEL, a plurality of anodes corresponding to and connected to the plurality of bottom emitting VCSELs; as well as a single cathode connected to the plurality of bottom emitting VCSELs, wherein the single cathode is paired with each of the plurality of anodes.

2. The optical module according to claim 1, further comprising: A control assembly is provided for individually controlling each anode of the plurality of anodes. 3 . The optical module of claim 1 , wherein a plurality of anodes are arranged in a hexagonal lattice arrangement around the single cathode.

4. The optical module of claim 1 , wherein the plurality of anodes are arranged around the single cathode in at least one of the following: Tilted lattice, square lattice, rectangular lattice, or Rhombus lattice.

5. The optical module of claim 1, wherein a plurality of anodes are arranged in a linear arrangement around the single cathode.

6. The optical module of claim 1, wherein a spacing between a first bottom emitting VCSEL in the plurality of bottom emitting VCSELs and a second bottom emitting VCSEL in the plurality of bottom emitting VCSELs is less than about 250 microns.

7. The optical module of claim 1, wherein a spacing between a first bottom emitting VCSEL in the plurality of bottom emitting VCSELs and a second bottom emitting VCSEL in the plurality of bottom emitting VCSELs is less than about 50 microns.

8. An optical module, comprising: Multiple light emitters, The light emitter of the plurality of light emitters comprises: The lower distributed Bragg reflector DBR, Upper DBR, an active region disposed between the lower DBR and the upper DBR, wherein the plurality of light emitters include a plurality of vertical cavity surface emitting lasers (VCSELs), wherein the plurality of VCSELs are a plurality of bottom emitting VCSELs; a plurality of anodes corresponding to the plurality of light emitters and connected to the plurality of light emitters; and one or more cathodes connected to the plurality of light emitters, Each of the one or more cathodes is paired with corresponding two or more of the plurality of anodes.

9. The optical module of claim 8, wherein a first cathode of the one or more cathodes is paired with a first group of two or more anodes of the plurality of anodes, and wherein a second cathode of the one or more cathodes is paired with a second group of two or more anodes of the plurality of anodes.

10. The optical module of claim 9, wherein the first set of two or more anodes does not intersect the second set of two or more anodes. 11 . The optical module of claim 9 , wherein at least one anode of the plurality of anodes is included in the first group of two or more anodes and is included in the second group of two or more anodes. 12 . The optical module of claim 8 , wherein each group of two or more anodes in the plurality of anodes is arranged in a ring around a corresponding cathode in the one or more cathodes.

13. The optical module of claim 12, wherein the rings form a hexagonal close-packed arrangement.

14. The optical module according to claim 8, further comprising: A controller is configured to control the plurality of anodes and the one or more cathodes to individually activate each of the plurality of light emitters.

15. The optical module according to claim 8, further comprising: A plurality of optical fibers are used to receive a plurality of light beams from the plurality of light transmitters.

16. The optical module according to claim 8, further comprising: A detector array is used to receive the plurality of light beams from the plurality of light emitters.

17. An optical module, comprising: Multiple light emitters, The light emitter of the plurality of light emitters comprises: The lower distributed Bragg reflector DBR, Upper DBR, An active region is disposed between the lower DBR and the upper DBR; a plurality of p-type pads corresponding to the plurality of light emitters and connected to the plurality of light emitters; and A single n-type pad is connected to the plurality of light emitters and is paired with the plurality of p-type pads.

18. The optical module of claim 17, wherein the plurality of p-type pads comprises a plurality of positively doped material regions disposed on a substrate.

19. The optical module of claim 17, wherein the single n-type pad is a single region of negatively doped material disposed on a substrate.

20. The optical module of claim 17, wherein each of the plurality of optical transmitters is configured for less than a threshold data rate.

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