Power supply modulator and wireless communication device including same

Abstract

A power supply modulator and a wireless communication device including the same are provided. The supply modulator is configured to provide a supply voltage for the power amplifier. The power supply modulator includes: a converter configured to output the power supply voltage to a power amplifier; the switch is connected to the first capacitor and the second capacitor, the first end of the first capacitor is connected to the converter, the second end of the first capacitor is connected to the switch, the first end of the second capacitor is connected to the converter, and the second end of the second capacitor is connected to the ground and the switch; the capacitance of the second capacitor is smaller than that of the first capacitor; and a driver connected to the switch, the driver configured to turn off the switch based on occurrence of a transition of the supply voltage.

Description

[0001] This application claims the priority of Korean Patent Application No. 10-2023-0109925 filed on August 22, 2023, in the Korean Intellectual Property Office, and Korean Patent Application No. 10-2023-0138978 filed on October 17, 2023, in the Korean Intellectual Property Office, the disclosure of each of which is incorporated herein by reference in its entirety. Technical Field

[0002] Example embodiments relate to a power modulator and a wireless communication device including the power modulator. Background Art

[0003] In wireless communication devices (such as smart phones, tablets, and Internet of Things (IoT) devices), Wideband Code Division Multiple Access (WCDMA) (3G) technology, Long Term Evolution (LTE) technology, Advanced LTE (4G) technology, or New Radio (NR, or referred to as New Air) (5G) technology is used for high-speed communication. These devices may receive power supplied by a power supply from a power amplifier. However, when a higher peak-to-average power ratio (PAPR) and a higher bandwidth are used for transmitting signals, the efficiency of the power amplifier decreases. When the power supply of the power amplifier at the transmitting end is connected to a battery, the reduction in the efficiency of the power amplifier is obvious (and / or significant). Therefore, average power tracking (APT) or envelope tracking (ET) is used to improve the power efficiency of the power amplifier at higher PAPR and higher bandwidth. A chip or component that supports APT and ET is called a power modulator (SM).

[0004] However, because the transition time of the power supply voltage is optimized (or configured) for a time slot unit, average power tracking for an existing power supply modulator may not be effectively applied to a symbol unit that is smaller than a time slot unit. Summary of the invention

[0005] Example embodiments provide a power modulator and a wireless communication device including the power modulator.

[0006] According to an example embodiment, a power modulator configured to provide a power supply voltage for a power amplifier includes: a converter configured to output the power supply voltage to the power amplifier; a switch connected to a first capacitor and a second capacitor, a first end of the first capacitor connected to the converter, a second end of the first capacitor connected to the switch, a first end of the second capacitor connected to the converter, a second end of the second capacitor connected to ground and the switch, and a capacitance of the second capacitor is smaller than that of the first capacitor; and a driver connected to the switch, the driver being configured to turn off the switch based on the occurrence of a transition of the power supply voltage.

[0007] According to an example embodiment, a wireless communication device includes: a power amplifier configured to amplify a radio frequency (RF) signal; a power modulator configured to provide a power supply voltage of the power amplifier; a first capacitor connected to the power amplifier and the power modulator; and a second capacitor connected to the power amplifier and the power modulator, wherein the power modulator includes: a converter configured to output the power supply voltage to the power amplifier; a switch connected to the first capacitor and the second capacitor, a first end of the first capacitor connected to the converter, a second end of the first capacitor connected to the switch, a first end of the second capacitor connected to the converter, a second end of the second capacitor connected to ground and the switch, and a capacitance of the second capacitor is smaller than that of the first capacitor; and a driver connected to the switch, and the driver is configured to turn off the switch based on the occurrence of a transition of the power supply voltage.

[0008] According to an example embodiment, a power modulator configured to provide a power supply voltage for a power amplifier includes: a converter configured to output the power supply voltage to the power amplifier; a switch connected to a first capacitor and a second capacitor, a first end of the first capacitor connected to the converter, a second end of the first capacitor connected to the switch, a first end of the second capacitor connected to the converter, a second end of the second capacitor connected to ground and the switch, and a capacitance of the second capacitor is smaller than a capacitance of the first capacitor; and a driver connected to a gate terminal of the switch, the driver being configured to apply a lower voltage of a first voltage or a ground voltage to the gate terminal of the switch based on the occurrence of a transition of the power supply voltage, the first voltage being a voltage at the second end of the first capacitor, and the ground voltage being a voltage at ground. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The above and other aspects, features and advantages of the present disclosure will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings.

[0010] Figure 1 is a diagram illustrating a wireless communication device according to an example embodiment.

[0011] Figure 2 is a diagram illustrating a signal processing procedure of a digital processing circuit according to example embodiments.

[0012] Figure 3 is a diagram illustrating a power modulator according to example embodiments.

[0013] Figure 4 is a diagram illustrating a power modulator according to example embodiments.

[0014] Figure 5 is a diagram illustrating a rising transition operation of a power modulator according to example embodiments.

[0015] Figure 6 is a diagram illustrating a falling transition operation of a power modulator according to example embodiments.

[0016] Figure 7 is a diagram illustrating a comparison between a power supply voltage of a power modulation scheme of a power supply modulator according to example embodiments and a power supply voltage of an example power modulation scheme.

[0017] Figure 8 is a diagram illustrating a comparison between a power supply voltage of a power modulation scheme of a power supply modulator according to an example embodiment and a power supply voltage of an example power modulation scheme for symbols.

[0018] Fig. 9 is a diagram illustrating a power modulator according to example embodiments.

[0019] Fig.10 It shows that according to Fig. 9 Schematic diagram of an example power supply modulator.

[0020] Fig.11 is a diagram illustrating an operation waveform of a power supply modulator according to example embodiments.

[0021] Fig.12 is a diagram illustrating a power modulator including a protection circuit according to example embodiments.

[0022] Fig.13 According to an example embodiment Fig.12 Circuit diagram of the protection circuit.

[0023] Fig.14 is a diagram illustrating an Internet of Things (IoT) device to which a wireless communication device according to an example embodiment is applied.

[0024] Fig.15 is a diagram illustrating a mobile terminal to which a wireless communication device according to an exemplary embodiment is applied. DETAILED DESCRIPTION

[0025] Hereinafter, example embodiments will be described with reference to the accompanying drawings.

[0026] Figure 1 is a diagram illustrating a wireless communication device according to an example embodiment.

[0027] Reference Figure 1 , the wireless communication device 100 may include a modem 110, a radio frequency integrated circuit (RFIC) 120, a power amplifier PA, a duplexer 130, a power modulator 140 and / or an antenna ANT.

[0028] The modem 110 may include a digital processing circuit (DPC) 111, a digital-to-analog converter (DAC) 112, an analog-to-digital converter (ADC) 113, and / or a mobile industry processor interface (MIPI). The modem 110 may process a baseband signal BB_T (e.g., including an I signal and a Q signal) including information to be transmitted through the digital processing circuit 111 according to various communication methods. The modem 110 may process a received baseband signal BB_R through the digital processing circuit 111 according to various communication methods.

[0029] For example, the modem 110 may process a signal to be transmitted or a received signal according to a communication method such as orthogonal frequency division multiplexing (OFDM), orthogonal frequency division multiple access (OFDMA), wideband code division multiple access (WCDMA), or high speed packet access (HSPA+). In addition, the modem 110 may process the baseband signal BB_T or the baseband signal BB_R according to various communication methods (e.g., various communication methods to which a technique for modulating or demodulating the amplitude and / or frequency of the baseband signal BB_T or BB_R is applied).

[0030] The modem 110 may generate an average power signal based on an average power tracking (APT) table stored in a memory. The APT table stores information about a required (or corresponding) power supply voltage of a power amplifier PA for a desired output power (or transmission power) of an antenna ANT, and may store information about an average power signal corresponding to the required (or corresponding) power supply voltage of the power amplifier PA. Therefore, when the desired output power of the antenna ANT is determined, the modem 110 may generate an average power signal using the APT table, and provide symbol power tracking (SPT) information SPT_I including the generated average power signal to the power modulator 140. In this case, the SPT information SPT_I may include an average power signal, symbol information to be tracked, and the like.

[0031] The digital processing circuit 111 can perform various processing operations on the baseband signal in the digital domain, and will be referred to later. Figure 2 Describes the operation in more detail.

[0032] Each of the DAC 112 and the ADC 113 may be provided with at least one signal. The modem 110 may perform digital-to-analog conversion on the baseband signal BB_T using the DAC 112 to generate a transmission signal TX. The modem 110 may receive a reception signal RX (analog signal) from the RFIC 120. The modem 110 may perform digital conversion on the reception signal RX through the ADC 113 provided in the modem 110 to extract the baseband signal BB_R (digital signal). For example, the reception signal RX may be a differential signal including a positive signal and a negative signal.

[0033] RFIC 120 may perform up-conversion on a transmission signal TX to generate an RF input signal RF_IN, or may perform down-conversion on an RF reception signal RF_R to generate a reception signal RX. For example, RFIC 120 may include a transmission circuit TXC for up-conversion, a reception circuit RXC for down-conversion, and / or a local oscillator LO.

[0034] The transmission circuit TXC may include a first analog baseband filter ABF1, a first mixer MX1, and / or a driver amplifier 121. For example, the first analog baseband filter ABF1 may include a low-pass filter.

[0035] The first analog baseband filter ABF1 may filter the transmission signal TX received from the modem 110 and provide the filtered signal to the first mixer MX1. The first mixer MX1 ​​may perform up-conversion to convert the frequency of the transmission signal TX from a baseband to a higher frequency band by a frequency signal applied by the local oscillator LO. Through the up-conversion, the transmission signal TX may be provided to the driver amplifier 121 as an RF input signal RF_IN, and the driver amplifier 121 may amplify the power of the RF input signal RF_IN for the first time, and may provide the power-amplified RF input signal RF_IN to the power amplifier PA.

[0036] The power amplifier PA may receive a DC voltage or a variable power supply voltage (eg, a dynamically variable output voltage) and may amplify the power of the RF input signal RF_IN for a second time to generate an RF output signal RF_OUT. The power amplifier PA may provide the generated RF output signal RF_OUT to the duplexer 130.

[0037] The receiving circuit RXC may include a second analog baseband filter ABF2, a second mixer MX2, and / or a low noise amplifier (LNA) 122. For example, the second analog baseband filter ABF2 may include a low pass filter.

[0038] The LNA 122 may amplify the RF reception signal RF_R received from the duplexer 130, and may provide the amplified RF reception signal RF_R to the second mixer MX2. The second mixer MX2 may perform down-conversion to convert the frequency of the RF reception signal RF_R from a higher frequency band to a baseband by a frequency signal applied by the local oscillator LO. Through the down-conversion, the RF reception signal RF_R may be provided as a reception signal RX to the second analog baseband filter ABF2. The second analog baseband filter ABF2 may filter the reception signal RX, and may provide the filtered reception signal RX to the modem 110.

[0039] For reference, the wireless communication device 100 may use carrier aggregation (CA) to transmit a transmission signal through multiple frequency bands. To this end, the wireless communication device may further include multiple power amplifiers that amplify the power of multiple RF input signals corresponding to multiple carriers, respectively. For clarity of description, an example in which only one power amplifier PA is present will be provided herein.

[0040] The duplexer 130 may be connected to the antenna ANT to separate the transmission frequency and the reception frequency from each other. For example, the duplexer 130 may separate the RF output signal RF_OUT received from the power amplifier PA for each frequency band, and may provide the separated RF output signal RF_OUT to the corresponding antenna ANT. In addition, the duplexer 130 may provide an external signal received from the antenna ANT to the LNA 122 included in the receiving circuit RXC of the RFIC 120. For example, the duplexer 130 may include a front end module (FEMiD) having an integrated duplexer.

[0041] For reference, the wireless communication device 100 may be provided with a switch structure instead of the duplexer 130, and the switch structure can separate the transmission frequency and the reception frequency. In addition, the wireless communication device 100 may be provided with a structure including the duplexer 130 and the switch for separating the transmission frequency and the reception frequency. For the sake of clarity of description, an example in which the wireless communication device 100 includes the duplexer 130 that can separate the transmission frequency and the reception frequency will be provided here.

[0042] The power modulator 140 may generate a modulated output voltage having an output voltage that dynamically changes based on the average power signal, and may provide the output voltage as a power supply voltage VSPT of the power amplifier PA.

[0043] For example, the power modulator 140 may receive SPT information SPT_I including an average power signal from the modem 110. The power modulator 140 may generate a dynamically variable power supply voltage VSPT based on the received SPT information SPT_I. In addition, the power modulator 140 may provide the generated power supply voltage VSPT to the power amplifier PA.

[0044] For reference, when a power supply voltage having a fixed level is applied to the power amplifier PA, the power efficiency of the power amplifier PA may be degraded. Therefore, in order to efficiently manage the power of the power amplifier PA, the power modulator 140 may modulate the input voltage (e.g., power supplied from a battery) based on the SPT information SPT_I, and may provide the modulated voltage as the power supply voltage to the power amplifier PA.

[0045] According to an example embodiment, the power modulator 140 may include a switch provided in the power modulator 140 to have a faster transition time of the power voltage VSPT. For example, the transition time may be at a level where the power modulation is applicable to a duration unit of a single symbol included in the RF output signal RF_OUT. Therefore, the power modulator 140 may provide the power voltage VSPT to the power amplifier PA after transitioning the power voltage VSPT for each symbol duration.

[0046] In this case, the power amplifier PA may output the RF output signal RF_OUT having a modulated voltage for each of a plurality of symbols included in the RF output signal RF_OUT.

[0047] The antenna ANT may transmit the RF output signal RF_OUT frequency-separated by the duplexer 130 to an external entity (e.g., another wireless communication device 100, a base station, an access point, etc.), or provide an RF reception signal RF_R received from the external entity to the duplexer 130. For example, the antenna ANT may include, but is not limited to, an array antenna.

[0048] For reference, the modem 110, the RFIC 120, the power amplifier PA, the duplexer 130, and / or the power modulator 140 may each be individually implemented as an integrated circuit (IC), a chip, or a module. In addition, the modem 110, the RFIC 120, the power amplifier PA, the duplexer 130, and / or the power modulator 140 may be mounted together on a printed circuit board (PCB). However, example embodiments are not limited thereto. In example embodiments, at least a portion of the modem 110, the RFIC 120, the power amplifier PA, the duplexer 130, and / or the power modulator 140 may be implemented as a single communication chip.

[0049] also, Figure 1 The wireless communication device 100 may be included in a wireless communication system using a cellular network such as 5G or Long Term Evolution (LTE), or may be included in a wireless local area network (WLAN) system or any other wireless communication system. For reference, Figure 1The structure of the wireless communication device 100 is merely an example, and example embodiments are not limited thereto. For example, the wireless communication device 100 may be configured in various ways based on a communication protocol or a communication method.

[0050] Figure 2 is a diagram illustrating a signal processing procedure of a digital processing circuit according to example embodiments.

[0051] Reference Figure 2 , the digital processing circuit 111 may perform, for example, the above-mentioned average power signal generation operation, the envelope extraction operation when supporting the envelope tracking operation, the digital envelope signal generation operation, the crest factor reduction (CFR) 211, the shaping function (SF) 212, the digital pre-distortion (DPD) 213, the delay correction operation (DELAY1 214 and / or DELAY2 215), etc. In addition, the digital processing circuit 111 may include a switch SW1 connected to the input terminal of the SF 212 and the output terminal of the CFR 211, and a switch SW2 connected to the input terminal of the SF 212 and the output terminal of the DPD 213. The wireless communication device 200, the modem 210, the power supply modulator 220, the power amplifier PA, the transmission circuit TXC and / or the DAC2 may be respectively combined with Figure 1 The discussed wireless communication device 100 , modem 110 , power supply modulator 140 , power amplifier PA , transmit circuit TXC and / or DAC 112 are the same or similar.

[0052] The CFR 211 may reduce the peak-to-average power ratio (PAPR) of a communication signal (e.g., baseband signal BB_T). The SF 212 may transform the digital envelope signal to improve the efficiency and linearity of the power amplifier PA. The DPD 213 may compensate and linearize the distortion of the power amplifier PA in the digital domain. Delay correction operations 214 and 215 may be performed to correct the delay of the digital envelope signal or the baseband signal BB_T.

[0053] The SPT information SPT_I may be converted into an analog signal through DAC1 and provided to the power modulator 220. The power modulator 220 may modulate the power voltage VSPT and provide the power voltage VSPT to the power amplifier PA, and the power amplifier PA may output the RF output signal RF_OUT. The baseband signal BB_T may be converted into a transmission signal through DAC2 and then provided to the transmission circuit TXC.

[0054] Figure 3 is a diagram illustrating a power modulator according to example embodiments.

[0055] Reference Figure 3 , the power modulator 300 may be connected to the power amplifier PA and configured to provide a power voltage VSPT of the power amplifier PA. The power modulator 300 according to the example embodiment may adjust and provide the power voltage VSPT in units of a symbol duration of the RF signal. In order to adjust and provide the power voltage VSPT in units of a symbol duration, the power modulator 300 may be configured to provide a power voltage VSPT having a transition time significantly shorter than a time corresponding to a single symbol duration when the power voltage VSPT transitions.

[0056] The power modulator 300 according to example embodiments may include a converter 310 , a switch SPT_SW, and / or a driver 320 , thereby adjusting and providing a power supply voltage VSPT in units of symbol duration.

[0057] The converter 310 may be configured to generate and / or adjust the power supply voltage VSPT and output the power supply voltage VSPT to the power amplifier PA. The converter 310 may operate based on a driving voltage (eg, a battery voltage). The converter 310 may be configured to generate and / or adjust the power supply voltage VSPT and output the power supply voltage VSPT to the power amplifier PA. Figure 1 The modem 110 receives the control signal and may generate and / or adjust the supply voltage VSPT to be provided to the power amplifier PA from the driving voltage based on the control signal. According to various examples, the converter 310 may be implemented as a boost converter, a buck converter, or a buck-boost converter.

[0058] An inductor L that stores energy and provides a power supply voltage VSPT to a power amplifier PA in the form of a current may be connected to an output terminal of the converter 310. The inductor L may have one end connected to the output terminal of the converter 310 and the other end connected to an output node Nout, and the output node Nout is connected to the power amplifier PA. The first capacitor C1 and the second capacitor C2 may be connected to the converter 310 via the output node Nout. Hereinafter, it will be understood that when an element is referred to as being "connected" or "coupled" to another element, the element may be directly connected or coupled to the other element, or there may be an intermediate element. On the contrary, when an element is referred to as being "directly connected" or "directly coupled" to another element, there is no intermediate element. In addition, one end and the other end of the capacitor may be understood as the top plate and the bottom plate of the capacitor.

[0059] According to example embodiments, the inductor L, the first capacitor C1, and the second capacitor C2 may be arranged at Figure 1 The power supply modulator 140 shown in Figure 2 The power supply modulator 220 shown in Figure 3 Between the power supply modulator 300 and the power amplifier PA shown in FIG.

[0060] The first capacitor C1 may have one end connected to the output node Nout, and the other end connected to the switch SPT_SW and the switch body voltage control circuit (SBVCC) 330 through the first node N1. The second capacitor C2 may have one end connected to the output node Nout and the other end connected to the ground node Ngnd, which has one end connected to the output node Nout and the other end connected to the ground GND. According to example embodiments, the second capacitor C2 may have a capacitance smaller than that of the first capacitor C1. Therefore, as will be described later, when only the second capacitor C2 is connected to the output node Nout, the transition of the power supply voltage VSPT may be faster than when both the first capacitor C1 and the second capacitor C2 are connected to the output node Nout.

[0061] The switch SPT_SW may be connected to the other end of the first capacitor C1 and the other end of the second capacitor C2. For example, one end of the switch SPT_SW may be connected to the other end of the first capacitor C1 through the first node N1, and the other end of the switch SPT_SW may be connected to the ground node Ngnd (the other end of the second capacitor C2). The switch SPT_SW may be turned on or off under the control of the driver 320.

[0062] According to an example embodiment, when the power modulator 300 operates in a normal state, the switch SPT_SW may be turned on under the control of the driver 320. When the switch SPT_SW is turned on, both the first capacitor C1 and the second capacitor C2 may be connected to the output node Nout. For example, the other end of the first capacitor C1 may be connected to the ground node Ngnd according to the turning on of the switch SPT_SW. Therefore, as the total capacitance connected to the output node Nout is relatively increased, the power supply voltage VSPT may be stably supplied to the power amplifier PA.

[0063] According to an example embodiment, when a transition of the power supply voltage VSPT occurs, the switch SPT_SW may be turned off under the control of the driver 320. The other end of the first capacitor C1 (e.g., one end of the switch SPT_SW) may float based on the switch SPT_SW being turned off. Finally, only the second capacitor C2 may be connected to the output node Nout. Therefore, when the switch SPT_SW is turned off, as the total capacitance connected to the output node Nout is relatively reduced, the transition of the power supply voltage VSPT may be performed faster. The converter 310 may adjust the power supply voltage VSPT through the second capacitor C2 based on the switch SPT_SW being turned off.

[0064] The driver 320 may be connected to the switch SPT_SW and configured to turn off the switch SPT_SW based on the occurrence of the transition of the power supply voltage VSPT. According to an example embodiment, when the switch SPT_SW is implemented as a transistor, the driver 320 may control the switch SPT_SW based on the adjustment of the gate voltage of the switch SPT_SW. The driver 320 may be configured to turn off the switch SPT_SW based on the occurrence of the transition of the power supply voltage VSPT. Figure 1 The driver 320 may operate under the control of the modem 110. For example, the driver 320 may turn on the switch SPT_SW in a normal state, and may turn off the switch SPT_SW when a transition of the power supply voltage VSPT occurs. According to an example embodiment, as described above in combination with Figure 1 As discussed, the power amplifier PA may amplify the power of the RF input signal RF_IN based on the power supply voltage VSPT to generate an RF output signal RF_OUT, and the antenna ANT may transmit the RF output signal RF_OUT to an external entity (eg, another wireless communication device 100, a base station, an access point, etc.).

[0065] According to example embodiments, the power modulator 300 may further include a switch body voltage control circuit 330 connected to the switch SPT_SW. According to example embodiments, when the switch SPT_SW is implemented as a transistor, the switch body voltage control circuit 330 may control the body voltage of the switch SPT_SW to prevent current from flowing from the switch SPT_SW to the first node N1 (or reduce the amount of current flowing from the switch SPT_SW to the first node N1). Therefore, the switch body voltage control circuit 330 may allow the switch SPT_SW to be completely turned off.

[0066] The switch body voltage control circuit 330 may control the body voltage of the switch SPT_SW according to whether the transition of the power supply voltage VSPT is a rising transition or a falling transition. In example embodiments, the rising transition may indicate an increase in the magnitude of the power supply voltage VSPT, and the falling transition may indicate a decrease in the magnitude of the power supply voltage VSPT.

[0067] According to an example embodiment, the switch body voltage control circuit 330 may adjust the body voltage of the switch SPT_SW to the lower of the voltage at the other end of the first capacitor C1 (e.g., the first node voltage) and the voltage of the ground GND (e.g., the ground voltage). For example, when the power supply voltage VSPT rises, the first node voltage may be a positive voltage. Therefore, the switch body voltage control circuit 330 may adjust the body voltage of the switch SPT_SW to a ground voltage lower than the first node voltage. Alternatively, for example, when the power supply voltage VSPT drops, the first node voltage may be a negative voltage. Therefore, the switch body voltage control circuit 330 may adjust the body voltage of the switch SPT_SW to the first node voltage. According to the above example, regardless of whether the transition is a rising transition or a falling transition, there is no situation where the body voltage of the switch SPT_SW is higher than the first node voltage. Therefore, the switch SPT_SW can be completely turned off by the switch body voltage control circuit 330.

[0068] According to the above example, the power modulator 300 can reduce the transition time of the power supply voltage VSPT by switching SPT_SW, and when the switch SPT_SW is turned off, the switch SPT_SW can float a larger capacitor. This allows the modulation of the power supply voltage VSPT to be applied in units of symbol duration. When the transition time is long, voltage modulation should be performed before several symbols to modulate the voltage of a specific symbol duration, resulting in unnecessary (or excessive) power consumption and noise, and deteriorating the error vector magnitude (EVM) characteristics. In order to reduce the transition time, it is possible to consider increasing the current at the output node or reducing the load capacitor. However, increasing the current may cause increased power consumption of the converter 310, heating caused by power loss, saturation current of the inductor L, etc. In addition, reducing the load capacitor may cause an increase in the voltage ripple at the output node, and it is difficult to stably supply the voltage. According to an example embodiment, the voltage transition time can be reduced by floating the capacitor to apply voltage modulation in units of symbol duration without reducing the load capacitor or increasing the current. As a result, unnecessary (or excessive) power consumption and noise can be reduced, and the EVM characteristics can be improved.

[0069] Figure 4 is a diagram illustrating a power modulator according to example embodiments.

[0070] Reference Figure 4 The driver 320 included in the power modulator 300 according to example embodiments may operate based on the driving voltage VBAT and the voltage at the second node N2 connected to the body of the switch SPT_SW. The output terminal of the driver 320 may be connected to the gate terminal of the switch SPT_SW to apply the driving voltage VBAT or the second node voltage VN2 to the gate terminal of the switch SPT_SW.

[0071] In a normal state, the driver 320 may apply a driving voltage VBAT to a gate terminal of the switch SPT_SW. Therefore, the switch SPT_SW may be turned on in a normal state to connect the first capacitor C1 to the ground GND. Both the first capacitor C1 and the second capacitor C2 may be connected to the output node Nout, allowing the converter 310 connected to the inductor L to provide the power supply voltage VSPT to the power amplifier PA according to the first capacitor C1 and the second capacitor C2.

[0072] When the transition of the power supply voltage VSPT occurs, the driver 320 may apply the second node voltage VN2 to the gate terminal of the switch SPT_SW. Therefore, the switch SPT_SW may be turned off to float the first capacitor C1. Only the second capacitor C2 may be connected to the output node Nout (when the switch SPT_SW is turned off), so the converter 310 may provide the power supply voltage VSPT that transitions faster to the power amplifier PA according to the second capacitor C2.

[0073] The second node voltage VN2 applied to the gate terminal of the switch SPT_SW by the driver 320 may be controlled by the switch body voltage control circuit 330. According to example embodiments, the switch body voltage control circuit 330 may include a first control switch CSW1, a second control switch CSW2, and / or a comparator Cmp.

[0074] The first control switch CSW1 may have one end connected to the other end of the first capacitor C1 (e.g., the first node N1) and the other end connected to the body of the switch SPT_SW (e.g., the second node N2). A gate terminal of the first control switch CSW1 may be connected to the output terminal of the comparator Cmp, and thus the first control switch CSW1 may be turned on or off according to the comparator Cmp.

[0075] The second control switch CSW2 may have one end connected to the ground GND (e.g., the ground node Ngnd) and the other end connected to the body of the switch SPT_SW (e.g., the second node N2). Similarly, the gate terminal of the second control switch CSW2 may be connected to the output terminal of the comparator Cmp, so the second control switch CSW2 may be turned on or off according to the comparator Cmp.

[0076] For example, one end of the switch SPT_SW and one end of the first control switch CSW1 may be connected to the first node N1, the body of the switch SPT_SW, the other end of the first control switch CSW1, and the other end of the second control switch CSW2 may be connected to the second node N2, and the other end of the switch SPT_SW and one end of the second control switch CSW2 may be connected to the ground node Ngnd.

[0077] The comparator Cmp may have (one or more) input terminals and an output terminal, the first node N1 and the ground node Ngnd are connected to the (one or more) input terminals, and the first control switch CSW1 and the second control switch CSW2 are connected to the output terminal. The comparator Cmp may be configured to compare the first node voltage with the ground voltage, and control the first control switch CSW1 and the second control switch CSW2 based on the result of the comparison.

[0078] According to example embodiments, the comparator Cmp may turn off the first control switch CSW1 and turn on the second control switch CSW2 based on the first node voltage being higher than the ground voltage. Therefore, the second node voltage VN2 may be adjusted to the ground voltage (the voltage at the ground node Ngnd connected to the second control switch CSW2).

[0079] Alternatively, the comparator Cmp may turn on the first control switch CSW1 and turn off the second control switch CSW2 based on the first node voltage being lower than the ground voltage. Therefore, the second node voltage VN2 may be adjusted to the first node voltage (the voltage at the first node N1 connected to the first control switch CSW1). Therefore, according to the above example, the comparator Cmp may adjust the second node voltage VN2 to the lower of the first node voltage and the ground voltage.

[0080] When a rising transition of the power supply voltage VSPT occurs, the first node voltage becomes higher than the ground voltage, so the comparator Cmp can turn on the second control switch CSW2 during the rising transition to adjust the second node voltage VN2 to the ground voltage. Alternatively, when a falling transition of the power supply voltage VSPT occurs, the first node voltage becomes lower than the ground voltage, so the comparator Cmp can turn on the first control switch CSW1 during the falling transition to adjust the second node voltage VN2 to the first node voltage.

[0081] When the switch SPT_SW is to be turned off, the driver 320 may apply the second node voltage VN2 to the gate terminal of the switch SPT_SW. Therefore, the driver 320 may apply the ground voltage to the gate terminal of the switch SPT_SW based on the rising transition of the power supply voltage VSPT. Alternatively, the driver 320 may apply the first node voltage to the gate terminal of the switch SPT_SW based on the falling transition of the power supply voltage VSPT. In any case, when the power supply voltage VSPT transitions, the driver 320 may prevent the current from flowing from the switch SPT_SW node to the first node N1 (or reduce the amount of current flowing from the switch SPT_SW node to the first node N1), and may completely turn off the switch SPT_SW.

[0082] According to the above example, the power modulator can adjust the body voltage of the switch SPT_SW to the lower of the voltages at the opposite ends of the switch SPT_SW through the switch body voltage control circuit 330. Therefore, when the switch SPT_SW is turned off, the second node voltage VN2 applied to the gate terminal of the switch SPT_SW by the driver 320 can be prevented from being higher than the first node voltage (or the occurrence of "the second node voltage VN2 applied to the gate terminal of the switch SPT_SW by the driver 320 is higher than the first node voltage" can be reduced), so the switch SPT_SW can be turned off more stably. For example, even when a negative voltage is generated among the voltages at the opposite ends of the switch SPT_SW, the switch body voltage control circuit 330 can adjust the lower negative voltage to the body voltage of the switch SPT_SW, so that the switch SPT_SW can be stably turned off even if it is at any end of the negative voltage. Therefore, even when one end of the switch SPT_SW is at a negative voltage, the turning off of the switch SPT_SW can be stably performed.

[0083] Figure 5 is a diagram illustrating a rising transition operation of a power modulator according to an example embodiment. Figure 5 , the horizontal axis may represent time t, and the vertical axis may represent voltage.

[0084] Reference Figure 5 , the power supply voltage VSPT and the first node voltage VN1 may be indicated according to Figure 3 and Figure 4 The switch SPT_SW of the embodiment of the present invention is changed depending on whether the enable signal EN_SW of the switch SPT_SW has been turned on, and whether the enable signal EN_SW is logic high or logic low. At time t1, when the enable signal EN_SW is logic high, the switch SPT_SW may be maintained in the on state, and the first capacitor C1 may be connected to the ground node Ngnd. Therefore, before the transition, the first node voltage VN1 may represent the ground voltage, and the power supply voltage VSPT may represent the level V1. For example, in a normal state, there may be a difference V1 between the power supply voltage VSPT and the first node voltage VN1.

[0085] At time t2, when the enable signal EN_SW is converted to a low level signal, the switch SPT_SW may be turned off, and the first capacitor C1 may float. From time t2, the power supply voltage VSPT may rise, and the first node voltage VN1 may also rise with the same slope (or a similar slope) as the power supply voltage VSPT. In this case, the first node voltage VN1 may rise while maintaining the difference V1 with the power supply voltage VSPT.

[0086] At time t3, the power supply voltage VSPT may complete a rising transition to a level V3, and the first node voltage VN1 may complete a rising transition to a level V2 that is V1 lower than V3. After the rising transition is completed at time t3, the first node voltage VN1 may be discharged to a ground voltage until time t4. Then, the enable signal EN_SW may be switched back to a high level, and the first capacitor C1 may be reconnected to the ground GND. The first capacitor C1 may be connected to the ground GND during a period T defined as a time period from time t3 to time t4. CHG Discharged during this period.

[0087] Figure 6 is a diagram illustrating a falling transition operation of a power modulator according to an example embodiment. Figure 6 , the horizontal axis may represent time t, and the vertical axis may represent voltage.

[0088] Reference Figure 6 ,pass Figure 5 When the power supply voltage VSPT indicates V3 and the first node voltage VN1 indicates the ground voltage, the falling transition operation may start. From time t1 to time t2, the enable signal EN_SW may be maintained in a logic high state while the switch SPT_SW is maintained in a turned-on state.

[0089] At time t2 when the falling transition starts, the enable signal EN_SW may be switched to a logic low state. When the switch SPT_SW is turned off, the power supply voltage VSPT may drop from V3 to V1, and the first node voltage VN1 may drop from the ground voltage to -V2 at the same slope (or a similar slope) as the power supply voltage VSPT.

[0090] At time t3, the power supply voltage VSPT may complete a falling transition to V1, and the first node voltage VN1 may complete a falling transition to -V2. After the falling transition is completed at time t3, the first node voltage VN1 may be charged to the ground voltage until time t4. Then, the enable signal EN_SW may be switched back to a logic high state, and the first capacitor C1 may be reconnected to the ground GND. The first capacitor C1 may be connected to the ground GND during a period T defined as a time period from time t3 to time t4. CHG During the charging.

[0091] Figure 7 is a diagram showing a comparison between a power supply voltage of a power supply modulation scheme of a power supply modulator according to an example embodiment and a power supply voltage of an example power supply modulation scheme. Figure 7 , the horizontal axis may represent time t, and the vertical axis may represent voltage.

[0092] Reference Figure 7, an example power modulation scheme may be an average power tracking (APT) scheme for tracking the average power of an RF signal. In the case of the APT scheme, the converter may supply the power voltage VSPT through only one capacitor according to a reference voltage without the switch SPT_SW included in the power modulator according to the example embodiment.

[0093] In two power modulation schemes through Figure 1 In an example where the MIPI clock signal of the power supply voltage VSPT is operated in the same (or similar) manner, the transition of the power supply voltage VSPT may be started according to the MIPI clock signal. In this case, in both power modulation schemes, the transition may be started at time t1. In the case of an example embodiment (VSPT w / SW) in which a faster transition can be performed by the switch SPT_SW, the transition may have been completed at time t2, but in the case of the APT scheme (VSPT w / o SW), the transition may be completed only after reaching t3, which is after t2. For example, t1 to t2 may be 1 microsecond (us), and t1 to t3 may be 10us. In this case, according to an example embodiment, the transition time may be reduced by about 10 times.

[0094] For example, as mentioned above Figure 5 As described in the example embodiment (VSPT w / SW), when the switch SPT_SW is turned on and then turned off while the first node voltage VN1 is in the ground state, the first node voltage VN1 may rise with the power supply voltage and then be discharged to the ground voltage.

[0095] Figure 8 is a diagram showing a comparison between a power supply voltage of a power supply modulation scheme of a power supply modulator according to an example embodiment and a power supply voltage of an example power supply modulation scheme for symbols. Figure 8 , the horizontal axis may represent time, and the vertical axis may represent voltage or EVM.

[0096] Reference Figure 8 , a single time slot corresponding to the RF signal may include symbols (symbol 1 to symbol 14), and a cyclic prefix (CP) corresponding to each symbol. For example, in the new radio (NR, or referred to as the new air interface), for a frequency of 60kHz, a single time slot of the RF signal may be 250us. In this case, the duration of a single symbol may be 16.67us, and the duration of a single CP may be 1.17us. The durations of the time slot, symbol, and CP may be defined in various ways based on the NR standard for each frequency.

[0097] exist Figure 8, an example is provided in which a high power supply voltage VSPT is needed (or required or configured) at symbol 1 and symbol 3. In the case of the APT scheme (VSPT w / o SW), the switch SPT_SW may not be included, so the power supply voltage VSPT should be based on Figure 3 It is supplied only through the first capacitor C1. Therefore, compared with the example embodiment (VSPT w / SW), the APT scheme may have a larger amount of transition time (e.g., about 10us). Therefore, even when a transition of the power supply voltage VSPT is required (or required or configured) for a specific symbol, the APT scheme should only be applied in units of time slots because the transition time of the APT scheme is relatively large. As shown in the figure, the APT scheme can be applied starting from symbol 1. When the power supply voltage VSPT transitions from symbol 1, the transitioned voltage should be maintained throughout the entire time slot as shown in the figure, so unnecessary (or excessive) power consumption may occur in the remaining symbols except symbol 1 and symbol 3. In addition, the EVM performance of the APT scheme applied from symbol 1 may be degraded. When a high voltage is required (or required or configured) for symbol 1, the existing APT scheme may incorrectly supply the optimal (or improved) voltage to symbol 1 due to the slower transition time, resulting in EVM degradation. However, in example embodiments, due to a faster transition time of the power supply voltage VSPT, an optimal (or improved) voltage may be supplied to the symbol 1 , and thus EVM degradation may be reduced.

[0098] In an example embodiment, the first capacitor C1 may be based on Figure 3 The floating state results in a shorter transition time (e.g., about 1 us) than the transition time of the APT scheme (compared with the transition time of the APT scheme). Therefore, the power supply voltage VSPT can be transitioned in units of symbols. In an example embodiment, the power supply voltage VSPT can rise for symbol 1 and fall at the end of the duration of symbol 1. In addition, the power supply voltage VSPT can be transitioned only for symbol 1 and symbol 3, thereby preventing (or reducing) unnecessary (or excessive) power consumption.

[0099] Fig. 9 is a diagram illustrating a power modulator according to example embodiments.

[0100] Reference Fig. 9 The power modulator 400 includes a converter 410, a switch SPT_SW, a driver 420 and / or a switch body voltage control circuit 430, and may also include a gate capacitor C connected to a gate terminal of the switch SPT_SW. gate and / or is configured based on the gate capacitor C gateA switch assist circuit (SSC) 440 assisting the conduction operation of the switch SPT_SW. According to example embodiments, the power modulator 400, the converter 410, the switch SPT_SW, the driver 420 and / or the switch body voltage control circuit 430 may be respectively combined with Figure 3 The power supply modulator 300 , converter 310 , switch SPT_SW , driver 320 , and / or switch body voltage control circuit 330 discussed above are the same (or similar). Figure 3 and Fig. 9 The repeated descriptions between them can be omitted.

[0101] Gate capacitor C gate The gate capacitor C may have one end connected to the gate terminal of the switch SPT_SW and the other end connected to the ground GND. The current may be supplied to the gate capacitor C through the switch auxiliary circuit 440. gate , to store charge. For example, charge corresponding to a threshold voltage of the switch SPT_SW may be stored. The threshold voltage may represent a voltage level at the gate terminal when the switch SPT_SW begins to be turned on.

[0102] The switch assist circuit 440 may be configured to disconnect the gate capacitor C based on the completion of the transition of the power supply voltage VSPT. gate Charged to the threshold voltage. For example, according to the above example, the switch SPT_SW may be turned off and the power supply voltage VSPT may be transformed. After the transformation of the power supply voltage VSPT is completed, the switch SPT_SW may be turned on (or performed) to allow the power supply modulator 400 to operate normally again. The first capacitor C1 floats during the transformation, so the voltage at one end of the switch SPT_SW (e.g., the first node voltage) may immediately (or quickly) reach a level having a difference with the power supply voltage VSPT before the transformation relative to the power supply voltage VSPT after the transformation after the transformation (e.g., during the rising transition). Figure 5 of V2, and during the falling transition Figure 6 =V2). For example, there will be a voltage difference between the first node N1 and the ground node Ngnd (two terminals of the switch SPT_SW) at the same level (or a similar level) as the change in the power supply voltage VSPT. In this case, when a voltage for turn-on (e.g., a driving voltage VBAT) is immediately (or quickly) applied to the gate terminal of the switch SPT_SW through the driver 420, a large amount of (e.g., tens of amperes) of rush current may be instantaneously generated in the switch SPT_SW due to the voltage difference between the first node N1 and the ground node Ngnd.

[0103] Therefore, the driver 420 does not turn on the switch SPT_SW immediately (or quickly) after the transition is completed. Instead, the switch auxiliary circuit 440 may first connect the gate capacitor Cgate When the gate capacitor C gate When charged to the threshold voltage by the switch auxiliary circuit 440, the voltage at the gate terminal of the switch SPT_SW may also reach the threshold voltage. When the gate terminal of the switch SPT_SW reaches a level that is the same as or similar to the level of the threshold voltage for turn-on, for ease of description, the state of the switch SPT_SW may be referred to as a slightly turned-on state.

[0104] The gate terminal of the switch SPT_SW in a slightly turned-on state does not immediately (or quickly) reach the driving voltage VBAT, but is maintained at a level of about (or approximately) the threshold voltage. In this case, the first node voltage does not immediately (or quickly) reach the ground voltage, but can be gradually charged or discharged to the ground voltage at a predetermined (or optionally, given) slope. For example, one end of the switch SPT_SW connected to the other end of the first capacitor C1 can start to be charged or discharged based on the gate terminal of the switch SPT_SW reaching the threshold voltage.

[0105] For example, the first node voltage may be discharged to the ground voltage immediately (or quickly) after a rising transition, and may be charged to the ground voltage immediately (or quickly) after a falling transition.

[0106] When the first node voltage reaches the ground voltage while the switch SPT_SW is maintained in a slightly turned-on state by the switch auxiliary circuit 440, for example, based on one end of the switch SPT_SW being charged or discharged to the ground voltage, the driver 420 may apply a turn-on voltage (for example, a driving voltage VBAT) to the gate terminal of the switch SPT_SW. In this case, the voltage difference between the opposite ends of the switch SPT_SW is almost zero, so there may be almost no inrush current even when the switch SPT_SW is fully turned on.

[0107] According to the above example, the power modulator 400 can stably turn on the switch SPT_SW for the transition of the power supply voltage VSPT without generating an inrush current after the switch SPT_SW is turned off by the switch auxiliary circuit 440. Therefore, the stability of turning on and off the switch SPT_SW for the transition of the power supply voltage VSPT can be ensured.

[0108] Fig.10 It shows that according to Fig. 9 Hereinafter, detailed description of the contents that are the same as (or similar to) the contents of the above-mentioned examples will be omitted.

[0109] Reference Fig.10, the switch auxiliary circuit 440 included in the power modulator 400 according to example embodiments may be implemented as a current mirror circuit for the switch SPT_SW. The switch auxiliary circuit 440 may include a current source IC and a mirror switch SW.

[0110] According to an example embodiment, the switch auxiliary circuit 440 may operate after the transition of the power supply voltage VSPT started by turning off the switch SPT_SW is terminated. The current source IC may operate according to the driving voltage VBAT, and may provide a reference current to one end of the mirror switch SW based on the driving voltage VBAT. The mirror switch SW may have one end connected to the current source IC, and the other end to which the second node voltage VN2 is applied (or the other end of the mirror switch SW may be connected to the ground GND). In this case, the second node voltage VN2 may have a value corresponding to the lower of the first node voltage and the ground voltage through the first control switch CSW1, the second control switch CSW2, and the comparator Cmp included in the switch body voltage control circuit 430. According to the mirror switch SW and the switch SPT_SW, a mirror current corresponding to the reference current of the current source IC may flow through the switch SPT_SW, and the gate capacitor C gate Can be charged by the mirror current. For example, the gate capacitor C gate Can be charged to the threshold voltage.

[0111] The switch SPT_SW operates in the slightly on state, and the driver 420 still does not apply the driving voltage VBAT to the gate terminal of the switch SPT_SW. During the slightly on state, the converter 410 may provide the converted power supply voltage VSPT to the power amplifier PA. After transitioning to a certain level in the same (or similar) direction as the transition of the power supply voltage VSPT, the first node voltage VN1 may be maintained at a certain level (e.g., Figure 5 V2 in, and when decreasing Figure 6 -V2), at least until the gate capacitor C gate is charged to the threshold voltage. Then, when the gate capacitor C gate When the voltage of the first node voltage VN1 reaches the threshold voltage, the first node voltage VN1 may be charged or discharged to the ground voltage. When the first node voltage VN1 reaches the ground voltage, the voltage difference at the opposite ends of the switch SPT_SW (e.g., the difference between the first node voltage VN1 and the ground voltage) is almost zero. Therefore, the driver 420 may apply the driving voltage VBAT to the gate terminal.

[0112] In example embodiments, when the first node voltage VN1 becomes equal to the ground voltage, the driver 420 may start applying the driving voltage VBAT to the gate terminal of the switch SPT_SW.

[0113] Fig.11is a diagram showing an operation waveform of a power supply modulator according to an example embodiment. Fig.11 In FIG. 1 , the horizontal axis may represent time t, and the vertical axis may represent the voltage or control signal CS.

[0114] Reference Fig.11 , the control signal CS may be generated by logic (not shown) or a modem included in the power modulator to control components and devices included in the power modulator. A single unit (eg, A, B, or C) of the control signal CS may represent a unit operation of the switch SPT_SW and may include an off operation and an on operation.

[0115] When the control signal CS indicates A, the switch SPT_SW is in the on state, so the power modulator can operate in the normal mode. In this case, the gate voltage VGATE can indicate the driving voltage VBAT, the power supply voltage VSPT can indicate a specific level V1, and the first node voltage VN1 can indicate a ground voltage.

[0116] Then, when the control signal CS indicates B, the gate voltage may be reduced from the driving voltage VBAT to the ground voltage at time t1, and the switch SPT_SW may be turned off during the turn-off period T off The first node voltage may be turned off during the period. Then, the power supply voltage VSPT may rise from V1 to V3 starting from time t2. Since the switch SPT_SW is turned off, the first capacitor C1 may float, and the first node voltage may rise from the ground voltage to the positive voltage V2 at the same slope (or a similar slope) as the power supply voltage VSPT. In this case, the first node voltage may rise while maintaining the difference V1 with the power supply voltage VSPT. The driver may apply a ground voltage lower than the first node voltage to the gate terminal of the switch SPT_SW to apply the ground voltage.

[0117] The rising transition can be in the transition period T ts At time t3, the rising transition of the power supply voltage VSPT may be completed.

[0118] At time t3, the gate voltage may begin to be charged for a slightly turned-on operation of the switch SPT_SW. According to the above example, a charging operation may be performed on a gate capacitor connected to a gate terminal of the switch SPT_SW by the switch auxiliary circuit. From time t3 to time t4, the gate voltage may be charged to a threshold voltage Vth.

[0119] At time t4 when the gate voltage is fully charged, the switch SPT_SW may perform a slightly turned-on operation. CHG During this time, the voltage at the first node may be discharged from V2 to the ground voltage. The power supply voltage VSPT may be maintained at V3.

[0120] At time t5, when the voltage of the first node reaches the ground voltage, the switch SPT_SW may be finally fully turned on. At time t5, the driver may apply the driving voltage VBAT to the gate terminal to switch the gate voltage to the driving voltage VBAT.

[0121] From time t5 to time t6 , when the switch SPT_SW is turned on, the first and second capacitors C1 and C2 may be connected to the output node Nout, and a power supply voltage VSPT according to the first and second capacitors C1 and C2 may be provided to the power amplifier PA.

[0122] From time t6, the control signal CS may indicate C, and the switch SPT_SW may be turned off again. The gate voltage may be reduced to the ground voltage for turning off. The first capacitor C1 may float again. From time t7, the power supply voltage VSPT may drop from V3 to V1. Since the switch SPT_SW is turned off, the first capacitor C1 may float, and the voltage at the first node may drop from the ground voltage to the negative voltage -V2 at the same slope (or a similar slope) as the power supply voltage VSPT. In this case, the voltage at the first node may drop while maintaining the difference V3 with the power supply voltage VSPT. The first node voltage may be applied to the gate voltage to completely turn off the switch SPT_SW. The driver may apply a first node voltage lower than the ground voltage to the gate terminal of the switch SPT_SW as the gate voltage to apply the first node voltage (negative voltage). The first node voltage (negative voltage) may be applied to the gate terminal to prevent current from flowing from the switch SPT_SW to the first node N1 (or reduce the amount of current flowing from the switch SPT_SW to the first node N1).

[0123] Similarly, the falling transition can be performed during the transition period T ts The period is performed, and the falling transition of the power supply voltage VSPT can be completed at time t8.

[0124] At time t8, the gate voltage may start to be charged for slightly turned-on operation of the switch SPT_SW. For example, from time t8 to time t9, the gate voltage may be charged from -V2 to Vth-V2.

[0125] At time t9 when the charging of the gate voltage is completed, the switch SPT_SW may perform a slightly turned-on operation. CHG During this period, the power supply voltage VSPT can still be maintained at V1.

[0126] At time t10 when the first node voltage reaches the ground voltage, the switch SPT_SW may be finally fully turned on. At time t10, the driver may apply the driving voltage VBAT to the gate terminal to switch the gate voltage to the driving voltage VBAT.

[0127] From time t10 to time t11, when the switch SPT_SW is turned on, the first and second capacitors C1 and C2 may be connected to the output node Nout, and a power supply voltage VSPT according to the first and second capacitors C1 and C2 may be provided to the power amplifier PA.

[0128] Fig.12 is a diagram illustrating a power modulator including a protection circuit according to example embodiments.

[0129] Reference Fig.12 The power modulator 500 (also referred to herein as the power converter 500) may further include a protection circuit 510 connected to a driver 520, a switch body voltage control circuit 530, and / or a switch auxiliary circuit 540 according to an example embodiment. According to an example embodiment, the power modulator 500, the driver 520, the switch body voltage control circuit 530, and / or the switch auxiliary circuit 540 may be respectively combined with Fig. 9 The power modulator 400 , driver 420 , switch body voltage control circuit 430 , and / or switch assist circuit 440 discussed above are the same (or similar). Fig. 9 and Fig.12 The repeated descriptions between them can be omitted.

[0130] The protection circuit 510 may be configured to adjust the driving voltage VBAT of the driver 520 to a voltage that has been adjusted to be the sum of the driving voltage VBAT and the bulk voltage of the switch SPT_SW (eg, the second node voltage VN2 described above). Figure 4 and Fig.10 In the embodiment, when the power supply voltage VSPT of the output node Nout undergoes a falling transition, the first node voltage may also fall. For example, the first node voltage may fall to the ground voltage or the voltage -V2 described above. In an example embodiment, when the switch SPT_SW is to be turned off for a falling transition, the driver 520 may apply the second node voltage VN2 (e.g., the first node voltage or the ground voltage) to the gate terminal of the switch SPT_SW. In this case, when the driver 520 is implemented as a transistor that operates based on the driving voltage VBAT, the difference between the driving voltage VBAT and the second node voltage VN2 may temporarily appear in the driver 520. Such reliability issues may cause damage to the driver 520.

[0131] In addition, when there are devices (eg, Fig.10 When the comparator Cmp and / or the mirror switch SPT_SW) are connected to the drive voltage VBAT and the second node voltage VN2, all devices may be damaged due to the difference between the drive voltage VBAT and the second node voltage VN2.

[0132] Therefore, the protection circuit 510 may be configured to adjust the driving voltage VBAT (or operating voltage) of the driver 520, the switch body voltage control circuit 530, and / or the switch auxiliary circuit 540 to a voltage that has been adjusted to the sum of the driving voltage VBAT and the body voltage of the switch SPT_SW (e.g., the second node voltage VN2). For example, the adjustment voltage VHH may be defined as the sum of the driving voltage VBAT and the second node voltage VN2. Therefore, when the driving voltage VBAT of the driver 520, the switch body voltage control circuit 530, and / or the switch auxiliary circuit 540 is adjusted to the adjustment voltage VHH by the protection circuit 510, the driver 520, the switch body voltage control circuit 530, and / or the switch auxiliary circuit 540 may operate at the adjustment voltage VHH. In this case, the voltage difference between the adjustment voltage VHH as the operating voltage of the driver 520, the switch body voltage control circuit 530, and / or the switch auxiliary circuit 540 and the second node voltage VN2 may be at most equal to (or similar to) the original driving voltage VBAT.

[0133] In example embodiments, the protection circuit 510 may be deactivated (e.g., not operated) when the power supply voltage VSPT rises, and may be activated (e.g., operated) when the power supply voltage VSPT falls. For example, the protection circuit 510 may operate based on the fall of the power supply voltage VSPT. For example, because the second node voltage VN2 is determined as (e.g., corresponding to) a rising transition when it is the ground voltage, the protection circuit 510 may not operate when the second node voltage VN2 is the ground voltage. For example, because the second node voltage VN2 is determined as (e.g., corresponding to) a falling transition when it is the first node voltage, the protection circuit 510 may operate when the second node voltage VN2 is the first node voltage.

[0134] According to the above example, power converter 500 can prevent or reduce damage to components and devices included in power converter 500 during falling transition by protection circuit 510. In addition, protection circuit 510 does not operate during rising transition instead of falling transition, thereby saving current consumption.

[0135] Fig.13 According to an example embodiment Fig.12 Circuit diagram of the protection circuit.

[0136] Reference Fig.13 , the protection circuit 510 may include a protection driver P_DRV and a protection switch P_SW.

[0137] The third node N3 may be connected to a portion of the input terminal of the protection driver P_DRV, and two first resistors R1 for voltage division may be connected to the third node N3. A current generated by the driving voltage VBAT may flow to the third node N3 through one first resistor R1, and a current generated by the second node voltage VN2 may flow to the third node N3 through another first resistor R1. According to the voltage division, the third node N3 may be applied with a voltage of (VBAT+VN2) / 2 through two first resistors R1 having the same size (or similar size).

[0138] Therefore, the remaining portion of the input terminal of the protection driver P_DRV connected to the fourth node N4 may also be applied with a voltage of (VBAT+VN2) / 2. Two second resistors R2 may be connected to the fourth node N4. One second resistor R2 may be connected to the fourth node N4 and the ground GND, and another second resistor R2 may be connected to a fifth node N5, and the fifth node N5 is connected to the protection switch P_SW.

[0139] The protection switch P_SW may have one end to which the driving voltage VBAT is applied and the other end connected to the fifth node N5. In addition, a gate terminal of the protection switch P_SW may be connected to the protection driver P_DRV. Therefore, the protection switch P_SW may be turned on or off according to the protection driver P_DRV.

[0140] In example embodiments, when the power supply voltage VSPT drops (e.g., when the second node voltage VN2 is the first node voltage), the regulation voltage VHH may be applied to the fifth node N5. For example, when a voltage of (VBAT+VN2) / 2 is applied to the fourth node N4, a voltage of 2×(VBAT+VN2) / 2 (e.g., VBAT+VN2) may be applied to the fifth node N5 through two second resistors R2 having the same size (or similar size). Therefore, the regulation voltage VHH may have the sum of the driving voltage (VBAT) and the voltage (VN2) of the second node N2.

[0141] like Fig.12As shown in , the voltage at the fifth node N5 (e.g., the regulated voltage VHH) may be applied as the driving voltage VBAT of the driver 520, the switch body voltage control circuit 530, and / or the switch auxiliary circuit 540. Therefore, the power converter 500 may prevent (or reduce) damage to components and devices included in the power converter 500 at the time of the falling transition by the protection circuit 510. In addition, even when the first node N1 according to the above example becomes a negative voltage, due to the switch body voltage control circuit 530 and the protection circuit 510, the first node N1 is turned off, charged, and the stable operation of the driver 520 may be performed.

[0142] Fig.14 is a diagram illustrating an Internet of Things (IoT) device to which a wireless communication device according to an example embodiment is applied.

[0143] Reference Fig.14 , the term "IoT" may refer to a network using wired / wireless communications between objects. An IoT device may include an accessible wired interface or a wireless interface, and may include a device that communicates with at least one other device via a wired interface or a wireless interface to send or receive data. The accessible wired interface or wireless interface may include a wired local area network (LAN), a wireless local area network (WLAN) (such as Wi-Fi), a wireless personal area network (WPAN) (such as Bluetooth), a wireless universal serial bus (USB), Zigbee, near field communication (NFC), radio frequency identification (RFID), power line communication (PLC), and / or a modem communication interface that can be connected to a mobile cellular network (such as 3G, 4G and / or long term evolution (LTE)). The Bluetooth interface may support Bluetooth Low Energy (BLE).

[0144] In detail, the IoT device 600 may include a communication interface 610 (radio transmitter / receiver) for communicating with the outside. The communication interface 610 may be, for example, a modem communication interface that can access a wireless local area network (such as LAN, Bluetooth, Wi-Fi or Zigbee, PLC) or a mobile communication network (such as 3G, LTE, 4G or 5G). The communication interface 610 may include a transmitter and / or a receiver. The IoT device 600 may receive information from an access point or a gateway and / or send information to an access point or a gateway through the transmitter and / or the receiver. In addition, the IoT device 600 may communicate with a user device or any other IoT device to send and / or receive control information or data of the IoT device 600.

[0145] Reference Figure 1 and Figure 2 At least one of the wireless communication devices 100 and 200 described above may be implemented in the communication interface 610, and therefore, referring to Figures 3 to 13At least one of the described power modulators 300 to 500 may be implemented in a transmitter of the communication interface 610 .

[0146] The IoT device 600 may also include a processor or an application processor (AP) 620 that performs calculations. For internal power supply, the IoT device 600 may also include an embedded battery or a power supply unit supplied with power from the outside. In addition, the IoT device 600 may include a display 640 for displaying internal status or data. The user can control the IoT device 600 through the user interface (UI) of the display 640 in the IoT device 600. The IoT device 600 can send the internal status and / or data to the outside through the transmitter, and can receive control instructions and / or data from the outside through the receiver.

[0147] The memory 630 may store control instruction codes, control data or user data for controlling the IoT device 600. The memory 630 may include at least one of a volatile memory and a non-volatile memory. The non-volatile memory includes at least one of various memories such as a read-only memory (ROM), a programmable ROM (PROM), an electrically programmable ROM (EPROM), an electrically erasable programmable ROM (EEPROM), a flash memory, a phase change RAM (PRAM), a magnetic RAM (MRAM), a resistive RAM (ReRAM) and / or a ferroelectric RAM (FRAM). The volatile memory may include at least one of various memories such as a static RAM (SRAM), a dynamic RAM (DRAM) and / or a synchronous DRAM (SDRAM).

[0148] The IoT device 600 may further include a storage device. The storage device may include at least one of a non-volatile medium such as a hard disk drive (HDD), a solid state drive (SSD), an embedded multimedia card (eMMC), and / or a universal flash memory (UFS). The storage device may store user information provided by an input / output unit (I / O) 650 and / or a plurality of sensing information collected by a sensor 660.

[0149] Fig.15 is a diagram illustrating a mobile terminal to which a wireless communication device according to an exemplary embodiment is applied.

[0150] Reference Fig.15 , the mobile terminal 700 may include an application processor (hereinafter referred to as “AP”) 710, a memory 720, a display 730, and / or an RF module 740. The mobile terminal 700 may also include various components such as a lens, an audio module, etc.

[0151] The AP 710 may be implemented as a system on chip (SoC), and may include a central processing unit (CPU) 711, a RAM 712, a power management unit (PMU) 713, a memory interface (I / F) 714, a display controller (DCON) 715, a modem 716, and / or a system bus 717. In addition, the AP 710 may further include various intellectual property rights (IPs). The AP 710 may have the function of a modem chip integrated therein, which is referred to as a "ModAP".

[0152] The CPU 711 may control the overall operation of the AP 710 and the mobile terminal 700. The CPU 711 may control the operation of each component of the AP 710. In addition, the CPU 711 may be implemented as a multi-core. The multi-core may be a single computing component including two or more independent cores.

[0153] The RAM 712 may temporarily store programs, data, or instructions. For example, the programs and / or data stored in the memory 720 may be temporarily stored in the RAM 712 under the control of the CPU 711 or according to the boot code. The RAM 712 may be implemented as a DRAM or an SRAM.

[0154] The PMU 713 may manage power of each component of the AP 710. The PMU 713 may also determine an operating condition of each component of the AP 710 and may control the operation of each component of the AP 710.

[0155] The memory interface 714 may control the overall operation of the memory 720, and may control data exchange between the memory 720 and each component of the AP 710. The memory interface 714 may write data into the memory 720 or read data from the memory 720 according to a request of the CPU 711.

[0156] The display controller 715 may transmit image data to be displayed on the display 730 to the display 730. The display 730 may be implemented as a flat panel display such as a liquid crystal display (LCD) or an organic light emitting diode (OLED) display, or a flexible display.

[0157] For wireless communication, the modem 716 may modulate data to be transmitted to be suitable for the wireless environment and may recover received data. The modem 716 may perform digital communication with the RF module 740.

[0158] As a reference, refer to Figure 1 The modem 110 described and referenced Figure 2 The depicted modem 210 may be implemented in the modem 716 .

[0159] The RF module 740 may convert a high frequency signal received through the antenna into a low frequency signal, and may transmit the converted low frequency signal to the modem 716. In addition, the RF module 740 may convert a low frequency signal received from the modem 716 into a high frequency signal, and may transmit the converted high frequency signal through the antenna to the outside of the mobile terminal 700. In addition, the RF module 740 may amplify or filter the signal.

[0160] As a reference, refer to Figure 1 and Figure 2 The described RFIC 120, power amplifier PA, duplexer 130, and antenna ANT may be implemented in the RF module 740. Figures 3 to 13 The described power supply modulators 300 to 500 may also be implemented in the RF module 740 .

[0161] To this end, in the mobile terminal 700, broadband communication can be performed while reducing power consumption for communication.

[0162] As described above, according to example embodiments, a power modulator and a wireless communication device including the power modulator may be provided.

[0163] The wireless communication device uses a power amplifier to amplify the communication signal to be transmitted. When, for example, the communication signal has a higher peak-to-average power ratio (PAPR) and / or a higher bandwidth, the efficiency of the power amplifier decreases. When the power supply of the wireless communication device is limited (e.g., supplied by a battery), such a reduction in efficiency is particularly significant. Existing devices and methods attempt to use average power tracking (APT) or envelope tracking (ET) techniques to improve the efficiency of the power amplifier. However, because the transition time to the power supply voltage of the power amplifier is too long, the existing devices and methods are unable to apply these techniques to each symbol of the communication signal. Therefore, the existing devices and methods apply these techniques to the entire time slot of the symbol, resulting in excessive resource consumption (e.g., power consumption), excessive noise and / or degraded error vector magnitude (EVM) characteristics.

[0164] However, according to example embodiments, an improved apparatus and method for providing a power supply voltage to a power amplifier is provided. For example, the improved apparatus and method may use a switch to float the larger of two load capacitors when the switch is turned off. By floating the larger capacitor, the transition time of the power supply voltage to the power amplifier may be reduced, enabling the power supply voltage to be modulated according to individual symbols of a communication signal. Thus, the improved apparatus and method overcome the deficiencies of existing apparatus and methods to at least improve resource consumption (e.g., power consumption), reduce noise, and / or improve EVM characteristics.

[0165] According to an example embodiment, it is described herein as comprising a wireless communication device 100, a modem 110, an RFIC 120, a duplexer 130, a power modulator 140, a power amplifier PA, a digital processing circuit 111 (e.g., the digital processing circuit 111 may perform an average power signal generating operation, an envelope extracting operation, a digital envelope signal generating operation, a crest factor reduction (CFR) 211, a shaping function (SF) 212, a digital pre-distortion (DPD) 213 and / or a delay correction operation 214 and / or 215), a DAC 112, ADC113, MIPI, transmitting circuit TXC, receiving circuit RXC, local oscillator LO, first analog baseband filter ABF1, first mixer MX1, driver amplifier 121, receiving circuit RXC, second analog baseband filter ABF2, second mixer MX2, low noise amplifier (LNA) 122, DAC1, power modulator 300, converter 310, driver 320, switch body voltage control circuit 330, comparator Cmp, power modulator 400, converter 410, driver 420, switch body voltage control circuit 430, switch auxiliary circuit 440, logic of power modulator 400, power modulator 500, protection circuit 510, driver 520, switch body voltage control circuit 530, switch auxiliary circuit 540, IoT device 600, communication interface 610, AP 620, I / O 650, sensor 660, mobile terminal 700, AP 710, RF module 740, CPU The operations performed by 711, PMU 713, memory interface (I / F) 714, DCON 715 and / or modem 716 may be performed by a processing circuit system. The term "processing circuit system" used in the present disclosure may refer to hardware including logic circuits, hardware / software combinations (such as processors that execute software), or combinations thereof. For example, the processing circuit system may more specifically include, but is not limited to, a central processing unit (CPU), an arithmetic logic unit (ALU), a digital signal processor, a microcomputer, a field programmable gate array (FPGA), a system on a chip (SoC), a programmable logic unit, a microprocessor, an application specific integrated circuit (ASIC), etc.

[0166] The various operations of the methods described above may be performed by any suitable device capable of performing the operations (such as the processing circuit system discussed above). For example, as discussed above, the operations of the methods described above may be performed by various hardware and / or software implemented in some form of hardware (e.g., processor, ASIC, etc.).

[0167] The software may include an ordered list of executable instructions for implementing logical functions and may be embodied in any "processor-readable medium" for use by or in conjunction with an instruction execution system, device or apparatus (such as a single-core processor or a multi-core processor, or a system including a processor).

[0168] The blocks or operations of the methods or algorithms and functions described in conjunction with the example embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. If implemented in software, the functions may be stored as one or more instructions or codes on or transmitted through a tangible, non-transitory computer-readable medium (e.g., a memory of the modem 110, memory 630, memory 720, RAM 712, etc.). The software module may reside in a random access memory (RAM), flash memory, read-only memory (ROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), registers, a hard disk, a removable disk, a CD ROM, or any other form of storage medium known in the art.

[0169] Although the terms "first" or "second" can be used to describe various components, components are not limited to these terms. These terms should only be used to distinguish one component from another component. For example, the "first" component may be referred to as the "second" component, or similarly, the "second" component may be referred to as the "first" component. When a statement such as "at least one of..." is after a column of elements, the entire column of elements is modified without modifying a single element in the column. For example, the statement "at least one of a, b, and c" should be understood to include only a, only b, only c, both a and b, both a and c, both b and c, all a, b, and c, or any variation of the aforementioned examples. As used herein, the term "and / or" includes any and all combinations of one or more of the relevant listed items.

[0170] While example embodiments have been shown and described above, it will be apparent to those skilled in the art that modifications and variations may be made without departing from the scope of the inventive concept as defined by the appended claims.

Claims

1. A power modulator, the power modulator being configured to provide a power supply voltage for a power amplifier, the power modulator comprising: a converter configured to output the power supply voltage to a power amplifier; a switch connected to the first capacitor and the second capacitor, a first end of the first capacitor connected to the converter, a second end of the first capacitor connected to the switch, a first end of the second capacitor connected to the converter, a second end of the second capacitor connected to ground and the switch, and a capacitance of the second capacitor is smaller than a capacitance of the first capacitor; as well as A driver is connected to the switch, and the driver is configured to turn off the switch based on the occurrence of the transition of the power supply voltage.

2. The power modulator according to claim 1, further comprising: A switch body voltage control circuit is connected to the switch, and is configured to adjust a body voltage of the switch to a lower voltage between a voltage at the second end of the first capacitor and a ground voltage at the ground.

3. The power modulator according to claim 2, wherein: The switch body voltage control circuit includes: a first control switch having a first end connected to the second end of the first capacitor and a second end connected to the body of the switch; a second control switch having a first end connected to ground and a second end connected to the body of the switch; and The comparator is configured to compare the voltage at the second end of the first capacitor with the ground voltage to obtain a comparison result, and control the first control switch and the second control switch based on the comparison result.

4. The power modulator according to claim 3, wherein: The comparators are configured as: Based on the voltage at the second end of the first capacitor being higher than the ground voltage, turning off the first control switch and turning on the second control switch; and Based on the voltage at the second end of the first capacitor being lower than the ground voltage, the first control switch is turned on and the second control switch is turned off.

5. The power modulator according to claim 1, wherein: The drive is configured as: applying a ground voltage to a gate terminal of the switch based on a rising transition of the power supply voltage; and Based on a falling transition of the power supply voltage, a voltage at the second end of the first capacitor is applied to a gate terminal of the switch.

6. The power modulator of claim 1 , further comprising: The switch assist circuit is configured to charge a gate capacitor to a threshold voltage based on the completion of the transition of the power supply voltage, the gate capacitor being connected to a gate terminal of the switch.

7. The power modulator according to claim 6, wherein: The first end of the switch is connected to the second end of the first capacitor; and Based on the gate terminal of the switch reaching a threshold voltage, the first end of the switch begins to be charged or discharged.

8. The power modulator according to claim 7, wherein: The driver is configured to apply a turn-on voltage to a gate terminal of the switch based on the first end of the switch being charged or discharged to a ground voltage.

9. The power modulator according to claim 1, wherein: The first end of the switch is connected to the second end of the first capacitor; and The first end of the switch is floating based on the switch being turned off.

10. The power modulator of claim 1, further comprising: The protection circuit is configured to adjust the operating voltage of the driver to the sum of the driving voltage of the driver and the body voltage of the switch.

11. The power modulator according to claim 10, wherein: The protection circuit is configured to operate based on the power supply voltage drop.

12. The power modulator according to any one of claims 1 to 11, wherein: The converter is configured to adjust the supply voltage via a second capacitor based on the switch being turned off.

13. The power modulator according to claim 3, wherein: The first end of the switch and the first end of the first control switch are connected to a first node; The body of the switch, the second end of the first control switch, and the second end of the second control switch are connected to a second node; and The second terminal of the switch and the first terminal of the second control switch are connected to a ground node.

14. A wireless communication device, comprising: A power amplifier configured to amplify a radio frequency signal; a power modulator configured to provide a power supply voltage for a power amplifier; a first capacitor connected to the power amplifier and the power modulator; as well as The second capacitor, connected to the power amplifier and the power modulator, The power modulator includes: a converter configured to output the power supply voltage to a power amplifier, a switch connected to the first capacitor and the second capacitor, a first end of the first capacitor connected to the converter, a second end of the first capacitor connected to the switch, a first end of the second capacitor connected to the converter, a second end of the second capacitor connected to ground and the switch, and a capacitance of the second capacitor is smaller than a capacitance of the first capacitor, and A driver is connected to the switch and is configured to turn off the switch based on the occurrence of the transition of the power supply voltage.

15. The wireless communication device according to claim 14, wherein: The power amplifier is configured to output a radio frequency signal having a modulated voltage for each of a plurality of symbols included in the radio frequency signal.

16. The wireless communication device according to claim 14, wherein: The drive is configured as: applying a ground voltage to a gate terminal of the switch based on a rising transition of the power supply voltage; and Based on a falling transition of the power supply voltage, a voltage at the second end of the first capacitor is applied to a gate terminal of the switch.

17. The wireless communication device according to claim 14, wherein: The first end of the switch is connected to the second end of the first capacitor; and The first end of the switch is floating based on the switch being turned off.

18. A power modulator, the power modulator being configured to provide a power supply voltage for a power amplifier, the power modulator comprising: a converter configured to output the power supply voltage to a power amplifier; a switch connected to the first capacitor and the second capacitor, a first end of the first capacitor connected to the converter, a second end of the first capacitor connected to the switch, a first end of the second capacitor connected to the converter, a second end of the second capacitor connected to ground and the switch, and a capacitance of the second capacitor is smaller than a capacitance of the first capacitor; as well as A driver is connected to the gate terminal of the switch, and the driver is configured to apply a lower voltage between a first voltage and a ground voltage to the gate terminal of the switch based on the occurrence of the transition of the power supply voltage, the first voltage being the voltage at the second end of the first capacitor, and the ground voltage being the voltage at the ground.

19. The power modulator according to claim 18, wherein: The switch is turned off based on the occurrence of the transition of the power supply voltage.

20. The power supply modulator of claim 18, wherein: The drive is configured as: applying a ground voltage to a gate terminal of the switch based on a rising transition of the power supply voltage; and Based on a falling transition of the power supply voltage, a voltage at the second end of the first capacitor is applied to a gate terminal of the switch.

Images