Novel groove IGBT (Insulated Gate Bipolar Translator)

Abstract

The invention discloses a novel trench IGBT. A first semiconductor region, a second semiconductor region and a third semiconductor region are connected in sequence; a plurality of arrayed first grooves are formed in the third semiconductor region in the X-axis direction, the first grooves extend into the second semiconductor region, the first grooves are filled with gate insulating films and gates, and the gates are wrapped in the gate insulating films; the plurality of fourth semiconductor regions are arranged on the third semiconductor region in an array along the X-axis direction, and are staggered with the plurality of first grooves; a plurality of arrayed second grooves are formed between the first semiconductor region and the second semiconductor region in the X-axis direction, the second grooves protrude towards the first semiconductor region, and oxide film layers are formed on the inner walls of the second grooves and between the first semiconductor region and the second semiconductor region; through the structural design, the tradeoff-benefit relationship between the breakdown voltage and the voltage drop in the conducting state of the novel trench IGBT is improved.

Description

Technical Field

[0001] The invention relates to the technical field of semiconductor detection, and in particular to a novel trench IGBT. Background Art

[0002] Among the various power semiconductor components currently developed, the insulated gate transistor (IGBT) is the most advanced form, with high voltage, large current and relatively fast switching characteristics. This is because the insulated gate transistor (IGBT) is a structure that combines the excellent current driving capability of the bipolar transistor with the voltage driving and fast switching capability of the power MOSFET;

[0003] When electron current is injected into the base of a PNP bipolar junction transistor (BJT), a large number of holes are injected from the p+ collector region of the bipolar junction transistor (BJT) into the n drift region, and a conductivity modulation effect is generated in the n drift region due to the large number of injected holes. Due to this conductivity modulation effect in the n drift region, the resistance is reduced, so the insulated gate transistor (IGBT) has excellent current driving capability. However, since the holes accumulated in the n drift region must be released or eliminated during the cut-off period, it will cause a delay in the cut-off time.

[0004] There is a trade-off between the on-voltage and cut-off time of the IGBT due to the conductivity modulation effect of the holes. The T-IGBT greatly reduces the resistance of the IGBT by removing the resistance component in the JFET region, thereby greatly improving the characteristics. Although it also reduces power consumption, with the development of technology, the breakdown voltage required for the T-IGBT has also increased significantly.

[0005] The breakdown voltage is determined by the electric field distribution formed at the junction of the p-base region and the n-drift region. The electric field distribution is determined by the concentration of the p-base region and the concentration of the n-drift region. Since the concentration of the p-base region affects the critical voltage, the breakdown voltage is usually determined by the concentration of the n-drift region, that is, the lower the concentration of the n-drift region, the wider the depletion layer, and the smaller the electric field slope of the n-drift region, the higher the breakdown voltage.

[0006] If the concentration of the n-drift region is reduced in order to increase the breakdown voltage, the resistivity of the n-drift region will increase, but the on-state voltage drop will increase instead, and the characteristics will also deteriorate. Summary of the invention

[0007] The purpose of the present invention is to propose a novel trench IGBT in view of the technical problems existing in the background technology.

[0008] In order to achieve the above technical objectives, the technical solution adopted by the present invention is as follows:

[0009] A novel trench IGBT comprises a first semiconductor region, a second semiconductor region, a third semiconductor region and a plurality of fourth semiconductor regions, wherein the first semiconductor region, the second semiconductor region and the third semiconductor region are connected in sequence; a plurality of arrays of first trenches are arranged on the third semiconductor region along the X-axis direction, the first trenches extend into the second semiconductor region, the first trenches are filled with a gate insulating film and a gate, and the gate insulating film wraps the gate therein; a plurality of fourth semiconductor regions are arranged in an array on the third semiconductor region along the X-axis direction and are staggered with the plurality of first trenches; a plurality of arrays of second trenches are formed between the first semiconductor region and the second semiconductor region and along the X-axis direction, the second trenches protrude toward the first semiconductor region, and an oxide film layer is formed on the inner wall of the second trench and between the first semiconductor region and the second semiconductor region.

[0010] Preferably, the first semiconductor region is of P-type conductivity.

[0011] Preferably, the second semiconductor region is of N-type conductivity.

[0012] Preferably, the first trench has a depth range of 7-8 μm and a width range of 0.2-0.4 μm, respectively.

[0013] Preferably, the second trench has a depth range of 7-10 μm and a width range of 0.2-0.6 μm, respectively.

[0014] Preferably, a plurality of fourth semiconductor regions are arranged in an array along the Y-axis direction on the third semiconductor region.

[0015] Preferably, an electron accumulation layer is formed in the second trench.

[0016] Preferably, the thickness of the oxide film layer is in the range of 0.09-0.1 μm.

[0017] Compared with the prior art, the present invention has the following beneficial technical effects: it comprises a first semiconductor region, a second semiconductor region, a third semiconductor region and a plurality of fourth semiconductor regions, the first semiconductor region, the second semiconductor region and the third semiconductor region are connected in sequence; a plurality of arrays of first grooves are arranged on the third semiconductor region along the X-axis direction, the first grooves extend into the second semiconductor region, the first grooves are filled with a gate insulating film and a gate, and the gate insulating film wraps the gate therein; a plurality of fourth semiconductor regions are arranged on the third semiconductor region in an array along the X-axis direction and are arranged alternately with the plurality of first grooves; a plurality of arrays of second grooves are formed between the first semiconductor region and the second semiconductor region and along the X-axis direction, the second grooves protrude toward the first semiconductor region, an oxide film layer is formed on the inner wall of the second groove and between the first semiconductor region and the second semiconductor region, and the above-mentioned structural design is used to improve the trade-off relationship between the breakdown voltage and the on-state voltage drop of the novel trench IGBT. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 It is a structural schematic diagram of an embodiment of the present invention;

[0019] Figure 2 for Figure 1 A cross-sectional view of the A-A' section;

[0020] Figure 3 is a schematic diagram of characteristic changes of the depth and width of the second trench and the breakdown voltage in an embodiment of the present invention;

[0021] Figure 4 A schematic diagram of the voltage drop characteristic in the on-state and the change of the depth and width of the second trench in an embodiment of the present invention;

[0022] Figure 5 Schematic diagram of the yield voltage and on-state voltage drop characteristics of each IGBT in an embodiment of the present invention.

[0023] Reference numerals: 100 first semiconductor region, 200 second semiconductor region, 300 third semiconductor region, 400 fourth semiconductor region, 500 first trench, 600 gate insulating film, 700 gate, 800 second trench, 900 oxide film layer, 1000 electron storage layer. DETAILED DESCRIPTION

[0024] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments may be combined with each other.

[0025] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or component referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and the like are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first", "second", and the like may explicitly or implicitly include one or more features. In the description of the present invention, unless otherwise specified, "multiple" means two or more.

[0026] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installation", "connection" and "connection" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or a specific connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood by specific circumstances.

[0027] The specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0028] like Figure 1 As shown, the present invention proposes a novel trench IGBT, which includes a first semiconductor region 100, a second semiconductor region 200, a third semiconductor region 300 and a plurality of fourth semiconductor regions 400, wherein the first semiconductor region 100, the second semiconductor region 200 and the third semiconductor region 300 are connected in sequence;

[0029] A plurality of arrays of first trenches 500 are provided on the third semiconductor region 300 along the X-axis direction. The first trenches 500 extend into the second semiconductor region 200. The first trenches 500 are filled with a gate insulating film 600 and a gate 700. The gate insulating film 600 wraps the gate 700.

[0030] A plurality of fourth semiconductor regions 400 are arranged in an array along the X-axis direction on the third semiconductor region 300 and are arranged alternately with the plurality of first trenches 500;

[0031] A plurality of arrays of second trenches 800 are formed between the first semiconductor region 100 and the second semiconductor region 200 and along the X-axis direction. The second trenches 800 protrude toward the first semiconductor region 100 , and an oxide film layer 900 is formed on the inner wall of the second trench 800 and between the first semiconductor region 100 and the second semiconductor region 200 .

[0032] It should be noted that, in the present embodiment, the first semiconductor region 100 represents the collector region, the second semiconductor region 200 represents the drift region, the third semiconductor region 300 represents the well region, and the fourth semiconductor region represents the source region.

[0033] The first semiconductor region 100 is of P-type conductivity, the second semiconductor region 200 is of N-type conductivity, the depth range and width range of the first trench 500 are 7-8 μm and 0.2-0.4 μm, respectively, the depth range and width range of the second trench 800 are 7-10 μm and 0.2-0.6 μm, respectively, a plurality of fourth semiconductor regions 400 are arranged in an array along the Y-axis direction on the third semiconductor region 300, an electron accumulation layer 1000 is formed in the second trench 800, and the thickness range of the oxide film layer 900 is 0.09-0.1 μm

[0034] When the thickness of the oxide film layer 900 is less than 0.09 μm, the insulation of the second semiconductor region 200 and the first semiconductor region 100 is reduced. When the thickness of the oxide film layer 900 exceeds 0.1 μm, the spacing of the second groove 800 is reduced, the electron accumulation layer 1000 is well formed, and the resistivity becomes smaller, but the cross-sectional area of ​​the second groove 800 region is reduced, thereby increasing the resistance in the second groove 800, resulting in the problem of increased on-state voltage drop characteristics.

[0035] In the off state, an electron storage layer 1000 is formed at the lower end of the second semiconductor region 200 , that is, in the region of the second trench 800 , by a high collector voltage, and functions as a buffer layer for removing the electron storage layer 1000 .

[0036] In order to increase the breakdown voltage, the area of ​​the electric field distribution formed in the second semiconductor region 200 in the cut-off state must be enlarged. However, the general NPT IGBT forms a triangular electric field in the second semiconductor region 200, and it is difficult to obtain a high breakdown voltage. Therefore, it is necessary to obtain an electric field in the form of an unequal-sided trapezoid in the general NPT IGBT structure. The first semiconductor region 100 of the groove forms an electron accumulation layer 1000 at the lower end of the second semiconductor region 200 through a high collector voltage in the cut-off state, which plays a role in removing the buffer layer of the electron accumulation layer 1000. Figure 2As shown, the electron accumulation layer 1000 can serve as a buffer layer.

[0037] The electron accumulation layer 1000 can be adjusted by the depth and width of the second groove 800. Therefore, in the present embodiment, the depth of the second groove 800 is preferably in the range of 7 to 10 μm, and the width is preferably in the range of 0.2 to 0.6 μm. More preferably, the depth is in the range of 7 to 8 μm, and the width is in the range of 0.2 to 0.3 μm. The most ideal and more specific depth is 8 μm and the width is 0.2 μm. It should be noted that if the size of the electron accumulation layer 1000 exceeds the above preferred range, That is, as the width of the second groove 800 becomes wider, the thickness of the oxide film layer 900 used to form the electron accumulation layer 1000 becomes thinner, and thus the insulation with the first semiconductor region 100 is reduced, and the electron accumulation layer 1000 is not easy to form, and the breakdown voltage is also reduced. On the contrary, as the width of the second groove 800 becomes narrower, the length of the electron accumulation layer 1000 increases and the cross-sectional area decreases, resulting in an increase in resistance, thereby increasing the on-state voltage drop value.

[0038] As the depth of the second trench 800 increases, the electron accumulation layer 1000 is strengthened, the expansion resistance of the depletion layer and the electric field increases, and the breakdown voltage characteristic increases, so it is necessary to perform a precise etching process and a planarization process, such as the attached Figure 3 As shown, it is shown that the depth and width of the second trench 800 lead to characteristic changes in the breakdown voltage of the trench IGBT, from which it can be directly observed that the deeper the depth and the narrower the width of the second trench 800, the greater the corresponding breakdown voltage.

[0039] According to the formula:

[0040] 1.

[0041] 2.

[0042] Where R is the resistance, ρ is the resistivity, L is the length of the resistor, A is the cross-sectional area of ​​the resistor, k is the Boltzmann constant, T is the absolute temperature, q is the charge, and V 0 is the self-generated voltage, N a is the doping concentration of the p-type semiconductor, N d is the doping concentration of the n-type semiconductor.

[0043] The deeper the depth of the second trench 800 and the narrower the width, the easier it is to form the electron accumulation layer 1000. The smaller the resistivity (ρ) of formula (1), when the length (L) of the resistor is increased, the cross-sectional area is reduced. However, this has a greater impact on the design of the trench IGBT. Therefore, the resistance in the second trench 800 is increased. In formula (2), due to the doping concentration N of the n-type semiconductor, d Therefore, it can be seen that the deeper the depth of the second trench 800 and the narrower the width, the greater the on-state voltage drop.

[0044] When the breakdown voltage increases according to the depth and width of the second trench 800, the on-state voltage drop also increases, forming a trade-off effect relationship. Therefore, the depth of the second trench 800 is preferably 8 μm and the width is preferably 0.2 μm.

[0045] Examples of embodiments:

[0046] In Example 1, the cell size is 10 μm, the channel length is 2.5 μm, the p-bottom region thickness is 3.6 μm, and the doping concentration is 2.510 17 cm -3 , thickness is 0.4μm, concentration is 510 19 cm -3 The thickness of the second semiconductor region 200 is 205 μm, the concentration is 110 cm, the thickness is 0.26 μm, the concentration is 110 13 cm -3 , the thickness of the p+ collector region is 1 μm and the concentration is 1.710 19 cm -3 The trench IGBT of Example 1 was manufactured by setting the second trench 800 to have a depth of 7 μm and a width of 0.2 μm.

[0047] In Example 2, a trench IGBT of Example 2 is manufactured under the experimental conditions of Example 1, except that the width of the second trench 800 is set to 0.3 μm.

[0048] In Example 3, a trench IGBT of Example 3 is manufactured under the experimental conditions of Example 1, except that the width of the second trench 800 is set to 0.4 μm.

[0049] In Example 4, a trench IGBT of Example 4 is manufactured under the experimental conditions of Example 1, except that the depth of the second trench 800 is set to 8 μm.

[0050] In the fifth embodiment, a trench IGBT of the fifth embodiment is manufactured under the experimental conditions of the fourth embodiment except that the width of the second trench 800 is set to 0.3 μm.

[0051] In Example 6, a trench IGBT of Example 6 was manufactured under the experimental conditions of Example 4, except that the depth of the second trench 800 was set to 0.4 μm.

[0052] In Example 7, a trench IGBT of Example 7 was manufactured under the experimental conditions of Example 1, except that the depth of the second trench 800 was set to 9 μm.

[0053] In Example 8, a trench IGBT of Example 8 was manufactured under the experimental conditions of Example 7, except that the width of the second trench 800 was set to 0.3 μm.

[0054] In Example 9, a trench IGBT of Example 9 was manufactured under the experimental conditions of Example 7, except that the depth of the second trench 800 was set to 0.4 μm.

[0055] In Example 10, a trench IGBT of Example 10 was manufactured under the experimental conditions of Example 1 except that the depth of the second trench 800 was set to 10 μm.

[0056] In Example 11, a trench IGBT of Example 11 was manufactured under the experimental conditions of Example 10, except that the width of the second trench 800 was set to 0.3 μm.

[0057] In Example 12, a trench IGBT of Example 12 was manufactured under the experimental conditions of Example 10, except that the depth of the second trench 800 was set to 0.4 μm.

[0058] Control group 1 is a control group in which the doping concentration of the second semiconductor region is 410 13 cm -3 To manufacture NPT T-IGBT.

[0059] Control group 2 is a control group in which the thickness of the second semiconductor region is 7 μm and the doping concentration is 110 μm under the experimental conditions of Example 1. 16 cm -3 To manufacture FS T-IGBT.

[0060] The following is a chart showing the changes in the base voltage and the on-state voltage drop corresponding to different sizes of the above-mentioned embodiments and the control group:

[0061]

[0062]

[0063] It can be confirmed from the above table that as the depth and width of the second trench 800 increase, the breakdown voltage or on-state voltage drop will also increase. Therefore, based on this, in order to improve the trade-off between the breakdown voltage and the on-state voltage, the optimal range of the depth and width must be selected. First, if the embodiment with the highest breakdown voltage is selected, it is embodiment 1, 4, 7, 10 and 11. Here, taking embodiment 1 with the lowest on-state voltage drop as the benchmark, the results of the increase in the breakdown voltage and on-state voltage drop of each example are compared. Embodiment 4, that is, the new trench IGBT with a second trench 800 of 8μm in depth and 2μm in width, has an electrical characteristic of a breakdown voltage of 1795V and an on-state voltage drop of 1.41V, showing the best value.

[0064] In addition, referring to the graph, the new trench IGBT has a breakdown voltage increased by about 800V and an on-state voltage drop increased by about 0.04 compared to the NPT T-IGBT. Although both the breakdown voltage and on-state voltage drop have increased, the increase in on-state voltage drop is a very small value compared to the breakdown voltage, and these results show that the breakdown voltage and on-state voltage drop characteristics have been significantly improved.

[0065] The above is a new type of trench IGBT or multiple implementations provided in combination with specific content, and it is not considered that the specific implementation of the present invention is limited to these descriptions. Any similarity or similarity with the method, structure, etc. of the present invention, or a number of technical deductions or replacements based on the concept of the present invention, should be regarded as the protection scope of the present invention.

Claims

1. A novel trench IGBT, characterized in that: include: A first semiconductor region (100), a second semiconductor region (200), a third semiconductor region (300) and a plurality of fourth semiconductor regions (400), wherein the first semiconductor region (100), the second semiconductor region (200) and the third semiconductor region (300) are connected in sequence; A plurality of arrays of first grooves (500) are provided on the third semiconductor region (300) along the X-axis direction, the first grooves (500) extend into the second semiconductor region (200), the first grooves (500) are filled with a gate insulating film (600) and a gate (700), and the gate insulating film (600) wraps the gate (700); The plurality of fourth semiconductor regions (400) are arranged in an array on the third semiconductor region (300) along the X-axis direction, and are arranged alternately with the plurality of first trenches (500); A plurality of arrays of second grooves (800) are formed between the first semiconductor region (100) and the second semiconductor region (200) and along the X-axis direction, the second grooves (800) protrude toward the first semiconductor region (100), and an oxide film layer (900) is formed on the inner wall of the second groove (800) and between the first semiconductor region (100) and the second semiconductor region (200).

2. A novel trench IGBT according to claim 1, characterized in that: The first semiconductor region (100) is of P-type conductivity.

3. A novel trench IGBT according to claim 1, characterized in that: The second semiconductor region (200) is of N-type conductivity.

4. A novel trench IGBT according to claim 1, characterized in that: The depth and width of the first groove (500) are in the range of 7-8 μm and 0.2-0.4 μm respectively.

5. A novel trench IGBT according to claim 1, characterized in that: The depth and width of the second groove (800) are in the range of 7-10 μm and 0.2-0.6 μm respectively.

6. A novel trench IGBT according to claim 1, characterized in that: The plurality of fourth semiconductor regions (400) are arranged in an array along the Y-axis direction on the third semiconductor region (300).

7. A novel trench IGBT according to claim 1, characterized in that: An electron accumulation layer (1000) is formed in the second groove (800).

8. The novel trench IGBT according to claim 1, characterized in that: The thickness of the oxide film layer (900) is in the range of 0.09-0.1 μm.

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