Power semiconductor device and power converter
By designing a junction terminal extension (JTE) with multiple separate areas in the terminal area of the power semiconductor device, the problem of being difficult to withstand high breakdown voltage in the prior art is solved, and higher voltage withstand performance is achieved, suitable for ultra-high voltage Applications such as high-voltage transmission facilities and electric vehicles.
Patent Information
- Application Number
- CN202311244428.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-08-18
- Filing Date
- 2023-09-25
- Publication Date
- 2025-02-25
AI Technical Summary
Existing power semiconductor devices are difficult to withstand high breakdown voltages, especially in ultra-high voltage transmission facilities or electric vehicle applications, which require a breakdown voltage of 1200V or higher.
A power semiconductor device is designed including a substrate, a drift layer, a body and a junction terminal extension (JTE), wherein the JTE is located on the drift layer in the terminal region, including at least one barrier region and a plurality of separation regions. These separation regions consist of two or more sub-regions with different dopant doses to optimize space and increase breakdown voltage without design rules limitations.
Through this structure, the power semiconductor device can operate stably at high breakdown voltage and achieve higher voltage withstand performance, and is suitable for applications such as ultra-high voltage transmission facilities and electric vehicles.
Smart Images

Figure CN119521724A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to a power semiconductor device and a power converter. Background Art
[0002] Unlike system semiconductors or memories that process and store information or signals, power semiconductors convert, store, distribute and control power entering electronic devices and are widely used in most electronic products.
[0003] In recent years, in accordance with the global trend of strengthening environmental protection, electric or hydrogen-based environmentally friendly vehicles have received widespread attention instead of existing fossil fuel-based vehicles. Many power semiconductor devices are used in these environmentally friendly vehicles. Here, environmentally friendly vehicles include hybrid electric vehicles (HEV), plug-in hybrid electric vehicles (PHEV), electric vehicles (EV), fuel cell electric vehicles (PCEV), etc.
[0004] In the prior art, silicon (Si) power semiconductor devices have been widely used, but new power semiconductor devices need to be developed for low power, low dielectric breakdown characteristics, and low thermal conductivity.
[0005] Therefore, power semiconductors based on semiconductor compounds having a band gap approximately three times higher than that of Si power semiconductor devices in the related art have been actively studied. Power semiconductors based on semiconductor compounds have high power, high dielectric breakdown characteristics, and high thermal conductivity.
[0006] Recently, power semiconductors have been adopted for ultra-high voltage transmission facilities or electric vehicles, which require a high breakdown voltage. For example, a breakdown voltage of 1200V or higher is required.
[0007] For this reason, the design and layout of power semiconductor devices having a satisfactory breakdown voltage are being actively studied. Summary of the invention
[0008] The present disclosure is directed to solving the above-referenced and other problems.
[0009] Another object of this aspect is to provide a power semiconductor device and a power converter having a novel structure.
[0010] Another object of this aspect is to provide a power semiconductor device and a power converter that can withstand a high breakdown voltage.
[0011] Another object of an embodiment is to provide a power semiconductor device and a power converter capable of designing an optimized space without design rule restrictions.
[0012] Technical problems of the embodiments are not limited to those described in this section, and include those that can be understood through the description of the present disclosure.
[0013] According to a first aspect of the aspects for achieving the above or other purposes, a power semiconductor device includes: a substrate including an active area and a termination area configured to surround the active area; a drift layer located on the substrate; a body located on the drift layer in the active area; and a junction termination extension (JTE) located on the drift layer in the termination area, wherein the substrate and the drift layer include a first conductivity type dopant, wherein the body and the JTE include a second conductivity type dopant, wherein the JTE includes at least one barrier region and a plurality of separation regions arranged to be farther from an outermost body than the at least one barrier region, wherein each of the plurality of separation regions includes two or more sub-regions, and wherein the two or more sub-regions have different doses.
[0014] Each of the plurality of separate regions may include: a first sub-region including a first dose; and a second sub-region including a second dose, and the first dose may be greater than the second dose.
[0015] The first sub-region may be disposed closer to the outermost body than the second sub-region.
[0016] When multiple separation intervals are defined by a first separation interval and remaining separation intervals, the first separation interval may be smaller than each of the remaining separation intervals, the first separation interval may be the interval between a first sub-region of a first separation region closest to the blocking region among multiple separation regions and the blocking region, and the remaining separation interval may be the interval between multiple first sub-regions of the multiple separation regions.
[0017] The first separation interval and the remaining separation interval may increase as the distance from the outermost body increases.
[0018] The first sub-region and the second sub-region may have different thicknesses.
[0019] An upper side of the first sub-region and an upper side of the second sub-region may be located at the same horizontal line, and a lower side of the second sub-region may be lower than a lower side of the first sub-region.
[0020] Each of the plurality of separate regions may include an overlapping region including a portion of the first sub-region and a portion of the second sub-region.
[0021] A lower side of the second sub-region may be located below the overlapping region.
[0022] The first dose of the first sub-area or the second dose of the second sub-area may be equal to the dose of the main body.
[0023] According to a second aspect of the aspect for achieving the above or other purposes, a power semiconductor device includes: a substrate including an active area and a terminal area configured to surround the active area; a drift layer located on the substrate; a body located on the drift layer in the active area; and a JTE located on the drift layer in the terminal area, wherein the substrate and the drift layer include a first conductive type dopant, wherein the body and the JTE include a second conductive type dopant, wherein the JTE includes at least one blocking region and a plurality of separation regions, wherein at least one blocking region is in contact with a side of an outermost body, wherein the plurality of separation regions are arranged along a lateral direction of at least one blocking region, wherein each of the plurality of separation regions includes: a first sub-region having a first dose; and a second sub-region having a second dose, wherein the first dose is greater than the second dose.
[0024] When multiple separation intervals are defined by a first separation interval and remaining separation intervals, the first separation interval may be smaller than each of the remaining separation intervals, the first separation interval may be the interval between a first sub-region of a first separation region closest to the blocking region among multiple separation regions and the blocking region, and the remaining separation interval may be the interval between multiple first sub-regions of the multiple separation regions.
[0025] The first separation interval and the remaining separation interval may increase as the distance from the outermost body increases.
[0026] The first sub-region and the second sub-region may have different thicknesses.
[0027] An upper side of the first sub-region and an upper side of the second sub-region may be located at the same horizontal line, and a lower side of the second sub-region may be lower than a lower side of the first sub-region.
[0028] Each of the plurality of separate regions may include an overlapping region including a portion of the first sub-region and a portion of the second sub-region.
[0029] A lower side of the second sub-region may be located below the overlapping region.
[0030] The first dose of the first sub-area or the second dose of the second sub-area may be equal to the dose of the main body.
[0031] The at least one blocking region and the plurality of separation regions may have an annular shape.
[0032] According to a third aspect of an embodiment for achieving the above or other purposes, a power converter includes: a plurality of power semiconductor modules, wherein each of the plurality of power semiconductor modules includes a plurality of power semiconductor devices, wherein each of the plurality of power semiconductor devices includes: a substrate including an active region and a terminal region configured to surround the active region; a drift layer located on the substrate; a body located on the drift layer in the active region; and a JTE located on the drift layer in the terminal region, wherein the substrate and the drift layer include a first conductive type dopant, wherein the body and the JTE include a second conductive type dopant, wherein the JTE includes at least one blocking region and a plurality of separation regions arranged to be farther from an outermost body than the at least one blocking region, wherein each of the plurality of separation regions includes two or more sub-regions, and wherein the two or more sub-regions have different doses.
[0033] Effects of the power semiconductor device and the power converter according to this aspect will be described below.
[0034] like Figure 7 and Figure 8 As shown, the power semiconductor device according to this aspect may include a terminal region 207 disposed on a side portion 214a (hereinafter, an outermost body 214-3) of the outermost body located at the active region 206. The terminal region 207 includes a barrier region 221 in contact with the outermost body 214-3 and a plurality of separation regions 222-1 to 222-n disposed along a lateral direction of the barrier region 221.
[0035] The plurality of separation regions 222-1 to 222-n may include two or more sub-regions. For example, the plurality of first sub-regions 222-1a to 222-na of the plurality of separation regions 222-1 to 222-n may be closer to the outermost body 214-3 than the plurality of second sub-regions 222-1b to 222-nb.
[0036] Since the plurality of separation intervals d21 to d23 are minimized by the first sub-regions 222-1a to 222-na, an optimized space can be designed without design rule restrictions. The second sub-regions 222-1b to 222-nb can appropriately disperse the electric field. Therefore, according to this aspect, an optimized space can be designed without design rule restrictions by the first sub-regions 222-1a to 222-na, and a desired withstand voltage can be achieved by the second sub-regions 222-1b to 222-nb.
[0037] For example, the first sub-regions 222-1a to 222-na of the first separation region 222-1 adjacent to the outermost body 214-3 may form a first separation interval d21 of 1 micrometer or less with the outermost body 214-3. In addition, the plurality of first sub-regions 222-1a to 222-na of the plurality of separation regions 222-1 to 222-n may be formed so that the remaining separation intervals d22 and d23 are also set to be very narrow. Therefore, an optimized space can be designed without design rule restrictions.
[0038] For example, since each of the plurality of separation regions 222-1 to 222-n may include second sub-regions 222-1b to 222-nb having a second dose smaller than the first dose of the first sub-regions 222-1a to 222-na, even a very large electric field may be appropriately dispersed through the second sub-regions 222-1b to 222-nb of the plurality of separation regions 222-1 to 222-n, respectively. Therefore, a further increased withstand voltage may be ensured.
[0039] Further scope of applicability of this aspect will become apparent from the following detailed description. However, since various changes and modifications within the spirit and scope of this aspect may be clearly understood by those skilled in the art, it should be understood that the detailed description and specific aspects (eg, preferred aspects) are given only as examples. BRIEF DESCRIPTION OF THE DRAWINGS
[0040] Figure 1 is a circuit diagram showing an automotive inverter according to the first aspect.
[0041] Figure 2 is a plan view showing a power semiconductor device according to an aspect.
[0042] Figure 3 It is shown Figure 2 An enlarged plan view of area X.
[0043] Figure 4 yes Figure 3 The region X is shown in a cross-sectional view taken along line CC'.
[0044] Figure 5 yes Figure 3 The region X is shown in cross-section along line DD'.
[0045] Figure 6 is a cross-sectional view showing a power semiconductor device according to the first aspect.
[0046] Figure 7 is a cross-sectional view showing a power semiconductor device according to the second aspect.
[0047] Figure 8 It shows that according to Figure 7 An enlarged cross-sectional view of a junction termination extension (JTE) in the power semiconductor device of the second aspect is shown.
[0048] Fig. 9 is a graph showing breakdown voltage according to dose in one aspect. DETAILED DESCRIPTION
[0049] Hereinafter, the aspects disclosed in this specification will be described in detail with reference to the accompanying drawings, but regardless of the reference numerals, the same or similar elements are given the same reference numerals, and their redundant descriptions will be omitted. In view of the ease of writing the specification, the suffixes "module" and "unit" of the elements used in the following description are given or used interchangeably, and they themselves do not have different meanings or functions from each other. In addition, the accompanying drawings are for ease of understanding the aspects disclosed in this specification, and the technical concepts disclosed in this specification are not limited by the accompanying drawings. In addition, when an element such as a layer, a region or a substrate is referred to as being "on" another element, this means that it can be directly on another element or there are other intermediate elements between them.
[0050] In one aspect, the power converter is used in inverters or converters such as computers, home appliances, automobiles, solar energy, and smart grids. In one aspect, the power converter may include one power semiconductor module or multiple power semiconductor modules. In addition, the power semiconductor module may include multiple power semiconductor devices.
[0051] In the following aspects, for example Figure 1 As shown, the inverter for driving the motor of the vehicle is described as a power semiconductor device, but the power converter in this regard can be applied to any suitable inverter or converter. In some cases, the vehicle can be an environmentally friendly vehicle and can include an electric vehicle (EV), a hybrid EV (HEV), a plug-in hybrid EV (PHEV), a passenger car equivalent vehicle (PCEV), etc.
[0052] In the following aspects, withstand voltage and breakdown voltage are used interchangeably.
[0053] In the following aspects, switching devices and power semiconductor devices may be used interchangeably, and branches and power semiconductor modules may be used interchangeably.
[0054] Figure 1 is a circuit diagram showing an automotive inverter according to the first aspect.
[0055] Reference Figure 1, the inverter 1000 according to the first aspect may convert direct current (DC) power into alternating current (AC) power, and supply the converted AC power to the load 1200 to drive the load 1200. In the inverter 1000 according to the first aspect, the battery may be connected to the input terminal so that the DC power of the battery may be converted into AC power. Although not shown, the converter may be connected to the input terminal of the battery, and the input terminal of the converter may be connected to the charger of the charging station. In this case, the AC power supplied by the charger may be converted by the converter to DC power to charge the battery. In addition, the DC power charged in the battery may be converted into AC power by the inverter 1000 according to the first aspect and may be used to drive the load.
[0056] The circuit configuration of the converter may be similar or identical to that of the inverter.
[0057] The load 1200 may be a motor, but is not limited thereto.
[0058] The inverter 1000 according to the first aspect may include a 3-phase inverter, but is not limited thereto. For example, the 3-phase inverter may output an AC current having a 120-degree phase difference between the first phase, the second phase, and the third phase. The inverter 1000 according to the first aspect may include a plurality of branches 100A, 100B, and 100C. For example, the first branch 100A, the second branch 100B, and the third branch 100C may be connected to a load (i.e., a motor) in parallel via a first node N1, a second node N2, and a third node N3, respectively. The first branch 100A may include a first arm 100a and a second arm 100b connected in series with each other, the second branch 100B may include a third arm 100c and a fourth arm 100d connected in series with each other, and the third branch 100C may include a fifth arm 100e and a sixth arm 100f connected in series with each other. The first arm 100a, the third arm 100c and the fifth arm 100e may be referred to as an upper arm, and the second arm 100b, the fourth arm 100d and the sixth arm 100f may be referred to as a lower arm. Each of the first to sixth arms 100a to 100f may be referred to as a switch module or a submodule.
[0059] The first arm 100a to the sixth arm 100f may include switching devices 100a-1, 100b-1, 100c-1, 100d-1, 100e-1 and 100f-1 and diodes 100a-2 and 100b-2, 100c-2, 100d-2, 100e-2 and 100f-2, respectively. The switching devices 100a-1, 100b-1, 100c-1, 100d-1, 100e-1, 100f-1 and the diodes 100a-2, 100b-2, 100c-2, 100d-2, 100e-2 and 100f-2 may be formed simultaneously using the same semiconductor process. The switching devices 100 a - 1 , 100 b - 1 , 100 c - 1 , 100 d - 1 , 100 e - 1 , and 100 f - 1 may include power semiconductor devices, respectively.
[0060] In order to convert DC power into AC power by the inverter according to the first aspect, the switching devices 100a-1, 100b-1, 100c-1 and 100d-1, 100e-1 and 100f-1 of each of the first to sixth arms 100a to 100f may be controlled on / off.
[0061] For example, when the first switching device 100a-1 of the first arm 100a of the first branch 100A is in an open state, the fourth switching device 100d-1 of the fourth arm 100d of the second branch 100B and / or the sixth switching device 100f-1 of the sixth arm 100f of the third branch 100C may be turned on. Therefore, DC power may be supplied to the first phase inductor of the motor.
[0062] For example, when the second switching device 100b-1 of the second arm 100b of the second branch 100B is in an open state, the sixth switching device 100f-1 of the sixth arm 100f of the third branch 100C and / or the second switching device 100b-1 of the second arm 100b of the first branch 100A may be turned on. Therefore, DC power may be supplied to the second phase inductor of the motor. The second phase may be delayed by 120 degrees relative to the first phase.
[0063] For example, when the third switching device 100c-1 of the third arm 100c of the third branch 100C is in an open state, the second switching device 100b-1 of the second arm 100b of the first branch 100A and / or the fourth switching device 100d-1 of the fourth arm 100d of the second branch 100B may be turned on. Therefore, DC power may be supplied to the third phase inductor of the motor. The third phase may be delayed by 120 degrees relative to the second phase.
[0064] Therefore, AC power may be generated by the DC power supplied to each of the first phase inductor, the second phase inductor, and the third phase inductor.
[0065] Furthermore, although not shown, the switching device of each of the first to sixth arms 100a to 100f (ie, the switching devices 100a-1, 100b-1, 100c-1, 100d-1, 100e-1, 100f-1) may be connected in series to each other.
[0066] Although not shown, the switching device of each of the first to sixth arms 100a to 100f (ie, the switching devices 100a-1, 100b-1, 100c-1, 100d-1, 100e-1, 100f-1) may be provided in plural connected in parallel to each other.
[0067] In some cases, the switching devices 100a-1, 100b-1, 100c-1, 100d-1, 100e-1 and 100f-1 and the diodes 100a-2, 100b-2, 100c-2, 100d-2, 100e-2, 100f-2 corresponding to the first to sixth arms 100a to 100f may be packaged and configured as power semiconductor modules.
[0068] As an example, each of the first branch 100A, the second branch 100B, and the third branch 100C may be configured as a power semiconductor module. That is, the first arm 100a and the second arm 100b of the first branch 100A may be packaged to form a first power semiconductor module. The third arm 100c and the fourth arm 100d of the second branch 100B may be packaged to form a second power semiconductor module. The fifth arm 100e and the sixth arm 100f of the third branch 100C may be packaged to form a third power semiconductor module.
[0069] As another example, the first branch 100A, the second branch 100B, and the third branch 100C may be configured as a single power semiconductor module. That is, the first arm 100a and the second arm 100b of the first branch 100A, the third arm 100c and the fourth arm 100d of the second branch 100B, and the fifth arm 100e and the sixth arm 100f of the third branch 100C may be packaged to form a single power semiconductor module.
[0070] The following will refer to Figures 2 to 9 A power semiconductor device is described. In the following description, components having the same doping region and formed on the same layer may be formed simultaneously using the same mask through the same ion implantation process. Alternatively, components having the same doping region and formed on the same layer may be formed using different masks at different times.
[0071] The ion implantation process physically implants ions into the substrate 212 using a source gas. The ions may be collectively referred to as impurities. Through the ion implantation process, various regions with different or same doses may be formed by increasing the conductivity of an insulating material or changing it into a semiconductor.
[0072] Hereinafter, a substrate, a drift layer, a main body, a contact region, a source region, a barrier region, a separation region, or two or more sub-regions included in the separation region may be formed by the above-mentioned ion implantation process. Different energies may be used in various regions of the implanted ions according to their dopant concentrations or positions. For example, low energy may be used to achieve a shallow junction, and high energy may be used to achieve a deep junction, but this is not limited thereto.
[0073] In the following description, the terms dosage and dopant concentration have the same meaning and are used interchangeably.
[0074] Figure 2 is a plan view showing a power semiconductor device according to an aspect.
[0075] Reference Figure 2 The power semiconductor device according to this aspect may be divided into an active region 206 and a terminal region 207. The power semiconductor device according to this aspect may be a metal oxide semiconductor field effect transistor (MOSFET), but is not limited thereto.
[0076] The active region 206 may include a plurality of active cells. Each active cell may include a semiconductor device including a gate electrode 217, a source electrode 219, and a drain electrode 211 to perform a predetermined operation. Therefore, a plurality of semiconductor devices may be configured by the plurality of active cells.
[0077] Since the plurality of active cells are defined in a matrix, the plurality of semiconductor devices may also be arranged in a matrix.
[0078] The termination region 207 may surround the active region 206. The termination region 207 may be disposed along an edge of the active region 206. The termination region 207 may allow for a high breakdown voltage by dispersing the electric field.
[0079] In the aspect shown, the power semiconductor device according to this aspect is shown as having a rectangular shape when viewed from the top, but the power semiconductor may have other shapes.
[0080] The gate pad 201 and the source pad 202 may be located in the active region 206. The gate pad 201 is connected to the gate electrode 217 of each active cell through the gate line 208 so that the gate signal can be supplied to the gate electrode 217. The source pad 202 is connected to the source electrode 219 of each active cell so that the source voltage can be supplied to the source electrode 219. Although not shown, the drain pad may be located at the lower side of the power semiconductor device according to this aspect. The drain pad may be connected to the drain electrode 211 of each active cell so that the drain voltage can be supplied to the drain electrode 211.
[0081] The gate electrode 217 may be referred to as a gate, gate polysilicon, a gate contact, etc. The source electrode 219 may be referred to as a source contact, and the gate electrode 217 may be referred to as a gate contact. Although not shown, the source pad 202 may be collectively referred to as a source electrode 219 without being distinguished from the source electrode 219, and the drain pad may be collectively referred to as a drain electrode 211 without being distinguished from the drain electrode 211.
[0082] Figure 3 It is shown Figure 2 An enlarged plan view of area X. Figure 4 yes Figure 3 The region X is shown in a cross-sectional view taken along line CC'. Figure 5 yes Figure 3 The region X is shown in cross-section along line DD'.
[0083] like Figure 3 As shown, six semiconductor devices are shown in region X.
[0084] One active unit may include one semiconductor device, but is not limited thereto. For example, one active unit may include two or more semiconductor devices.
[0085] The power semiconductor device according to this aspect may include a drain electrode 211, a substrate 212, a drift layer 213, bodies 214-1 and 214-2, a source region 215 (e.g., source regions 215-1 and 215-2) and a contact region 216 (e.g., contact regions 216-1 and 216-2), a gate electrode 217, an insulating layer 218, and a source electrode 219. A semiconductor device including an active cell may include a substrate 212, a drift layer 213, bodies 214-1 and 214-2, source regions 215-1 and 215-2 and contact regions 216-1 and 216-2, a gate electrode 217, an insulating layer 218, and a source electrode 219. Alternatively or additionally, the power semiconductor device according to this aspect may include additional components.
[0086] The drain electrode 211 may be disposed under the substrate 212. The drain electrode 211 may supply a drain voltage to the substrate 212. The drain electrode 211 may include a drain pad, or the drain pad may be separately disposed under the drain electrode 211. The drain electrode 211 may be formed of Ni or other suitable materials that form an ohmic contact with N-type silicon carbide (SiC).
[0087] The substrate 212 and / or the drift layer 213 may include a semiconductor compound such as SiC, gallium nitride (GaN), gallium oxide (Ga2O3), etc. For example, the substrate 212 and / or the drift layer 213 may include a 4H-SiC material, but is not limited thereto. For example, the substrate 212 and / or the drift layer 213 may include 3C-SiC or 6H-SiC.
[0088] The drift layer 213 may be disposed on the substrate 212. The drift layer 213 may be the substrate 212 or an epitaxial layer. The substrate 212 and the drift layer 213 may constitute a drain region, but are not limited thereto.
[0089] The drift layer 213 may include at least one or more drift regions, but is not limited thereto. The drift layer 213 may be referred to as a drift region.
[0090] The substrate 212 and the drift layer 213 may have the same type of conductivity. For example, the substrate 212 and the drift layer 213 may have a first conductivity type. The first conductivity type may be an N type, but is not limited thereto. To this end, the substrate 212 and the drift layer 213 may include an N type dopant.
[0091] The bodies 214-1 and 214-2 may be formed separately from each other within the drift layer 213. The bodies 214-1 and 214-2 may have a second conductivity type. For example, the bodies 214-1 and 214-2 may include a P-type dopant. When the bodies 214-1 and 214-2 include a P-type dopant, the bodies 214-1 and 214-2 may be referred to as P-wells. The bodies 214-1 and 214-2 may be referred to as base regions.
[0092] The contact regions 216-1 and 216-2 and the source regions 215-1 and 215-2 may be disposed in the bodies 214-1 and 214-2. The contact regions 216-1 and 216-2 may have the same conductivity type as the bodies 214-1 and 214-2, i.e., the second conductivity type. The source regions 215-1 and 215-2 may have the same conductivity type as the drift regions, i.e., the first conductivity type. The source regions 215-1 and 215-2 and the contact regions 216-1 and 216-2 may be disposed adjacent to each other. The dopant concentration (P+) of the contact regions 216-1 and 216-2 may be greater than the dopant concentration (P-) of the bodies 214-1 and 214-2.
[0093] like Figure 3 As shown, the source regions 215-1 and 215-2 may have a strip shape extending in one direction (e.g., the Y-axis direction). In contrast, the contact regions 216-1 and 216-2 may contact the bodies 214-1 and 214-2 by passing through the source regions 215-1 and 215-2. The contact regions 216-1 and 216-2 may be formed for each active cell, but are not limited thereto.
[0094] Source electrode 219 may contact contact regions 216-1 and 216-2 and source regions 215-1 and 215-2. Source electrode 219 may be formed of nickel (Ni), etc. An annealing process may be performed on source electrode 219 to form ohmic contact with contact regions 216-1 and 216-2 and / or source regions 215-1 and 215-2.
[0095] The source electrode 219 may be disposed on the entire region of the active region 206. The source electrode 219 may be disposed on the gate electrode 217. Although not shown, the source electrode 219 may not be disposed on the gate electrode 217 but may be disposed only on the contact regions 216-1 and 216-2 and the source regions 215-1 and 215-2.
[0096] The gate electrode 217 may be disposed on the drift layer 213 between the bodies 214-1 and 214-2 separated from each other. The gate electrode 217 may be surrounded by an insulating layer 218. The insulating layer 218 may be referred to as a gate oxide film. Another insulating layer may be disposed under the source electrode 219, but is not limited thereto.
[0097] In the semiconductor device having the above structure, when a gate voltage is supplied to the gate electrode 217, the channel layer between the drift layer 213 and the source regions 215-1 and 215-2 is conductive, and current may flow between the source regions 215-1 and 215-2 and the drift layer 213. Therefore, the channel layer between the drift layer 213 and the source regions 215-1 and 215-2 may conduct current or block current according to the gate voltage, thereby realizing a switching function.
[0098] First aspect
[0099] Figure 6 is a cross-sectional view showing a power semiconductor device according to the first aspect. Figure 6 is based on Figure 2 Cross-sectional views taken along line AA′ and line BB′, respectively, of the power semiconductor device of the illustrated aspect.
[0100] like Figure 6 As shown, the power semiconductor device 200A may be divided into an active region 206 and a terminal region 207. As described above, the active region 206 may include a plurality of active cells 206-1 to 206-4 each constituting a semiconductor device, and the terminal region 207 may be disposed along the periphery of the active region 206. The terminal region 207 may provide a high breakdown voltage by dispersing an electric field. In one example, a breakdown voltage of 1200V or more may be generated by an electric field applied when a plurality of semiconductor devices included in the active region 206 are operated. In this case, the terminal region 207 may be positioned along the periphery of the active region 206. Therefore, since the electric field is dispersed by the terminal region 207, the power semiconductor device 200A may withstand a high breakdown voltage.
[0101] The power semiconductor device 200A according to the first aspect may include a drain electrode 211 , a substrate 212 , a drift layer 213 , bodies 214 - 1 and 214 - 2 and source regions 215 - 1 and 215 - 2 , contact regions 216 - 1 and 216 - 2 , a gate electrode 217 , an insulating layer 218 , and a source electrode 219 .
[0102] The substrate 212 may include an active region 206 and a termination region 207. The active region 206 may include a plurality of active cells 206-1 to 206-4.
[0103] The drain electrode 211 is disposed under the substrate 212 , and the drift layer 213 , the bodies 214 - 1 and 214 - 2 , the source regions 215 - 1 and 215 - 2 , the contact regions 216 - 1 and 216 - 2 , the gate electrode 217 , the insulating layer 218 , and the source electrode 219 may be disposed on the substrate 212 .
[0104] The drain electrode 211 and the drift layer 213 may be respectively disposed on the entire area of the substrate 212. The bodies 214-1 and 214-2 may be disposed on the drift layer 213 between adjacent active cells 206-1 to 206-4. The source regions 215-1 and 215-2, the gate electrode 217, and the insulating layer 218 may be disposed in each of the active cells 206-1 to 206-4. The source regions 215-1 and 215-2 are disposed on the bodies 214-1 and 214-2, the gate electrode 217 is disposed on the drift layer 213, and the insulating layer 218 may surround the gate electrode. In particular, the insulating layer 218 may be located between the drift layer 213 and the gate electrode 217 to serve as a gate oxide film. The contact regions 216-1 and 216-2 may be disposed between adjacent active cells 206-1 to 206-4. The contact regions 216-1 and 216-2 may be disposed on the bodies 214-1 and 214-2. The contact regions 216-1 and 216-2 may contact the bodies 214-1 and 214-2 through the source regions 215-1 and 215-2 disposed between the adjacent active cells 206-1 to 206-4.
[0105] The source electrode 219 may be disposed on the entire area of the substrate 212. The source electrode 219 may be disposed on the active region 206. The source electrode 219 may not be disposed on the gate electrode 217, but may be disposed on the source regions 215-1 and 215-2.
[0106] A semiconductor device may be configured for each of the active cells 206 - 1 to 206 - 4 by drain electrode 211 , substrate 212 , drift layer 213 , bodies 214 - 1 and 214 - 2 , source regions 215 - 1 and 215 - 2 , contact regions 216 - 1 and 216 - 2 , gate electrode 217 , insulating layer 218 , and source electrode 219 .
[0107] because Figure 6 Four active cells 206 - 1 to 206 - 4 are shown in FIG. 2 , so the active region 206 may include four semiconductor devices corresponding to the active cells 206 - 1 to 206 - 4 .
[0108] In addition, the termination region 207 may be located at an outer edge (eg, a boundary) of the active cells. As described above, the termination region 207 may surround the active cells 206-1 to 206-4. Thus, the active cells 206-1 to 206-4 and the termination region 207 may be horizontally positioned.
[0109] A junction termination extension (JTE) 220 may be provided in the termination region 207. The JTE 220 may have the same conductivity type as the outermost doped body (hereinafter referred to as the outermost body 214-3) located in the active region 206. The JTE 220 may have a second conductivity type. The termination region 207 is configured to disperse the electric field and is a very important region capable of increasing the breakdown voltage. In order to increase the breakdown voltage of the power semiconductor device 200A, an optimized design of the termination region 207 is required.
[0110] In some aspects, unless otherwise described, the bodies 214 - 1 and 214 - 2 described with respect to the JTE 220 in the termination region 207 may refer to the outermost body 214 - 3 .
[0111] The JTE 220 may be disposed along the periphery of the active region 206. The JTE 220 may be disposed horizontally with the outermost body 214-3. The outermost body 214-3 and the JTE 220 are formed on the drift layer 213 and may have the same conductivity type. The upper side of the outermost body 214-3 and the upper side of the JTE 220 may be located at the same horizontal line.
[0112] The lower side of the outermost body 214 - 3 may be positioned lower than the lower side of the JTE 220 , but is not limited thereto.
[0113] The JTE 220 may include at least one barrier region 221 and a plurality of separation regions 222-1 to 222-n. The barrier region 221 and / or the plurality of separation regions 222-1 to 222-n may have an annular shape, but are not limited thereto. For example, the barrier region 221 may have an annular shape along the circumference of the active region 206. Each of the plurality of separation regions 222-1 to 222-n may have an annular shape along the circumference of the active region 206. Each of the plurality of separation regions 222-1 to 222-n may have an annular shape along the circumference of the barrier region 221.
[0114] The barrier region 221 is referred to as a single junction, and the plurality of separation regions 222 - 1 to 222 - n each having a ring shape may be referred to as a floating field ring (FFR).
[0115] The blocking region 221 may mainly block the electric field. For example, the electric field generated in the active region 206 may be mainly blocked by the blocking region 221.
[0116] The blocking area 221 may be horizontally disposed on the side 214a of the outermost body 214-3. The blocking area 221 may contact the side 214a of the outermost body 214-3, but is not limited thereto. The lower side of the outermost body 214-3 may be positioned lower than the lower side of the blocking area 221. The depth of the blocking area 221 may be less than the depth of the outermost body 214-3, but is not limited thereto.
[0117] Furthermore, the plurality of separation regions 222 - 1 to 222 - n may serve to further block the electric field that remains even after being mainly blocked by the blocking region 221 .
[0118] The plurality of separation regions 222-1 to 222-n may be arranged along the lateral direction of the blocking region 221. The blocking region 221 and the plurality of separation regions 222-1 to 222-n may be arranged horizontally. The plurality of separation regions 222-1 to 222-n may be farther from the outermost body 214-3 than the blocking region 221. The plurality of separation regions 222-1 to 222-n may be arranged sequentially from the outermost body 214-3 toward the edge of the substrate 212. The blocking region 221 and each of the plurality of separation regions 222-1 to 222-n may have the same depth, but are not limited thereto.
[0119] The blocking region 221 and the plurality of separation regions 222-1 to 222-n may have the same conductivity type, for example, the second conductivity type. The blocking region 221 and the plurality of separation regions 222-1 to 222-n may be formed using the same mask. The bodies 214-1 and 214-2 (including the outermost body 214-3), the blocking region 221, and the plurality of separation regions 222-1 to 222-n may be formed using the same mask.
[0120] A plurality of separation intervals d11 to d13 may be formed between the barrier region 221 and the plurality of separation regions 222-1 to 222-n. For example, the interval between the first separation region 222-1 closest to the barrier region 221 among the plurality of separation regions 222-1 to 222-n and the barrier region 221 may be defined as the first separation interval d11. For example, the intervals between the plurality of separation regions 222-1 to 222-n may be the remaining separation intervals d12 and d13.
[0121] As an example, the first separation interval d11 may be smaller than each of the remaining separation intervals d12 to d13 .
[0122] As another example, as the distance from the outermost body 214 - 3 increases, the first separation interval d11 and the remaining separation intervals d12 to d13 may increase.
[0123] As another example, the first separation interval d11 and each of the remaining separation intervals d12 to d13 may be the same.
[0124] The blocking region 221 may include at least one sub-blocking region 221a disposed within the blocking region 221. The sub-blocking regions 221a may be separated from each other. The blocking region 221 and at least one sub-blocking region 221a may have the same conductivity type as the contact regions 216-1 and 216-2, for example, the second conductivity type. The dopant concentration (P+) of the sub-blocking region 221a may be greater than the dopant concentration (P-) of the blocking region 221. By at least one or more sub-blocking regions 221a, the dispersion of the electric field may be better achieved.
[0125] In addition, the barrier region 221 and the plurality of separation regions 222-1 to 222-n are deep junctions, and high injection energy is required to realize them. Therefore, the design rule is to increase the number of the plurality of separation regions 222-1 to 222-n while maintaining the predetermined distances d11 to d13. When this design rule is applied to semiconductor design, the size of the power semiconductor device 200A increases. In addition, when this design rule is applied to semiconductor design, the space for design optimization becomes difficult, and the breakdown voltage of the semiconductor design decreases.
[0126] In particular, the first separation interval d11 is the smallest among the plurality of separation intervals d11 to d13, and needs to be, for example, 1 micron or less. This is because, since the first separation interval d11 is small, an optimized space can be designed without the desired design rule restriction. Therefore, the first separation region 222-1 can be formed to have a first separation distance d11 of 1 micron or less from the outermost body 214-3, so that a new structure in which an optimized space can be designed without the design rule restriction is required.
[0127] Below, we will refer to Figures 7 to 9 A power semiconductor device 200B having a new structure for solving the above-mentioned problems is described. That is, according to the power semiconductor device 200B according to the second aspect, the optimal space design and the withstand voltage performance can be improved.
[0128] Second aspect
[0129] Figure 7 is a cross-sectional view showing a power semiconductor device according to the second aspect. Figure 8 It is shown Figure 7 An enlarged cross-sectional view of a JTE in a power semiconductor device according to the second aspect is shown.
[0130] The second aspect is the same as the first aspect except that each of the plurality of separated regions 222-1 to 222-n includes at least two or more sub-regions. In the second aspect, components having the same structure, shape, and / or function as those in the first aspect are given the same reference numerals, and detailed descriptions are omitted. The description omitted below may be replaced by the description of the first aspect (e.g., Figure 6 ) and can be replaced by Figure 6 The description of the first aspect is easy to understand.
[0131] Reference Figure 7 and Figure 8 The power semiconductor device 200B according to the second aspect may include a drain electrode 211 , a substrate 212 , a drift layer 213 , bodies 214 - 1 and 214 - 2 , source regions 215 - 1 and 215 - 2 , contact regions 216 - 1 and 216 - 2 , a gate electrode 217 , an insulating layer 218 , and a source electrode 219 .
[0132] The active region 206 and the terminal region 207 may be disposed on the substrate 212. Figures 2 to 5 and Figure 7 As shown, the active region 206 may include a plurality of active cells 206 - 1 to 206 - 4 , and the termination region 207 may surround the active region 206 .
[0133] The drift layer 213 may be disposed on the substrate 212, and the drain electrode 211 may be disposed below the substrate 212. The bodies 214-1 and 214-2 are disposed in the drift layer 213 in the active region 206, and the contact regions 216-1 and 216-2 and the source regions 215-1 and 215-2 are disposed in the bodies 214-1 and 214-2. In addition, the gate electrode 217 and the insulating layer 218 may be disposed on the drift layer 213 between the adjacent bodies 214-1 and 214-2. In this case, the insulating layer 218 may surround the gate electrode 217. The source electrode 219 may be disposed on the substrate 212. The source electrode 219 may be disposed on the active region 206, but is not limited thereto.
[0134] The semiconductor device may be configured by a drain electrode 211, a substrate 212, a drift layer 213, bodies 214-1 and 214-2 included in each of a plurality of active cells 206-1 to 206-4 in an active region 206, contact regions 216-1 and 216-2, source regions 215-1 and 215-2, a gate electrode 217, an insulating layer 218, and a source electrode 219.
[0135] In addition, the JTE 220 may be provided in the terminal region 207. The JTE 220 may include at least one or more barrier regions 221 and a plurality of separation regions 222-1 to 222-n. The barrier region 221 and the separation regions 222-1 to 222-n may have the same conductivity type, for example, the second conductivity type. The barrier region 221 and the separation regions 222-1 to 222-n may have the same conductivity type as the bodies 214-1 and 214-2 (including the outermost body 214-3). The dopant concentration of the barrier region 221 may be equal to or greater than the dopant concentration of each of the bodies 214-1 and 214-2. The dopant concentration of each of the separation regions 222-1 to 222-n may be equal to or greater than the dopant concentration of each of the bodies 214-1 and 214-2.
[0136] The blocking area 221 may be disposed adjacent to the outermost body 214-3. The blocking area 221 may be disposed horizontally with the outermost body 214-3. The blocking area 221 may be disposed on the side 214a of the outermost body 214-3. The blocking area 221 may contact the outermost body 214-3.
[0137] The depth of each of the bodies 214-1 and 214-2 (including the outermost body 214-3) may be greater than the depth of the blocking region 221 or the depth of each of the separation regions 222-1 to 222-n. At least one or more separation regions among the plurality of separation regions 222-1 to 222-n may have the same conductivity type as the blocking region 221. At least one or more separation regions among the plurality of separation regions 222-1 to 222-n may have the same conductivity type as the bodies 214-1 and 214-2.
[0138] In addition, each of the plurality of separation regions 222-1 to 222-n may include two or more sub-regions. The two or more sub-regions may have the same conductivity type as the barrier region 221. The two or more sub-regions may have the same conductivity type as the bodies 214-1 and 214-2.
[0139] For example, the two or more sub-regions may include first sub-regions 222 - 1 a to 222 - na and second sub-regions 222 - 1 b to 222 - nb.
[0140] The first sub-regions 222-1a to 222-na and the second sub-regions 222-1b to 222-nb may have different dopant concentrations. The first sub-regions 222-1a to 222-na and the second sub-regions 222-1b to 222-nb may be adjacent to each other. For example, the first sub-regions 222-1a to 222-na may be closer to the outermost body 214-3 than the second sub-regions 222-1b to 222-nb. For example, the second sub-regions 222-1b to 222-nb may be farther away from the outermost body 214-3 than the first sub-regions 222-1a to 222-na.
[0141] The dose of each of the first sub-regions 222-1a to 222-na may be the same as the dose of each of the bodies 214-1 and 214-2 (including the outermost body 214-3). The dose of each of the second sub-regions 222-1b to 222-nb may be the same as the dose of each of the bodies 214-1 and 214-2. The first dose of each of the first sub-regions 222-1a to 222-na may be greater than the second dose of each of the second sub-regions 222-1b to 222-nb. The first dose of each of the first sub-regions 222-1a to 222-na may be greater than the dose of each of the bodies 214-1 and 214-2. The second dose of each of the second sub-regions 222-1b to 222-nb may be the same as the dose of the blocking region 221. For example, the blocking region 221 and the second sub-regions 222-1b to 222-nb may be formed on the drift layer 213 using the same mask, but are not limited thereto.
[0142] In addition, a plurality of separation intervals d21 to d23 may be defined between the blocking region 221 and the plurality of separation regions 222-1 to 222-n. For example, the interval between the first subregion 222-1a of the first separation region 222-1 among the plurality of separation regions 222-1 to 222-n and the blocking region 221 may be defined as the first separation interval d21. For example, the intervals between the plurality of first subregions 222-1a to 222-na of the plurality of separation regions 222-1 to 222-n may be defined as the remaining separation intervals d22 and d23.
[0143] Alternatively, the plurality of separation intervals d21 to d23 may be defined based on the second sub-regions 222 - 1 b to 222 - nb included in the plurality of separation regions 222 - 1 to 222 - n , respectively, but are not limited thereto.
[0144] As an example, the first separation interval d21 may be smaller than each of the remaining separation intervals d22 and d23.
[0145] As another example, as the distance from the outermost body 214 - 3 increases, the first separation interval d21 and the remaining separation intervals d22 and d23 may increase.
[0146] Since the first separation interval d21 is implemented as a shallow junction and is formed by the first subregions 222-1a to 222-na each having a first dopant concentration greater than the second dopant concentration of each of the second subregions 222-1b to 222-nb, the first separation interval d21 may be smaller than the first aspect ( Figure 6 ). Therefore, in the second aspect, since the first separation interval d21 is at least 1 micrometer or less, an optimized space can be achieved without design rule restrictions.
[0147] In some cases, the first sub-region 222-1a to 222-na and the second sub-region 222-1b to 222-nb may have different depths T1 and T2. For example, the first sub-region 222-1a to 222-na may be a shallow junction, and the second sub-region 222-1b to 222-nb may be a deep junction. For example, the first dopant concentration of each of the first sub-regions 222-1a to 222-na may be greater than the second dopant concentration of each of the second sub-regions 222-1b to 222-nb. Therefore, the first sub-regions 222-1a to 222-na are shallow near the surface of the drift layer 213 and can be formed by using a low-energy ion implantation process. In contrast, since the second sub-regions 222-1b to 222-nb are deeper from the surface of the drift layer 213 than at least the first sub-regions 222-1a to 222-na, they can be formed by using a high-energy ion implantation process.
[0148] During the high energy ion implantation process, since the second sub-regions 222-1b to 222-nb are formed deeper, the separation intervals between the second sub-regions 222-1b to 222-nb may cause problems. However, since the second sub-regions 222-1b to 222-nb are disposed deeper than the first sub-regions 222-1a to 222-na, the electric field can be dispersed more appropriately.
[0149] In addition, since the first sub-regions 222-1a to 222-na are formed shallowly during the low-energy ion implantation process, the separation intervals between the first sub-regions 222-1a to 222-na can be reduced as much as possible. Therefore, the first sub-region 222-1a of the first separation region 222-1 closest to the outermost body 214-3 can be formed to be at least 1 micrometer or less in the first separation interval d21 from the outermost body 214-3. By reducing the first separation interval d21 as much as possible, the electric field can be greatly dispersed by the first sub-region 222-1a of the first separation region 222-1 among the plurality of separation regions 222-1 to 222-n.
[0150] Similarly, as the intervals between the sub-regions of each of the plurality of separation regions 222-1 to 222-n, the remaining separation intervals d22 and d23 can also be formed narrowly by an ion implantation process having low energy. Therefore, even if a very strong electric field is formed in the power semiconductor device 200B, the electric field generated during operation can be appropriately dispersed by the barrier region 221 and the plurality of separation regions 222-1 to 222-n each including at least two or more sub-regions, so that the breakdown voltage can be further increased. Fig. 9 As shown, a power semiconductor device 200B capable of withstanding a breakdown voltage of at least 1600 V or higher can be realized.
[0151] According to the second aspect, since each of the plurality of separation regions 222-1 to 222-n includes two or more sub-regions, each of the plurality of separation intervals d21 to d23 may be smaller than Figure 6 Each of the plurality of separation intervals d11 to d13 of the first aspect.
[0152] As mentioned above, the first aspect ( Figure 6 ) Each of the plurality of separation regions 222-1 to 222-n in the embodiment may be composed of a single region. At this time, since the ion implantation process is performed with high energy to achieve a deep junction for forming a single region, it is difficult to narrow the plurality of separation intervals d11 to d13.
[0153] In contrast, according to Figure 7 and Figure 8 In the second aspect of the invention, the plurality of separation regions 222-1 to 222-n may include two or more sub-regions, namely, first sub-regions 222-1a to 222-na and second sub-regions 222-1b to 222-nb. In this case, an ion implantation process with relatively low energy may be performed so that the first sub-regions 222-1a to 222-na closer to the outermost body 214-3 are implemented as shallow junctions. Figure 6The first aspect can be narrowed compared to the plurality of separation intervals d21 to d23, and an optimized space can be designed without being restricted by the above-mentioned design rules.
[0154] In addition, since the electric field can be appropriately dispersed by the second sub-regions 222-1b to 222-nb each having a second dopant concentration less than the first dopant concentration of each of the first sub-regions 222-1a to 222-na, a desired breakdown voltage can be achieved. In other words, in each of the plurality of separation regions 222-1 to 222-n, an optimized space can be designed by the first sub-regions 222-1a to 222-na that meet the design rule restrictions, and a desired breakdown voltage can be achieved by dispersing the electric field by the second sub-regions 222-1b to 222-nb.
[0155] When the dopant concentration of each of the separation regions 222-1 to 222-n is reduced to disperse the electric field, the design rule can be increased due to the high-energy ion implantation process performed to achieve deep junctions. On the contrary, when the dose of each of the separation regions 222-1 to 222-n is increased to reduce the design rule, the electric field is concentrated in the separation regions 222-1 to 222-n, and the withstand voltage can be reduced conversely. The second aspect can have a unique technical effect that can simultaneously resolve the contradiction between the two. That is, in the second aspect, two or more sub-regions are included in each of the multiple separation regions 222-1 to 222-n, so that, for example, the design rule can be reduced by the first sub-regions 222-1a to 222-na that are closer to the outermost body 214-3, and, for example, a breakdown voltage of 1600V or higher can be achieved by appropriately dispersing the electric field by the second sub-regions 222-1b to 222-nb, such as Fig. 9 Since the product reliability of the power semiconductor device 200B according to the second aspect can be obtained corresponding to the technical effect, it can be applied to various downstream industries requiring higher breakdown voltage, such as ultra-high voltage power generation, transmission and distribution facilities or electric vehicles.
[0156] In addition, the upper sides 1A of the first subregions 222-1a to 222-na and the upper sides 1B of the second subregions 222-1b to 222-nb are located on the same horizontal line, and the lower sides 1D of the second subregions 222-1b to 222-nb may be lower than the lower sides 1C of the first subregions 222-1a to 222-na.
[0157] The first subregions 222-1a to 222-na and / or the second subregions 222-1b to 222-nb may be formed on the drift layer 213 using an ion implantation process. When the upper side of the drift layer 213 has a flat surface, the first subregions 222-1a to 222-na and / or the second subregions 222-1b to 222-nb may be formed by impurities including ions implanted through the upper side of the drift layer 213. Therefore, the upper sides 1A of the first subregions 222-1a to 222-na and the upper sides 1B of the second subregions 222-1b to 222-nb formed in the drift layer 213 may be located at the same horizontal line.
[0158] The ion implantation process may be performed using different energies to form the first sub-regions 222-1a to 222-na and the second sub-regions 222-1b to 222-nb. For example, the first sub-regions 222-1a to 222-na may be formed by an ion implantation process having low energy, and the second sub-regions 222-1b to 222-nb may be formed by an ion implantation process having high energy. Therefore, the lower side 1D of the second sub-regions 222-1b to 222-nb formed by the high-energy ion implantation process may be positioned lower than the lower side 1C of the first sub-regions 222-1a to 222-na formed by the low-energy ion implantation process. That is, the impurities forming the second sub-regions 222-1b to 222-nb may be formed deeper from the upper side of the drift layer 213 than the impurities forming the first sub-regions 222-1a to 222-na. The lower sides 1D of the deeper second sub-regions 222 - 1 b to 222 - nb may be positioned lower than the lower sides 1C of the first sub-regions 222 - 1 a to 222 - na .
[0159] In addition, the plurality of separation regions 222-1 to 222-n may include overlapping regions 222-1c to 222-nc, respectively. The overlapping regions 222-1c to 222-nc may include a portion of the first sub-regions 222-1a to 222-na and a portion of the second sub-regions 222-1b to 222-nb. That is, the overlapping regions 222-1c to 222-nc may be formed by mixing the first impurities for forming the first sub-regions 222-1a to 222-na and the second impurities for forming the second sub-regions 222-1b to 222-nb.
[0160] For example, after forming the first sub-regions 222-1a to 222-na in the drift layer 213 using the first impurity, the second sub-regions 222-1b to 222-nb may be formed in some portions of the pre-formed first sub-regions 222-1a to 222-na and in contact with some portions of the first sub-regions 222-1a to 222-na in the drift layer 213. Therefore, the overlapping regions 222-1c to 222-nc may be formed in some portions of the first sub-regions 222-1a to 222-na, and the second sub-regions 222-1b to 222-nb may be formed in the first sub-regions 222-1a to 222-na.
[0161] The lower side 1D of the second sub-regions 222-1b to 222-nb may be located below the overlapping regions 222-1c to 222-nc. As described above, the energy of the ion implantation process for forming the second sub-regions 222-1b to 222-nb may be greater than the energy of the implantation process for forming the first sub-regions 222-1a to 222-na. Therefore, the second impurity may be implanted into some parts of the pre-formed first sub-regions 222-1a to 222-na and the drift layer 213 contacting some parts of the first sub-regions 222-1a to 222-na by an ion implantation process with high energy. Therefore, some second impurities may be implanted into some parts of the first sub-regions 222-1a to 222-na, and they may be mixed with the first impurities included in some parts of the first sub-regions 222-1a to 222-na to form the overlapping regions 222-1c to 222-nc. Another portion of the second impurity is injected into the drift layer 213 on the lower portion of some portions of the first sub-regions 222-1a to 222-na by passing through some portions of the first sub-regions 222-1a to 222-na, so that a portion of the second sub-regions 222-1b to 222-nb may be formed. Another portion of the second impurity is injected into the drift layer 213 in contact with some portions of the first sub-regions 222-1a to 222-na to form the second sub-regions 222-1b to 222-nb. Therefore, the lower side 1D of the second sub-regions 222-1b to 222-nb may be located below the overlapping regions 222-1c to 222-nc.
[0162] Although it is described that the second sub-regions 222 - 1 b to 222 - nb are formed after the first sub-regions 222 - 1 a to 222 - na are formed, the order may be changed.
[0163] In addition, if Fig. 9As shown, since a plurality of separation regions 222-1 to 222-n are included, it can be seen that, compared with the comparative example, in this aspect, a constant breakdown voltage is maintained regardless of whether the dopant concentration is increased or decreased (for example, the dopant concentration may be the same as in the previous process). The comparative example is a power semiconductor device without a plurality of separation regions 222-1 to 222-n, and this aspect is a power semiconductor device with a plurality of separation regions 222-1 to 222-n. In particular, this aspect is a power semiconductor device in which the plurality of separation regions 222-1 to 222-n are separated into two or more sub-regions, and a breakdown voltage of at least 1600V or more can be maintained constant regardless of whether the dose is increased or decreased.
[0164] The above detailed description should not be interpreted as limiting in all aspects, but should be regarded as illustrative. The scope of this aspect should be determined by reasonable interpretation of the appended claims, and all changes within the equivalent range of this aspect are included in the scope of this aspect.
Claims
1. A power semiconductor device, comprising: substrate; a drift layer formed in the substrate, the substrate including an active region having a doped region and a termination region configured to surround the active region; as well as a junction terminal extension JTE, the JTE being located in the terminal area, wherein the substrate and the drift layer include a first conductivity type, wherein the doped region and the JTE comprise a second conductivity type, wherein the JTE comprises a plurality of separation regions and at least one blocking region adjacent to an edge of the active region, wherein each of the plurality of separation regions comprises two or more separation sub-regions, and Wherein, the two or more separated sub-regions are configured to have different dopant concentrations.
2. The power semiconductor device according to claim 1, wherein: The various separation areas include: a first isolated sub-region having a first dopant concentration; and a second separated sub-region having a second dopant concentration, The first dopant concentration is configured to be greater than the second dopant concentration, and the first separated sub-region is configured to be closer to an edge of the active region than the second separated sub-region.
3. The power semiconductor device according to claim 2, in, The plurality of separation regions include a first separation region adjacent to the at least one barrier region and a second separation region adjacent to the first separation region, wherein the distance between the first separation region and the at least one blocking region is smaller than the distance between the first separation region and the second separation region, and The distance between adjacent separation regions is related to the distance from the inner separation region of the adjacent separation regions to the at least one blocking region.
4. The power semiconductor device according to claim 2, wherein: Each of the plurality of separation regions includes an overlapping region including a portion of the first separation sub-region and a portion of the second separation sub-region.
5. The power semiconductor device according to claim 1, wherein: The at least one blocking region includes a plurality of sub-blocking regions, wherein each of the plurality of sub-blocking regions has a dopant concentration corresponding to a contact region in the active region, wherein the plurality of sub-blocking regions are formed while doping the contact region.
6. A power semiconductor device, comprising: substrate; a drift layer located in the substrate, the substrate including an active region having a doped region and a termination region configured to surround the active region; and Wherein, the terminal area includes at least one blocking area and a plurality of separation areas, wherein the at least one blocking region contacts a side surface of at least one doped region disposed at an edge of the active region, Wherein, the multiple separation regions are configured to be arranged along the lateral direction of the at least one blocking region, and each of the multiple separation regions includes a first separation sub-region and a second separation sub-region, the first separation sub-region has a first dopant concentration, and the second separation sub-region has a second dopant concentration less than the first dopant concentration of the first separation sub-region.
7. The power semiconductor device according to claim 6, wherein: When the plurality of separation intervals are configured by a first separation interval and remaining separation intervals, the first separation interval is smaller than each of the remaining separation intervals, The first separation interval is between a first sub-region of a first separation region closest to the at least one blocking region among the plurality of separation regions and the at least one blocking region, wherein the remaining separation interval is arranged between the first sub-regions of the plurality of separation regions, and Wherein, the first separation interval and the remaining separation interval are configured to increase as the distance from the outermost body increases.
8. The power semiconductor device according to claim 6, wherein: Each of the plurality of separation regions includes an overlapping region including a portion of the first separation sub-region and a portion of the second separation sub-region.
9. The power semiconductor device according to claim 6, wherein: The at least one blocking region and the plurality of separation regions are configured to have an annular shape.
10. A power converter, comprising: Multiple power semiconductor modules, Each of the plurality of power semiconductor modules comprises a plurality of power semiconductor devices. Wherein, each of the plurality of power semiconductor devices comprises: substrate; a drift layer formed in the substrate, the substrate including an active region having a doped region and a termination region configured to surround the active region; and a junction terminal extension JTE, the JTE being located in the terminal area, wherein the substrate and the drift layer have a first conductivity type, wherein the doped region and the JTE have a second conductivity type, wherein the JTE comprises at least one blocking region and a plurality of separation regions arranged farther from the outermost body than the at least one blocking region, wherein each of the plurality of separation regions comprises two or more separation sub-regions, and Wherein, the two or more separated sub-regions are configured to have different dopant concentrations.