Fabrication method of vertical structure LED chip assembly

Abstract

This invention relates to the field of LED technology, specifically to a method for fabricating a vertical structure LED chip assembly. The method includes: providing multiple epitaxial structures, each epitaxial structure corresponding to a vertical structure LED chip; providing a driving substrate; bonding the multiple epitaxial structures to the driving substrate via a bonding metal layer; forming a mask layer on the side of the epitaxial structure away from the driving substrate, the mask layer being a photoresist and / or a functional layer that expands after absorbing a specific solution; etching the bonding metal layer between adjacent epitaxial structures to obtain a sub-bonding metal layer that serves as one electrode of the vertical structure LED chip; during the etching process, some metal will sputter and adhere to the mask layer; after etching, removing the mask layer simultaneously removes the adhered metal, preventing direct sputtering and adhesion of metal to the epitaxial structures during etching; and finally forming another electrode of the vertical structure LED chip on one side of the substrate.

Description

Technical Field

[0001] This invention relates to the field of LED technology, and more specifically, to a method for manufacturing a vertical structure LED chip assembly. Background Technology

[0002] Vertical LED chips have two electrodes distributed on opposite sides of an epitaxial wafer. When energized, almost all current flows vertically through the LED epitaxial layer, with very little current flowing laterally. During the fabrication of vertical LED chips, the bonding metal etching process is challenging. Metal sputtering can easily adhere to the epitaxial sidewalls, preventing current from passing through the quantum well layer. This can lead to the vertical LED chip failing to light up, exhibiting low brightness, or even short circuits. Summary of the Invention

[0003] The purpose of this invention is to provide a method for manufacturing a vertical structure LED chip assembly, in which a mask layer is set around the epitaxial layer, and the metal that is re-adheded after the bonding metal layer is etched will adhere to the mask layer, and then the mask layer is removed to avoid abnormalities such as poor brightness or short circuit.

[0004] To achieve the above objectives, the technical solutions adopted in the embodiments of the present invention are as follows:

[0005] A method for fabricating a vertical structure LED chip assembly includes: providing a plurality of epitaxial structures, each epitaxial structure corresponding to a vertical structure LED chip; providing a driving substrate; bonding the plurality of epitaxial structures to the driving substrate via a bonding metal layer; forming a mask layer on the side of the plurality of epitaxial structures away from the driving substrate, the mask layer being a photoresist and / or a functional layer, the functional layer expanding after absorbing a specific solution; etching the bonding metal layer between adjacent epitaxial structures to form a sub-bonding metal layer corresponding to the epitaxial structure, the sub-bonding metal layer being an electrode of the vertical structure LED chip; removing the mask layer; and forming another electrode of the vertical structure LED chip on the side of the epitaxial structure away from the driving substrate.

[0006] By setting a mask layer around the epitaxial structure, the metal that is re-adheded after the bonding metal layer is etched will adhere to the mask layer, and then the mask layer will be removed to avoid abnormalities such as poor brightness or short circuits.

[0007] This invention provides a method for fabricating a vertical structure LED chip assembly. The method includes: providing multiple epitaxial structures, each epitaxial structure corresponding to a vertical structure LED chip; providing a driving substrate; bonding the multiple epitaxial structures to the driving substrate via a bonding metal layer; forming a mask layer on the side of the epitaxial structure away from the driving substrate, the mask layer being a photoresist and / or a functional layer, the functional layer expanding after absorbing a specific solution; etching the bonding metal layer between adjacent epitaxial structures to obtain a sub-bonding metal layer serving as one electrode of the vertical structure LED chip; during the etching process of the bonding metal layer, some metal will sputter and adhere to the mask layer; after etching, removing the mask layer will simultaneously remove the adhered metal, avoiding direct sputtering and adhesion of metal to the epitaxial structure during etching, which could cause short circuits or other brightness problems in the vertical structure LED chip; and finally forming another electrode of the vertical structure LED chip on the side of the epitaxial structure away from the driving substrate.

[0008] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0009] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0010] Figure 1 A schematic diagram of metal etching in the prior art is shown.

[0011] Figure 2 The diagram shows a flowchart of a method for fabricating a vertical LED chip according to an embodiment of the present invention.

[0012] Figure 3 This diagram illustrates the fabrication process of a vertical LED chip according to an embodiment of the present invention.

[0013] Figure 4 A schematic diagram of a vertical LED chip provided in an embodiment of the present invention is shown.

[0014] Illustration:

[0015] 110 - Epitaxial layer; 120 - Epitaxial structure; 130 - Driving substrate; 140 - Bonding metal layer; 150 - Mask layer; 151 - Photoresist layer; 152 - Functional layer; 141 - Sub-bonding metal layer; 160 - Passivation layer; 170 - Another electrode; 200 - Vertical structure LED chip assembly; 210 - Sub-bonding metal layer; 220 - Epitaxial structure; 230 - Another electrode; 240 - Passivation layer. Detailed Implementation

[0016] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0017] It should be noted that similar reference numerals and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. Furthermore, in the description of this invention, terms such as "first," "second," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0018] Vertical LED chips refer to chips where the two electrodes are located on opposite sides of the epitaxial structure, and the current flows almost entirely vertically through the LED epitaxial structure, with very little current flowing laterally. Vertical LED chips offer significant advantages over horizontal LED chips: higher anti-static capability, the ability to achieve micron-level fabrication, and the use of high thermal conductivity substrates (such as Si, Ge, and Cu) instead of sapphire substrates, greatly improving heat dissipation efficiency. However, the bonding metal etching process in vertical LED chip fabrication is challenging, requiring demanding equipment. Furthermore, the etching process is prone to metal sputtering and adhering to the sidewalls of the epitaxial structure. Figure 1 As shown. If the metal sputtered onto the sidewall of the epitaxial structure forms a current path with the P-type semiconductor layer on top of the epitaxial structure, the current will ultimately not pass through the quantum well layer, resulting in the chip failing to light up or having low brightness, short circuits, and other abnormalities. It should be noted that the epitaxial structure includes at least an N-type semiconductor layer, a quantum well layer, and a P-type semiconductor layer stacked sequentially.

[0019] In view of the above problems, embodiments of the present invention provide a method for fabricating a vertical structure LED chip assembly. By introducing a mask layer into the fabrication process of the vertical structure LED chip, and using this mask layer to remove metal that has adhered to the sidewalls of the epitaxial structure during the bonding metal layer etching process, the method avoids problems such as poor brightness or even short circuits caused by metal adhesion to the sidewalls of the epitaxial structure. Please also refer to... Figure 2 and Figure 3 The method for fabricating this vertical LED chip assembly includes:

[0020] S110 provides multiple epitaxial structures, with each epitaxial structure corresponding to one vertical structure LED chip.

[0021] It should be noted that the epitaxial layer 110 is formed on a growth substrate, which can be, but is not limited to, a sapphire substrate, a silicon substrate, etc. Furthermore, in this embodiment of the invention, the provided epitaxial layer 110 can be a single, continuous epitaxial layer 110, or it can be multiple independent epitaxial structures 120 already diced on the growth substrate. In other words, after the epitaxial layer 110 is formed on the growth substrate, it can be transferred and bonded as a single layer to the driving substrate 130 and then diced to form multiple epitaxial structures 120, or it can be diced into multiple epitaxial structures 120 first and then transferred to the driving substrate 130.

[0022] An epitaxial structure 120 is formed to correspond to a vertical structure LED chip, and the epitaxial structure 120 is used for bonding to the driving substrate 130.

[0023] S120 provides a drive substrate.

[0024] Specifically, the driving substrate 130 can be a TFT (Thin Film Transistor) circuit board or a CMOS (Complementary Metal Oxide Semiconductor) substrate. Various wirings are correspondingly arranged on the driving substrate 130 to provide current to the vertically structured LED chip.

[0025] S130, the plurality of epitaxial structures are bonded to the driving substrate by a bonding metal layer.

[0026] Specifically, the entire epitaxial layer 110 can be bonded to the driving substrate 130 via the bonding metal layer 140 before dicing. Alternatively, the epitaxial layer 110 can be diced from the growth substrate to form multiple independent epitaxial structures 120, and then bonded to the driving substrate 130 via the bonding metal layer 140. Further, the bonding metal layer 140 can be formed on both the epitaxial layer 110 and the driving substrate 130, and then connected via gold-to-gold bonding. Alternatively, the bonding metal layer 140 can be formed only on one side of the epitaxial layer 110 or on one side of the driving substrate 130, and then the two can be bonded together. Furthermore, the bonding metal layer 140 is connected to the metal electrodes on the driving substrate 130 to facilitate the transmission of current or signals from the driving substrate 130 to the multiple epitaxial structures 120.

[0027] S140, a mask layer is formed on the side of the plurality of epitaxial structures away from the driving substrate, the mask layer being a photoresist layer and / or a functional layer, the functional layer expanding after absorbing a specific solution.

[0028] Specifically, in this embodiment of the invention, a mask layer 150 is formed on the side of the epitaxial structure 120 away from the driving substrate 130. This can better protect the outer wall of the epitaxial structure 120. That is, when the bonding metal layer 140 is etched, the metal sputtered during the etching process will adhere to the mask layer 150, instead of directly adhering to the outer wall of the epitaxial structure 120 as before, thus preventing direct conduction between the bonding metal layer 140 and the P-type or N-type semiconductor layer above the epitaxial structure 120, which could lead to short circuits or poor brightness. After the mask layer 150 is set, it can be removed after the bonding metal layer 140 is etched, thus simultaneously removing the metal adhering to the mask layer 150. This results in an epitaxial structure 120 with a relatively clean outer wall. After subsequent chip processing, the resulting vertical LED chip has no metal back-adhesion on its outer wall, low leakage current, and higher chip yield.

[0029] Furthermore, the mask layer 150 can be formed as a single layer on the side of the multiple epitaxial structures 120 away from the driving substrate 130. In this case, the mask layer 150 between adjacent epitaxial structures 120 needs to be etched before the bonding metal layer 140 can be further etched. Alternatively, the mask layer 150 can be formed separately on the side of each epitaxial structure 120 away from the driving substrate 130. Since the mask layer 150 is independently disposed on the outer side of each epitaxial structure 120 and does not block the bonding metal layer 140 between the epitaxial structures 120, the bonding metal layer 140 can be etched directly without first etching the mask layer 150 between adjacent epitaxial structures 120.

[0030] Furthermore, in this embodiment of the invention, the mask layer 150 can be a separate photoresist layer 151 or a functional layer 152; or the photoresist layer 151 and the functional layer 152 can be formed simultaneously, such as forming the functional layer 152 on the epitaxial structure 120 first, and then forming the photoresist layer 151 on the functional layer 152.

[0031] It should be noted that the photoresist layer 151 has photosensitive and pattern-defining properties, and it can be patterned by exposure, development, and etching. It can also be removed by dissolving it with a photoresist remover. The functional layer 152 is a material that expands significantly in volume after absorbing a specific solvent liquid. For example, the functional layer 152 can be, but is not limited to, one or more combined materials such as polyurethane, polyvinyl fluoride, and polyvinyl alcohol. The specific solvent liquid can be pure water, etc. The functional layer 152 will expand in volume after absorbing pure water for a certain period of time, such as 2-30 minutes. The functional layer 152 can be removed by ultrasonic processing using an ultrasonic device.

[0032] In this embodiment of the invention, an example is given where the mask layer 150 is formed integrally on the side of the plurality of epitaxial structures 120 away from the driving substrate 130:

[0033] If the mask layer 150 is a separate photoresist layer 151, then the photoresist layer 151 between adjacent epitaxial structures 120 is first patterned, such as exposed, developed, or etched, to expose the bonding metal layer 140 between adjacent epitaxial structures 120.

[0034] If the mask layer 150 is a separate functional layer 152, then the functional layer 152 between adjacent epitaxial structures 120 is first etched away to expose the bonding metal layer 140 between adjacent epitaxial structures 120.

[0035] If the mask layer 150 consists of a photoresist layer 151 and a functional layer 152, this embodiment of the invention will be described in detail using this scheme as an example. Please refer to [link / reference] simultaneously. Figure 3 When the mask layer 150 consists of a photoresist layer 151 and a functional layer 152, the functional layer 152 is first formed on the epitaxial structure 120, followed by the photoresist layer 151. The photoresist layers 151 between adjacent epitaxial structures 120 are first patterned, such as through exposure, development, and etching, to expose the functional layers 152 between adjacent epitaxial structures 120. Then, the exposed functional layers 152 are etched to expose the bonding metal layers 140 between adjacent epitaxial structures 120.

[0036] S150, etching is performed on the bonding metal layer between adjacent epitaxial structures to form a sub-bonding metal layer corresponding to the epitaxial structure, wherein the sub-bonding metal layer is an electrode of the vertical structure LED chip.

[0037] That is to say, the bonding metal layer 140 is a whole metal layer, and the bonding metal layers 140 between the two epitaxial structures 120 need to be etched to form sub-bonding metal layers 141 corresponding to the epitaxial structures 120. The sub-bonding metal layers 141 can serve as an electrode of the vertical structure LED chip formed later.

[0038] It should be noted that during the etching process of the bonding metal layer 140, the sputtered metal will adhere back onto the mask layer 150, forming a "metal fence." This "metal fence" is a connection structure formed by one end of the sputtered metal connecting to the bonding metal layer 140 and partially adhering to the mask layer 150. The thickness and height of this "metal fence" vary with the size of the bonding metal layer 140. For example, the thicker the bonding metal layer 140, the higher and thicker the "metal fence" will be on the mask layer 150. Typically, the thickness of this "metal fence" is 50-200 nm. Normally, without the mask layer 150, the "metal fence" formed by sputtering during the etching process would directly adhere to the outer wall of the epitaxial structure 120, directly connecting the bonding metal layer 140 and the upper semiconductor layer in the epitaxial structure 120, resulting in poor brightness. In this embodiment of the invention, the mask layer 150 is provided to prevent the "metal fence" from forming directly on the outer wall of the epitaxial structure 120, thus avoiding the problem of poor brightness. The "metal fence" can also be removed by the mask layer 150 to facilitate subsequent chip processing.

[0039] S160, Remove the mask layer.

[0040] Specifically, if the mask layer 150 is a separate photoresist layer 151, when the exposed bonding metal layer 140 is etched, the sputtered metal during the etching process will adhere to the photoresist layer 151. Subsequently, the photoresist layer 151 can be washed away by a stripping solution to remove the attached metal, resulting in an epitaxial structure 120 with relatively clean outer walls. Since the sputtered metal has been removed, its light emission effect will not be affected.

[0041] If the mask layer 150 is a separate functional layer 152, during the etching process of the exposed bonding metal layer 140, the sputtered metal will adhere to the functional layer 152. The functional layer 152 will then absorb a specific solution, such as pure water, that allows it to expand, causing its volume to increase. If the sputtered metal forms a "metal fence" structure on the functional layer 152 (i.e., the sputtered metal connects to the bonding metal layer 140 and adheres to the functional layer 152), the expansion of the functional layer 152 will disrupt the connection between the "metal fence" and the bonding metal layer 140. The functional layer 152 is then removed using an ultrasonic process, simultaneously removing the "metal fence" formed by the sputtered metal, resulting in an epitaxial structure 120 with a relatively clean outer wall. Since the sputtered metal has been removed, its light emission effect is not affected.

[0042] If the mask layer 150 consists of a photoresist layer 151 and a functional layer 152, this embodiment of the invention will be described in detail using this scheme as an example. Please refer to [link / reference] simultaneously. Figure 3 During the etching process of the exposed bonding metal layer 140, the sputtered metal will adhere to the photoresist layer 151. First, the photoresist layer 151 is removed by dissolving it with a resist remover. After removing the photoresist layer 151, the "metal fence" still exists and is separated from the functional layer 152 by a certain gap. Then, the functional layer 152 absorbs a specific solution, such as pure water, that allows it to expand, causing the functional layer 152 to expand. Because there is a gap between the functional layer 152 and the "metal fence," the expanded functional layer 152 is more likely to damage the connection between the "metal fence" and the bonding metal layer 140. Then, the functional layer 152 is removed by an ultrasonic process, simultaneously removing the "metal fence" formed by the sputtered metal, resulting in an epitaxial structure 120 with a relatively clean outer wall. Since the sputtered metal has been removed, its light emission effect is not affected.

[0043] S170, another electrode of the vertical structure LED chip is formed on the side of the epitaxial structure away from the driving substrate.

[0044] Specifically, in this embodiment of the invention, the sub-bonded metal layer 141, which corresponds one-to-one with the epitaxial structure 120, is used as one electrode of the vertical structure LED chip. It is only necessary to form another electrode 170 on the side of the epitaxial structure 120 away from the driving substrate 130, that is, on the side opposite to the sub-bonded metal layer 141, to obtain a complete vertical structure LED chip.

[0045] Further, please continue to refer to Figure 3Furthermore, a passivation layer 160 is formed around each epitaxial structure 120, covering the sidewalls of the sub-epiaxial structure 120 and the side away from the driving substrate 130. The passivation layer 160 is then etched to expose a portion of the epitaxial structure 120 on the side away from the driving substrate 130. Another electrode 170 of the vertical LED chip is then formed in this portion of the epitaxial structure. The passivation layer 160 can be made of non-conductive materials such as silicon dioxide, aluminum oxide, or epoxy resin, and its main function is to protect the sidewalls of the epitaxial structure 120.

[0046] Please refer to Figure 4 This is a schematic diagram of a vertical structure LED chip assembly 200 provided in an embodiment of the present invention. It is illustrated by taking a single vertical structure LED chip disposed on a driving substrate 130 as an example; however, multiple vertical structure LED chips can actually be disposed on the driving substrate 130. It includes:

[0047] Driver substrate 130;

[0048] Sub-bonding metal layer 210, which serves as an electrode of the vertical structure LED chip for bonding with the driving substrate 130.

[0049] The epitaxial structure 220 is provided in a one-to-one correspondence with the sub-bonding metal layer 210. The epitaxial structure 220 is obtained by forming a mask layer 150 on the side of the epitaxial structure 220 away from the driving substrate 130, and removing the mask layer 150 after the sub-bonding metal layer 210 is etched.

[0050] Another electrode 230 is formed on the side of the epitaxial structure 220 away from the subbonded metal layer 210.

[0051] In addition, the vertical structure LED chip assembly 200 also includes a passivation layer 240, which at least covers the sidewalls of the subbonding metal layer 210, the epitaxial structure 220 and the other electrode 230, to protect the outer sidewalls of the vertical structure LED chip.

[0052] The vertical structure LED chip assembly 200 provided in this embodiment of the invention has a clean outer wall epitaxial structure 220. This is because the mask layer 150 disposed on the outer wall of the epitaxial structure 220 blocks the "metal fence" formed by the etching and sputtering of the bonding metal layer 140, and the "metal fence" is removed simultaneously by removing the mask layer 150. This avoids the situation where the "metal fence" connects the bonding metal layer 210 and the upper semiconductor layer of the epitaxial structure 220, thus preventing the formation of a leakage channel and the problem of low brightness, thereby improving the yield of the vertical structure LED chip.

[0053] The epitaxial structure 220 and the sub-bonding metal layer 210 of the vertical LED chip assembly 200 are formed as follows:

[0054] First, the entire epitaxial layer 110 is directly bonded to the driving substrate 130 through the bonding metal layer 140 and then cut. Alternatively, the epitaxial layer 110 is cut on the growth substrate to form multiple independent epitaxial structures 120, and then bonded to the driving substrate 130 through the bonding metal layer 140.

[0055] Then, a mask layer 150 is formed on the side of the epitaxial structure 120 away from the driving substrate 130. This mask layer can better protect the outer wall of the epitaxial structure 120. That is, when the bonding metal layer 140 is etched, the metal sputtered during the etching process will adhere to the mask layer 150, instead of directly adhering to the outer wall of the epitaxial structure 120 as before. This would prevent the bonding metal layer 140 from directly connecting to the P-type or N-type semiconductor layer above the epitaxial structure 120, resulting in short circuits or poor brightness. After the mask layer 150 is set, it can be removed after the bonding metal layer 140 is etched. This simultaneously removes the metal adhering to the mask layer 150, resulting in an epitaxial structure 120 with relatively clean outer walls. Furthermore, in this embodiment of the invention, the mask layer 150 can be a separate photoresist layer 151 or a functional layer 152; or the photoresist layer 151 and the functional layer 152 can be formed simultaneously, such as forming the functional layer 152 on the epitaxial structure 120 first, and then forming the photoresist layer 151 on the functional layer 152.

[0056] Furthermore, the bonding metal layers 140 between each pair of epitaxial structures 120 are etched to form sub-bonded metal layers 141 corresponding to each epitaxial structure 120. These sub-bonded metal layers 141 can then serve as electrodes for the subsequently formed vertical LED chip. During the etching process of the bonding metal layers 140, the sputtered metal will adhere back onto the mask layer 150, forming a "metal fence." This "metal fence" is then removed simultaneously by removing the mask layer 150, resulting in an epitaxial structure 120 with clean outer walls, facilitating subsequent chip fabrication processes.

[0057] Furthermore, the vertical structure LED chip assembly 200 provided in this embodiment of the invention can also be installed in a display panel, which can be a direct display panel or a backlit display panel, such as a computer display screen, a mobile phone display screen, a television display screen, etc. Furthermore, the display panel can further form a display device, such as, but not limited to, display devices such as computers, mobile phones, and televisions.

[0058] In summary, the present invention provides a method for fabricating a vertical structure LED chip assembly. The method includes: providing multiple epitaxial structures, each epitaxial structure corresponding to a vertical structure LED chip; providing a driving substrate; bonding the multiple epitaxial structures to the driving substrate via a bonding metal layer; forming a mask layer on the side of the epitaxial structure away from the driving substrate, the mask layer being photoresist and / or a functional layer. This functional layer expands after absorbing a specific solution. Then, the bonding metal layer between adjacent epitaxial structures is etched to obtain a sub-bonding metal layer that serves as one electrode of the vertical structure LED chip. During the etching process of the bonding metal layer, some metal will sputter and adhere to the mask layer. After etching, removing the mask layer simultaneously removes the adhered metal, preventing direct sputtering and adhesion of metal to the epitaxial layer during etching, which could lead to short circuits or other brightness problems in the vertical structure LED chip; finally, forming another electrode of the vertical structure LED chip on the side of the epitaxial structure away from the driving substrate.

[0059] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0060] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the invention should be included within the scope of protection of the invention. It should be noted that similar reference numerals and letters in the following figures denote similar items; therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0061] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A method for fabricating a vertical structure LED chip assembly, characterized in that, The method comprises: providing a plurality of epitaxial structures, one of the epitaxial structures corresponding to one vertical structure LED chip; providing a driving substrate; bonding the plurality of epitaxial structures to the driving substrate through a bonding metal layer; forming a mask layer on a side of the plurality of epitaxial structures away from the driving substrate, the mask layer being a photoresist layer and / or a functional layer, the functional layer swelling after absorbing a specific solution; etching the bonding metal layer between adjacent epitaxial structures to form a sub-bonding metal layer corresponding to the epitaxial structure, and the sputtered bonding metal layer in the etching process adhering to the mask layer, the sub-bonding metal layer being one electrode of the vertical structure LED chip; removing the mask layer; and forming another electrode of the vertical structure LED chip on the side of the epitaxial structure away from the driving substrate.

2. The method of claim 1, wherein: the step of forming the mask layer on the side of the plurality of epitaxial structures away from the driving substrate comprises: forming an integral layer of the photoresist layer or the functional layer on the side of the plurality of epitaxial structures away from the driving substrate, or first forming the functional layer and then forming the photoresist layer; and etching the photoresist layer and / or the functional layer between adjacent epitaxial structures to expose the bonding metal layer.

3. The method of claim 1, wherein: the step of forming the mask layer on the side of the plurality of epitaxial structures away from the driving substrate comprises: forming the photoresist layer or the functional layer separately on the side of each epitaxial structure away from the driving substrate, or first forming the functional layer and then forming the photoresist layer, to expose the bonding metal layer between adjacent epitaxial structures.

4. The method for manufacturing a vertical structure LED chip assembly as described in claim 1, characterized in that, the step of removing the mask layer comprises: dissolving and removing the photoresist through a stripping solution; and / or swelling the functional layer by absorbing the specific solution, and removing the swollen functional layer through an ultrasonic process.

5. The method of claim 1-4, wherein the method further comprises: the functional layer comprises one of polyurethane, polyvinyl fluoride, or polyvinyl alcohol.

6. The method for manufacturing a vertical structure LED chip assembly as described in any one of claims 1-4, characterized in that, the specific solution comprises pure water.

7. The method of claim 1-4, wherein the vertical structure LED chip assembly is manufactured by the steps of: the swelling time of the functional layer absorbing the specific solution is 2-30 minutes. ​ 8. The method of claim 1, wherein the vertical structure LED chip assembly is formed by the steps of: forming a plurality of vertical structure LED chips on a substrate; forming a plurality of insulating layers on the substrate; and forming a plurality of bonding pads on the substrate. after the step of removing the mask layer, the method further comprises: forming a passivation layer around each epitaxial structure, the passivation layer covering the side surface and the side away from the driving substrate of the epitaxial structure; etching the passivation layer to expose a partial area on the side of the epitaxial structure away from the driving substrate, so as to facilitate forming another electrode of the vertical structure LED chip in the partial area.

9. The method for manufacturing a vertical structure LED chip assembly as described in claim 8, characterized in that, the passivation layer comprises at least one of silicon dioxide, aluminum oxide, and epoxy resin.

10. The method of claim 1, wherein the vertical structure LED chip assembly is fabricated by the steps of: each epitaxial structure comprises at least an N-type semiconductor layer, a quantum well layer, and a P-type semiconductor layer arranged in sequence. ​

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