Light-emitting assembly and manufacturing method and mass transfer method thereof

Abstract

The invention relates to a light-emitting assembly and a manufacturing method and a mass transfer method thereof. The manufacturing method of the light-emitting component comprises the following steps: providing a temporary transposition structure; wherein the temporary transposition structure comprises a first substrate, a metal layer, a bonding glue layer and an epitaxial structure which are arranged in sequence; the epitaxial structure is bonded to the metal layer through the bonding glue layer; patterning the epitaxial structure to form a plurality of island-shaped epitaxial layers which are separated from one another; wherein the bonding glue layer between the adjacent island-shaped epitaxial layers is exposed; performing a chip manufacturing process on the basis of the island-shaped epitaxial layer to obtain a plurality of independent light-emitting chips; removing the bonding glue layer between the adjacent light-emitting chips to expose the metal layer; the exposed metal layer is etched; wherein metal chips generated by etching the metal layer are accumulated along the side wall of the bonding glue layer, and a metal film layer formed by accumulation is in contact with the side surface of the light-emitting chip; and removing the residual part of the bonding glue layer. The light-emitting assembly manufactured according to the manufacturing method is easier to transfer.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a light-emitting component and a manufacturing method thereof, and a mass transfer method. Background Art

[0002] Micro LED display technology refers to a display technology that uses self-luminous micron-sized LEDs as light-emitting pixel units and assembles them on a drive panel to form a high-density LED array. Due to the small size, high integration and self-luminescence of micro LED chips, compared with LCD and OLED, micro LED has greater advantages in terms of brightness, resolution, contrast, energy consumption, service life, response speed and thermal stability. It is considered to be the mainstream direction of future display technology and has great application potential in VR / AR, high-definition, flexible, wearable and other display fields.

[0003] The key to the mass production of Micro LED display technology currently lies in mass transfer technology. Traditional mass transfer technology requires a large number of Micro LED chips to be transferred from the growth substrate to the display backplane in batches and multiple times, and the chips need to be inspected and repaired after the transfer. Since the characteristic size of Micro LED chips is less than 100μm and the number of chips to be transferred is large, traditional mass transfer technology is severely restricted by transfer accuracy, transfer efficiency, detection difficulty and repair difficulty.

[0004] Therefore, how to facilitate the transfer of Micro LED chips is an urgent problem to be solved. Summary of the invention

[0005] In view of the above-mentioned deficiencies in the prior art, the purpose of the present application is to provide a light-emitting component and a manufacturing method thereof, and a mass transfer method, aiming to solve the above-mentioned technical problem of how to facilitate the transfer of Micro LED chips.

[0006] A method for manufacturing a light-emitting component, comprising:

[0007] A temporary transposition structure is provided; wherein the temporary transposition structure comprises a first substrate, a metal layer, a bonding adhesive layer and an epitaxial structure arranged in sequence; the epitaxial structure is bonded to the metal layer through the bonding adhesive layer;

[0008] The epitaxial structure is patterned to form a plurality of island-shaped epitaxial layers separated from each other, wherein the bonding glue layer between adjacent island-shaped epitaxial layers is exposed;

[0009] Performing chip manufacturing process on the basis of the island epitaxial layer to obtain a plurality of independent light-emitting chips;

[0010] Removing the bonding adhesive layer between adjacent light-emitting chips to expose the metal layer;

[0011] Etching the exposed metal layer; wherein metal debris generated by etching the metal layer accumulates along the side wall of the bonding adhesive layer, and the accumulated metal film layer contacts the side of the light-emitting chip; and

[0012] The remaining portion of the bonding adhesive layer is removed.

[0013] The manufacturing method of the above-mentioned light-emitting component obtains multiple independent light-emitting chips by performing chip processing on the basis of a temporary transposition structure, and then removes the bonding adhesive layer between adjacent light-emitting chips on the basis of the multiple light-emitting chips, and then etches the exposed metal layer so that the metal debris generated by the etching accumulates along the side wall of the bonding adhesive layer, and the accumulated metal film layer contacts the side of the light-emitting chip, and finally removes the remaining part of the bonding adhesive layer (that is, the bonding adhesive layer between the metal film layers) to obtain a metal film layer containing a cavity. The metal film layer has a small contact area with the side of the light-emitting chip, which is convenient for subsequent disconnection from this point, making the light-emitting chip easier to transfer. In fact, the purpose of transferring the epitaxial structure to the first substrate through the bonding adhesive layer and the metal layer is mainly to replace the substrate of the original epitaxial structure. The present application cleverly utilizes this substrate replacement process. During the chip manufacturing process, the bonding adhesive layer and the metal layer are not cut open. Instead, after the chip is manufactured, the bonding adhesive layer and the metal layer are etched to realize the preparation of the weakened structure. Not only the preparation of the chip is completed, but also the preparation of the weakened structure is completed. When these light-emitting chips are subsequently transferred, it is only necessary to disconnect the connection between the metal film layer and the contact part of the side of the light-emitting chip, thereby improving the transfer efficiency of the light-emitting chip.

[0014] In one embodiment, the method for making the temporary transposition structure includes:

[0015] providing the first substrate;

[0016] forming the metal layer on the surface of the first substrate;

[0017] Providing a second substrate including the epitaxial structure;

[0018] Depositing the bonding adhesive layer on a side of the epitaxial structure away from the second substrate;

[0019] Bonding the bonding adhesive layer to the metal layer; and

[0020] The second substrate is removed.

[0021] In one embodiment, the chip manufacturing process includes:

[0022] Depositing a passivation layer on the island epitaxial layer and the bonding glue layer;

[0023] performing patterning on the passivation layer on the island-shaped epitaxial layer so that a portion of the surface of the island-shaped epitaxial layer is exposed; and

[0024] Chip electrodes are fabricated on the exposed surface of the island epitaxial layer.

[0025] In one embodiment, the bonding adhesive layer is removed by chemical etching.

[0026] In one embodiment, a dry etching process is used to etch the exposed metal layer.

[0027] Based on the same inventive concept, the present application also provides a light-emitting component, which is manufactured using the manufacturing method of the light-emitting component as described above.

[0028] The above-mentioned light-emitting component is manufactured by the above-mentioned manufacturing method, and therefore has the beneficial effects described by the above-mentioned manufacturing method, that is, the obtained light-emitting component can be more convenient for subsequent mass transfer and can improve the mass transfer efficiency.

[0029] In one embodiment, the thickness of the metal film layer ranges from 10 nm to 100 nm; the height of the metal film layer ranges from 0.5 μm to 2 μm.

[0030] In one embodiment, the material of the bonding adhesive layer includes any one of silicon dioxide, benzocyclobutene and polyimide.

[0031] In one embodiment, the material of the metal layer includes platinum or gold.

[0032] Based on the same inventive concept, the present application also provides a mass transfer method, comprising:

[0033] Providing the aforementioned light-emitting assembly and a driving backplane;

[0034] Aligning and laminating the chip electrodes of the light-emitting chip with the pads of the driving backplane; and

[0035] Pressure is applied from one side of the first substrate to disconnect the metal film layer and the light emitting chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 is a schematic flow chart of a method for manufacturing a light-emitting component in an embodiment of the present application;

[0037] Figure 2 for Figure 1 Schematic diagram of sub-steps of step S100;

[0038] Figure 3 for Figure 1 Schematic diagram of sub-steps of step S300;

[0039] Figure 4-Figure 11 For the corresponding Figure 1 Schematic diagram of structural part changes in the method;

[0040] Figure 12-Figure 15 For the corresponding Figure 2 Schematic diagram of structural part changes in the method;

[0041] Figure 16-Figure 18 Schematic diagram of a flow chart of a mass transfer method in one embodiment of the present application.

[0042] Description of reference numerals:

[0043] 10-first substrate; SB-second substrate; 20-metal layer; 30-bonding layer; 40-epitaxial structure; 410-island epitaxial layer; 510-passivation layer; H-opening; M-chip electrode; 310-remaining bonding layer; 210-metal film layer; LS-light-emitting component; BM-driving backplane; LM-light-emitting device after transfer. DETAILED DESCRIPTION

[0044] In order to facilitate the understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present application are given in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thoroughly and comprehensively understood.

[0045] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0046] It should be understood that spatial relationship terms such as "under", "below", "below", "under", "above", "above", etc., can be used here to describe the relationship between an element or feature shown in the figures and other elements or features. It should be understood that in addition to the orientations shown in the figures, spatial relationship terms also include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is turned over, the elements or features described as "under other elements" or "under" or "under" will be oriented as "on" other elements or features. Therefore, the exemplary terms "under" and "under" can include both upper and lower orientations. In addition, the device can also include additional orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptors used herein are interpreted accordingly.

[0047] When used herein, the singular forms "a", "an", and "said / the" may also include plural forms, unless the context clearly indicates otherwise. It should also be understood that when the terms "consisting of" and / or "comprising" are used in this specification, the presence of the features, integers, steps, operations, elements and / or parts can be determined, but the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups is not excluded. At the same time, when used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0048] As used herein, a "deposition" process includes, but is not limited to, physical vapor deposition (PVD), chemical vapor deposition (CVD), or atomic layer deposition (ALD).

[0049] Embodiments of the invention are described herein with reference to cross-sectional views which are schematic diagrams of ideal embodiments (and intermediate structures) of the invention, such that variations in the shapes shown due to, for example, manufacturing techniques and / or tolerances are anticipated. Thus, embodiments of the invention should not be limited to the specific shapes of the regions shown herein, but rather include deviations in shapes due to, for example, manufacturing techniques. For example, an implanted region shown as a rectangle typically has rounded or curved features and / or an implant concentration gradient at its edges rather than a binary change from an implanted region to a non-implanted region. Similarly, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation is performed. Thus, the regions shown in the figures are schematic in nature, their shapes do not represent the actual shape of the region of the device, and do not limit the scope of the invention.

[0050] Micro LED display technology refers to a display technology that uses self-luminous micron-sized LEDs as light-emitting pixel units and assembles them on a drive panel to form a high-density LED array. Due to the small size, high integration and self-luminescence of micro LED chips, compared with LCD and OLED, micro LED has greater advantages in terms of brightness, resolution, contrast, energy consumption, service life, response speed and thermal stability. It is considered to be the mainstream direction of future display technology and has great application potential in VR / AR, high-definition, flexible, wearable and other display fields.

[0051] The key to the mass production of Micro LED display technology currently lies in mass transfer technology. Traditional mass transfer technology requires a large number of Micro LED chips to be transferred from the growth substrate to the display backplane in batches and multiple times, and the chips need to be inspected and repaired after the transfer. Since the characteristic size of Micro LED chips is less than 100μm and the number of chips to be transferred is large, traditional mass transfer technology is severely restricted by transfer accuracy, transfer efficiency, detection difficulty and repair difficulty.

[0052] Therefore, how to facilitate the transfer of Micro LED chips is an urgent problem to be solved.

[0053] Based on this, the present application hopes to provide a solution that can solve the above-mentioned technical problems, the details of which will be described in the subsequent embodiments.

[0054] Please refer to Figure 1 , is a flow chart of a method for manufacturing a light emitting component provided in the present application. The manufacturing method may include steps S100 to S600.

[0055] Step S100, providing a temporary transposition structure; wherein the temporary transposition structure comprises a first substrate, a metal layer, a bonding adhesive layer and an epitaxial structure arranged in sequence; the epitaxial structure is bonded to the metal layer through the bonding adhesive layer;

[0056] Step S200, patterning the epitaxial structure to form a plurality of mutually separated island epitaxial layers; wherein the bonding adhesive layer between adjacent island epitaxial layers is exposed;

[0057] Step S300, performing chip manufacturing process on the basis of the island epitaxial layer to obtain a plurality of independent light-emitting chips;

[0058] Step S400, removing the bonding adhesive layer between adjacent light-emitting chips to expose the metal layer;

[0059] Step S500, etching the exposed metal layer; wherein metal debris generated by etching the metal layer is accumulated along the side wall of the bonding adhesive layer, and the accumulated metal film layer contacts the side surface of the light-emitting chip;

[0060] Step S600, removing the remaining portion of the bonding adhesive layer.

[0061] The manufacturing method of the above-mentioned light-emitting component obtains multiple independent light-emitting chips by performing chip processing on the basis of a temporary transposition structure, and then removes the bonding adhesive layer between adjacent light-emitting chips on the basis of the multiple light-emitting chips, and then etches the exposed metal layer so that the metal debris generated by the etching accumulates along the side wall of the bonding adhesive layer, and the accumulated metal film layer contacts the side of the light-emitting chip, and finally removes the remaining part of the bonding adhesive layer (that is, the bonding adhesive layer between the metal film layers) to obtain a metal film layer containing a cavity. The metal film layer has a small contact area with the side of the light-emitting chip, which is convenient for subsequent disconnection from this point, making the light-emitting chip easier to transfer. In fact, the purpose of transferring the epitaxial structure to the first substrate through the bonding adhesive layer and the metal layer is mainly to replace the substrate of the original epitaxial structure. The present application cleverly utilizes this substrate replacement process. During the chip manufacturing process, the bonding adhesive layer and the metal layer are not cut open. Instead, after the chip is manufactured, the bonding adhesive layer and the metal layer are etched to realize the preparation of the weakened structure. Not only the preparation of the chip is completed, but also the preparation of the weakened structure is completed. When these light-emitting chips are subsequently transferred, it is only necessary to disconnect the connection between the metal film layer and the contact part of the side of the light-emitting chip, thereby improving the transfer efficiency of the light-emitting chip.

[0062] Specifically, you can refer to Figure 4-Figure 11 , corresponding to Figure 1 Schematic diagram of the structural changes of the method. Figure 4 As shown, the temporary transposition structure provided in the present application may include a first substrate 10, a metal layer 20, a bonding adhesive layer 30 and an epitaxial structure 40 arranged in sequence. The epitaxial structure 40 is bonded to the metal layer 20 through the bonding adhesive layer 30. The specific bonding process and method will be described in subsequent embodiments and are temporarily omitted here. The first substrate 10 may be a transparent substrate, and the material of the transparent substrate includes an inorganic material or a III-V semiconductor material. The inorganic material includes silicon carbide (SiC), germanium (Ge), sapphire (Sapphire), lithium aluminate (LiAlO2), zinc oxide (ZnO), glass or quartz. The III-V semiconductor material includes indium phosphide (InP), gallium phosphide (GaP), gallium nitride (GaN), and aluminum nitride (AlN) materials. The first substrate 10 should have sufficient strength to mechanically support the epitaxial layer and be able to transmit light emitted from the epitaxial layer. The thickness of the first substrate 10 may be selected to be 50 μm or more. The metal layer 20 may be any one of platinum and gold. The bonding adhesive layer 30 may include any one of silicon dioxide, benzocyclobutene and polyimide. The epitaxial structure 40 may include but is not limited to a first conductive semiconductor layer (not shown), an active layer (not shown) and a second conductive semiconductor layer (not shown), wherein the first semiconductor layer and the second semiconductor layer have opposite polarities.

[0063] Exemplarily, the main difference between the first conductive semiconductor layer and the second conductive semiconductor layer is the different concentrations of carriers (holes, electrons). Specifically, the first conductive semiconductor layer can have electrons as the majority carriers and holes as the minority carriers. In other words, the first conductive semiconductor layer is mainly conductive by electrons; while the second conductive semiconductor layer can have holes as the majority carriers and electrons as the minority carriers. In other words, the second conductive semiconductor layer is mainly conductive by holes. Conversely, the first conductive semiconductor layer can also have holes as the majority carriers and electrons as the minority carriers, that is, the first conductive semiconductor layer is mainly conductive by holes; while the second conductive semiconductor layer can also have electrons as the majority carriers and holes as the minority carriers, that is, the second conductive semiconductor layer is mainly conductive by electrons. Furthermore, the reason for the different carrier concentrations of the first conductive semiconductor layer and the second conductive semiconductor layer is mainly due to the different doping types. For example, the first conductive semiconductor layer conducts electricity through electrons and the second conductive semiconductor layer conducts electricity through holes: to achieve this purpose, the first conductive semiconductor layer can use nitrogen, phosphorus, arsenic and tellurium and other group V elements as dopants. In addition, silicon and germanium have also been confirmed as dopants for the first conductive semiconductor layer; and the second conductive semiconductor layer can use boron, aluminum, gallium, indium and other group III elements as dopants. In addition, magnesium and carbon have also been confirmed as dopants for the second conductive semiconductor layer. It can be understood that the specific doping process and doping concentration can be understood by referring to the existing process. This part is not the focus of this application, and this application will not be further elaborated on this.

[0064] The active layer can be a single heterostructure (SH), a double heterostructure (DH), a double-side double heterostructure (DDH), or a multi-quantum well (MQW).

[0065] Exemplarily, taking the first conductive semiconductor layer as an N-type semiconductor layer and the second conductive semiconductor layer as a P-type semiconductor layer as an example, the N-type semiconductor layer or the P-type semiconductor layer may be a III-V compound semiconductor material such as GaN, AlGaN, InGaN, AlInP, GaInP, AlGaInP, etc. The active layer may be a multiple quantum well structure (MQW). Specifically, the quantum wells or quantum layers of the multiple quantum well structure may be InGaN, AlGaN, InN, InAlN, AlInGaN, etc., and the quantum barriers alternately stacked with the quantum well layers may be GaN, AlN, AlGaN, AlInGaN, InAlN, etc.; the multiple quantum well structure may include one or two or three or four or five or six or six or seven or eight quantum wells (or at least one quantum hole); the wavelength emitted by the above active layer may be a wavelength in the blue light band, a wavelength in the green light band, or a wavelength in the red light band, which is not specifically limited in the embodiments of the present application.

[0066] It can be understood that the epitaxial structure 40 may further include an ohmic contact layer, a hole blocking layer, an electron blocking layer, a buffer layer, a stress release layer, etc. The above-mentioned ohmic contact layer, hole blocking layer, electron blocking layer, buffer layer, and stress release layer can be arranged with reference to the arrangement position of the existing LED, and this application will not further elaborate on them.

[0067] For further information, see Figure 2 , and also refer to Figure 12-Figure 15 The step S100 may include sub-steps S110 - S160 .

[0068] Step S110, providing the first substrate;

[0069] Step S120, forming the metal layer on the surface of the first substrate;

[0070] Step S130, providing a second substrate including the epitaxial structure;

[0071] Step S140, depositing a bonding adhesive layer on a side of the epitaxial structure away from the second substrate;

[0072] Step S150, bonding the bonding adhesive layer to the metal layer;

[0073] Step S160, removing the second substrate.

[0074] In this specific embodiment, the second substrate SB may be a growth substrate. As an example, the material that may be used as the growth substrate may be a transparent material, and the transparent material may include an inorganic material or a III-V semiconductor material. The inorganic material may include silicon carbide (SiC), germanium (Ge), sapphire (Sapphire), lithium aluminate (LiAlO2), zinc oxide (ZnO), glass or quartz. The III-V semiconductor material may include indium phosphide (InP), gallium phosphide (GaP), gallium nitride (GaN), and aluminum nitride (AlN) materials.

[0075] When the second substrate SB is made of inorganic materials, such as sapphire, laser stripping technology can be used to separate the second substrate SB from the epitaxial structure 40. Laser stripping technology mainly uses a high-energy pulsed laser beam to penetrate the substrate. The photon energy is between the substrate band gap and the epitaxial band gap. The interface between the substrate and the epitaxial material is uniformly scanned. The epitaxial layer absorbs a large amount of photon energy and decomposes, which can achieve the separation of the substrate and the epitaxy. However, the laser stripping technology will destroy the interface between the epitaxy and the substrate, thereby causing damage to the surface of the epitaxial material or the LED chip. Therefore, after the second substrate SB is laser stripped here, in order to repair the damage caused by laser stripping, the damage caused by laser irradiation on the surface of the epitaxial structure 40 can be further removed by dry etching or wet etching.

[0076] Through the above process, the substrate of the epitaxial structure 40 can be replaced, and the epitaxial structure 40 can be bonded to the first substrate 10 , providing a basis for subsequent chip manufacturing processes.

[0077] See also Figure 5 After completing the production of the aforementioned temporary transposition structure, the epitaxial structure 40 can be patterned to form a plurality of mutually separated island epitaxial layers 410, and at the same time, the bonding glue layer 30 between adjacent island epitaxial layers 410 is exposed. The island epitaxial layer 410 formed here mainly undergoes a step etching (MESA) process. Among them, the step etching (MESA) process includes but is not limited to performing one, two or three photolithography processes and etching processes, and the photolithography process includes operations such as coating, exposure, and development. The photoresist used in the photolithography process can be a positive photoresist or a negative photoresist. The etching process can include dry etching and wet etching processes. It should be understood that at this time, the island epitaxial layer 410 has only completed the separation from the epitaxial layer, exposing the bonding glue layer 30 between adjacent island epitaxial layers 410, and has not actually performed a trench etching (ISO) process to achieve chip separation.

[0078] Furthermore, after forming a plurality of mutually separated island-shaped epitaxial layers 410 , a chip manufacturing process can be performed on this basis to obtain a plurality of mutually independent light-emitting chips (not shown).

[0079] Specifically, the chip manufacturing process is performed on the basis of the island epitaxial layer 410, and the Figure 3 , the chip manufacturing process may include the following steps S310-S330;

[0080] Step S310, depositing a passivation layer on the island epitaxial layer and the bonding adhesive layer;

[0081] Step S320, patterning the passivation layer on the island epitaxial layer to expose a portion of the surface of the island epitaxial layer;

[0082] Step S330, manufacturing chip electrodes on the exposed surface of the island epitaxial layer.

[0083] Specifically, you can refer to Figure 6-Figure 8 A passivation layer 510 is deposited on the island epitaxial layer 410 and the bonding adhesive layer 30. The material of the passivation layer 510 includes but is not limited to polyimide (PI), benzocyclobutene (BCB), perfluorocyclobutane (PFCB), magnesium oxide (MgO), Su8, epoxy resin (Epoxy), acrylic resin (Acrylic Resin), cycloolefin polymer (COC), polymethyl methacrylate (PMMA), polyethylene terephthalate (PET), polycarbonate (PC), polyetherimide (Polyetherimide), fluorocarbon polymer (Fluorocarbon Polymer), glass (Glass), aluminum oxide (Al2O3), silicon oxide (SiO x ), titanium oxide (TiO x )、Tantalum oxide (Ta2O5), Silicon nitride (SiN x ) or spin-on glass (SOG).

[0084] The passivation layer 510 is then patterned to expose part of the surface of the island epitaxial layer 410. Specifically, the patterning process includes, but is not limited to, performing one, two or three photolithography processes and etching processes. The photolithography process includes operations such as coating, exposure, and development. The photoresist used in the photolithography process can be a positive photoresist or a negative photoresist. The etching process can include dry etching and wet etching processes. After the passivation layer 510 is patterned, an opening H is obtained. The opening H can be circular in shape. In some other embodiments, the opening H can also be square, annular, or finger-shaped. In addition, the shape and number of the opening H are not particularly limited. It can be that only one opening is provided. If multiple openings are provided, the current can be dispersed more evenly. In addition, in some other embodiments, when multiple openings are provided, each opening can be selected according to actual needs. The distribution form of equal spacing or non-equal spacing is selected, which is not limited to the embodiments disclosed in the present invention. The opening H is respectively opened on the passivation layer 510 corresponding to the first conductive semiconductor layer and the second conductive semiconductor layer. After the passivation layer 510 is patterned, the chip electrode M can be made through the opening H. Among them, the chip electrode M can be at least one selected from chromium, aluminum, titanium, platinum, gold, nickel, beryllium, and tungsten. At the same time, the chip electrode M can be a multi-layer metal stacking structure. Exemplarily, the multi-layer metal stacking structure can be any stacking combination of aluminum, titanium, platinum, gold, nickel, beryllium, and tungsten, or alloys containing these materials are also included. When further considering the push-pull resistance and tin-proof capability of the electrode, copper can also be considered as part of the multi-layer metal stacking structure, for example, replacing the aluminum layer in the traditional multi-layer metal stacking structure with copper-aluminum alloy.

[0085] See also Fig. 9 After completing the chip production, the separation between multiple chips can be achieved at the chip level.

[0086] Specifically, the bonding adhesive layer 30 between adjacent light-emitting chips can be removed by, for example, wet etching technology, and the chemical reagent used for wet etching can be a BOE solution. It can be understood that since there is a passivation layer 510 on the bonding adhesive layer 30 between adjacent light-emitting chips, before removing the bonding adhesive layer 30 here, the passivation layer 510 on the bonding adhesive layer 30 between adjacent light-emitting chips can also be removed by a dry etching process. Since the bonding adhesive layer 30 and the metal layer 20 are different materials, the chemical reagent used here cannot react with the metal layer 20.

[0087] For further information, see Fig.10, the exposed metal layer 20 can be etched by a dry etching process, such as an ICP etching process. Since the metal layer 20 uses an inert metal such as Pt or Au, and the ICP etching process is mainly physical bombardment, the metal debris generated by the bombardment is not easily removed by the ICP vacuum system and eventually adheres to the side wall of the bonding layer 30, and accumulates along the side wall of the bonding layer 30 until it contacts the side of the light-emitting chip, forming a metal film layer 210, also called a metal fence. The thickness of the metal film layer 210 varies according to the thickness of the metal layer and the etching size, and the height of the metal film layer 210 varies according to the etching power parameters. By way of example, the thickness of the metal film layer 210 in this specific embodiment is generally 10nm-100nm, and the height is 0.5um-2um. As an example, the thickness and height of the metal film layer 210 can be selected within the aforementioned range according to actual conditions. For example, the thickness of the metal film layer 210 can be 10 nm, or 20 nm, or 30 nm, or 40 nm, or 50 nm, or 60 nm, or 70 nm, or 80 nm, or 90 nm, or 100 nm. The thickness of the metal film layer 210 can also be 15 nm, or 25 nm, or 35 nm, or 45 nm, or 55 nm, or 65 nm, or 75 nm, or 85 nm, or 95 nm. Further, the height of the metal film layer 210 can be 0.5 μm, or 0.6 μm, or 0.7 μm, or 0.8 μm, or 0.9 μm, or 1 μm, or 1.1 μm, or 1.3 μm, or 1.5 μm, or 1.7 μm. The height of the metal film layer 210 may also be 0.55 μm, or 0.65 μm, or 0.75 μm, or 0.85 μm, or 0.95 μm, or 1.05 μm, or 1.15 μm, or 1.35 μm, or 1.55 μm, or 1.75 μm.

[0088] It can be understood that when removing the bonding adhesive layer 30, the passivation layer 510, and the metal layer 20 between adjacent light-emitting chips, an etching protection layer can be first deposited on the chip electrode M to protect the light-emitting chip. The aforementioned removal process of the bonding adhesive layer 30, the passivation layer 510, and the metal layer 20 between adjacent light-emitting chips can be equivalent to the trench etching (ISO) process in the traditional chip manufacturing process, thereby realizing device separation at the chip level.

[0089] See also Fig.11 After the metal film layer 210 is fabricated, the remaining bonding adhesive layer 310 can be removed by a wet etching process, so that the light-emitting chip and the metal film layer 210 enclose a cavity (not shown) to obtain a final light-emitting component.

[0090] Based on the same inventive concept, you can refer to Fig.16 The present application also provides a light-emitting component LS, and the light-emitting component LS is manufactured using the manufacturing method of the light-emitting component as described above.

[0091] The above-mentioned light-emitting component LS is manufactured by the aforementioned manufacturing method, and therefore has the beneficial effects described by the aforementioned manufacturing method, that is, the obtained light-emitting component LS can be more convenient for subsequent mass transfer and can improve the mass transfer efficiency.

[0092] The light-emitting component in the present application may include a first substrate 10, a metal film layer 210 and a light-emitting chip in sequence. The light-emitting chip includes a chip electrode M, an island epitaxial layer 410 and a passivation layer 510. The side of the light-emitting chip is in contact with the metal film layer 210, thereby enclosing a cavity. It can be understood that the first substrate 10, the chip electrode M, the island epitaxial layer 410 and the passivation layer 510 can be described with reference to the aforementioned embodiments, and the present application will not be further elaborated here.

[0093] In one embodiment, in one embodiment, the material of the metal layer 20 includes platinum or gold.

[0094] Further, the thickness of the metal film layer 210 ranges from 10nm to 100nm; the height of the metal film layer 210 ranges from 0.5μm to 2μm. As an example, the thickness and height of the metal film layer 210 can be selected within the aforementioned range according to actual conditions. For example, the thickness of the metal film layer 210 can be 10nm, or 20nm, or 30nm, or 40nm, or 50nm, or 60nm, or 70nm, or 80nm, or 90nm, or 100nm. The thickness of the metal film layer 210 can also be 15nm, or 25nm, or 35nm, or 45nm, or 55nm, or 65nm, or 75nm, or 85nm, or 95nm. Further, the height of the metal film layer 210 can be 0.5 μm, or 0.6 μm, or 0.7 μm, or 0.8 μm, or 0.9 μm, or 1 μm, or 1.1 μm, or 1.3 μm, or 1.5 μm, or 1.7 μm. The height of the metal film layer 210 can also be 0.55 μm, or 0.65 μm, or 0.75 μm, or 0.85 μm, or 0.95 μm, or 1.05 μm, or 1.15 μm, or 1.35 μm, or 1.55 μm, or 1.75 μm.

[0095] In one embodiment, the material of the bonding adhesive layer 30 may include any one of silicon dioxide, benzocyclobutene and polyimide.

[0096] Based on the same inventive concept, please refer to Figure 16-18 The present application also provides a mass transfer method, which may include the following steps:

[0097] Providing the aforementioned light-emitting assembly and a driving backplane;

[0098] Aligning and laminating the chip electrodes of the light-emitting chip with the pads of the driving backplane; and

[0099] Pressure is applied from one side of the first substrate to disconnect the metal film layer and the light emitting chip.

[0100] Specifically, after obtaining the corresponding light-emitting component LS according to the aforementioned light-emitting component manufacturing method, the light-emitting component LS can be aligned and bonded to a driving backplane BM, mainly to align and bond the chip electrode M in the light-emitting chip with the pad (not shown) of the driving backplane BM. The alignment and bonding methods and standards can be implemented with reference to the prior art, and this application will not be further elaborated. After the alignment and bonding is completed, a certain pressure can be applied from one side of the first substrate 10 to disconnect the metal film layer 210 and the light-emitting chip, thereby leaving the transferred light-emitting device LM on the driving backplane BM, and only the chip electrode M and the pad need to be welded later.

[0101] It can be understood that before disconnecting the metal film layer 210 and the light-emitting chip, since the chip electrode M is in contact with the pad, the driving backplane BM can also be energized to determine the bad chip. When disconnected subsequently, the corresponding bad chip will not be disconnected. As a realization, the first substrate 10 can be selected from a material with a certain elasticity or flexibility.

[0102] Furthermore, a driving circuit (not shown) and a pad are provided on the driving backplane BM of the present application. The driving circuit and the pad are electrically connected. The driving circuit can be an active matrix circuit (Active Matrix, AM) or a passive matrix circuit (Passive Matrix, PM) depending on the driving mode.

[0103] In addition, in this specific embodiment, the light-emitting component LS provided to the giant transfer node may also be a light-emitting component LS without removing the remaining bonding adhesive layer 310. When the corresponding giant transfer node receives the light-emitting component LS, a chemical reagent may be used to remove the remaining bonding adhesive layer 310, and then the transfer operation is performed. The purpose of doing so is to improve the connection reliability and stability between the light-emitting chip and the metal film layer 210, and to avoid the situation where the light-emitting chip falls off before the product arrives at the giant transfer node (during transportation).

[0104] It should be understood that the application of the present invention is not limited to the above examples. For ordinary technicians in this field, improvements or changes can be made based on the above description. All these improvements and changes should fall within the scope of protection of the claims attached to the present invention.

Claims

1. A method for manufacturing a light-emitting component, characterized in that: include: A temporary transposition structure is provided; wherein the temporary transposition structure comprises a first substrate, a metal layer, a bonding adhesive layer and an epitaxial structure arranged in sequence; the epitaxial structure is bonded to the metal layer through the bonding adhesive layer; The epitaxial structure is patterned to form a plurality of island-shaped epitaxial layers separated from each other, wherein the bonding glue layer between adjacent island-shaped epitaxial layers is exposed; Performing chip manufacturing process on the basis of the island epitaxial layer to obtain a plurality of independent light-emitting chips; Removing the bonding adhesive layer between adjacent light-emitting chips to expose the metal layer; Etching the exposed metal layer; wherein metal debris generated by etching the metal layer accumulates along the side wall of the bonding adhesive layer, and the accumulated metal film layer contacts the side of the light-emitting chip; and The remaining portion of the bonding adhesive layer is removed.

2. The method for manufacturing a light emitting component according to claim 1, characterized in that: The method for manufacturing the temporary transposition structure comprises: providing the first substrate; forming the metal layer on the surface of the first substrate; Providing a second substrate including the epitaxial structure; Depositing the bonding adhesive layer on a side of the epitaxial structure away from the second substrate; Bonding the bonding adhesive layer to the metal layer; and The second substrate is removed.

3. The method for manufacturing a light emitting component according to claim 1, characterized in that: The chip manufacturing process includes: Depositing a passivation layer on the island epitaxial layer and the bonding glue layer; performing patterning on the passivation layer on the island-shaped epitaxial layer so that a portion of the surface of the island-shaped epitaxial layer is exposed; and Chip electrodes are fabricated on the exposed surface of the island epitaxial layer.

4. The method for manufacturing a light emitting component according to claim 1, wherein: The bonding adhesive layer is removed by chemical etching.

5. The method for manufacturing a light emitting component according to claim 1, characterized in that: The exposed metal layer is etched using a dry etching process.

6. A light emitting component, characterized in that: The light-emitting component is manufactured by using the method for manufacturing a light-emitting component as described in any one of claims 1 to 5.

7. The light emitting assembly according to claim 6, characterized in that: The thickness of the metal film layer ranges from 10 nm to 100 nm; the height of the metal film layer ranges from 0.5 μm to 2 μm.

8. The light emitting assembly according to any one of claims 6 to 7, characterized in that: The material of the bonding adhesive layer includes any one of silicon dioxide, benzocyclobutene and polyimide.

9. The light-emitting assembly according to any one of claims 6 to 7, characterized in that: The material of the metal layer includes platinum or gold.

10. A method for mass transfer, characterized in that: include: Providing a light-emitting assembly as described in any one of claims 6 to 9 and a driving backplane; Aligning and laminating the chip electrodes of the light-emitting chip with the pads of the driving backplane; as well as Pressure is applied from one side of the first substrate to disconnect the metal film layer and the light emitting chip.

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