Low resistivity plasma enhanced tungsten nucleation

Abstract

A method of forming a structure on a substrate includes forming a tungsten nucleation layer within at least one feature. The method includes forming a nucleation layer by circulating a vapor deposition process. The recycle vapor deposition process includes forming a portion of the nucleation layer and then exposing the nucleation layer to a chemical vapor transport (CVT) process to remove impurities from the portion of the nucleation layer. The CVT process may be performed at a temperature of 400 degrees Celsius or less, and includes forming a plasma from a process gas comprising hydrogen greater than or equal to 90% of the total flow of hydrogen and oxygen.

Description

Technical Field

[0001] The present disclosure relates to a method and apparatus for forming a thin film, and more particularly to a method and apparatus for metal filling in a semiconductor device. Background Art

[0002] The manufacture of microelectronic devices typically involves a complex sequence of processes that require hundreds of individual processes to be performed on semiconductor, dielectric, and conductive substrates. Examples of these processes include oxidation, diffusion, ion implantation, thin film deposition, cleaning, etching, lithography, and other operations. Each operation is time-consuming and expensive.

[0003] As the critical dimensions of microelectronic devices continue to decrease, the design and manufacture of these devices on substrates becomes increasingly complex. Control of critical dimensions and process uniformity becomes increasingly important. Complex multilayer stacks involve precise process monitoring of critical dimensions such as thickness, roughness, stress, density, and potential defects. Multiple incremental processes in the process recipe used to form the device ensure that the critical dimensions are maintained. However, each recipe process may utilize one or more processing chambers, which adds additional time for forming the device in the processing system and also provides additional opportunities for defects to form. Therefore, each process increases the overall manufacturing cost of the completed microelectronic device.

[0004] Additionally, as the critical dimensions of these devices shrink, past manufacturing techniques encounter new obstacles. For example, when preparing a liner and / or nucleation layer to grow into a metal gap fill, the liner and / or nucleation layer may still be present on the sides of the gap, causing the fill material to close the gap before it is fully filled, resulting in seams in the fill material.

[0005] For at least the foregoing reasons, there continues to be a need for improved manufacturing methods to minimize costs while maintaining critical dimensions of microelectronic devices. Summary of the invention

[0006] The present disclosure relates to a method and apparatus for forming a thin film, and more particularly to a method and apparatus for metal filling in a semiconductor device.

[0007] In one aspect, a method for filling a feature on a substrate is provided. The method includes forming a nucleation layer in at least one feature formed on the substrate by performing a nucleation layer deposition cycle. The nucleation layer deposition cycle includes exposing at least one feature formed on the substrate to a tungsten-containing gas at a precursor flow rate, exposing at least one opening of the substrate to one or more reducing agents at a reducing agent flow rate, wherein the tungsten-containing gas and the reducing agent form a portion of the nucleation layer in the at least one feature, and exposing a portion of the nucleation layer to a chemical vapor transport (CVT) process to remove impurities from a portion of the nucleation layer. The method further includes repeating the nucleation layer deposition cycle until the nucleation layer reaches a desired thickness.

[0008] Specific embodiments may include one or more of the following. The method further includes performing a tungsten filling process to fill or partially fill one or more features. The CVT process is a plasma process that reduces tungsten oxide to tungsten. The CVT process includes exposing the tungsten-containing layer to an inductively coupled plasma (ICP) containing hydrogen and oxygen. Exposing the tungsten-containing layer to the ICP is performed at a temperature of 400 degrees Celsius or less and includes supplying a processing gas that contains hydrogen greater than or equal to 90% of the total flow rate of hydrogen and oxygen. A nucleation layer deposition cycle is performed in a processing chamber without breaking vacuum. At least one feature includes a bottom surface and at least one sidewall, and has one or more conformal layers formed on at least one sidewall and the bottom surface. The one or more conformal layers include a titanium nitride barrier layer, a tungsten liner layer, or a tungsten liner layer formed on the titanium nitride barrier layer. The one or more reducing agents are selected from borane (BH3), diborane (B2H6), triethylborane, silane (SiH4), disilane (Si2H6), trisilane (Si3H8), tetrasilane (Si4H10), methylsilane (SiCH6), dimethylsilane (SiC2H) or a combination thereof. The one or more reducing agents include diborane and silane.

[0009] In another aspect, a method for filling a feature formed on a substrate is provided. The method includes forming a tungsten-containing nucleation layer in at least one feature formed on the substrate by performing a nucleation layer deposition cycle, the substrate being positioned in a processing region. The nucleation layer deposition cycle includes exposing at least one feature of the substrate to one or more reducing agents in the processing region at a reducing agent flow rate, wherein the one or more reducing agents include silane, diborane, or a combination thereof; purging the one or more reducing agents in the processing region; exposing at least one feature formed on the substrate to a tungsten-containing precursor gas in the processing region at a precursor flow rate, wherein the tungsten-containing precursor gas and the reducing agent form a portion of a nucleation layer within the at least one feature; purging the tungsten-containing precursor gas in the processing region; exposing a portion of the nucleation layer to a chemical vapor transport (CVT) process to remove impurities from a portion of the nucleation layer. The CVT process is performed at a temperature of 400 degrees Celsius or less and includes forming a plasma from a processing gas, the processing gas including hydrogen gas greater than or equal to 90% of the total flow rate of hydrogen gas and oxygen gas. The method further includes repeating the nucleation layer deposition cycle until the nucleation layer reaches a desired thickness. The method further includes exposing the at least one feature to a tungsten-containing precursor gas to form a tungsten fill layer over the tungsten-containing nucleation layer.

[0010] Specific embodiments may include one or more of the following. At least one feature is formed in a field region of a surface of a substrate, at least one feature has a sidewall surface and a bottom surface, and a deposited tungsten-containing nucleation layer is formed at least on the sidewall surface and the bottom surface of the at least one feature. The tungsten-containing precursor gas includes WF6. The CVT process includes an inductively coupled plasma or a capacitively coupled plasma. The inductively coupled plasma or the capacitively coupled plasma is formed by one or more of H2, O2, Ar or a combination thereof. The CVT process includes: exposing the tungsten-containing layer to a hydrogen and oxygen plasma treatment. The hydrogen and oxygen plasma treatment is performed at a temperature of 400 degrees Celsius or less and includes supplying a processing gas, the processing gas containing hydrogen greater than or equal to 90% of the total flow rate of hydrogen and oxygen. The sidewall surface is defined by a dielectric material selected from silicon oxide, silicon nitride, silicon oxynitride or a combination thereof. The method further includes forming a tungsten liner layer on at least one feature by a physical vapor deposition process, and forming a tungsten-containing nucleation layer on the tungsten liner layer by an atomic layer deposition (ALD) process. Forming a tungsten filling layer over the tungsten-containing nucleation layer includes a chemical vapor deposition (CVD) gap-fill process.

[0011] In another aspect, a non-transitory computer-readable medium having instructions stored thereon, which, when executed by a processor, causes a process to perform the operations of the apparatus and / or method described above. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] The present disclosure briefly summarized above may be more particularly described with reference to a number of specific embodiments, some of which are illustrated in the accompanying drawings, in order to understand the above-mentioned features of the present disclosure in more detail. It should be noted, however, that the accompanying drawings illustrate only typical embodiments of the present disclosure and therefore should not be considered to limit the scope of the present disclosure, as the disclosure may allow other equally effective embodiments.

[0013] Figure 1 A flow chart of a method for manufacturing a semiconductor device according to one or more specific embodiments of the present disclosure is shown.

[0014] Figures 2A-2F Illustrated are views of various stages in the fabrication of a semiconductor device according to one or more specific embodiments of the present disclosure.

[0015] Figure 3 A flow chart of a method for forming a nucleation layer according to one or more specific embodiments of the present disclosure is shown.

[0016] Figure 4 A schematic top view of one example of a multi-chamber processing tool according to one or more specific embodiments of the present disclosure is shown.

[0017] To facilitate understanding, identical reference numerals have been used, where possible, to designate identical components that are common to the figures. It will be appreciated that components and features of one embodiment may be beneficially incorporated in other embodiments without further recitation. DETAILED DESCRIPTION

[0018] In the above summary of the invention and the detailed description, as well as in the following claims and drawings, specific features (including method steps) of the present disclosure are mentioned. It should be understood that the disclosure in this specification includes all possible combinations of these specific features. For example, where a specific feature is disclosed in the context of a specific aspect or embodiment of the present disclosure or a specific claim, the feature may also be used in combination with other features and / or in the context of other features to the extent possible, the specific aspects and embodiments of the present disclosure, as well as the general situation in the present disclosure.

[0019] As used herein, the term "comprises" and its equivalents indicate the optional presence of other components, ingredients, operations, etc. For example, an article "comprising" (or "which comprises") ingredients A, B, and C may consist of (i.e., contain only) ingredients A, B, and C, or may contain not only ingredients A, B, and C but also one or more other ingredients.

[0020] When this document refers to a method that includes two or more defined operations, the defined operations may be performed in any order or concurrently (unless the context excludes such a possibility), and the method may include one or more other operations that are performed before any defined operation, between two defined operations, or after all defined operations (unless the context excludes such a possibility).

[0021] The word "at least" and the number that follows it are used herein to indicate the beginning of a range that starts with that number (which can be a range with an upper limit or without an upper limit, depending on the variable being defined). For example, "at least one" means one or more than one. The word "at most" and the number that follows it are used herein to indicate the end of a range that ends with that number (which can be a range with 1 or 0 as its lower limit, or a range with no lower limit, depending on the variable being defined). For example, "at most four" means four or less than four, and "at most 40%" means 40% or less than 40%. In this specification, when a range is given as "(first number) to (second number)" or "(first number)-(second number)", this means a range with a lower limit of the first number and an upper limit of the second number. For example, 25-100 mm refers to a range with a lower limit of 25 mm and an upper limit of 100 mm.

[0022] At earlier nodes, larger dimensions made tungsten (W) fill possible, using nucleation followed by conformal CVD deposition. However, tungsten fill can be adversely affected by the presence of impurities. For example, the presence of boron impurities and / or fluorine-terminated (F-terminated) impurities on the surface of a tungsten liner or nucleation layer present in the feature adversely affects the resistivity of the deposited layer. Other impurities such as nitrogen and tungsten oxide may also adversely affect tungsten fill. One way to achieve good gap fill is by coating the contaminated tungsten surface with a nucleation layer (e.g., a boron-tungsten nucleation layer) to hide the damage. However, the presence of boron in the nucleation layer may increase resistivity loss due to the high boron levels in the nucleation layer.

[0023] Various embodiments provide improved tungsten gap fill in features with reduced critical dimensions. In various embodiments, this can be achieved by performing a chemical vapor transport (CVT) process while forming the nucleation layer. This CVT process purifies or recycles the nucleation layer by reducing the presence of impurities such as boron, fluorine, and nitrogen that may be present on the surface of the nucleation layer when the nucleation layer is formed.

[0024] Various embodiments utilize hydrogen and oxygen plasma treatment to restore the tungsten surface of the nucleation layer by, for example, reducing the boron level, which exhibits a significant increase during the deposition of the nucleation layer through chemical vapor transport. By this method, the tungsten surface of the nucleation layer is cleaned, for example, by reducing or removing contaminants such as boron, nitrogen and / or fluorine. The hydrogen and oxygen plasma treatment may include a saturated conformal treatment, which includes a longer soak time and / or a high reactant treatment. In various embodiments, the hydrogen and oxygen plasma treatment may be performed at a temperature below 400 degrees Celsius. In various embodiments, the hydrogen and oxygen plasma treatment includes H2% greater than or equal to 90% of the total flow of hydrogen and oxygen. During the plasma treatment process, tungsten may be oxidized to form a volatile compound WO2(OH)2, which is immediately reduced back to tungsten. By this mechanism, the tungsten surface of the nucleation layer can be restored and good subsequent gap fill can be achieved without sacrificing resistance. Therefore, in some embodiments, not only good gap fill is achieved, but also impurities are reduced because the tungsten surface is restored through the CVT mechanism.

[0025] In some embodiments, high H2% in H2+O2 co-flow plasma is used to purge each nucleation cycle, resulting in a low impurity and lower resistivity nucleation layer. As tungsten nuclei grow on top of the TiN / PVD liner, a high resistivity nucleation layer is deposited during impurity of the nucleation layer. In some embodiments, high H2% (>90%) in H2+O2 co-flow plasma treatment is performed immediately after each BW / SW / BSW nucleation cycle. With this approach, the resistivity of the tungsten film can substantially match the in-situ PVD+CVD nucleation-free process, which has the lowest resistivity. In some embodiments, during the tungsten gap fill process, the nucleation layer is deposited on top of or on top of the TiN or PVD W liner before the tungsten body fill. However, as currently constructed, the nucleation layer is a high resistivity film, so trying to thin it is a possible approach, but thinning typically results in reduced step coverage. In some embodiments, the resistivity of the nucleation layer is reduced by high H2% (>90%) in the H2+O2 plasma treatment after each deposition cycle of the cyclic nucleation layer deposition process. The stack resistivity of the nucleation layer described herein matches or substantially matches the in-situ PVD+CVD process without the nucleation layer, which has the lowest resistivity. In some embodiments, saturated / conformal high H2% (≥90%) in the H2+O2 plasma treatment after each nucleation cycle can help purify / reduce impurities (especially for boron %) through chemical vapor transport (CVT).

[0026] At operation 110, a substrate is provided. The substrate may be a device substrate or a semiconductor substrate as described herein. The substrate may include multiple layers. The substrate has one or more features formed therein. The one or more features may include a sidewall surface and a bottom surface. The sidewall surface may be defined by a dielectric material, and the bottom surface may be defined by a dielectric material or other material, such as a silicide layer, a metal silicide layer, a semiconductor layer, an etch stop layer, or a metal layer.

[0027] At operation 120, one or more conformal layers may be formed over the surface of one or more features. The one or more conformal layers may include one or more barrier layers, adhesion layers, and / or liner layers. The one or more conformal layers may include or may be nitrides (e.g., silicon nitride, carbon nitride, aluminum nitride, tantalum nitride, titanium nitride, tungsten nitride, etc., or combinations thereof), or metals (e.g., tantalum, cobalt, titanium, tungsten, etc., or combinations thereof), or carbides (e.g., tungsten carbide, aluminum carbide, etc., or combinations thereof). The one or more conformal layers may be formed by any suitable deposition process, such as ALD, CVD, PVD, or a hybrid ALD / CVD process. The one or more conformal layers may create an overhang in the field region that obstructs or blocks the top opening of the one or more features.

[0028] In operation 130, a nucleation layer may be formed over the feature or one or more conformal layers (if present). The nucleation layer may be used to repair any damage or discontinuity in the liner layer. The nucleation layer may be a boron-tungsten (BW) nucleation layer, a boron-silicon-tungsten (BSW) nucleation layer, a silicon-tungsten (BS) nucleation layer, or a tungsten-containing nucleation layer. The nucleation layer may be formed by a nucleation layer deposition cycle. The nucleation layer may be deposited using any suitable cyclic deposition process. The cyclic deposition process may be an atomic layer deposition (ALD) process, a cyclic chemical vapor deposition (CCVD) process, or a combination thereof (e.g., a hybrid ALD / CVD process). In addition to the cyclic deposition process, the nucleation layer deposition cycle further includes a chemical vapor transport (CVT) treatment process to remove impurities from the deposited portion of the nucleation layer. These impurities may include, for example, boron. In one example, one cycle of the cyclic deposition process includes a boron precursor pulse / purge / tungsten precursor pulse / purge / CVT treatment. The cyclic deposition process may be repeated for any number of cycles sufficient to deposit a nucleation layer of a target thickness. In one example, the cyclic deposition process is repeated for 3 to 5 cycles.The nucleation layer may also contribute to the thickness of an overhang (if any) formed by the one or more conformal layers during operation 120 .

[0029] At operation 140, one or more features may be filled with a metal fill material, such as a tungsten layer. The second tungsten layer may be a tungsten gap fill layer. The tungsten gap fill layer may be deposited using any suitable tungsten deposition process. The tungsten layer may be deposited by a chemical vapor deposition (CVD) gap fill process. The tungsten layer may partially or completely fill the one or more features. The cleaned surface of the nucleation layer provides good filling for the tungsten layer. In some embodiments, the features may be partially filled with tungsten in operation 140, followed by additional treatment, such as nitrogen plasma treatment.

[0030] At operation 150 , additional processing may be performed. In some embodiments, a planarization process, such as a CMP process or an etch-back process, may be performed to remove excess or overburden of conductive material (if present). In some embodiments, an annealing process may be performed during operation 150 .

[0031] refer to Figures 2A-2F , provides cross-sectional views of some specific embodiments of device structures of semiconductor devices at different manufacturing stages to illustrate Figure 1 and Figure 3 Although the method 100 and the method 300 are described Figures 2A-2F , but it should be understood that Figures 2A-2F The structure disclosed in the method 100 and the method 300 is not limited to the method 100 and the method 300, but can exist independently as a structure independent of the method 100 and the method 300. Similarly, although the method 100 and the method 300 are referenced Figures 2A-2F It should be understood that the method 100 and the method 300 are not limited to Figures 2A-2F The structure disclosed in Figures 2A-2F The structure disclosed in .

[0032] Figures 2A-2F Illustrated are views of various stages in the fabrication of a semiconductor device according to one or more specific embodiments of the present disclosure.

[0033] Figure 2A A cross-sectional view of a semiconductor device structure 200 is shown during an intermediate stage of fabrication corresponding to operation 110 according to some specific embodiments. The semiconductor device structure 200 includes a device substrate 210 having one or more layers formed thereon, such as Figure 2AThe dielectric layer 220 is shown. The device substrate 210 can be or include a bulk semiconductor substrate, a semiconductor on insulator (SOI) substrate, etc., which can be doped (e.g., with a p-type dopant or an n-type dopant) or undoped. In some specific embodiments, the semiconductor material of the device substrate 210 can include: an elemental semiconductor, such as silicon (Si) or germanium (Ge); a compound semiconductor, including, for example, silicon carbide, gallium arsenide, gallium phosphide, indium phosphide, indium arsenide, and / or indium antimonide; an alloy semiconductor, including, for example, SiGe, GaAsP, AlInAs, GaInAs, GaInP, and / or GaInAsP; or a combination thereof, etc. The device substrate 210 can include additional materials and / or layers, such as a silicide layer, a metal silicide layer, a metal layer, a dielectric layer, an etch stop layer, an interposer dielectric, or a combination thereof.

[0034] The device substrate 210 may further include integrated circuit devices (not shown). As will be appreciated by those skilled in the art, a wide variety of integrated circuit devices, such as transistors, diodes, capacitors, resistors, etc., or combinations thereof, may be formed in and / or on the device substrate 210 to produce the structural and functional requirements of the resulting semiconductor device structure 200 design.

[0035] The device substrate 210 has a front side 210f (also referred to as the front surface) and a back side 210b (also referred to as the back side) opposite to the front side 210f. A dielectric layer 220 is formed on the front side 210f of the device substrate 210. The dielectric layer 220 may include multiple layers. The dielectric layer 220 includes an upper surface 220u or a field region. In some specific embodiments, the dielectric layer 220 may include or be silicon oxide, silicon oxynitride, silicon nitride, a combination thereof, or multiple layers thereof. In some specific embodiments, the dielectric layer 220 is mainly composed of silicon oxide. It should be noted that the aforementioned descriptors (e.g., silicon oxide) should not be interpreted as disclosing any particular stoichiometric ratio. Therefore, "silicon oxide" and the like will be understood by those skilled in the art as a material consisting essentially of silicon and oxygen, without being limited to any particular stoichiometric ratio.

[0036] The dielectric layer 220 is patterned to form one or more features 222. In some embodiments, the features 222 may be selected from trenches, vias, holes, or combinations thereof. In a particular embodiment, the features 222 are vias. In some embodiments, the features 222 extend from the upper surface 220u of the dielectric layer 220 to the front side 210f of the device substrate 210. The features 222 include sidewall surfaces 222s and a bottom surface 222b extending between the sidewall surfaces 222s. In some embodiments, the sidewall surfaces 222s are tapered. The sidewall surfaces 222s may be defined by the dielectric layer 220, and the bottom surface may be defined by the device substrate 210. In some embodiments, the sidewall surfaces 222s may be defined by the dielectric layer 220 and the bottom surface may also be defined by the dielectric layer 220. The features 222 have a first depth "D1" from the upper surface 220u to the bottom surface 222b and a width "W1" between the two sidewall surfaces 222s. In some embodiments, the depth D1 is in the range of 2nm to 200nm, 3nm to 200nm, 5nm to 100nm, 2nm to 100nm, or 50nm to 100nm. In some embodiments, the width W1 is in the range of 10nm to 100nm, 10nm to 20nm, 10nm to 50nm, or 50nm to 100nm. In some embodiments, the feature 222 has an aspect ratio (D / W) in the range of 1 to 20, 5 to 20, 10 to 20, or 15 to 20.

[0037] Figure 2B A cross-sectional view of a semiconductor device structure 200 during an intermediate stage of fabrication corresponding to operation 120 is shown according to some specific embodiments. At operation 120, one or more conformal layers 230 may be formed over a surface of a feature. The one or more conformal layers 230 may include one or more barrier layers, adhesion layers, and / or liner layers. The one or more conformal layers 230 may include or may be a nitride (e.g., silicon nitride, carbon nitride, aluminum nitride, tantalum nitride, titanium nitride, tungsten nitride, etc., or a combination thereof), or a metal (e.g., tantalum, cobalt, titanium, tungsten, etc., or a combination thereof), or a carbide (e.g., tungsten carbide, aluminum carbide, etc., or a combination thereof). The one or more conformal layers 230 may be formed by any suitable deposition process 232, such as an ALD, CVD, PVD, or hybrid ALD / CVD process.

[0038] One or more conformal layers 230 may be formed on the sidewall surfaces 222s and the bottom surface 222b of the feature 222 and on the upper surface 220u or field region of the dielectric layer 220. In some embodiments, the one or more conformal layers 230 include a barrier layer having a liner layer formed thereon, for example, a titanium nitride barrier layer having a tungsten liner formed thereon. In some embodiments, the one or more conformal layers 230 include a liner layer formed on the surface of the feature 222. The one or more conformal layers 230 may include or be a liner layer. The liner layer may be a tungsten liner layer. The initial thickness of the liner layer may be in the range of about 1 angstrom to about 100 angstroms, for example, in the range of about 20 angstroms to about 50 angstroms. In some embodiments, the liner layer may be discontinuous along, for example, the sidewall surfaces 222s and / or the bottom surface 222b. In a particular embodiment, the liner is a tungsten liner layer, which is formed by a PVD process. One or more conformal layers may form an overhang (not shown) along the upper surface 220u or field region of the dielectric layer 220. The overhang may partially obstruct or block the top opening of the feature 222. The overhang may reduce the width W1 of the top opening.

[0039] Figure 2C and 2D A cross-sectional view of semiconductor device structure 200 during an intermediate stage of fabrication corresponding to operation 130 is shown in accordance with some embodiments. At operation 130, a nucleation layer, such as nucleation layer 240, is formed over a surface of feature 222, such as on a surface of one or more conformal layers 230. Nucleation layer 240 may serve as a seed layer for a subsequently deposited metal fill material. Additionally, in some embodiments where one or more previously deposited conformal layers 230 are discontinuous, such as along sidewall surface 222s, nucleation layer 240 may repair the discontinuous portion of one or more conformal layers 230. Nucleation layer 240 may include or may be any suitable material for promoting growth of a subsequently deposited metal fill material. As will be described with reference to Figure 3 As discussed, the nucleation layer 240 may be formed by any suitable cyclic nucleation layer deposition process 242, such as ALD, cyclic CVD (CCVD), or a hybrid ALD / CVD process. In addition to the cyclic deposition process, the nucleation layer deposition cycle may further include: Figure 2D A chemical vapor transport (CVT) treatment process 252 is shown to remove impurities from the deposited portion of the nucleation layer. These impurities may include, for example, boron.

[0040] In some embodiments, the nucleation layer 240 may include or be a tungsten-containing layer, such as a boron-tungsten (BW) nucleation layer, a boron-silicon-tungsten (BSW) nucleation layer, a silicon-tungsten (BS) nucleation layer, or a tungsten-containing nucleation layer. The nucleation layer 240 may be a conformal layer. In some embodiments, one or more conformal layers 230 include a barrier layer and / or a liner layer on which a nucleation layer is formed, such as a tungsten liner layer on which a boron-tungsten nucleation layer is formed. In some embodiments, one or more conformal layers 230 and the nucleation layer 240 may be individually or collectively referred to as a tungsten-containing layer 246, such as Figure 2C as shown in .

[0041] In some embodiments, forming the nucleation layer 240 at operation 130 includes exposing the semiconductor device structure 200 to a tungsten-containing precursor gas at a first precursor gas flow rate, and subsequently exposing the semiconductor device structure 200 to a reducing agent. The reducing agent may include boron and is introduced into the processing region at a reducing agent flow rate. The tungsten-containing precursor gas and the reducing agent are cycled alternately at the reducing agent flow rate to form the nucleation layer 240 above the semiconductor device structure 200 within the feature 222. The reducing agent and the tungsten-containing precursor gas may be cycled alternately, starting with the reducing agent or the tungsten-containing precursor gas, ending with the same starting gas or ending with a gas different from the starting gas. In some embodiments, the reducing agent or the tungsten-containing precursor gas are cycled alternately, starting with the tungsten-containing precursor gas and ending with the reducing agent.

[0042] In some embodiments, the nucleation layer 240 is deposited using an ALD process. The ALD process includes repeated cycles of alternatingly exposing the feature 222 to a tungsten-containing precursor and exposing the feature 222 to a reducing agent. In some embodiments, the processing area is purged between alternating exposures. In some embodiments, the processing area is continuously purged.

[0043] In some specific embodiments, exposing the substrate to the tungsten-containing precursor includes flowing the tungsten-containing precursor into the processing region at a flow rate of about 100 sccm or less, such as in a range of about 10 sccm to about 60 sccm, or in a range of about 20 sccm to about 80 sccm. Exposing the semiconductor device structure 200 to the reducing agent includes flowing the reducing agent into the processing region at a flow rate of about 200 sccm to about 1000 sccm, such as between about 300 sccm and about 750 sccm. It should be noted that the flow rates for the various deposition and processing processes described herein are for a processing system configured to process a 300 mm diameter substrate. Appropriate scaling can be used for processing systems configured to process substrates of different sizes.

[0044] In some specific embodiments, the tungsten-containing precursor and the reducing agent are each flowed into the processing region for a duration in the range of about 0.1 seconds to about 10 seconds, such as a duration in the range of about 0.5 seconds to about 5 seconds. The processing region can be purged between alternating exposures by flowing a purge gas, such as argon (Ar) or hydrogen, into the processing region for a duration in the range of about 0.1 seconds to about 10 seconds, such as in the range of from about 0.5 seconds to about 5 seconds.

[0045] Typically, repeated cycles of the nucleation process are continued until the thickness of the nucleation layer 240 is in the range of about 10 angstroms to about 200 angstroms, such as in the range of about 10 angstroms to about 150 angstroms, or in the range of about 20 angstroms to about 150 angstroms. In one example, the ALD cycle is repeated for 3 to 5 cycles. The nucleation layer 240 is disposed along the sidewall surface 222s and / or the bottom surface 222b of the feature 222, such as on top of the one or more conformal layers 230. The nucleation layer 240 may also contribute to the thickness of the overhang formed by the liner layer during operation 120.

[0046] Figure 2E A cross-sectional view of semiconductor device structure 200 is shown during an intermediate stage of fabrication corresponding to operation 140 , in accordance with some embodiments. At operation 140 , a metal fill material, such as tungsten fill material 274 , is optionally deposited at least partially into feature 222 via a metal fill process 272 .

[0047] In some embodiments, the tungsten fill material 274 is formed using a chemical vapor deposition (CVD) process that includes simultaneously flowing (co-flowing) a tungsten-containing precursor gas and a reducing agent into a processing region and exposing the semiconductor device structure 200. The tungsten-containing precursor and reducing agent used in the tungsten filling CVD process may include any combination of tungsten-containing precursors and reducing agents described herein. In some embodiments, the tungsten-containing precursor includes WF6, and the reducing agent includes hydrogen. In some embodiments, the tungsten fill material 274 partially fills the feature 222.

[0048] In some specific embodiments, the tungsten-containing precursor is provided at about 10 sccm to about 1200 sccm, or greater than about 50 sccm, or less than about 1000 sccm, or in the range of about 100 sccm to about 900 sccm. The reducing agent is provided at greater than about 500 sccm, such as greater than about 750 sccm, greater than about 1000 sccm, or in the range of about 500 sccm to about 10000 sccm, such as in the range of about 1000 sccm to about 9000 sccm, or in the range of about 1000 sccm to about 8000 sccm.

[0049] In some embodiments, the tungsten filling CVD process conditions are selected to provide tungsten features with relatively low residual film stress compared to conventional tungsten CVD processes. For example, in some embodiments, the tungsten filling CVD process includes heating the substrate to a temperature of about 250°C or higher, such as about 300°C or higher, or in a range of about 250°C to about 500°C, or in a range of about 300°C to about 500°C. During the CVD process, the pressure of the processing region can be maintained at less than about 500 Torr, less than about 600 Torr, less than about 500 Torr, less than about 400 Torr, or in a range of about 1 Torr to about 500 Torr, such as in a range of about 1 Torr to about 450 Torr, or in a range of about 1 Torr to about 400 Torr, or in a range of about 1 Torr to about 300 Torr.

[0050] In another embodiment, the tungsten fill material 274 is deposited using an atomic layer deposition (ALD) process at operation 140. The tungsten fill ALD process includes repeated cycles of alternatingly exposing the semiconductor device structure 200 to a tungsten-containing precursor gas and a reducing agent and purging the processing region between the alternating exposures.

[0051] In some specific embodiments, the tungsten-containing precursor and the reducing agent are each flowed into the processing region for a duration between about 0.1 seconds to about 10 seconds, such as a duration between about 0.5 seconds to about 5 seconds. The processing region may be purged between alternating exposures by flowing an inert purge gas, such as argon (Ar), or hydrogen into the processing region for a duration in the range of about 0.1 seconds to about 10 seconds, such as in the range of from about 0.5 seconds to about 5 seconds.

[0052] In other embodiments, the tungsten fill material 274 is deposited using a pulsed CVD method that includes repeated cycles of alternating exposure of the semiconductor device structure 200 to a tungsten-containing precursor gas and a reducing gas without purging the process region. The processing conditions for the tungsten fill pulsed CVD method can be the same, substantially the same, or within the same range as those described above for the tungsten fill ALD process.

[0053] In some specific embodiments, the one or more conformal layers 230 , the nucleation layer 240 , and the tungsten fill material 274 are monolithic and have no interface therebetween. The tungsten fill material 274 , the one or more conformal layers 230 , and the nucleation layer 240 together may form a tungsten-containing layer.

[0054] Figure 2FA cross-sectional view of the semiconductor device structure 200 during an intermediate stage of fabrication corresponding to operation 150 is shown according to some embodiments. At operation 150, the semiconductor device structure 200 can be exposed to an additional process 282. In some embodiments, the additional process includes a planarization process, such as a chemical mechanical polishing (CMP) process or an etch-back process, to remove excess or excess conductive material (if present) on the upper surface 220u of the dielectric layer 220. After the planarization process is completed, the top surface 284 of the tungsten fill material 274 can be coplanar or flush with the upper surface 220u of the dielectric layer and the top surfaces of the nucleation layer 240 and the one or more conformal layers 230, such as Figure 2F In some embodiments, an annealing process may be performed during operation 150 .

[0055] A cyclic deposition process for forming a nucleation layer (e.g., nucleation layer 240) may include exposing a substrate having features formed therein to a first gas-phase reactant, removing any unreacted first reactant and reaction byproducts from the processing region, and exposing the substrate to a second gas-phase reactant followed by a second removal process. In some embodiments, the first gas-phase reactant may include a tungsten-containing precursor (e.g., WF6) and the second gas-phase reactant may include one or more reducing agent precursors. In other embodiments, the first gas-phase reactant may include one or more reducing agent precursors and the second gas-phase precursor may include a tungsten-containing precursor. The pulses of gas-phase reactants may be separated by pulses of an inert gas, such as argon, helium, or other suitable inert gas, to prevent gas-phase reactions between the reactants and enable self-saturation reactions.

[0056] A non-limiting example of a cyclic deposition process includes ALD, where ALD is generally based on a self-limiting reaction in which continuous and alternating pulses of reactants are used to deposit approximately one atomic (or molecular) monolayer of material in each deposition cycle. Deposition conditions and precursors are generally selected to provide a self-saturating reaction so that an absorber layer of one reactant leaves a surface termination that does not react with a gas phase reactant of the same reactant. The substrate is then contacted with a different reactant that reacts with the previously terminated to enable continued deposition. Thus, each cycle of the alternating pulses typically leaves no more than approximately one monolayer of the desired material. However, those skilled in the art will recognize that more than one monolayer of material can be deposited in one or more ALD cycles, for example, if some gas phase reactions occur despite the alternating nature of the process.

[0057] Figure 3A flow chart of a method 300 for forming a nucleation layer according to one or more specific embodiments of the present disclosure is shown. The method 300 may be implemented as a cyclic nucleation layer deposition process 242. The method 300 includes a cyclic deposition process (e.g., operations 310-340) to deposit at least a portion of a nucleation layer (e.g., a portion of the nucleation layer 240), followed by a CVT process (e.g., operation 350) to remove impurities from at least a portion of the nucleation layer. The cyclic deposition process may be an ALD process, a cyclic chemical vapor deposition process, or a combination thereof (e.g., a hybrid ALD / CVD process). Precursors used in the cyclic deposition process may include a tungsten-containing precursor, such as tungsten hexafluoride (WF6), tungsten pentachloride (WCl5), and one or more reducing agent gases, such as a boron-containing precursor (e.g., borane, diborane (B2H6)) and a silicon-containing precursor (e.g., silane, disilane, and trisilane).

[0058] In some embodiments, during the cyclic nucleation layer deposition process 242, the processing region is maintained at a pressure less than about 120 Torr, such as in a range from about 900 mTorr to about 120 Torr, in a range from about 1 Torr to about 100 Torr, or, for example, in a range from about 1 Torr to about 50 Torr.

[0059] In some specific embodiments, before forming the nucleation layer 240, the substrate is exposed to a boron-containing gas (e.g., B2H6), for example, for an immersion time of about 5 seconds or more, such as about 10 seconds or more, such as about 20 seconds to 30 seconds. In some specific embodiments, before forming the nucleation layer 240, the substrate is exposed to a tungsten-containing gas (e.g., WF6), for example, for an immersion time of about 5 seconds or more, such as about 10 seconds or more, such as about 20 seconds to 30 seconds. In some specific embodiments, before forming the nucleation layer 240, the substrate is exposed to the boron-containing gas for the immersion time and then exposed to the tungsten-containing gas for the immersion time.

[0060] refer to Figure 3 At operation 310, a substrate (e.g., a semiconductor device structure 200 having a feature 222 formed thereon) is exposed to a tungsten-containing precursor at a first precursor gas flow rate. Examples of suitable tungsten-containing precursors include tungsten halides, such as tungsten hexafluoride (WF6), tungsten hexachloride (WCl6), tungsten pentachloride (WCl5), or combinations thereof. In some specific embodiments, the tungsten-containing precursor includes WF6. In some specific embodiments, the tungsten-containing precursor includes an organometallic precursor and / or a fluorine-free precursor, such as MDNOW (methylcyclopentadienyl-dicarbonyl nitroso-tungsten), EDNOW (ethylcyclopentadienyl-dicarbonyl nitroso-tungsten), tungsten hexacarbonyl (W(CO)6), or combinations thereof.

[0061] In some specific embodiments, contacting a substrate (e.g., semiconductor device structure 200) with a first gaseous reactant including a tungsten-containing precursor may include contacting the tungsten-containing precursor with the substrate for a period of about 0.1 seconds to about 60 seconds, or in a range of about 0.1 seconds to about 10 seconds, or in a range of about 0.5 seconds to about 5.0 seconds. In addition, in the process in which the substrate is contacted with the tungsten-containing precursor, the flow rate of the tungsten-containing precursor may be less than 1000 sccm, less than 500 sccm, or less than 100 sccm, or even less than 10 sccm. The flow rate of the tungsten-containing precursor may be about 100 sccm or less, for example, in a range of about 10 sccm to about 60 sccm, or in a range of about 20 sccm to about 80 sccm. It should be noted that the flow rates of the various deposition and processing processes described herein are for a processing system configured to process a 300 mm diameter substrate. Appropriate scaling can be used for processing systems configured to process substrates of different sizes.

[0062] At operation 320, a purge process may optionally be performed to remove any remaining tungsten chloride precursor and any byproducts from the processing area. For example, excess first gas phase reactants and reaction byproducts (if any) may be removed from the surface of the substrate, such as by pumping with an inert gas. In some embodiments, the purge process may include a purge cycle in which the processing area is purged for a period of less than about 5 seconds, or less than about 3 seconds, or even less than about 2 seconds. Excess first gas phase reactants, such as, for example, excess tungsten-containing precursors and any possible reaction byproducts, may be removed by vacuum suction generated by a pumping system in fluid communication with the processing area.

[0063] At operation 330, the substrate (e.g., semiconductor device structure 200 having feature 222 formed thereon) is exposed to one or more reducing agent precursors at a second precursor gas flow rate. After purging the processing area with the purge gas, method 300 may continue with a second stage of the cyclic nucleation layer deposition process, which includes contacting the substrate with a second gas phase reactant including one or more reducing agent precursors. The one or more reducing agent precursors react with the tungsten-containing precursor to deposit at least a portion of nucleation layer 240.

[0064] In some embodiments, the reducing agent precursor may include at least one of a silicon-containing reducing agent such as silane (SiH4), disilane (Si2H6), trisilane (Si3H8) and a boron-containing precursor such as borane (BH3) or diborane (B2H6).

[0065] In some specific embodiments, contacting the substrate with one or more reducing agent precursors may include contacting the substrate with the reducing agent precursor for a period of about 0.01 seconds to about 180 seconds, about 0.05 seconds to about 60 seconds, or about 0.1 seconds to about 10.0 seconds. In addition, during the period when the substrate contacts the one or more reducing agent precursors, the flow rate of the reducing agent precursor may be less than 30 slm, or less than 15 slm, or less than 10 slm, or less than 5 slm, or less than 1 slm, or even less than 0.1 slm. In addition, during the period when the substrate contacts the one or more reducing agent precursors, the flow rate of the reducing agent precursor may be in the range of about 0.1 to 30 slm, about 5 to 15 slm, or equal to or greater than 10 slm. In some specific embodiments, exposing the semiconductor device structure 200 to the reducing agent includes: causing one or more reducing agents to flow into the processing region at a flow rate in the range of about 200 sccm to about 1000 sccm or in the range of about 300 sccm to about 750 sccm.

[0066] At operation 340, a purge process may optionally be performed to remove any excess reducing agent precursor and reaction byproducts (if any) from the processing area. For example, excess second gas phase reactants and reaction byproducts (if any) may be removed from the surface of the substrate, for example by pumping with an inert gas. In some specific embodiments, the purge process operation 340 may include a purge cycle in which the processing area is purged for a period of less than about 5 seconds, or less than about 3 seconds, or even less than about 2 seconds. Excess second gas phase reactants, such as, for example, excess reducing agent precursors and any possible reaction byproducts, may be removed with the help of a vacuum generated by a pumping system in fluid communication with the processing area. For example, HCl or HF generated by the reaction of one or more reducing agent precursors with excess chlorine or fluorine from a tungsten-containing precursor may be removed from the processing area, for example, by pumping while flowing an inert gas. In some specific embodiments, the purge process of operation 340 may include a time range of about 0.1 seconds to about 30 seconds to purge the surface of the substrate, or about 0.5 seconds to about 3 seconds, or even about 1 second to about 2 seconds.

[0067] At operation 350, the nucleation layer or portion of the nucleation layer formed during operations 310-340 is exposed to a CVT process. The CVT process removes impurities from the deposited portion of the nucleation layer. For example, the CVT process can remove excess boron from one or more reducing agent precursors and remove excess chlorine or fluorine from the tungsten-containing precursor. The CVT process can restore or clean the surface of the nucleation layer 240 or the deposited portion of the nucleation layer to achieve good gap filling while maintaining or improving the resistivity of the formed device. In some specific embodiments, the CVT process includes a volatilization process and a reduction process. An example of a volatilization process can be performed by the following reaction (I):

[0068] (I)WO2+2H2O→WO2(OH)2+H2

[0069] The reduction process can be carried out through the following reactions:

[0070] (II)WO2(OH)2+3H2→W+4H2O

[0071] In some embodiments, the CVT process of operation 350 may include exposing the nucleation layer 240 or a portion of the nucleation layer to a plasma treatment process. In some embodiments, the plasma treatment process is an inductively coupled plasma process. In some embodiments, the plasma treatment process is a capacitively coupled plasma process. In some embodiments, the plasma treatment process is formed in a remote plasma source (RPS). In some embodiments, the plasma treatment process is generated in a treatment region (e.g., direct plasma). In some embodiments, the plasma treatment process includes exposing the nucleation layer to a plasma formed by a process gas including a hydrogen-containing gas and an oxygen-containing gas. In some embodiments, the plasma treatment process includes exposing the nucleation layer 240 to an ICP formed by a process gas including a hydrogen-containing gas and an oxygen-containing gas. The process gas may further include an inert gas, such as argon (Ar), helium (He), krypton (Kr), or a combination thereof. In some embodiments, the plasma treatment process may include exposing the tungsten-containing layer 246 to a plasma formed from a process gas including one or more of H2, O2, Ar, or a combination thereof. In some embodiments, the plasma treatment process may include exposing the nucleation layer to a hydrogen and oxygen plasma treatment. The hydrogen and oxygen plasma treatment may include a saturated conformal treatment including a longer soak time and / or a high reactant treatment to provide good subsequent metal filling of the feature.

[0072] In some embodiments, the plasma treatment process is performed at a temperature of 400 degrees Celsius or less. In some embodiments, the plasma treatment process includes supplying a process gas containing H2% greater than or equal to 90% of the total flow of hydrogen and oxygen.

[0073] In some embodiments, during the CVT process, the processing region is maintained at a pressure of less than about 120 mTorr, such as in a range of about 50 mTorr to about 110 mTorr, in a range of about 60 mTorr to about 100 mTorr, or, for example, in a range from about 70 mTorr to about 90 mTorr. In some embodiments, the CVT region includes flowing hydrogen into the processing region or plasma source at a flow rate of about 300 sccm or less, such as in a range of about 100 sccm to about 250 sccm, or in a range from about 150 sccm to about 200 sccm. In some embodiments, the CVT process includes flowing oxygen into the processing region or plasma source at a flow rate of about 30 sccm or less, such as in a range of about 10 sccm to about 25 sccm, or in a range from about 15 sccm to about 20 sccm. During the CVT process, the temperature of the semiconductor device structure 200 may be maintained in a range of about 400 degrees Celsius or less, such as in a range of about 200 degrees Celsius to about 400 degrees Celsius, in a range of about 250 degrees Celsius to about 400 degrees Celsius, or, for example, in a range from about 300 degrees Celsius to about 350 degrees Celsius. During the CVT process, a plasma power of 2000 watts or less may be used, such as in a range of about 500 watts to 1500 watts, or, for example, in a range of about 850 watts to about 1000 watts. The CVT process may be performed for a period of 60 seconds or less, such as in a range of about 10 seconds to about 40 seconds, or, for example, in a range of about 10 seconds to about 30 seconds.

[0074] During the CVT process, tungsten may be oxidized to form a volatile compound, WO2(OH)2, which immediately reduces back to tungsten. In addition, surface contaminants such as fluorine, nitrogen, and / or boron may be removed. Through these mechanisms, the surface of the tungsten can be restored and good subsequent metal fill can be achieved without sacrificing resistance. Therefore, not only is good subsequent metal fill achieved, but impurities are also reduced because the tungsten surface is restored through the CVT mechanism. This reduction in impurities reduces the resistivity of the nucleation layer formed, which reduces the overall resistivity of the formed device.

[0075] In other embodiments, CVT includes a thermal treatment process. The thermal treatment process may include exposing the semiconductor device structure 200 to a gas including H2 and H2O.

[0076] In some embodiments, operations 310 - 350 are performed in the same processing chamber without breaking vacuum.

[0077] Operations 310-350 constitute a cyclic deposition cycle, which includes two deposition stages (operation 310 and operation 330) and optionally two purge stages (operation 320 and operation 340), followed by a CVT process (operation 350) to remove impurities. In some specific embodiments, each cycle is a self-limiting process, wherein less than or equal to about one tungsten-containing monolayer is deposited during each cycle. Operations 310-350 may be repeated until the nucleation layer (e.g., nucleation layer 240) reaches a desired (target) thickness. For example, at operation 360, if the thickness of the nucleation layer 240 is equal to the target thickness (or within a given threshold of the target thickness), the method 300 ends at operation 370. If the thickness of the nucleation layer 240 is not equal to the target thickness (or not within a given threshold of the target thickness), the method 300 returns to operation 310 to start another deposition cycle. In some specific embodiments, the cyclic deposition cycle (operation 310-350) is repeated until the nucleation layer 240 has a thickness of about 1 nm to about 20 nm. The cyclic deposition process may be repeated for any number of cycles sufficient to deposit a nucleation layer of a target thickness. In one example, the cyclic deposition process is repeated for 3 to 5 cycles. Additional steps may be provided before, during, and after the cyclic deposition process, and some of the operations described may be moved, replaced, or eliminated for additional embodiments of method 300.

[0078] It should also be understood that in some embodiments, the order in which the substrate is contacted with the first gas-phase reactant (e.g., a molybdenum chloride precursor or a tungsten chloride precursor) and the second gas-phase reactant (e.g., a reducing agent precursor) can be such that the substrate is first contacted with the second gas-phase reactant and then contacted with the first gas-phase reactant. In addition, in some embodiments, method 300 can include contacting the substrate with the first gas-phase reactant one or more times before contacting the substrate with the second gas-phase reactant one or more times. In addition, in some embodiments, method 300 can include contacting the substrate with the second gas-phase reactant one or more times before contacting the substrate with the first gas-phase reactant one or more times.

[0079] In some embodiments, the cyclic nucleation layer deposition process 242 may be a hybrid ALD / CVD or CCVD process. In some embodiments, cyclic chemical vapor deposition (CCVD) may include introducing two or more precursors into a reaction chamber, wherein there may be an overlap period between the two or more precursors in the reaction chamber, thereby producing a deposited ALD component and a deposited CVD component. For example, a CCVD process may include a continuous flow of one precursor and periodic pulses of a second precursor into the reaction chamber.

[0080] In one example, one cycle of method 300 includes WF6 dose or pulse / WF6 purge / B2H6 dose or pulse / B2H6 purge / H2+O2 plasma treatment.

[0081] In one example, one cycle of the ALD process includes boron pulse / boron purge / tungsten pulse / tungsten purge.The nucleation layer may also contribute to the thickness of an overhang (if any) formed by the one or more conformal layers during operation 120 .

[0082] Examples of processing systems that may be appropriately modified in light of the teachings provided herein include integrated processing systems or other suitable processing systems available from Applied Materials, Inc. located in Santa Clara, California. It is contemplated that other processing systems, including those from other manufacturers, may be adapted to benefit from the aspects described herein. Figure 4 A schematic top view of an example multi-chamber processing system 400 or cluster tool that can be used to perform gradient oxidation and etching of PVD metals, and subsequent post-etch processing, is shown according to an embodiment of the present disclosure. Figure 4 As shown, a plurality of processing chambers 402a-e are coupled to a first transfer chamber 404. The first transfer chamber 404 is also coupled to a first pair of pass-through chambers 406a-b. The first transfer chamber 404 has a centrally disposed transfer robot (not shown) for transferring substrates between the pass-through chambers 406a-b and the processing chambers 402a-e. The pass-through chambers 406a-b are coupled to a second transfer chamber 410, which is coupled to a processing chamber 414 configured to perform a pre-clean process and a processing chamber 416 configured to perform an epitaxial (or alternatively, PVD deposition) process. The second transfer chamber 410 has a centrally disposed transfer robot (not shown) for transferring substrates between a set of load lock chambers 412a-b and the processing chambers 414 or 416. The factory interface 420 is connected to the second transfer chamber 410 through the load lock chamber 412. The factory interface 420 is coupled to one or more bays 430a-b on opposite sides of the load lock chamber 412. The bays 430a-b are typically front opening unification bays (FOUPs) accessible from a clean room.

[0083] Prior to various operations, the substrate may first be transferred to a processing chamber 414 where a pre-cleaning process is performed to remove contaminants, such as carbon or oxide contaminants, from exposed surfaces of source / drain regions of transistors of the substrate.

[0084] The substrate is then transferred to one or more processing chambers 402. In some embodiments, the processing chamber 402 may etch vias or trenches in the substrate. In some embodiments, the substrate is provided to an etching chamber to perform a trench formation process, and the etching chamber is not part of a processing system that includes the processing chambers 414, 416 and the one or more processing chambers 402. In other operations, the substrate has trenches formed therein. Once the trenches are formed in the dielectric material, the substrate is transferred to the processing chamber 414 for purification.

[0085] The substrate is then transferred to at least one of the processing chambers 416 and / or the processing chambers 402, where an operation is performed. For example, the substrate is transferred to at least one of the processing chambers 402, where a metal deposition operation is performed to form a seed layer. The metal can be deposited in any suitable chamber, such as PVD, atomic layer deposition (ALD), epitaxy (EPI), or other suitable chambers.

[0086] The substrate may be transferred to one of the processing chambers 402 where a gradient oxidation operation may be performed. The gradient oxidation may be performed in an inductively coupled plasma (ICP) reactor or other suitable plasma processing chamber. The gradient oxidation operation is configured to oxidize unwanted portions of a metal layer formed on the substrate.

[0087] The substrate may be transferred to one of the processing chambers 402, where an etching operation is performed to selectively remove the oxidized portion of the deposited metal layer. For example, the etching operation may be performed in an etching chamber. Alternatively, the etching operation may be performed in an ICP reactor that performs a gradient oxidation.

[0088] After the etching operation, the substrate can be transferred to one of the processing chambers 402, where a post-etch treatment process is performed to reduce the tungsten oxide to tungsten and optionally remove contaminants from the tungsten surface. For example, the post-etch treatment process can be performed in an ICP reactor that performs gradient oxidation and etch back. The post-etch treatment process can be a CVT process, for example, a hydrogen and oxygen treatment process as described herein.

[0089] After the post-etch treatment process, a portion of the deposited metal layer (e.g., seed material) will remain along the sidewall surfaces and bottom surface of the feature or trench. The substrate can then be transferred to one of the process chambers 402 or 416 where a gap fill operation is performed. The gap fill operation can be performed in a CVD, ALD, or other suitable chamber. For example, process chamber 402 or 416 can deposit a metal such as tungsten or other suitable material for growth from the seed layer at the bottom of the trench or for forming a feature that is a part of a microelectronic device.

[0090] The system controller 480 is coupled to the processing system 400 for controlling the processing system 400 or its components. For example, the system controller 480 can control the operation of the processing system 400 using direct control of the processing chambers 402, 404, 406, 410, 412, 414, 416, 420, 430 of the processing system 400, or by controlling controllers associated with the processing chambers 402, 404, 406, 410, 412, 414, 416, 420, 430, 460. In operation, the system controller 480 enables data and feedback to be collected from the various chambers to coordinate the performance of the processing system 400.

[0091] The system controller 480 typically includes a central processing unit (CPU) 482, a memory 484, and a support circuit 486. The CPU 482 can be one of any form of general-purpose processor that can be used in an industrial environment. The memory 484, a non-transitory computer-readable medium, or a machine-readable storage medium can be accessed by the CPU 482 and can be one or more memories, such as a random access memory (RAM), a read-only memory (ROM), a disk drive, a hard disk, or any other form of digital storage located locally or remotely. The support circuit 486 is coupled to the CPU 482 and can include cache, frequency circuits, input and output subsystems, power supplies, and the like. The various embodiments disclosed herein can generally be implemented by executing computer instruction codes (such as computer program products or software routines) stored in the memory 484 (or the memory of a particular processing chamber) under the control of the CPU 482. In other words, the computer program product is tangibly embodied on the memory 484 (or a non-transitory computer-readable medium or a machine-readable storage device). When the CPU 482 executes the computer instruction code, the CPU 482 controls the chamber to perform operations according to various embodiments.

[0092] System controller 480 is configured to execute methods such as method 100 stored in memory 484 .

[0093] In some embodiments, the first process chamber 402 includes an oxygen source 442 fluidly coupled to a process region 440 of the first process chamber 402, wherein the oxygen source 442 is configured to deliver an oxygen-containing gas to the process region 440. The first process chamber 402 may further include a first flow control valve 433 configured to control a flow rate of the oxygen-containing gas provided from the oxygen source 442 to the process region 440. In some embodiments, the first process chamber 402 further includes a hydrogen source 434 fluidly coupled to the process region 440 of the first process chamber 402, wherein the hydrogen source 434 is configured to deliver a hydrogen-containing gas to the process region 440. The first process chamber 402 may further include a second flow control valve 435 configured to control a flow rate of the hydrogen-containing gas provided from the hydrogen source 434 to the process region 440. The first processing chamber 402 may further include an etching gas source 446 fluidly coupled to the processing region 440 of the first processing chamber 402, wherein the etching gas source 446 is configured to deliver the etching gas to the processing region 440. The first processing chamber 402 may further include a third flow control valve 437 configured to control the flow of the etching gas provided from the etching gas source 446 to the processing region 440. The first processing chamber 402 may further include an inductively coupled plasma source 438 configured to generate plasma in the processing region 440, wherein the plasma includes a hydrogen-containing gas and an oxygen-containing gas.

[0094] In some specific embodiments, the system controller 480 is configured to control the first flow control valve 433 so that a certain amount of oxygen-containing gas is provided to the surface of the substrate disposed in the processing area 440 of the first processing chamber 402, so as to preferentially oxidize one or more tungsten-containing layers disposed on the sidewalls of the field area and the features formed in the substrate by generating plasma in the processing area 440 of the first processing chamber 402; control the third flow control valve 437 so that a certain amount of etching gas is provided to the surface of the substrate to perform preferential etching of the preferentially oxidized portions of one or more tungsten-containing layers disposed on the sidewalls of the features formed in the field area and the features formed in the substrate in the first processing chamber 402; and control the first flow control valve 433 and the second flow control valve 435 to deliver a certain amount of oxygen-containing gas and hydrogen-containing gas to the processing area 440 to expose the one or more tungsten-containing layers to a post-etching treatment process, the post-etching treatment process comprising: exposing the tungsten-containing layer to a hydrogen and oxygen plasma treatment process by generating an inductively coupled plasma comprising oxygen-containing gas and hydrogen-containing gas.

[0095] The specific embodiments and all functional operations described in this specification can be implemented in a digital electronic circuit system, or in computer software, firmware or hardware, including the structural components disclosed in this specification and their structural equivalents (or a combination of one or more of them). The specific embodiments described in this specification can be implemented as one or more non-transitory computer program products, that is, one or more computer programs, which are tangibly embodied on a machine-readable storage device for a data processing device (such as a programmable processor, a computer, or multiple processors or computers) to execute or control the operation of the data processing device.

[0096] The procedures and logic flows described in this specification can be performed by one or more programmable processors that execute one or more computer programs to perform functions by operating on input data and generating output. The procedures and logic flows can also be performed by special-purpose logic circuit systems (and the device can also be implemented as a special-purpose logic circuit system), such as FPGA (field programmable gate array) or ASIC (application-specific integrated circuit).

[0097] The term "data processing apparatus" covers all equipment, devices and machines for processing data, including, for example, a programmable processor, a computer, or multiple processors or computers. In addition to hardware, the apparatus may include code that creates an execution environment for the computer program in question, such as code constituting processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of the above. Processors suitable for executing computer programs include, for example, general and special purpose microprocessors, and any one or more processors of any kind of digital computer.

[0098] Computer-readable media suitable for storing computer program instructions and data include all forms of non-transitory memory, media and memory devices, including, for example, semiconductor memory devices, such as EPROM, EEPROM and flash memory devices; magnetic disks, such as internal hard disks or removable disks; magneto-optical disks; and CD ROM and DVD-ROM disks. The processor and memory may be supplemented by (or incorporated in) special purpose logic circuitry.

[0099] When introducing elements of the present disclosure or exemplary aspects of a particular embodiment of the present disclosure, the articles “a,” “an,” “the,” and “said” are intended to mean that there are one or more of the elements.

[0100] The terms “comprising,” “including,” and “having” are intended to be inclusive and mean that there may be additional elements other than the listed elements.

[0101] While the foregoing is directed to specific embodiments of the present disclosure, other and further embodiments are contemplated without departing from the underlying scope of the foregoing, and the scope of the foregoing is determined by the appended claims.

Claims

1. A method for filling a feature on a substrate, the method comprising the following steps: Forming a nucleation layer in at least one feature formed on a substrate by performing a nucleation layer deposition cycle, comprising the steps of: exposing the at least one feature formed on the substrate to a tungsten-containing gas at a flow rate of the precursor; exposing the at least one opening of the substrate to one or more reducing agents at a reducing agent flow rate, wherein the tungsten-containing gas and the reducing agents form a portion of the nucleation layer within the at least one feature; and exposing the portion of the nucleation layer to a chemical vapor transport (CVT) process to remove impurities from the portion of the nucleation layer; and The nucleation layer deposition cycle is repeated until the nucleation layer reaches a desired thickness.

2. The method according to claim 1, further comprising the steps of: A tungsten fill process is performed to fill or partially fill the one or more features.

3. The method of claim 2, wherein the CVT process is a plasma process that reduces the tungsten oxide to tungsten. 4 . The method of claim 2 , wherein the CVT process comprises exposing the tungsten-containing layer to an inductively coupled plasma (ICP) comprising hydrogen and oxygen.

5. The method of claim 4, wherein exposing the tungsten-containing layer to ICP is performed at a temperature of 400 degrees Celsius or less and includes supplying a process gas comprising greater than or equal to 90% of a total flow of hydrogen and oxygen.

6. The method of claim 5, wherein the nucleation layer deposition cycle is performed in a processing chamber without breaking vacuum.

7. The method of claim 6, wherein the at least one feature comprises a bottom surface and at least one sidewall and has one or more conformal layers formed over the at least one sidewall and the bottom surface. 8 . The method of claim 7 , wherein the one or more conformal layers include a titanium nitride barrier layer, a tungsten liner layer, or a tungsten liner layer formed on a titanium nitride barrier layer.

9. The method of claim 1, wherein the one or more reducing agents are selected from borane (BH3), diborane (B2H6), triethylborane, silane (SiH4), disilane (Si2H6), trisilane (Si3H8), tetrasilane (Si4H10), methylsilane (SiCH6), dimethylsilane (SiC2H), or a combination thereof.

10. The method of claim 1, wherein the one or more reducing agents include diborane and silane.

11. A method of filling a feature formed on a substrate, the method comprising the steps of: Forming a tungsten-containing nucleation layer in at least one feature formed on a substrate positioned in a processing region by performing a nucleation layer deposition cycle, comprising the steps of: exposing the at least one feature of the substrate to one or more reducing agents in the processing region at a reducing agent flow rate, wherein the one or more reducing agents include silane, diborane, or a combination thereof; purging the one or more reducing agents from the processing area; exposing the at least one feature formed on the substrate to a tungsten-containing precursor gas in the processing region at a precursor flow rate, wherein the tungsten-containing precursor gas and the reducing agent form a portion of the nucleation layer within the at least one feature; purging the tungsten-containing precursor gas in the processing region; exposing the portion of the nucleation layer to a chemical vapor transport (CVT) process to remove impurities from the portion of the nucleation layer, wherein exposing the CVT process is performed at a temperature of 400 degrees Celsius or less and includes the steps of: forming a plasma from a process gas, the process gas comprising hydrogen gas at greater than or equal to 90% of a total flow rate of hydrogen gas and oxygen gas; Repeating the nucleation layer deposition cycle until the nucleation layer reaches a desired thickness; and The at least one feature is exposed to the tungsten-containing precursor gas to form a tungsten fill layer over the tungsten-containing nucleation layer.

12. The method of claim 11, wherein the at least one feature is formed in a field region of a surface of the substrate, and the at least one feature has a sidewall surface and a bottom surface, and the deposited tungsten-containing nucleation layer is formed at least on the sidewall surface and the bottom surface of the at least one feature.

13. The method of claim 11, wherein the tungsten-containing precursor gas comprises WF6.

14. The method of claim 11, wherein the CVT process comprises inductively coupled plasma or capacitively coupled plasma.

15. The method of claim 14, wherein the inductively coupled plasma or the capacitively coupled plasma is formed by one or more of H2, O2, Ar or a combination thereof.

16. The method of claim 11, wherein the CVT process comprises exposing the tungsten-containing layer to a hydrogen and oxygen plasma treatment.

17. The method of claim 16, wherein the hydrogen and oxygen plasma treatment is performed at a temperature of 400 degrees Celsius or less and includes supplying a process gas comprising greater than or equal to 90% of a total flow of hydrogen and oxygen.

18. The method of claim 13, wherein the sidewall surface is defined by a dielectric material selected from silicon oxide, silicon nitride, silicon oxynitride, or combinations thereof.

19. The method of claim 13, further comprising the steps of: A tungsten liner layer is formed over the at least one feature by a physical vapor deposition process, and the tungsten-containing nucleation layer is formed over the tungsten liner layer by an atomic layer deposition (ALD) process.

20. The method of claim 14, wherein forming the tungsten fill layer over the tungsten-containing nucleation layer comprises a chemical vapor deposition (CVD) gap-fill process.

Images