Circuit device and physical quantity sensor

Abstract

The invention provides a circuit device and a physical quantity sensor, and solves the problem that the characteristics of the physical quantity sensor are deviated if the frequencies of clock signals are different. The circuit device is provided with: an A / D conversion circuit that performs A / D conversion on a signal output from a sensor element; a signal processing circuit that digitally filters the digital signal output from the A / D conversion circuit; a storage circuit that stores individual data corresponding to a sampling frequency of the digital filtering process; and a characteristic determination unit that determines a characteristic of the digital filtering process on the basis of the individual data.

Description

Technical Field

[0001] The present invention relates to a circuit device and a physical quantity sensor. Background Art

[0002] In the past, there are known technologies for preventing interference between different signals used inside a physical quantity sensor. For example, Patent Document 1 discloses the following structure: in a physical quantity sensor that drives a sensor element by a drive signal and generates a clock signal by a PLL operation to operate a circuit, when the frequency of the drive signal of the sensor element is fdr and the frequency of the clock signal is fck, j×fdr≠fck / i (i, j are integers greater than 1). According to this structure, in a physical quantity sensor using sensor elements with individual differences, it is possible to prevent the drive frequency of the drive circuit from interfering with the oscillation frequency of the built-in oscillation circuit.

[0003] Patent Document 1: Japanese Patent Application Publication No. 2018-163037

[0004] In the prior art, since the frequency of the drive signal is determined according to each sensor element, and the frequency of the clock signal is determined according to the frequency of the drive signal, the frequency of the clock signal is also determined depending on the individual differences of the sensor elements. Therefore, the frequency of the clock signal of each sensor element may be different. The frequency of the clock signal affects the frequency of digital processing such as the sampling frequency of A / D conversion. Since the frequency of digital processing may affect the characteristics of various digital processing, if the frequency of the clock signal is different, the characteristics of the physical quantity sensor will deviate. Summary of the invention

[0005] The circuit device comprises: an A / D conversion circuit that performs A / D conversion on a signal output from a sensor element; a signal processing circuit that performs digital filtering on a digital signal output from the A / D conversion circuit; a storage circuit that stores separate data corresponding to a sampling frequency of the digital filtering processing; and a characteristic determination unit that determines the characteristics of the digital filtering processing based on the separate data.

[0006] The physical quantity sensor comprises: a sensor element; an A / D conversion circuit that performs A / D conversion on a signal output from the sensor element; a signal processing circuit that performs digital filtering on a digital signal output from the A / D conversion circuit; a storage circuit that stores separate data corresponding to a sampling frequency of the digital filtering; and a characteristic determination unit that determines the characteristics of the digital filtering based on the separate data. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 This is a functional block diagram of the physical quantity sensor according to the first embodiment.

[0008] Figure 2 : is a diagram showing first-order coefficients and zero-order coefficients corresponding to combinations of orders and cutoff frequencies.

[0009] Figure 3 is a block diagram showing the structure of a DSP.

[0010] Figure 4 It is a diagram showing a configuration example of a filter.

[0011] Figure 5 It is a diagram showing a configuration example of an IIR filter.

[0012] Figure 6 is a diagram illustrating the gain of an IIR filter.

[0013] Figure 7 It is a diagram showing the relationship between the sampling frequency and the filter coefficient.

[0014] Description of symbols

[0015] 1: physical quantity sensor; 2: sensor element; 3: circuit device; 10: reference voltage circuit; 20: drive circuit; 30: detection circuit; 40: digital processing unit; 42: A / D conversion circuit; 44a: temperature correction unit; 44b: notch filter; 44b1, 44b2, 44b3, 44b4, 44c1, 44c2, 44c3: adding unit; 44b5, 44b7, 44b8, 44b9 , 44b10, 44b11, 44c5, 44c6: multiplication unit; 44b5, 44b6, 44c4: delay unit; 44c: IIR filter; 44d: second filter; 50: oscillation circuit; 60: storage unit; 61: register; 62: non-volatile memory; 70: interface circuit; 80: temperature sensor; 82: A / D conversion circuit; 84: temperature correction value calculation unit; 90: characteristic determination unit. DETAILED DESCRIPTION

[0016] Hereinafter, preferred embodiments of the present invention will be described in detail using the accompanying drawings. In addition, the embodiments described below do not unduly limit the contents of the present invention as described in the claims. In addition, not all structures described below are necessarily essential components of the present invention. Hereinafter, a physical quantity sensor (angular velocity sensor) that detects angular velocity as a physical quantity will be described as an example.

[0017] 1. First Implementation Method

[0018] Figure 1This is a functional block diagram of a physical quantity sensor of the first embodiment. The physical quantity sensor 1 of the first embodiment includes a sensor element 2 and a circuit device 3. In this embodiment, the sensor element 2 is an angular velocity sensor. The angular velocity sensor can be implemented by various well-known structures. For example, the sensor element 2 can be composed of an element that outputs a signal representing a vibration based on the Coriolis force acting on the vibration arm. Of course, the shape of the sensor is not limited, and sensors of various shapes such as double T-type, tuning fork type, H-type, etc. can be used.

[0019] The sensor element 2 includes an input terminal for inputting a drive signal DRV from the drive circuit 20 and an output terminal for outputting a feedback signal DI to the drive circuit 20. In the present embodiment, the input terminal is electrically connected to the connection pad DS. In addition, the output terminal is electrically connected to the connection pad DG. The sensor element 2 includes two detection signal output terminals for outputting detection signals, and each detection signal output terminal is electrically connected to the connection pads S1 and S2.

[0020] The circuit device 3 in this embodiment is configured to include a reference voltage circuit 10, a drive circuit 20, a detection circuit 30, a digital processing unit 40, an oscillation circuit 50, a storage unit 60, an interface circuit 70, a temperature sensor 80, an A / D conversion circuit 82, a temperature correction value calculation unit 84, and a characteristic determination unit 90. The circuit device 3 may be, for example, a single-chip integrated circuit (IC). In addition, the circuit device 3 may be configured to omit or change some of these elements, or to add other elements.

[0021] The reference voltage circuit 10 generates a constant voltage and a constant current such as reference voltages VR1 and VR2 based on a power supply voltage supplied from a VDD terminal of the circuit device 3 , and supplies the constant voltage and the constant current to the drive circuit 20 and the detection circuit 30 .

[0022] The drive circuit 20 drives the sensor element 2. The drive circuit 20 is electrically connected to the sensor element 2 via the connection pads DS and DG. The drive circuit 20 receives the feedback signal DI from the sensor element 2 via the connection pad DG, and outputs the drive signal DRV corresponding to the feedback signal DI via the connection pad DS, thereby driving the sensor element 2. In addition, the drive circuit 20 generates a detection signal SDET having the same phase as the drive signal DRV, and outputs it to the detection circuit 30.

[0023] The drive circuit 20 can be implemented by various well-known circuits. For example, the drive circuit 20 can be implemented by a structure including a current-voltage converter (I / V converter), a gain control circuit, and two comparators. That is, the AC voltage signal output from the current-voltage converter is converted by each comparator to become a drive signal DRV and a detection signal SDET. The gain control circuit controls the reference voltage of the comparator so that the amplitude of the AC voltage signal input to the comparator generating the drive signal DRV is maintained at a fixed value.

[0024] The detection circuit 30 detects the angular velocity component contained in the AC charge input from the sensor element 2 via the S1 and S2 terminals, and outputs a detection signal Sr as an analog signal having a voltage level corresponding to the magnitude of the angular velocity. The detection circuit 30 can be implemented by various well-known circuits. For example, the detection circuit 30 can be implemented by a structure including a QV amplifier, a differential amplifier, a variable gain amplifier (PGA: Programmable Gain Amplifier), and a synchronous detection circuit. The synchronous detection circuit uses the detection signal SDET to synchronously detect the angular velocity component contained in the signal output from the variable gain amplifier.

[0025] The storage unit 60 includes a register 61 and a nonvolatile memory 62. The register 61 stores addresses and various data used for communication with an external device via the interface circuit 70. The register 61 also stores angular velocity data and angle data output from the DSP 44 described later.

[0026] The nonvolatile memory 62 stores various adjustment data and correction data for the drive circuit 20 and the detection circuit 30, and various information for establishing communication with the outside via the interface circuit 70. The nonvolatile memory 62 can be configured as a MONOS (Metal Oxide Nitride Oxide Silicon) type memory or an EEPROM (Electrically Erasable Programmable Read-Only Memory), for example.

[0027] The interface circuit 70 is electrically connected to the XCS terminal, the SCLK terminal, the SDI terminal, and the SDO terminal, and is a circuit for communicating with an external device via these terminals. In the communication via the interface circuit 70, the external device functions as a master device, and the physical quantity sensor 1 (circuit device 3) functions as a slave device. Furthermore, the external device can write data to a specified address of the register 61, read data from a specified address of the register 61, and send various commands to control the operation of the circuit device 3 via the interface circuit 70.

[0028] The interface circuit 70 can also function as either an SPI (Serial Peripheral Interface) interface circuit or an I2C (Inter-Integrated Circuit) interface circuit. For example, when the XCS terminal is at a low level, the interface circuit 70 functions as an SPI interface circuit, inputs a clock signal via the SCLK terminal, inputs a data signal via the SDI terminal, and outputs a data signal via the SDO terminal. In addition, when the XCS terminal is at a high level, the interface circuit 70 functions as an I2C interface circuit, inputs a clock signal via the SCLK terminal, and inputs and outputs a data signal via the SDI terminal.

[0029] Communication with the external device via the interface circuit 70 is performed based on various information stored in the register 61. Furthermore, the external device can read the angular velocity data from a predetermined address of the register 61 via the interface circuit 70. In this way, the physical quantity sensor 1 (circuit device 3) is configured to be able to output the angular velocity data in response to a request from the external device.

[0030] In the present embodiment, when manufacturing the physical quantity sensor 1, the frequency of the clock signal CLK is determined according to the natural frequency of the sensor element 2, and the sampling frequency fs in the A / D conversion described later is determined according to the frequency of the clock signal CLK. Specifically, at the time of shipment, as in the above-mentioned prior art, when the frequency of the driving signal used to drive the sensor element 2 is fdr and the frequency of the clock signal CLK is fck, it is assumed that j×fdr≠fck / i (i, j are integers greater than 1). When the frequency fck of the clock signal is determined, the frequency that is the same as the frequency fck of the clock signal or is a multiplication of the frequency of the clock signal CLK is set as the sampling frequency fs. The frequency of the clock signal CLK and the sampling frequency fs are stored in the nonvolatile memory 62, and the sampling frequency fs is stored in a predetermined address of the register 61. The user can read the sampling frequency fs stored at the address using an external device.

[0031] In addition, in the present embodiment, digital filtering is performed by the DSP 44 described later. In the present embodiment, the digital filtering includes processing based on an IIR (Infinite impulse response) filter 44c and a second filter 44d. The IIR filter 44c can change the filter characteristics by changing the filter coefficient k. Data for determining the filter coefficient k is stored in the nonvolatile memory 62.

[0032] Specifically, the filter coefficient k is calculated by the calculation formula k=a×(sampling frequency fs)+b, and the first-order coefficient a and the zero-order coefficient b of the calculation formula are stored in the non-volatile memory 62. In addition, when using the IIR filter 44c, the user sets the order n of the filter and the cut-off frequency fc required for the filter. According to the setting, the characteristics of the filter are different, so in this embodiment, the first-order coefficient a and the zero-order coefficient b are configured to change according to the setting of the IIR filter 44c. Figure 2 The example in which the first-order coefficient a and the zero-order coefficient b correspond to the combination of the order n and the cutoff frequency fc of the IIR filter 44 c is shown. Such data is stored in the nonvolatile memory 62 .

[0033] The user uses an external device to write the number of times n and the sampling frequency fs that the user wants to use into a specified address. In this case, the first-order coefficient a and the zero-order coefficient b corresponding to the number of times n and the sampling frequency fs are transferred from the non-volatile memory 62 to the register 61, and the filter coefficient k of the IIR filter 44c is determined by the above calculation formula based on these first-order coefficients a and zero-order coefficients b. The details of the above processing will be described later.

[0034] The oscillation circuit 50 generates a clock signal CLK and outputs the clock signal CLK to the digital processing unit 40. The oscillation circuit 50 includes circuits such as a PLL (Phase Locked Loop) circuit and a DLL (Digital Locked Loop) circuit, and outputs a clock signal CLK having a frequency stored in a storage unit 60. That is, the frequency of the clock signal CLK is stored in the nonvolatile memory 62, and when the physical quantity sensor 1 is activated, the frequency is transferred to the register 61. The oscillation circuit 50 obtains the frequency stored in the register 61, and generates an oscillation signal as the clock signal CLK according to the frequency.

[0035] The digital processing unit 40 is configured to include an A / D (Analog to Digital) conversion circuit 42 and a DSP (Digital Signal Processor) 44 as a signal processing circuit. The A / D conversion circuit 42 operates at a sampling frequency fs synchronized with the clock signal CLK output by the oscillation circuit 50, converts the output signal of the detection circuit 30 into a digital signal (angular velocity data) Da and outputs it. The sampling frequency fs, which is the period at which the A / D conversion circuit 42 converts the analog signal into a digital signal, may be the same as the frequency of the clock signal CLK, or may be a frequency obtained by multiplying the frequency of the clock signal CLK. The A / D conversion circuit 42 can be implemented by various well-known circuits, such as a Δ-Σ type or a successive approximation type A / D conversion circuit.

[0036] The DSP 44 operates synchronously with the clock signal CLK output by the oscillation circuit 50, and performs digital processing including digital filtering processing on the digital signal (angular velocity data) Da output by the A / D conversion circuit 42. The structure of the DSP 44 will be described later. In the digital processing, in addition to the digital filtering processing that allows the signal of a specific frequency band to pass, it also includes digital processing for correcting the changes in the angular velocity data caused by temperature. The value of the angular velocity data after these digital processings represents the angular velocity detected by the sensor element 2, and is updated sequentially at a specified rate. In addition, the DSP 44 can also perform digital processing for correcting the offset of the zero point of the angular velocity data, and digital processing for calculating the angle data by time integration (addition) of the angular velocity data updated sequentially. The angular velocity data output from the DSP 44 is stored in the register 61, and is transmitted to an external device, etc., for example, via the interface circuit 70.

[0037] The temperature sensor 80 is a sensor that outputs a signal (temperature signal) of a voltage level corresponding to the temperature of its surroundings. It can be a positive polarity sensor whose output voltage increases as the temperature increases, or a negative polarity sensor whose output voltage decreases as the temperature increases. The temperature sensor 80 can also be a circuit that outputs a voltage proportional to the absolute temperature (PTAT (Proportional To Absolute Temperature) voltage). The temperature signal output from the temperature sensor 80 is input to the A / D conversion circuit 82.

[0038] The A / D conversion circuit 82 operates synchronously with the clock signal CLK output by the oscillation circuit 50, converts the signal output by the temperature sensor 80 into a digital signal (temperature data) and outputs it. The period at which the A / D conversion circuit 82 converts the analog signal into a digital signal, i.e., the sampling frequency fs, can be the same as the frequency of the clock signal CLK, or can be the frequency after multiplying the clock signal CLK. The A / D conversion circuit 82 can be implemented by various well-known circuits, for example, it can be a Δ-Σ type or a successive approximation type A / D conversion circuit. The signal output from the A / D conversion circuit 82 is input to the temperature correction value calculation unit 84.

[0039] The temperature correction value calculation unit 84 calculates and outputs the temperature correction value Ta based on the signal output by the A / D conversion circuit 82. The temperature correction value Ta can be calculated by various methods, for example, a method of calculating the temperature correction value Ta by a function with temperature as a variable, a method of obtaining the temperature correction value Ta corresponding to the temperature based on the information stored in the storage unit 60, etc. The temperature correction value Ta output from the temperature correction value calculation unit 84 is input to the DSP 44. The temperature correction value calculation unit 84 can be any circuit that performs digital processing, for example, it can be implemented by various integrated circuits such as a CPU, or by an FPGA (Field Programmable Gate Array) or the like.

[0040] The characteristic determination unit 90 is a digital circuit that determines the characteristics of the digital filter processing based on the individual data. Specifically, the characteristic determination unit 90 is a digital circuit that performs processing to determine the filter characteristics of the IIR filter 44c described later that the DSP 44 has. The characteristic determination unit 90 obtains the first-order coefficient a and the zero-order coefficient b corresponding to the setting of the IIR filter 44c set by the user, that is, the order n and the cut-off frequency fc from the register 61. In addition, the characteristic determination unit 90 obtains the sampling frequency fs as the individual data inherent to the sensor element 2 from the register 61. Then, the characteristic determination unit 90 substitutes the obtained first-order coefficient a, zero-order coefficient b and sampling frequency fs into the calculation formula k=a×(sampling frequency fs)+b to determine the filter coefficient k. The determined filter coefficient k is input to the IIR filter 44c of the DSP 44. In addition, the characteristic determination unit 90 can be any circuit that performs digital processing, for example, it can be implemented by various integrated circuits such as a CPU, or it can be implemented by an FPGA or the like.

[0041] 1.1 DSP Structure

[0042] Next, the structure of the DSP 44 will be described in detail. Figure 3 4 is a block diagram showing the structure of the DSP 44. The DSP 44 includes a temperature correction unit 44a, a notch filter 44b, an IIR filter 44c, and a second filter 44d. The temperature correction unit 44a corrects the digital signal Da based on the temperature correction value Ta output by the temperature correction value calculation unit 84. The temperature correction value Ta is a value for canceling the change in the output of the sensor element 2 caused by the temperature. In the present embodiment, the temperature correction unit 44a corrects the digital signal Da by performing a predetermined operation based on the temperature correction value Ta, such as Da+Ta, on the digital signal Da.

[0043] The notch filter 44b is a digital filter that attenuates a signal of a specific frequency band in the input signal and outputs it. The notch filter 44b can be used for various purposes, for example, it can be used to attenuate a signal of a frequency band of noise that may be generated in the sensor element 2 under certain conditions (for example, a signal of an offset frequency). The notch filter 44b can be implemented by various structures, for example, by adjusting Figure 4 The filter coefficients of the filter shown are implemented.

[0044] Figure 4 The filter shown is a filter constructed by repeating two units. The first unit is composed of elements 44b1 to 44b11. The second unit is composed of elements 44b12 to 44b22. The first unit and the second unit are connected in series. Figure 4 In the example shown, the delay units 44b5 and 44b6 add unit delays to the input signals and output them. The multiplication units 44b7 to 44b11 multiply the input signals by coefficients and output them. The coefficients of the multiplication units 44b7 to 44b11 are Figure 4 The multiplication units 44b7 to 44b11 respectively indicate a10 to b12. The addition units 44b1 to 44b4 respectively indicate Figure 4 The input signals shown are given the signs shown in the figure, added and output.

[0045] Therefore, if it is Figure 4 In the example shown, the adding unit 44b1 adds the input signal and the signal obtained by making the feedback signal negative and outputs the sum. The signal output from the adding unit 44b1 is delayed by the delay units 44b5 and 44b6. The signal delayed by the delay unit 44b5 is input to the multiplying units 44b7 and 44b10 and the delay unit 44b6. The signal delayed by the delay unit 44b6 is input to the multiplying units 44b8 and 44b11.

[0046] The signals input to the multiplication units 44b7 and 44b8 are multiplied by the coefficients b11 and b12, added by the addition unit 44b2, and input to the addition unit 44b1. The signals input to the multiplication units 44b10 and 44b11 are multiplied by the filter coefficients a11 and a12, added by the addition unit 44b4, and input to the addition unit 44b3. The addition unit 44b3 receives the signal obtained by multiplying the output of the addition unit 44b1 by the filter coefficient a10 by the multiplication unit 44b9. The addition unit 44b3 outputs the sum of the two input signals.

[0047] The second unit is composed of the same elements as the first unit. However, the filter coefficients used may be different. Figure 4The filter shown in FIG. 1 is a filter having various characteristics by adjusting the filter coefficients a10, a11, a12, b11, b12, a20, a21, a22, b21, and b22. In this embodiment, the filter coefficients are predetermined so that Figure 4 The filter shown functions as a notch filter that attenuates a signal in a specific frequency band. These filter coefficients are stored in the nonvolatile memory 62, and when the physical quantity sensor 1 is activated, the filter coefficients are transferred to the register 61. Then, the filter coefficients stored in the register 61 are obtained by the notch filter 44b, and the filter coefficients of the notch filter 44b are determined.

[0048] The IIR filter 44c is a filter that performs digital filtering processing to pass signals of a specific frequency band in the input signal. The IIR filter 44c can be used for various purposes. For example, when the sensor element 2 measures the angular velocity and performs a predetermined process based on the measured angular velocity, it can be used to pass signals of a frequency band required for the predetermined process and attenuate signals of other frequency bands. That is, it can be used as a low-pass filter, a high-pass filter, or a band-pass filter.

[0049] The IIR filter 44c can be implemented by various structures, such as by repeating Figure 5 It is composed of the unit filter shown. Figure 5 The example shown shows one unit of the filter constituting the IIR filter 44c. The filter of this unit includes adders 44c1 to 44c3, a delay unit 44c4, and multipliers 44c5 and 44c6. The adders 44c1 to 44c3 add the input signals with the signs shown in the figure and output them. The delay unit 44c4 adds a unit delay to the input signal and outputs it. The multipliers 44c5 and 44c6 multiply the input signals by coefficients and output them. The coefficients of the multipliers 44c5 and 44c6 are Figure 5 The k and 0.5 are shown in the multiplication parts 44c5 and 44c6 respectively.

[0050] Therefore, if it is Figure 5 In the example shown, the adding unit 44c1 adds the input signal and the signal after making the feedback signal (the output signal of the delay unit 44c4) negative and outputs it. The output signal is multiplied by k by the multiplying unit 44c5 and input to the adding unit 44c2. The adding unit 44c2 adds the output signal of the multiplying unit 44c5 and the feedback signal (the output signal of the delay unit 44c4) and outputs it. The adding unit 44c3 adds the output signal of the adding unit 44c2 and the feedback signal (the output signal of the delay unit 44c4) and outputs it. Then, the output of the adding unit 44c3 is multiplied by 0.5 by the multiplying unit 44c6 to become the output signal of the IIR filter 44c.

[0051] The IIR filter 44c is obtained by connecting a plurality of Figure 5 A digital filter is constructed by combining the unit filters shown in FIG.

[0052] The transfer function of such a digital filter can be expressed by the following equation (1).

[0053]

[0054] Here, 1 / z is the transfer function of the time delay element (e.g., delay unit 44c4), k is the filter coefficient k of the multiplication unit 44c5 in the unit filter, and n is the order (the number of serial repetitions of the unit filter). The IIR filter 44c of this example can be used as a filter with various characteristics, such as a low-pass filter.

[0055] When using the sensor element 2, the user may have various needs. For example, there may be a situation where the information to be extracted from the signal output by the sensor element 2 is information of a specific frequency band, and the information of the specific frequency band is not needed. This is because the information of the unnecessary frequency band becomes noise. In this case, the user has a need to extract information about the desired frequency band, that is, to select a frequency band with a desired gain. In addition, there is sometimes a need to set the phase change characteristics and group phase change characteristics when the IIR filter 44c acts to a desired range.

[0056] Therefore, in the present embodiment, the filter characteristics of the IIR filter 44c can be set by the user. Specifically, the user can specify the order n and the cut-off frequency fc, and set the IIR filter 44c to the filter characteristics desired by the user. That is, if the cut-off frequency fc is specified, the frequency at which the gain is attenuated by 3dB in the IIR filter 44c can be specified, and the user can specify the desired frequency band. Moreover, even for a filter with the same cut-off frequency fc, if the order n is set to a high order, the attenuation characteristics of the gain also become steep, so the user can specify the desired attenuation characteristics.

[0057] As described above, in this embodiment, the characteristics of the IIR filter 44c are specified by the order n and the cutoff frequency fc. Here, the filter characteristics are determined by the transfer function shown in the above equation (1), and 1 / z included in the transfer function depends on the sampling frequency fs. Figure 6 It is a diagram illustrating the gain of the second-order IIR filter 44c. Figure 6The graph is a graph with gain (dB) on the vertical axis and frequency (Hz) on the horizontal axis, and shows the gain of the filter of the transfer function shown in equation (1) for multiple sampling frequencies fs. The solid line represents the gain when the sampling frequency fs is 11000 Hz, the dotted line represents the gain when the sampling frequency fs is 12000 Hz, the single-dot chain line represents the gain when the sampling frequency fs is 12500 Hz, and the double-dot chain line represents the gain when the sampling frequency fs is 13000 Hz.

[0058] like Figure 6 As shown in FIG. 1 , when the sampling frequency fs is different, even the IIR filter 44c with the same order n has different filter characteristics. Therefore, for example, even if the filter coefficient k is determined by using the frequency f1 at which the gain is attenuated by 3dB when the sampling frequency fs is 11000Hz as the cutoff frequency fc, when the sampling frequency fs changes, the gain may not be attenuated by 3dB at the frequency f1 when the same filter coefficient k is used. In this way, the filter characteristics may also depend on the sampling frequency fs with respect to the phase delay characteristics and the group delay characteristics.

[0059] In particular, in the present embodiment, the sampling frequency fs is a value determined by the frequency fck of the clock signal, which is determined by the frequency fdr of the drive signal of the sensor element 2. Therefore, the sampling frequency fs is individual data that is different for each individual sensor element 2. If the individual physical quantity sensor 1 is different, it may operate at a different sampling frequency fs. Therefore, the sampling frequency fs is a value that cannot be determined by the user.

[0060] In this way, when the sampling frequency fs may be different for each individual, if the fixed filter coefficient k corresponding to the order and the cutoff frequency fc is used identically in all individuals, the filter characteristics desired by the user may be obtained in a certain individual, but may not be obtained in other individuals.

[0061] Therefore, in this embodiment, the filter coefficient k is determined according to the order n, the cutoff frequency fc and the sampling frequency fs, and the filter coefficient k is calculated so that the characteristics of the IIR filter 44c are constant regardless of the sampling frequency fs. In order to perform this calculation, the inventors of the present application have found that the filter coefficient k can be described as a function of the sampling frequency fs.

[0062] Specifically, the inventors of the present application have found that the filter coefficient k changes linearly with respect to the sampling frequency fs in an assumed frequency band. Therefore, in the present embodiment, the characteristic determination unit 90 is configured to determine the filter coefficient k using a linear expression of the sampling frequency.

[0063] Figure 7: is a graph showing the relationship between the sampling frequency fs and the filter coefficient k, with the sampling frequency fs (Hz) as the horizontal axis and the filter coefficient k as the vertical axis. Figure 7 , the value of the filter coefficient k in a part of the frequency band (11000 Hz to 13000 Hz) of the sampling frequency fs assumed in this embodiment is shown. Figure 7 In FIG. 1 , the filter coefficients k set so that the cutoff frequency fc of the filter characteristic of the IIR filter 44c is the same (the error is within a range below a predetermined reference) are connected by straight lines. For example, the plotted points shown by symbol C1 represent the values ​​of the filter coefficients k for setting the cutoff frequency fc of the IIR filter 44c to the same value at each sampling frequency fs.

[0064] exist Figure 7 In the example, multiple plotted points are connected by multiple straight lines, but in each straight line, the combination of the order n and the cutoff frequency fc of the IIR filter 44c is different. Specifically, for each combination where the order n is changed to 2, 3, and 4 and the cutoff frequency fc is changed to 1, 10, 25, 50, 100, 200, 400, and 500 Hz, the plot is as follows: Figure 7 In addition, Figure 7 In the figure, the straight lines that overlap the parts in the drawing are omitted and not shown.

[0065] according to Figure 7 It can be seen that, in each combination of arbitrary order n and cutoff frequency fc, the filter coefficient k for making the filter characteristic of the IIR filter 44c the same value changes approximately linearly with respect to the change of the sampling frequency fs. Therefore, in this embodiment, the characteristic determination unit 90 is configured to determine the filter coefficient k by a linear expression of the sampling frequency.

[0066] Specifically, the characteristic determination unit 90 determines the filter coefficient k based on the calculation formula k=a×(sampling frequency fs)+b. The sampling frequency fs is stored in the nonvolatile memory 62, and is transmitted and stored in the register 61 after the physical quantity sensor 1 is activated. Therefore, the characteristic determination unit 90 refers to the register 61 to determine the sampling frequency fs as separate data.

[0067] The first-order coefficient a and the zero-order coefficient b depend on the order n and the cutoff frequency fc. Therefore, as mentioned above Figure 2 As shown, the first-order coefficient a and the zero-order coefficient b are stored in correspondence with the combination of the order n and the cutoff frequency fc in the nonvolatile memory 62. In addition, the user grasps the order n and the cutoff frequency fc that the user wishes to use, for example, using a simulator, and writes the order n and the cutoff frequency fc that the user wishes to use into a predetermined address of the register 61 using an external device.

[0068] The characteristic determination unit 90 refers to the register 61 and transfers the first-order coefficient a and the zero-order coefficient b corresponding to the combination of the order n and the cutoff frequency fc from the nonvolatile memory 62 to the register 61. The characteristic determination unit 90 refers to the register 61 and determines the transferred first-order coefficient a and zero-order coefficient b. Then, the characteristic determination unit 90 substitutes the obtained sampling frequency fs, the first-order coefficient a, and the zero-order coefficient b into the calculation formula k=a×(sampling frequency fs)+b to obtain the filter coefficient k.

[0069] The characteristic determination unit 90 outputs the filter coefficient k to the IIR filter 44c. In addition, the characteristic determination unit 90 determines the order n by referring to the register 61, and outputs the order n to the IIR filter 44c. When the IIR filter 44c obtains the filter coefficient k and the order n, the gain of the multiplication unit 44c5 is set to the obtained filter coefficient k, and the filter after the setting is repeated n times. As a result, the filter coefficient k corresponding to the sampling frequency fs set according to each sensor element 2 is determined, the order of the IIR filter 44c becomes the order n specified by the user, and the filter characteristic becomes the cutoff frequency fc specified by the user.

[0070] The second filter 44d is a filter that performs a digital filtering process (the second digital filtering process) that passes a signal of a specific frequency band in an input signal. In the present embodiment, a user can determine the filter characteristics of the second filter 44d. The second filter 44d can be used for various purposes, for example, it can be used to attenuate a band that will remain even if a digital filtering process based on an IIR filter 44c is performed. More specifically, by making the IIR filter 44c function as a low-pass filter, and making the second filter 44d function as a high-pass filter, it is possible to use it as a purpose of making the two together to form a bandpass filter.

[0071] The second filter 44d can be implemented by various filters capable of adjusting filter characteristics, for example, by an IIR filter. More specifically, for example, Figure 4 The first unit of the filter shown in FIG. 4 constitutes the second filter 44d. Of course, the first unit and the second unit may be connected in series. Figure 4 The same structure can also be used to increase the number of units connected in series.

[0072] In short, the second filter 44d can be made into a filter having various filter characteristics by adjusting the filter coefficient. Figure 4 When the first unit structure shown is the second filter 44d, the second filter 44d can be made into filters with various characteristics by adjusting the filter coefficients a10, a11, a12, b11, and b12.

[0073] In this embodiment, the user can determine the filter coefficient of the second filter 44d. That is, the user determines the filter coefficient in order to make the characteristics of the second filter 44d become the desired characteristics. The filter coefficient can be determined by various methods. For example, the user can determine the filter coefficient using simulator software started in an external device.

[0074] Specifically, the transfer function can be determined based on the digital circuit structure of the second filter 44d. Figure 4 When the first unit shown in the figure constitutes the second filter 44d, the transfer function becomes the following equation (2).

[0075]

[0076] Here, 1 / z is a transfer function of a time delay element (eg, delay unit 44c4). The second filter 44d of this example can be used as filters of various characteristics, such as a low-pass filter, a high-pass filter, a band-pass filter, a band-stop filter, etc., by adjusting the filter coefficient.

[0077] The user adjusts the value of the filter coefficient in the transfer function shown in equation (2) and simulates the gain, phase change characteristics, and group phase change characteristics in an external device. However, as described above, 1 / z included in the transfer function depends on the sampling frequency fs. Therefore, in order to accurately perform the simulation, the user needs to obtain the sampling frequency fs as separate data.

[0078] In this embodiment, the sampling frequency fs can be read out as separate data by using an external device. Specifically, the user operates the external device and sends a read command for the sampling frequency fs. When the interface circuit 70 receives the command, for example, the DSP 44 sends the sampling frequency fs stored in the register 61 to the external device via the interface circuit 70. As a result, the user can read out the sampling frequency fs. When the sampling frequency fs is obtained, the user can use the obtained sampling frequency fs and use simulator software to calculate the transfer function in any filter coefficient. As a result, the gain, phase change characteristics, and group phase change characteristics can be accurately simulated in the external device.

[0079] When the filter coefficient for providing the desired filter characteristic is obtained, the user transmits the filter coefficient to the physical quantity sensor 1 using an external device. That is, the user operates the external device to send information indicating the filter coefficient. In the physical quantity sensor 1, the filter coefficient is obtained via the interface circuit 70. The interface circuit 70 writes the obtained filter coefficient into the register 61. The second filter 44d obtains the filter coefficient by referring to the register 61, and sets the value of each filter in the second filter 44d so as to operate with the obtained filter coefficient. As a result, the second filter 44d can perform the second digital filter processing that becomes the filter characteristic desired by the user.

[0080] The digital signal after the second digital filtering process by the second filter 44d is output from the DSP 44 as a corrected digital signal Da' representing the detection result (angular velocity data) detected by the sensor element 2. The output method is not limited, and the DSP 44 may output the generated digital signal Da' to an external device using the interface circuit 70, or may store it in the storage unit 60. In this case, the digital signal Da' is output to the external device via the interface circuit 70 in accordance with a request from the external device at an arbitrary timing.

[0081] 2. Other implementation methods, etc.

[0082] The above-mentioned embodiments are examples for implementing the present invention, and various embodiments can be adopted in addition. For example, the processing order of DSP 44 is not limited to the processing order in the above-mentioned embodiments, and can also be the processing order of notch filter 44b, second filter 44d, IIR filter 44c, etc., and the processing order can also be changed arbitrarily. In addition, notch filter 44b and second filter 44d can be omitted as needed. Of course, other digital filtering processes can also be added. In addition, the filter coefficient of notch filter 44b can also be selected by the user. In addition, it can also be a structure in which the filter coefficients of notch filter 44b and second filter 44d change according to sampling frequency fs.

[0083] The A / D conversion circuit only needs to be able to perform A / D conversion on the signal output from the sensor element. That is, since the sensor element outputs an analog signal, the A / D conversion circuit only needs to be able to convert the detection value of the physical quantity indicated by the analog signal into a digital signal. In addition, the signal input to the A / D conversion circuit may be the signal output from the sensor element itself, or may be a signal after various processing has been performed on the signal output from the sensor element.

[0084] The signal processing circuit only needs to be able to perform digital filtering processing on the digital signal output from the A / D conversion circuit. That is, the signal processing circuit performs various digital filtering processing on the digital signal representing the detection result of the sensor element. As a result, for example, a signal in a state that is easy to process for use outside the physical quantity sensor can be obtained. The digital filtering processing can be various processing, not limited to the processing in the above-mentioned embodiment. For example, the above-mentioned notch filter, the second digital filter, etc. can also be omitted. In addition, other filters can also be added. In addition, the order of the digital filtering processing is not limited, and the digital filtering processing can also be performed in various orders.

[0085] The storage circuit only needs to be able to store individual data corresponding to the sampling frequency of the digital filtering process. That is, the storage circuit stores individual data of at least one of the sampling frequency itself, which is an inherent value reflecting the individual difference of the sensor element, or a value determined according to the sampling frequency. The latter value may be a sampling period, etc., or a value obtained by converting the sampling frequency, or a value used to calculate the sampling frequency.

[0086] The characteristic determination unit can determine the characteristics of the digital filtering process based on the individual data. The characteristics of the digital filtering process are the input-output characteristics of the digital filtering process. In the digital filtering process with variable input-output characteristics, the characteristics can be changed by any method. In the above example, the filter coefficient k is determined by a linear equation of the sampling frequency to determine the filter characteristics, but it is not limited to such a structure. For example, the filter coefficient can also be determined based on an equation of more than two degrees.

[0087] In addition, in the above-mentioned embodiment, the characteristic determination unit determines the filter coefficient k that fixes the characteristics of the IIR filter regardless of the sampling frequency. In this case, the characteristics of the IIR filter are fixed in a manner that is the same as the cut-off frequency fc. This structure is an example, and the index representing the characteristics of the filter is not limited to the cut-off frequency fc. For example, the filter coefficient k can also be set in a manner that becomes a fixed attenuation at a specific frequency different from the cut-off frequency fc. In addition, the filter coefficient k can also be set with various indicators to fix the gain characteristics, and the filter coefficient k can also be set in a manner that the phase change characteristics and the group phase change characteristics are fixed.

[0088] The interface circuit only needs to be configured to read out individual data, but may also be configured to read out other data, or may be configured to write in other data. The read data and the written data are stored in the storage circuit.

[0089] The above-mentioned embodiment is an example and is not limited thereto. The present invention includes a structure substantially the same as the structure described in the embodiment (for example, a structure with the same function, method and result, or a structure with the same purpose and effect). In addition, the present invention includes a structure that replaces a non-essential part of the structure described in the embodiment. In addition, the present invention includes a structure that has the same effect as the structure described in the embodiment or a structure that can achieve the same purpose. In addition, the present invention includes a structure to which a known technology is added to the structure described in the embodiment.

Claims

1. A circuit device comprising: An A / D conversion circuit that performs A / D conversion on a signal output from the sensor element; a signal processing circuit for performing digital filtering on the digital signal output from the A / D conversion circuit; a storage circuit that stores individual data corresponding to a sampling frequency of the digital filtering process; and A characteristic determination unit determines a characteristic of the digital filter processing based on the individual data.

2. The circuit arrangement according to claim 1, wherein: The digital filter processing includes an IIR filter using a filter coefficient k, and the characteristic determination unit determines the filter coefficient k using a linear equation of the sampling frequency.

3. The circuit arrangement according to claim 2, wherein: The storage circuit stores the a and the b in a calculation formula k=a×(the sampling frequency)+b for calculating the filter coefficient k for making the characteristics of the IIR filter constant regardless of the sampling frequency, according to each setting of the IIR filter. The characteristic determination unit acquires the a and the b corresponding to the setting of the IIR filter and the sampling frequency as the separate data, and determines the filter coefficient k based on the calculation formula based on the acquired a, the b and the sampling frequency.

4. The circuit arrangement according to claim 1, wherein: The circuit device further includes an interface circuit configured to be able to read the individual data.

5. The circuit arrangement according to claim 1, wherein: The signal processing circuit performs a second digital filtering process, The circuit device includes an interface circuit configured to be able to write filter coefficients of the second digital filter processing into the storage circuit.

6. The circuit arrangement according to claim 5, wherein: The second digital filter processing is performed by an IIR filter.

7. A physical quantity sensor comprising: Sensor elements; An A / D conversion circuit that performs A / D conversion on a signal output from the sensor element; a signal processing circuit for performing digital filtering on the digital signal output from the A / D conversion circuit; a storage circuit that stores individual data corresponding to a sampling frequency of the digital filtering process; and A characteristic determination unit determines a characteristic of the digital filter processing based on the individual data.

8. The physical quantity sensor according to claim 7, wherein: The physical quantity sensor further includes a drive circuit that drives the sensor element. The signal output from the sensor element is a signal corresponding to the angular velocity detected by the sensor element.

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