A multi-threaded microcode control circuit for a chip

Abstract

The present invention provides a multi-threaded microcode control circuit for a chip, comprising a port, wherein the port is used for signal input; the input signal of the port is input into an input multiplexer, and the input multiplexer is used for selecting the input signal; a logic operation unit, which is used to receive the output signal of the input multiplexer and output the operation result to the microcode control circuit to execute the next operation; a storage module, which stores microcode instructions, and the microcode instructions are called and executed by the microcode control circuit; a data output module, which is used to implement output assignment operations. The microcode control of the present invention has the advantages of small circuit size and high flexibility, and at the same time has powerful customization functions, and can well execute kernel monitoring and configuration operations.

Description

Technical Field

[0001] The invention belongs to the technical field of integrated circuit design, and in particular relates to a multi-threaded microcode control circuit for a chip. Background Art

[0002] Field Programmable Gate Array (FPGA) is a large-scale programmable device that solves the problem of customized circuits. Users can describe the required functions through hardware description language, and then compile the description language into a bit stream file through software to finally configure the FPGA. Field Programmable Gate Array (FPGA) has the advantages of being programmable, reconfigurable, and easy to use, and is widely used in various fields.

[0003] With the improvement of chip manufacturing technology and the large-scale application of large-capacity FPGAs, more IP cores will be integrated inside high-end FPGA chips, such as DDR, Serdes, Mipi, PCIE, etc. These IP cores need to be flexibly configured during the power-on process. Sometimes it is necessary to monitor the status registers related to these IP cores in real time and then make corresponding settings.

[0004] At the same time, the FPGA also needs to have a corresponding code stream download process during the power-on process. The download process cannot be interrupted, and interrupt reporting and other tasks are required; when the FPGA chip is taped out, it is sometimes necessary to apply patches, etc. The above tasks require a controller to control, but the general FPGA does not have an integrated MCU. If an MCU is added to achieve these tasks, the chip manufacturing cost will increase sharply.

[0005] Not only in FPGA applications, but also in more complex SoC chips, which integrate multiple cores, space utilization is of extremely high value for such chips, and it is very necessary to realize core control inside the chip by designing simple control circuits.

[0006] Therefore, it is necessary to design an embedded microcode control circuit, which needs to have a simple structure, low cost and high efficiency, and can monitor, configure and schedule the core in the chip. Summary of the invention

[0007] The present invention provides a multi-threaded microcode control circuit for a chip, which has high flexibility, high scalability and flexible and changeable output, and can execute functions such as judgment, jump, and assignment in the chip.

[0008] Other purposes and advantages of the present invention can be further understood from the technical features disclosed in the present invention.

[0009] To achieve one or part or all of the above purposes or other purposes, a technical solution of the present invention provides a multi-threaded microcode control circuit for a chip, including a port, which is used for signal input; the input signal of the port is input into an input multiplexer, and the input multiplexer is used to select the input signal; a logic operation unit, which is used to receive the output signal of the input multiplexer and output the operation result to the microcode control circuit to execute the next operation; a storage module, which stores microcode instructions, and the microcode instructions are called and executed by the microcode control circuit; a data output module, which is used to implement output assignment operations. The beneficial effect of the technical solution is that the microcode control circuit of the present invention is integrated in the chip, including a signal input port, a calculation module, a storage module and a data output module, and the storage module stores instructions for the microcode control circuit to realize the output function. The microcode control circuit provided by the present invention is integrated in the chip, including a signal input port, a calculation module, a storage module and a data output module, and the storage module stores instructions for the microcode control circuit to realize the output function. The microcode control circuit of the present invention selects based on the input signal and sends it to the logic operation unit for logical operation, and then performs the instruction fetch operation. After the fetched instruction is executed, a corresponding operation command is generated, wherein the assignment operation is used for the assignment of data output, and these assignment outputs can be fed back to the register of the kernel to realize the configuration of the kernel, thereby realizing the kernel monitoring and control functions in the chip. The microcode control of the present invention has the advantages of small circuit volume and high flexibility, and at the same time, the customization function is powerful, and the kernel monitoring and configuration operations can be well executed.

[0010] It also includes a token management module, which generates a management token according to the output value of the data output module, and further controls the switching of threads of the microcode control circuit.

[0011] The microcode control circuit has one initial thread.

[0012] The microcode control circuit includes a main thread, and the token management module controls the microcode control circuit to switch multiple threads in the main thread.

[0013] It also includes an input switching module, which switches the input signal according to the output of the microcode control circuit.

[0014] The microcode control circuit has multiple groups of inputs, and the input switching module is used for switching the multiple groups of inputs.

[0015] The output module has multiple groups of outputs, and values ​​are assigned to outputs of different groups by selecting signal switching.

[0016] The input multiplexer groups the input signals and then separates specific bits from the signals in the groups for output.

[0017] The storage module includes a ROM module and a RAM module, instructions are placed in the ROM module and the RAM module, breakpoints are set between the ROM module and the RAM module, and when the address of the ROM module matches the breakpoint address, the memory module automatically jumps to the address of the RAM module.

[0018] The microcode control circuit fetches instructions from the ROM module or the RAM module based on the operation result of the logic operation unit;

[0019] The instructions include assignment instructions and jump instructions, and the assignment instructions assign values ​​to the data output module;

[0020] The jump instruction assigns the next jump address to the microcode control circuit, changing the input of the encoding control circuit.

[0021] Assignment instructions include output assignment, timer assignment, and input / output selection assignment;

[0022] The output assignment directly assigns values ​​to output variables;

[0023] The timer assignment starts an external counter, and the full count signal of the counter is used as an input of the microcode control circuit;

[0024] The input and output selection assignment is to select the input and output of the microcode controller through an assignment operation.

[0025] Compared with the prior art, the beneficial effects of the present invention mainly include: 1. The multi-threaded microcode control circuit of the present invention is different from the MCU controller. It does not need to perform complex calculations and is used for logic control and status monitoring. It occupies a small area and has low power consumption. It not only does not affect the internal layout of the chip, but also the logic control and status monitoring functions realized by the microcode control circuit can enable the chip to meet most application scenarios, making the chip more flexible to use.

[0026] 2. The chip microcode control circuit of the present invention integrates a main thread, and multiple threads are switched in one main thread. Through multi-threaded operation, the microcode controller of the present invention can be well expansible, and can execute multiple tasks at the same time or improve the executed tasks in time. At the same time, the storage module of the present invention is composed of a ROM module and a RAM module. When breakpoint protection is set externally, the ROM module address can be jumped to the RAM address to achieve the effect of patching. The microcode control circuit of the present invention has the advantages of flexible operation and good expansibility.

[0027] 3. After power-on, the multi-threaded microcode controller of the present invention can still monitor the status of each core in real time and report and record the results. When the status of the core changes, the configuration registers of the core can be configured through the multi-threaded microcode controller to meet real-time application requirements, thereby having powerful customization performance.

[0028] In order to make the above and other purposes, features and advantages of the present invention more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the technical solutions in the specific embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0030] Figure 1 Schematic diagram of the microcode circuit of the present invention. DETAILED DESCRIPTION

[0031] The above and other technical contents, features and effects of the present invention will be clearly presented in the following detailed description of a preferred embodiment with reference to the drawings. The directional terms mentioned in the following embodiments, such as up, down, left, right, front or back, etc., are only referenced to the directions of the attached drawings. Therefore, the directional terms used are used to illustrate and not to limit the present invention.

[0032] Example 1

[0033] Embodiment 1 provides a multi-threaded microcode control circuit for a chip, including a port, the port is used for signal input; the input signal of the port is input into an input multiplexer, the input multiplexer is used for input signal selection; a logic operation unit, used to receive the output signal of the input multiplexer, and output the operation result to the microcode control circuit to perform the next operation; a storage module, storing microcode instructions, the microcode instructions are called and executed by the microcode control circuit; a data output module, used to implement output assignment operations.

[0034] The microcode control circuit provided in Example 1 is integrated in the chip, including a signal input port, an operation module, a storage module and a data output module. The storage module stores instructions for the microcode control circuit to realize the output function. The microcode control circuit of the present invention selects based on the input signal and sends it to the logic operation unit for logic operation, and then performs the instruction fetch operation. After the fetched instruction is executed, a corresponding operation command is generated, wherein the assignment operation is used for the assignment of data output. These assignment outputs can be fed back to the register of the kernel to realize the configuration of the kernel, thereby realizing the kernel monitoring and control functions in the chip. The microcode control of the present invention has the advantages of small circuit volume and high flexibility, and at the same time, it has powerful customization function and can well perform kernel monitoring and configuration operations.

[0035] The following is combined with Figure 1 A multi-threaded microcode control circuit for a chip provided in this embodiment 1 is specifically explained:

[0036] See also Figure 1 The microcode control circuit includes multiple ports. Each port on the microcode control circuit can input status signals of different cores or monitoring values ​​of registers. The port signals are input into the microcode controller. The input port signals need to be selected before the operation is performed. An input multiplexer INPUTMUX is set in the microcode control circuit. The input multiplexer INPUT MUX is used for switching operations of input signals. Specifically, the input signal is a two-dimensional array. Before the logical operation, it is necessary to first divide the specific groups and then divide the specific bits from the groups. After the selection of the input multiplexer INPUT MUX, the output 2-bit signal is sent to the logic operation unit for logical operation. Since the microcode control circuit does not need to have strong computing power, the logic operation unit here only needs to perform logical operations such as logical AND and logical OR on the input signal. The result output by the logic operation unit is fed back to the microcode controller for the next operation.

[0037] The next step here is to take out the instruction from the storage module. After taking out the corresponding instruction, the instruction includes an address jump instruction and an assignment operation instruction. The microcode control circuit executes the corresponding instruction operation, and the instruction operation executed by the microcode control circuit includes an address jump operation or an assignment operation. The assignment operation here mainly acts on the data output module Output data, specifically, assigning a value to the output of the data output module Output data. The assigned value can be used to configure the register of the kernel and control the kernel to implement the corresponding function.

[0038] The jump operation controls the next jump address of the microcode controller, determines the port for the next operation, and controls the microcode controller to select the corresponding input signal.

[0039] In order to facilitate the switching of threads in the microcode control circuit, a token management module Token Gen is set on the microcode control circuit. The token management module receives the output value of the data output module and then generates a management token. The priority or scheduling strategy of the task can be set in the management token. The multi-threaded microcode controller of the present invention can monitor multiple cores, IP cores and the chip itself in real time. The management token generated by the token management module can switch the threads of the microcode control circuit, and different cores, IP cores and chips can be configured as needed.

[0040] As an optional method, the microcode control circuit has one initial thread, and the microcode control circuit includes a main thread. The token management module controls the microcode control circuit to switch multiple threads in one main thread. After the microcode control circuit is powered on, it automatically selects a thread path as the execution starting point of the microcode control circuit by default, so as to read instructions. This path is used to perform system initialization and other necessary startup tasks. Without additional input, the microcode control circuit can also start and run in a predictable way.

[0041] An input switching module Input page sel is also set on the microcode control circuit. The input switching module is used for switching input signals. The microcode control circuit has multiple groups of inputs, each group of inputs has many bit signals, and the input switching module is used for switching multiple groups of inputs. When switching data inputs, the microcode control circuit can read and execute instructions, and send corresponding operation commands to the input switching module to switch multiple groups of inputs.

[0042] As an optional method, assignment instructions can be divided into output assignment, timer assignment, input / output selection assignment, etc. Output assignment is to directly assign values ​​to output variables; timer assignment is to start an external counter and use the full signal of the counter as the input of the microcode control circuit; input / output selection assignment is to select the input and output of the microcode controller through assignment operations.

[0043] Among them, the output module has multiple groups of outputs. By selecting signal switching, different groups of outputs can be assigned values, or different groups of outputs can be assigned different values.

[0044] As an optional method, the input multiplexer groups the input signals and then separates specific bits from the signals in the group for output, thereby achieving selection of the input signals.

[0045] As an optional method, the storage module includes a ROM module and a RAM module, and instructions are placed in the ROM module and the RAM module, and a breakpoint is set between the ROM module and the RAM module. When the external breakpoint protection function is set, when the ROM address matches the breakpoint address, the memory module automatically jumps to the address of the RAM module. In particular, when a problem occurs in the ROM module, the ROM address is jumped to the RAM address by setting a breakpoint, so as to achieve the purpose of patching.

[0046] The microcode control circuit takes out instructions from the ROM module or the RAM module based on the operation result of the logic operation unit; the instructions stored in the ROM module or the RAM module include assignment instructions and jump instructions, and the assignment instructions assign values ​​to the data output module, that is, the output assignment, timer assignment, input and output assignment and other assignment methods mentioned above;

[0047] The jump instruction assigns the next jump address of the microcode control circuit. The jump instruction will assign the next jump address of the multi-threaded microcode controller, thereby determining the entry of the next behavior and changing the input of the encoding control circuit.

[0048] Through jump instructions and assignment instructions, state monitoring, state monitoring, interrupt monitoring, register reading and writing and other operations can be realized. Through the microcode control circuit in Example 1, the configuration management, state monitoring and mid-segment reporting of the chip itself and various cores during the chip power-on process are solved. During the power-on process, the chip can detect the state of various cores through the microcode control circuit, configure different registers (through output assignment) in different states, and report interrupts according to various different states. The instructions in the specific microcode controller will write output registers according to different states, thereby reporting interrupts. At the same time, after the chip is powered on and started, the state of various cores can still be monitored in real time, such as switching of core speed, network disconnection, etc. When the state changes, the microcode controller configures different registers for management, because the microcode controller is multi-threaded, so it can monitor multiple cores and the chip itself in real time.

[0049] The above is a detailed introduction to a multi-threaded microcode control circuit for a chip provided by the present invention. The structure and working principle of the present invention are described in detail using specific examples. The description of the above embodiments is only used to help understand the method and core idea of ​​the present invention. It should be pointed out that for ordinary technicians in this technical field, the present invention can also be improved and modified without departing from the principle of the present invention, and these improvements and modifications also fall within the scope of protection of the claims of the present invention.

Claims

1. A multi-threaded microcode control circuit for a chip, characterized in that: comprising a port, the port being used for signal input, the signal comprising a chip core status signal or a register detection value; The input signal of the port is input into an input multiplexer, and the input multiplexer is used to select the input two-dimensional array signal and output a 2-bit signal; A logic operation unit, used for receiving the output signal of the input multiplexer, and outputting the operation result to the microcode control circuit to perform the next operation, wherein the logic operation unit performs a logic operation of a logic AND or a logic OR on the output signal of the multiplexer; A storage module storing microcode instructions, wherein the microcode instructions are retrieved and executed by the microcode control circuit; The data output module is used to implement output assignment operations. The assigned values ​​can be used to configure the registers of the chip core and control the core to implement corresponding functions.

2. A chip multi-threaded microcode control circuit according to claim 1, characterized in that: It also includes a token management module, which generates a management token according to the output value of the data output module, and further controls the switching of threads of the microcode control circuit.

3. The multi-threaded microcode control circuit for a chip according to claim 2, characterized in that: The microcode control circuit has one initial thread.

4. The multi-threaded microcode control circuit for a chip according to claim 2, characterized in that: The microcode control circuit includes a main thread, and the token management module controls the microcode control circuit to switch multiple threads in the main thread.

5. The multi-threaded microcode control circuit for a chip according to claim 1, characterized in that: It also includes an input switching module, which switches the input signal according to the output of the microcode control circuit.

6. The multi-threaded microcode control circuit for a chip according to claim 5, characterized in that: The microcode control circuit has multiple groups of inputs, and the input switching module is used for switching the multiple groups of inputs.

7. The multi-threaded microcode control circuit for a chip according to claim 1, characterized in that: The output module has multiple groups of outputs, and values ​​are assigned to outputs of different groups by selecting signal switching.

8. The multi-threaded microcode control circuit for a chip according to claim 1, characterized in that: The input multiplexer groups the input signals and then separates specific bits from the signals in the groups for output.

9. The multi-threaded microcode control circuit for a chip according to claim 1, characterized in that: The storage module includes a ROM module and a RAM module, instructions are placed in the ROM module and the RAM module, breakpoints are set between the ROM module and the RAM module, and when the address of the ROM module matches the breakpoint address, the memory module automatically jumps to the address of the RAM module.

10. The multi-threaded microcode control circuit for a chip according to claim 9, characterized in that: The microcode control circuit fetches instructions from the ROM module or the RAM module based on the operation result of the logic operation unit; The instructions include assignment instructions and jump instructions, and the assignment instructions assign values ​​to the data output module; The jump instruction assigns the next jump address to the microcode control circuit, changing the input of the microcode control circuit.

11. The multi-threaded microcode control circuit for a chip according to claim 10, characterized in that: Assignment instructions include output assignment, timer assignment, and input / output selection assignment; The output assignment directly assigns values ​​to output variables; The timer assignment starts an external counter, and the full count signal of the counter is used as an input of the microcode control circuit; The input and output selection assignment is to select the input and output of the microcode controller through an assignment operation.

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