Instruction scheduling decision method, device, equipment and medium

Abstract

The present application relates to the field of computer technology and provides an instruction scheduling decision method. The method establishes a dependency graph based on a sequence of instructions to be executed; establishes constraint conditions including dependency constraints based on the dependency relationships and delays between various instruction nodes; constructs multiple candidate decisions, each of which meets the constraint conditions, and each candidate decision includes the execution status of all instructions in the entire execution cycle of the sequence of instructions to be executed; obtains the total consumption value of scheduling and executing instructions based on each candidate decision, each total consumption value includes the time consumption value and resource consumption value when scheduling and executing instructions based on the corresponding candidate decision; and uses the candidate decision with the smallest total consumption value as the instruction scheduling strategy. This method can ensure the global optimality of scheduling and effectively avoid the negative impact that a local optimal solution may have on the overall performance, thereby significantly improving the performance and efficiency of a VLIW processor.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to an instruction scheduling decision method, apparatus, device and medium. Background Art

[0002] With the continuous development of computer architecture, Very Long Instruction Word (VLIW) processors have been widely used in high-performance computing and embedded systems due to their efficient parallel computing capabilities. VLIW processors greatly improve computing efficiency by packaging multiple operations into a single instruction word and executing them in parallel. However, instruction scheduling is one of the core challenges of the VLIW architecture. Unlike superscalar processors, VLIW processors transfer the responsibility of instruction scheduling from hardware to the compiler, forcing the compiler to efficiently resolve dependencies between instructions and reasonably allocate hardware resources to avoid conflicts. Traditional VLIW instruction scheduling strategies often rely on heuristic algorithms. These methods can quickly generate feasible scheduling solutions, but they often cannot guarantee global optimization. In particular, when faced with complex dependencies and resource constraints, the problems of scheduling efficiency and insufficient parallelism utilization are particularly prominent.

[0003] During the instruction scheduling process of a VLIW processor, multiple interrelated optimization problems need to be solved. The first is the dependency between instructions, including data dependency, control dependency, and resource dependency. Data dependency requires that certain instructions can only be executed after the predecessor instruction is executed, while control dependency involves the execution order of instructions in a branch structure. In addition, the number of hardware resources under the VLIW architecture is limited, such as integer arithmetic units, floating-point arithmetic units, and storage units. Therefore, the compiler needs to balance the use of these resources during the scheduling process to avoid resource conflicts. For example, if multiple instructions compete for the same type of functional unit at the same time, the compiler must make appropriate scheduling arrangements to maximize parallelism without causing resource conflicts.

[0004] Therefore, in order to address the problems of insufficient parallelism utilization and unreasonable resource allocation in the current VLIW processor instruction scheduling, an instruction scheduling solution based on precise optimization algorithm is urgently needed to further improve the computing efficiency and performance of VLIW processors. Summary of the Invention

[0005] The main purpose of the embodiments of the present application is to provide an instruction scheduling decision method, apparatus, device and medium, aiming to solve at least one of the problems existing in the current VLIW processor instruction scheduling in the related art, such as insufficient parallelism utilization, unreasonable resource allocation, etc.

[0006] In a first aspect, an embodiment of the present application provides an instruction scheduling decision method, the method comprising:

[0007] Establishing a dependency graph based on the sequence of instructions to be executed, wherein the dependency graph includes a plurality of instruction nodes, wherein edges between adjacent instruction nodes represent dependency relationships between corresponding instructions, and weight values of the edges represent delays between the connected instruction nodes;

[0008] Establishing a constraint condition including dependency constraints according to the dependency relationships and delays between the respective instruction nodes, wherein the number of dependency constraints included in the constraint condition is less than the number of dependency paths in the dependency graph;

[0009] Constructing a plurality of candidate decisions, each candidate decision meeting the constraints, and each candidate decision including the execution status of all instructions in the entire execution cycle of the sequence of instructions to be executed;

[0010] The total consumption value of scheduling and executing instructions according to each candidate decision is obtained, where any total consumption value includes the time consumption value and resource consumption value when scheduling and executing instructions according to the corresponding candidate decision.

[0011] Optionally, establishing a constraint condition including dependency constraints based on the dependency and delay between the various instruction nodes includes:

[0012] Traversing target instruction node pairs having dependency relationships, and establishing dependency constraints based on a dependency path length between two instruction nodes in the target instruction node pairs; the dependency path length is obtained based on the delay of the two instruction nodes connected thereto;

[0013] The constraint conditions are obtained according to the dependency constraints of each target node pair.

[0014] Optionally, establishing a dependency constraint based on the dependency path length between two instruction nodes in the target instruction node pair includes:

[0015] If there is a unique dependency path between two instruction nodes, a dependency constraint is established based on the length of the dependency path;

[0016] If there are multiple dependency paths between two instruction nodes, then the length of each dependency path is obtained; and

[0017] Build dependency constraints based on the longest dependency path among multiple dependency paths.

[0018] Optionally, the constraint condition further includes one of the following:

[0019] Resource constraint conditions are configured to constrain that at each moment, the processing unit resources allocated to each instruction do not exceed the total amount of resources that the system can provide;

[0020] Instruction scheduling constraints are configured to constrain each instruction to be scheduled only once;

[0021] Timing constraints, configured to control the earliest and latest execution times for each instruction; and

[0022] The instruction issuance constraint is configured to constrain the instructions that can be scheduled at the same time.

[0023] Optionally, constructing multiple candidate decisions includes:

[0024] Introducing a decision variable for the execution state of each instruction at each moment, wherein the decision variable is a binary variable, and different values represent different execution states, wherein the execution state includes execution or non-execution;

[0025] By traversing the feasible value combinations of the decision variables of each instruction at each moment, candidate decisions are obtained, each value combination corresponds to a candidate decision, and any candidate decision meets the constraints.

[0026] Optionally, at least one candidate decision scheduling instruction exists in each candidate decision and is executed in parallel; the specific content included in the constraint condition is adjusted based on hardware resources and performance targets.

[0027] Optionally, obtain an instruction scheduling policy from multiple candidate decisions by minimizing the following objective function:

[0028] O = l + β × C

[0029] Where O is the total cost of a candidate decision; l is the total scheduling length of a candidate decision, which represents the total time required for all instructions to complete execution when executing instructions based on the candidate decision; C is the maximum number of simultaneously alive virtual registers, which are used to ensure the execution of each instruction; and β is a weight factor used to adjust the relative importance of l and C in the decision.

[0030] In a second aspect, embodiments of the present application provide an instruction scheduling decision device having the functionality to implement the instruction scheduling decision method provided in the first aspect. The functionality can be implemented in hardware, or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the functionality described above, and the modules can be software and / or hardware.

[0031] In one embodiment, the instruction scheduling decision device includes:

[0032] A first building module is configured to establish a dependency graph, wherein the dependency graph includes a plurality of instruction nodes, wherein edges between adjacent instruction nodes represent dependency relationships between corresponding instructions, and weight values of the edges represent delays between the connected instruction nodes;

[0033] A second building module is configured to establish a constraint condition including dependency constraints according to the dependency relationships and delays between the respective instruction nodes, wherein the number of dependency constraints included in the constraint condition is less than the number of dependency paths in the dependency graph;

[0034] a third building module configured to build a plurality of candidate decisions, each candidate decision meeting the constraint condition, and each candidate decision including execution states of all instructions in the entire execution cycle of the instruction sequence to be executed;

[0035] an acquisition module configured to acquire a total consumption value of scheduling and executing instructions according to each candidate decision, wherein each total consumption value includes a time consumption value and a resource consumption value when scheduling and executing instructions according to the corresponding candidate decision; and

[0036] The decision module is configured to use the candidate decision with the smallest total consumption value as the instruction scheduling strategy.

[0037] In a third aspect, an embodiment of the present application provides a computer-readable storage medium comprising instructions, which, when executed on a computer, enables the computer to execute the instruction scheduling decision method as described in the first aspect.

[0038] In a fourth aspect, an embodiment of the present application provides a computing device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the instruction scheduling decision method described in the first aspect when executing the computer program.

[0039] Compared with the prior art, the embodiment of the present application proposes a new instruction scheduling decision method, which is based on the sequence of instructions to be executed. First, a dependency graph is constructed, which is composed of multiple instruction nodes. Between these nodes, adjacent instructions are represented by edges to represent the dependency relationship between them, and the weight value of each edge specifically reflects the time delay between the connected instruction nodes. Then, based on the dependency relationship between these instruction nodes and their corresponding time delays, a series of constraint conditions containing dependency constraints are formulated. The number of dependency constraints contained in these constraint conditions is less than the total number of dependency paths in the dependency graph, which achieves effective simplification and management of complex dependency relationships.

[0040] In order to obtain different scheduling possibilities, multiple candidate decision schemes are constructed. Each candidate decision strictly follows the above dependency constraints and comprehensively covers the execution status of all instructions in the entire execution cycle of the instruction sequence to be executed.

[0041] Then, the total cost of each candidate decision when executing the instruction is evaluated. This total cost is a comprehensive indicator that includes not only the time cost value, that is, the total time required for instruction scheduling and execution, but also the resource cost value, that is, the cost of various resources required during the execution process.

[0042] Finally, by comparing the total cost of each candidate decision, the one with the smallest total cost is selected as the instruction scheduling strategy. This strategy effectively ensures the order and efficiency of instruction execution while also minimizing the time and resource costs of execution.

[0043] In summary, this method can ensure the global optimality of scheduling and effectively avoid the negative impact that local optimal solutions may have on overall performance, thereby significantly improving the performance and efficiency of VLIW processors and meeting the needs of modern computing tasks for efficient parallel computing. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] The objects, features and advantages of the embodiments of the present application will become readily understood by reading the detailed description of the embodiments of the present application with reference to the accompanying drawings.

[0045] Figure 1 A flowchart of the instruction scheduling decision method according to an embodiment of the present application is provided;

[0046] Figure 2 A partial schematic diagram of a dependency graph according to an embodiment of the present application;

[0047] Figure 3 A schematic diagram of the structure of the instruction scheduling decision device according to an embodiment of the present application; and

[0048] Figure 4 A schematic diagram of the structure of a computing device according to an embodiment of the present application.

[0049] In the drawings, the same or corresponding reference numerals denote the same or corresponding parts. DETAILED DESCRIPTION

[0050] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0051] The flowcharts shown in the accompanying drawings are for illustrative purposes only and do not necessarily include all contents and operations / steps, nor must they be executed in the order described. For example, some operations / steps may be decomposed, combined, or partially merged, so the actual execution order may vary depending on the actual situation.

[0052] It should be understood that the terms used in this specification are only for the purpose of describing specific embodiments and are not intended to limit the present application. As used in this specification and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms unless the context clearly indicates otherwise.

[0053] Embodiments of the present application provide an instruction scheduling decision method, apparatus, device, and medium. The instruction scheduling decision method can be applied to a terminal device, such as a tablet computer, laptop computer, desktop computer, personal digital assistant, wearable device, or other electronic device. The terminal device can also be a server or a server cluster.

[0054] The following embodiments of the present application are described in detail with reference to the accompanying drawings. In the absence of conflict, the following embodiments and features therein may be combined with each other.

[0055] Please refer to Figure 1 , Figure 1 A flowchart of an instruction scheduling decision method provided in an embodiment of the present application.

[0056] like Figure 1 As shown, the instruction scheduling decision method includes steps S101 to S105.

[0057] Step S101: Establish a dependency graph based on a sequence of instructions to be executed.

[0058] In the embodiment of the present application, the sequence of instructions to be executed may be a plurality of instructions waiting to be scheduled and executed based on VLIW, and there may be some dependencies between the various instructions. The dependency graph is established based on the dependency between the various instructions in the sequence of instructions to be executed, and the dependency graph may be a directed acyclic graph (DAG), such as Figure 2 As shown, the dependency graph includes multiple instruction nodes, the edges between adjacent instruction nodes represent the dependency relationship between the corresponding instructions, and the weight value of the edge represents the delay between the connected instruction nodes. Figure 2 In the figure, load, add, and store represent an instruction node respectively. Each instruction node corresponds to an instruction. The edge between load and add represents the dependency relationship between the two. The arrow indicates the direction of the dependency. The weight 7 indicates that the delay between instruction load and instruction add is 7.

[0059] In a VLIW architecture, dependencies encompass data dependencies and control dependencies. Data dependencies refer to the situation where the output of one instruction is the input of another. Control dependencies involve control structures such as conditional branches or loops, where the execution of one instruction depends on the result of another.

[0060] In the embodiments of the present application, the delay between instruction nodes represents the execution delay or preparation time between corresponding instructions, which is crucial for optimizing the execution order of instructions and reducing waiting time. Through global dependency analysis, the compiler or processor can identify which instructions can be executed in parallel (i.e., they have no direct dependencies) and which instructions must be executed in a specific order (due to dependencies).

[0061] In an embodiment of the present application, by constructing the sequence of instructions to be executed as a directed acyclic dependency graph, the relationship between instructions can be analyzed based on the DAG graph, which helps to generate efficient instruction packets. These instruction packets can be executed in parallel in a single long instruction word while ensuring that all dependencies are met, thereby avoiding execution errors and performance degradation, enabling the processor to more effectively utilize parallel processing capabilities and improve overall computing efficiency.

[0062] Step S102: establishing constraint conditions including dependency constraints based on the dependency and delay between the various instruction nodes.

[0063] In the embodiment of the present application, each dependency constraint can be directly established based on the dependency and delay between each instruction node in the dependency graph, and each dependency constraint can be used as a constraint condition. Specifically, the edges and weights between each instruction node can be converted into dependency constraints, that is, each feasible dependency path can be converted into a dependency constraint. For example, referring to Figure 2 ,based on Figure 2 From the dependency shown in , we can obtain the four dependency constraints: time(store) - time(load)>= 7, time(store) - time(add)>= 4, time(add) - time(load)>= 7, and time(store) - time(load)>= 11, and based on this, we can get the constraint conditions.

[0064] In a VLIW architecture's parallel processing environment, managing dependencies between instructions is a complex and critical task. In embodiments of the present application, to optimize the execution order and efficiency of instructions, constraints can be constructed based on the dependencies and delays between instruction nodes. These constraints are designed to ensure that all necessary dependencies are satisfied while minimizing strict restrictions on the execution order, thereby better utilizing the processor's parallel processing capabilities.

[0065] First, the direct dependencies between instructions are determined based on the dependency graph. In the DAG, each edge represents a dependency, and its weight represents the delay between instructions. However, when constructing constraints, it is not necessary to convert every edge in the DAG into a dependency constraint. This is because some dependencies may be indirect or redundant, that is, they can be derived from other direct dependencies or be replaced by other dependencies.

[0066] Therefore, a more efficient approach can be adopted to identify critical direct dependencies or dependencies that are sufficient to replace other dependencies through global dependency analysis, and convert these dependencies into dependency constraints. These dependency constraints ensure that all necessary dependencies are satisfied while allowing more instructions to execute in parallel without direct dependencies.

[0067] In a preferred embodiment of the present application, the number of dependency constraints included in the constraint condition is less than the number of dependency paths in the dependency graph. Figure 2 , Figure 2 This is a partial schematic diagram of the instruction dependency graph of the embodiment of the present application. Since not all dependencies in a dependency graph are valid for the optimal decision of instruction scheduling, a large number of redundant dependencies may increase the time to obtain the optimal decision of instruction scheduling. For example: Figure 2 It can be seen that the path length from the load instruction through the add instruction to the store is 11, which is longer than the path length from the load instruction directly to the store. Therefore, when establishing dependency constraints, there is no need to create the constraint of time(store) - time(load)>= 7. In other words, based on Figure 2 When creating dependency constraints, the number of dependency constraints obtained (for example, 3) is less than Figure 2 The number of all dependency paths in , which is 4.

[0068] In the embodiment of the present application, the dependency path in the dependency graph represents the path between two instructions with a dependency relationship. The dependency relationship is not only a direct dependency relationship, but also an indirect dependency relationship. Therefore, Figure 2 In the dependency graph shown, there are a total of 4 dependency paths. In addition to the 3 edges representing direct dependencies, there is also a dependency path from the instruction load through the add to the store.

[0069] It is understandable that although redundant constraints will increase the complexity of obtaining the optimal scheduling decision, appropriate redundant constraints will also accelerate the process of obtaining the optimal scheduling decision, which is equivalent to limiting the original solution space of a function without constraints through constraints. Figure 2 In the example shown, after creating the dependency constraints time(store) - time(add)>= 4 and time(add) - time(load)>= 7, you can create a dependency constraint time(store) - time(load)>= 11. This will speed up the propagation of constraint conditions in the solution space for solving the optimal scheduling decision.

[0070] In an optional embodiment of the present application, in order to obtain dependency constraints less than the number of dependency paths based on the dependency graph, step S102 may include the following steps S1021 to S1022:

[0071] Step S1021: traverse target instruction node pairs with dependency relationships, and establish dependency constraints based on the dependency path length between two instruction nodes in the target instruction node pairs.

[0072] In an embodiment of the present application, in order to establish dependency constraints, it is necessary to obtain all instructions with dependencies. Therefore, it is first necessary to traverse the dependency graph and obtain all instruction nodes with dependencies, that is, target instruction node pairs. After obtaining each target instruction node pair in the dependency graph, each dependency constraint can be established based on the dependency path length between each target instruction node pair. It can be understood that the dependency path length between a target instruction node pair can be obtained based on the delay of the two instruction nodes connected to it (that is, the two instruction nodes included in the target instruction node pair). For example, referring to Figure 2 , a target instruction node pair is load and add, then the dependency path length is 7, and the corresponding dependency constraint is time(add) - time(load)>= 7.

[0073] It is understandable that the dependency path between instruction nodes is constructed based on the dependency and delay between each instruction for convenience. Thus, in some embodiments, the target node pair and the dependency path length can also be obtained based on the dependency and delay between the instructions to establish the dependency relationship. Specifically, some basic data structures can be defined to store each instruction node, the dependency and delay information of each instruction node. Each instruction node can include the following attributes: a unique identifier for each instruction, the time required for instruction execution, other instructions that depend on the instruction, and delay information. An adjacency list is used to represent all instruction nodes and their dependencies, wherein each instruction node is indexed by its ID and stores its dependent instruction nodes and delay information.

[0074] The dependency path length between the two instruction nodes is then calculated, which usually involves all paths from the source node to the destination node and calculating the total delay on these paths. In order to calculate the dependency path length between two instruction nodes, it is necessary to traverse all possible paths and calculate the total delay on the path. This can be done using a depth-first search or breadth-first search algorithm. Considering that there may be multiple paths between two instruction nodes, it is usually only necessary to care about the shortest path or the longest path, that is, to construct dependency constraints based only on the longest path or the shortest path.

[0075] Finally, based on the calculated path lengths, corresponding dependency constraints can be established. For example, if the shortest path length between two nodes exceeds a certain threshold, a constraint can be set to ensure that the two nodes cannot be executed at the same time, or their execution order can be adjusted.

[0076] In the embodiment of the present application, establishing a dependency constraint based on the dependency path length between two instruction nodes in a target instruction node pair includes the following steps I-III:

[0077] In step I, if there is a unique dependency path between two instruction nodes, a dependency constraint is established according to the length of the dependency path.

[0078] In an embodiment of the present application, when processing the dependency between instruction nodes, if there is a dependency path between two instruction nodes, a dependency constraint needs to be established based on the length of the dependency path. If there is only one unique dependency path between two instruction nodes, the dependency constraint is established directly based on the length of this path. This means that before executing the instruction corresponding to the destination instruction node, it is necessary to wait for the instruction corresponding to the source instruction node to be completed, and the waiting time is at least equal to the length of this path (that is, the sum of all delays on the path). For example, referring to Figure 2, where there is only one dependency path between the instruction node load and the instruction node add, and the dependency path length is 7, then the dependency constraint time(add) - time(load)>= 7 can be established between the two instructions.

[0079] Step II: If there are multiple dependency paths between two instruction nodes, obtain the length of each dependency path.

[0080] If there are multiple dependency paths between two instruction nodes, the lengths of all dependency paths must be considered and the dependency constraint is established based on the longest path. This is because the longest path represents the longest waiting time required to execute the target instruction node.

[0081] Specifically, first determine all dependent paths between two instruction nodes. Then, for each path, calculate the sum of all delays on the path. Find the longest path among all paths and establish dependency constraints to ensure that the target instruction node can only be executed after the source instruction node is completed and the waiting time is at least equal to the length of the longest path. For example, refer to Figure 2 , where there are two dependency paths between the instruction node load and the instruction node store, one is from the instruction node load directly to the instruction node store, and the other is from the instruction node load through the instruction node add to the instruction node store, where the path length of the direct dependency path is 7, and the path length of the dependency path through the instruction node add is 11, and therefore the dependency constraint time(store) - time(load)>= 11 can be established between the two instructions.

[0082] To implement these steps, a graph algorithm (such as breadth-first search BFS or depth-first search DFS) can be used to traverse the dependencies between instruction nodes and calculate the path length to obtain the longest path length. Technicians in this field can perform operations according to actual needs, which will not be described in detail here.

[0083] In step III, a dependency constraint is constructed based on the longest dependency path among multiple dependency paths.

[0084] In the embodiment of the present application, steps I-III are provided as an example of a method for constructing dependency constraints based on a dependency graph, but are not limited thereto. Those skilled in the art may also select other methods based on the dependencies between instructions in a sequence to be executed to construct dependency constraints according to actual circumstances.

[0085] Step S1022: Obtain the constraint conditions according to the dependency constraints of each target node pair.

[0086] In the embodiments of the present application, after obtaining the dependency constraints between each target node pair, these dependency constraints can be integrated to form a complete set of dependency constraints, i.e., constraint conditions. These constraints are generally used to ensure that the dependencies between instruction nodes are properly maintained during execution, i.e., the instructions corresponding to the dependent instruction nodes are executed first, followed by the instructions corresponding to the dependent instruction nodes.

[0087] The following are the steps to derive constraints from dependency constraints:

[0088] For each pair of target nodes (A, B), check whether there is a dependency path from A to B. If a dependency path exists, determine whether it is the only dependency path or whether there is a longest path among multiple dependency paths. For each determined dependency path, calculate the total execution time of all nodes on the dependency path. If multiple dependency paths exist, select the length of the longest dependency path as the dependency length.

[0089] For each pair of nodes (A, B) with a dependency relationship, a constraint is formed, indicating that the execution of B must be carried out after the execution of A is completed and the waiting time is at least equal to the dependency length.

[0090] Combine all the dependency constraints you've formed into a constraint set. Ensure that each constraint in the constraint set is explicit and executable, meaning there are no circular dependencies or unsatisfiable dependencies. In practice, you may need to verify the validity of the constraint set to ensure it correctly guides the execution order of nodes.

[0091] This can be verified by simulating execution or using specialized scheduling algorithms. Once the constraint set is verified to be valid, it can be applied to the actual execution process. During execution, the scheduler (compiler in VLIW processing) or execution engine will follow these constraints to ensure that the dependencies between instructions are correctly maintained.

[0092] It is understandable that reliable execution of instructions not only requires resolving dependencies between different instructions, but also requires appropriate computing resources, execution time, etc. Therefore, in the embodiment of the present application, the constraint condition also includes at least one of the following:

[0093] Resource constraint conditions are configured to constrain that at each moment, the processing unit resources allocated to each instruction do not exceed the total amount of resources that the system can provide;

[0094] Instruction scheduling constraints are configured to constrain each instruction to be scheduled only once;

[0095] Time constraints, configured to control the earliest and latest execution time of each instruction;

[0096] The instruction issuance constraint is configured to constrain the instructions that can be scheduled at the same time.

[0097] Specifically, they work together to ensure efficient utilization of system resources, correct execution order of instructions and timing requirements. The following is a detailed explanation of these constraints:

[0098] Resource constraints are designed to ensure that at any given moment, the processing unit resources (such as CPU cores, memory, IO devices, etc.) allocated to each instruction do not exceed the total resources the system can provide. This can be achieved through a resource manager or scheduler, which tracks available and allocated resources and reclaims or reallocates resources when necessary. At each moment, the processing unit resources allocated to each instruction cannot exceed the total resources the system can provide. In particular, register resources are not strictly restricted from exceeding the physical register upper limit, but are included in the optimization goal of the objective function (used to calculate and solve the optimal instruction scheduling strategy). Subsequent scheduling can ensure that the registers in the final scheduling result do not exceed the upper limit by adding instructions that overflow register data to memory.

[0099] Instruction scheduling constraints ensure that each instruction can be scheduled only once, avoiding resource waste and data inconsistencies caused by repeated execution. Specifically, the scheduler maintains an instruction status table, recording the current status of each instruction (e.g., unscheduled, scheduled, executing, completed, etc.). When scheduling a new instruction, the scheduler checks whether it has already been scheduled and decides whether to add it to the execution queue accordingly.

[0100] Timing constraints control the earliest and latest execution times of each instruction to meet specific timing requirements. Specifically, timing constraints are typically implemented using timestamps or time windows. Each instruction is assigned an earliest start time and a latest completion time. The scheduler considers these time constraints when scheduling instructions to ensure they execute within the specified timeframe.

[0101] Instruction issuance constraints are designed to ensure compatibility between instructions that can be scheduled at the same time (for example, they do not occupy the same resources or cause data conflicts). Specifically, instruction issuance constraints are typically determined by the dependencies between instructions and resource usage. The scheduler checks the dependencies between instructions before issuing them and ensures that instructions issued simultaneously do not violate any resource usage restrictions or data consistency requirements.

[0102] These constraints play a crucial role in the instruction execution process. Together, they ensure system stability, reliability, and performance. In practice, these constraints may be adjusted and optimized based on the specific hardware platform, software architecture, and application requirements. For example, in high-performance computing or real-time systems, timing and instruction issuance constraints may be more stringent; in resource-constrained embedded systems, resource constraints may be even more critical.

[0103] By carefully selecting these key dependencies and converting them into constraints, we can ensure the correctness and efficiency of instruction execution. At the same time, since the number of dependency constraints is less than the number of dependency paths in the DAG, we can provide more flexibility for the parallel execution of instructions.

[0104] Ultimately, these constraints are used to guide the scheduling and execution of instructions to ensure that all dependencies are satisfied while maximizing the efficiency of parallel processing.

[0105] S103: Construct multiple candidate decisions.

[0106] In the embodiment of the present application, any candidate decision meets the constraints, and each candidate decision includes the execution status of all instructions in the entire execution cycle of the instruction sequence to be executed. Specifically, the execution status of each instruction at each moment can be determined and output as a candidate decision. For example, referring to Figure 2 , assuming that the sequence of instructions to be executed is load, add, and store, then the candidate decision can be to execute the load instruction at time 1-7 (other instructions are not executed), execute the add instruction at time 8-11 (other instructions are not executed), and execute the store instruction at time 12 (other instructions are not executed).

[0107] In order to more conveniently construct candidate decisions, in an embodiment of the present application, step S103 may include the following steps S1031 to S1032:

[0108] Step S1031: Introduce decision variables for the execution status of each instruction at each moment.

[0109] The decision variable is a binary variable, and different values represent different execution states, including execution or non-execution. For example, the binary variable can take the value of 0 or 1, or other feasible values, which are not limited here. Different values can represent different execution states, for example, 1 can be set to execution and 0 can be set to non-execution.

[0110] In the embodiments of the present application, decision variables are introduced in planning, scheduling, or optimization problems to accurately and quantitatively describe system behavior and to enable the use of more intuitive and precise methods (such as linear programming and integer programming) to find the optimal solution. Specifically, a binary (0-1) decision variable can be introduced for each instruction at each time instant to indicate whether the instruction is executed. If the instruction is executed at a certain time instant, the variable takes the value of 1, otherwise it takes the value of 0.

[0111] Assume there is a time range T={t1, t2, ..., t n} and a set of instructions I = {i1, i2, ..., i m}, then we can define a binary decision variable x it Corresponding to the execution state of instruction i at time t: if x it =1, if instruction i is executed at time t if x it =0, if instruction i is not executed at time t.

[0112] This decision variable can help express various constraints and objectives regarding instruction execution when constructing candidate decisions. For example, if you want an instruction to execute only within a specific time period, you can add the corresponding constraint; if you want to minimize or maximize the number of executions of certain instructions, you can include relevant parameters in the objective.

[0113] By reasonably setting these decision variables and the associated constraints and goals, algorithms such as path planning can be used to find a solution that satisfies all constraints while optimizing the goal, that is, the optimal instruction scheduling strategy.

[0114] S1032. Obtain candidate decisions by traversing feasible value combinations of decision variables of each instruction at each moment.

[0115] Each value combination corresponds to a candidate decision, and any candidate decision meets the constraint conditions.

[0116] In an embodiment of the present application, a method for traversing the feasible value combinations of decision variables of each instruction at each moment to obtain candidate decisions involves exhaustively enumerating all possible execution states to ensure that each value combination meets the constraints.

[0117] Specifically: First, clarify all instructions and time points, and build a two-dimensional matrix or similar structure, in which each element represents a binary decision variable x it; Then, explicitly define all dependency constraints and other constraints. For example, some instructions must execute before others, or some instructions cannot execute simultaneously. For each decision variable, try its two possible values (0 or 1) and generate all possible state combinations. For each generated combination, check whether all constraints are met. Only combinations that meet these constraints are considered candidate decisions. From all candidate decisions that meet the constraints, select the optimal solution based on the optimization objective (such as minimizing cost, maximizing resource utilization, etc.).

[0118] In the embodiment of the present application, steps S1031 to S1032 provide an exemplary method for constructing candidate decisions, but are not limited thereto. For example, in the embodiment of the present application, candidate decisions for the instruction sequence to be executed can also be constructed using a 0-1 integer linear programming model.

[0119] It is understandable that in order to achieve the best resource and time consumption for instruction scheduling and execution, and to improve the efficiency of processor resource utilization as much as possible, in the embodiment of the present application, there is at least one candidate decision scheduling instruction for parallel execution in each candidate decision, that is, when there are instructions that can be executed in parallel in the sequence of instructions to be executed, the candidate decision must include a scheduling scheme for executing instructions in parallel to maximize the efficiency of instruction execution. In addition, it is understandable that the execution of instructions requires the consumption of computing resources, that is, the instructions are subject to the limitation of relying on computing resources, and the scheduling execution scheme of instructions needs to achieve the optimization goal as much as possible, so the specific content included in the constraint conditions is based on the hardware resources and performance target adjustment. For example, if resources are limited, the resource constraint in the constraint conditions needs to be set to the maximum resource consumption that the system can bear.

[0120] S104: Obtain the total consumption value of scheduling and executing instructions according to each candidate decision.

[0121] Among them, any total consumption value includes the time consumption value and resource consumption value when the instruction scheduling execution is performed according to the corresponding candidate decision.

[0122] In the embodiment of the present application, in order to obtain the total consumption value of scheduling and executing instructions according to each candidate decision, it is necessary to calculate the time consumption value and resource consumption value under each candidate decision respectively.

[0123] Specifically, the total cost of scheduling and executing instructions based on each candidate decision can be obtained by the following formula:

[0124] O = l + β × C

[0125] Where O is the total cost of a candidate decision; l is the total scheduling length of a candidate decision, which represents the total time required for all instructions to complete execution when executing instructions based on the candidate decision; C is the maximum number of simultaneously alive virtual registers, which are used to ensure the execution of each instruction; and β is a weight factor used to adjust the relative importance of l and C in the decision.

[0126] Based on the above formula, we can derive an objective function for finding the optimal instruction scheduling policy. By minimizing this objective function, we can identify an instruction scheduling policy from multiple candidate decisions. Specifically, once a mathematical model consisting of decision variables, objective function, and constraints is established, we can use an appropriate solver (such as CPLEX or Gurobi) to find the optimal solution. These tools can efficiently handle complex integer programming problems and provide feasible scheduling solutions.

[0127] Specifically, the time consumption value is the total scheduling length l for executing a candidate decision, representing the total time required for all instructions to complete execution when scheduling instructions based on that candidate decision. First, all possible instruction scheduling decisions (i.e., candidate decisions) can be listed. Simulate the execution of each candidate decision, recording the total time from the start of instruction execution to completion. This can be done by using a specialized simulator or running on actual hardware to compare the time consumption values for different candidate decisions and find the optimal solution.

[0128] Resource consumption is the maximum number of concurrently active virtual registers, C, used to ensure the execution of each instruction. Resource consumption can also include CPU time, memory usage, and I / O operations. To calculate resource consumption, take the following steps: During instruction scheduling, use system monitoring tools (such as the / usr / bin / time command in Linux) to collect resource usage data. Based on this data, calculate the resource consumption value for each candidate decision.

[0129] Finally, the time consumption value and resource consumption value are weighted and summed to obtain the total consumption value of each candidate decision. This value can be used to compare the advantages and disadvantages of different candidate decisions and thus select the optimal instruction scheduling decision.

[0130] In an optimization problem, the weighting factor β adjusts the relative importance of different objectives or constraints. The value of β depends on the specific business needs and priorities. For example, if time is the most critical factor (such as in a real-time system), a smaller β value can be chosen, giving the time consumption value l(D) a greater weight in the decision. If resource efficiency is more important (such as in an energy-constrained environment), a larger β value can be chosen, making resource consumption C(D) the primary consideration.

[0131] If a balance between time and resources is required, β can be adjusted based on the actual situation to ensure that both are appropriately emphasized. In practical applications, the weighting factor β may not be fixed but rather adjusted dynamically. For example, in some phases, time may be most important, while in others, resource efficiency may be more critical. Therefore, the value of β can be adjusted in a timely manner to adapt to different needs based on the system's operating status or changes in external conditions.

[0132] In this embodiment of the present application, it is assumed that there are two candidate decisions D1 and D2, and their time consumption and resource consumption are shown in Table 1:

[0133] Table 1

[0134]

[0135] If β is set to 0.6, the total consumption values are:

[0136] f (D1)=(1−0.6)⋅10+0.6⋅5=4+3=7

[0137] f (D2)=(1−0.6)⋅8+0.6⋅7=3.2+4.2=7.4

[0138] In this case, although D2 is better in terms of time, D1 may be selected as a better decision because its total consumption value is slightly lower due to β being more biased towards resource consumption.

[0139] S105: Using the candidate decision with the smallest total consumption value as the instruction scheduling strategy

[0140] In an embodiment of the present application, it is possible to directly traverse the possible value combinations of decision variables for different instructions in all candidate decisions, obtain the total consumption value of each candidate decision, and obtain the optimal candidate decision as the instruction scheduling strategy. It is also possible to use more efficient algorithms and techniques to improve the solution efficiency, for example: using commercial solvers (such as CPLEX, Gurobi, open source solvers or-tools) to handle complex constraints.

[0141] Through the above method, we can systematically evaluate each candidate decision and select the one with the lowest total cost as the final instruction scheduling policy. This approach not only considers time and resource consumption, but also allows the balance between the two to be dynamically adjusted through the weight factor β, thus better adapting to different business needs and priorities.

[0142] The embodiment of the present application proposes a new instruction scheduling strategy method, which is based on the sequence of instructions to be executed. First, a dependency graph is constructed, which is composed of multiple instruction nodes. Between these nodes, adjacent instructions are represented by edges to represent the dependency relationship between them, and the weight value of each edge specifically reflects the time delay between the connected instruction nodes. Based on the dependency relationship between these instruction nodes and their corresponding time delays, a series of constraint conditions containing dependency constraints are formulated. The number of dependency constraints contained in these constraint conditions is less than the total number of dependency paths in the dependency graph, which achieves effective simplification and management of complex dependency relationships.

[0143] In order to obtain different scheduling possibilities, the embodiment of the present application constructs multiple candidate decision schemes. Each candidate decision strictly follows the above-mentioned dependency constraints and comprehensively covers the execution status of all instructions in the instruction sequence to be executed during the entire execution cycle.

[0144] Then, the total cost of each candidate decision when executing the instruction is evaluated. This total cost is a comprehensive indicator that includes not only the time cost value, that is, the total time required for instruction scheduling and execution, but also the resource cost value, that is, the cost of various resources required during the execution process.

[0145] Finally, by comparing the total cost of each candidate decision, the one with the smallest total cost is selected as the instruction scheduling strategy. This strategy effectively ensures the order and efficiency of instruction execution while also minimizing the time and resource costs of execution.

[0146] This exemplary embodiment proposes an instruction scheduling decision device, referring to Figure 3 , Figure 3 A structural diagram of an instruction scheduling decision device is shown, which can be applied to a server in a scenario where an instruction scheduling decision method needs to be determined.

[0147] The instruction scheduling decision device in the embodiment of the present application can realize the above Figure 1 The functions of the instruction scheduling decision method implemented in the corresponding embodiment are as follows. The functions implemented by the instruction scheduling decision device can be implemented by hardware, or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above functions, and the modules can be software and / or hardware.

[0148] In the examples of this application, see Figure 3 The instruction scheduling decision device 1 includes: a first building module 11, a second building module 12, a third building module 13, an acquisition module 14 and a decision module 15, wherein:

[0149] A first building module 11 is configured to build a dependency graph;

[0150] In the embodiment of the present application, to accurately maintain the correct order of instruction execution, the first construction module 11 constructs a dependency graph (DAG) of the instruction sequence. In this graph, each node represents a specific instruction, and each edge symbolizes the dependency relationship between instructions. The edge weights are assigned the actual meaning of the execution delay between instructions.

[0151] The second building module 12 is configured to establish a constraint condition including a dependency constraint according to the dependency and delay between the various instruction nodes;

[0152] In an embodiment of the present application, in order to optimize the execution order and efficiency of instructions, constraints can be constructed based on the dependencies and delays between instruction nodes.

[0153] The second building module 12 establishes a constraint condition including dependency constraints according to the dependency relationships and delays between the various instruction nodes, wherein the number of dependency constraints included in the constraint condition is less than the number of dependency paths in the dependency graph.

[0154] These constraints are designed to ensure that all necessary dependencies are satisfied while minimizing strict restrictions on the order of execution to better exploit parallel processing capabilities.

[0155] A third building module 13 is configured to build a plurality of candidate decisions;

[0156] In the embodiment of the present application, in order to construct multiple candidate decisions and ensure that each candidate decision complies with the dependency constraints and includes the execution status of all instructions throughout the entire execution cycle, the third construction module 13 constructs multiple candidate decisions. Each candidate decision complies with the dependency constraints, and each candidate decision includes the execution status of all instructions throughout the entire execution cycle of the instruction sequence to be executed. This method not only ensures that all instructions are taken into account, but also ensures the effectiveness and feasibility of the scheduling scheme.

[0157] The acquisition module 14 is configured to acquire a total consumption value of scheduling and executing instructions according to each candidate decision.

[0158] In the embodiment of the present application, in order to obtain the total cost value of scheduling and executing instructions according to each candidate decision and ensure that each total cost value includes both the time cost value and the resource cost value, it is necessary to calculate the time cost value and the resource cost value for each candidate decision. The acquisition module 14 obtains the total cost value of scheduling and executing instructions according to each candidate decision. Each total cost value includes both the time cost value and the resource cost value when scheduling and executing instructions according to the corresponding candidate decision.

[0159] The decision module 15 is configured to use the candidate decision with the smallest total consumption value as the instruction scheduling strategy.

[0160] In the embodiments of the present application, to optimize system performance and reduce execution time and resource usage, a reasonable decision-making method is to use the candidate decision with the smallest total cost as the instruction scheduling strategy. The decision module 15 uses the candidate decision with the smallest total cost as the instruction scheduling strategy. This strategy effectively ensures the order and efficiency of instruction execution while also minimizing the time and resource costs during execution.

[0161] An embodiment of the present application proposes an instruction scheduling decision device, which, based on a sequence of instructions to be executed, first constructs a dependency graph through a first construction module 11, which consists of multiple instruction nodes. Between these nodes, adjacent instructions are represented by edges to represent the dependency relationship between them, and the weight value of each edge specifically reflects the time delay between the connected instruction nodes. Based on the dependency relationship between these instruction nodes and their corresponding time delays, the second construction module 12 constructs a series of constraint conditions containing dependency constraints. The number of dependency constraints contained in these constraint conditions is less than the total number of dependency paths in the dependency graph, thereby achieving effective simplification and management of complex dependency relationships.

[0162] In order to obtain different scheduling possibilities, the third building module 13 builds multiple candidate decision schemes. Each candidate decision strictly follows the above constraints and fully covers the execution status of all instructions in the instruction sequence to be executed during the entire execution cycle.

[0163] Subsequently, the total cost of each candidate decision when executing the instruction is evaluated. The acquisition module 14 is configured to obtain the total cost of scheduling and executing the instruction according to each candidate decision. This total cost is a comprehensive indicator that includes not only the time cost value, that is, the total time required for the instruction scheduling and execution, but also the resource cost value, that is, the cost of various resources required during the execution process.

[0164] Finally, by comparing the total cost of each candidate decision, the decision module 15 selects the candidate decision with the smallest total cost as our instruction scheduling strategy. This strategy effectively ensures the order and efficiency of instruction execution while also minimizing the time and resource costs of execution.

[0165] In summary, the device can ensure the global optimality of scheduling and effectively avoid the negative impact that local optimal solutions may have on overall performance, thereby significantly improving the performance and efficiency of VLIW processors and meeting the needs of modern computing tasks for efficient parallel computing.

[0166] To achieve the above purpose, this application also provides a computer device 2, see Figure 4 , Figure 4 A schematic diagram of the structure of a computing device according to an embodiment of the present application is shown in FIG. Figure 4 In the embodiment, the computer device 2 includes multiple computer devices, and the components of the instruction scheduling decision device 1 can be dispersed in different computer devices 2. The computer device 2 can be a smart phone, tablet computer, laptop computer, desktop computer, rack server, blade server, tower server or cabinet server (including an independent server or a server cluster composed of multiple servers) that executes the program. The computer device 2 of this embodiment includes at least but is not limited to: a memory 21, a processor 23, a network interface 22 and the instruction scheduling decision device 1 (refer to Figure 4 ). It should be pointed out that Figure 4 The computer device 2 is shown with only components, but it should be understood that implementing all of the components shown is not a requirement and greater or fewer components may alternatively be implemented.

[0167] In this embodiment, the memory 21 includes at least one type of computer-readable storage medium, including flash memory, a hard disk, a multimedia card, a card-type memory (e.g., SD or DX memory), random access memory (RAM), static random access memory (SRAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), programmable read-only memory (PROM), magnetic storage, a magnetic disk, an optical disk, etc. In some embodiments, the memory 21 may be an internal storage unit of the computer device 2, such as the hard disk or internal memory of the computer device 2. In other embodiments, the memory 21 may also be an external storage device of the computer device 2, such as a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash memory card, etc. equipped on the computer device 2. Of course, the memory 21 may also include both the internal storage unit of the computer device 2 and its external storage device. In this embodiment, the memory 21 is generally used to store the operating system and various application software installed on the computer device 2, such as the program code of the instruction scheduling decision method of the present application. In addition, the memory 21 can also be used to temporarily store various types of data that have been output or are to be output.

[0168] In some embodiments, the processor 23 may be a central processing unit (CPU), a controller, a microcontroller, a microprocessor, or other data processing chip. The processor 23 is generally used to control the overall operation of the computer device 2, such as performing control and processing related to data interaction or communication with the computer device 2. In this embodiment, the processor 23 is used to execute program code stored in the memory 21 or process data, such as executing the instruction scheduling policy device 1.

[0169] The network interface 22 may include a wireless network interface or a wired network interface. The network interface 22 is generally used to establish a communication connection between the computer device 2 and other computer devices 2. For example, the network interface 22 is used to connect the computer device 2 to an external terminal via a network, establishing a data transmission channel and a communication connection between the computer device 2 and the external terminal. The network may be a wireless or wired network such as an intranet, the Internet, the Global System of Mobile communication (GSM), Wideband Code Division Multiple Access (WCDMA), a 4G network, a 5G network, Bluetooth, or Wi-Fi.

[0170] It should be pointed out that Figure 4 Computer device 2 is shown having only components 21 - 23 , but it should be understood that implementation of all of the components shown is not a requirement, and greater or fewer components may alternatively be implemented.

[0171] In this embodiment, the instruction scheduling strategy device 1 stored in the memory 21 can also be divided into one or more program modules, and the one or more program modules are stored in the memory 21 and executed by one or more processors (processor 23 in this embodiment) to complete this application.

[0172] To achieve the above-mentioned purpose, the present application also provides a computer-readable storage medium, which includes multiple storage media, such as flash memory, hard disk, multimedia card, card-type memory (for example, SD or DX memory, etc.), random access memory (RAM), static random access memory (SRAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), programmable read-only memory (PROM), magnetic memory, disk, optical disk, server, App application store, etc., on which a computer program is stored, and when the program is executed by the processor 23, the corresponding function is realized. The computer-readable storage medium of this embodiment is used to store the instruction scheduling decision device 1, and when executed by the processor 23, the instruction scheduling decision method of the embodiment of the present application is realized.

[0173] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0174] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and modules described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0175] In the several embodiments provided in the embodiments of the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the modules is only a logical function division. There may be other division methods in actual implementation, such as multiple modules or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or modules, which can be electrical, mechanical or other forms.

[0176] The modules described as separate components may or may not be physically separate, and the components shown as modules may or may not be physical modules, that is, they may be located in one place or distributed across multiple network modules. Some or all of the modules may be selected to achieve the purpose of the present embodiment according to actual needs.

[0177] In addition, the functional modules in each embodiment of the present application can be integrated into a processing module, or each module can exist physically separately, or two or more modules can be integrated into a module. The above-mentioned integrated modules can be implemented in the form of hardware or in the form of software functional modules. If the integrated modules are implemented in the form of software functional modules and sold or used as independent products, they can be stored in a computer-readable storage medium.

[0178] In the above embodiments, all or part of the embodiments may be implemented by software, hardware, firmware, or any combination thereof. When implemented by software, all or part of the embodiments may be implemented in the form of a computer program product.

[0179] The computer program product includes one or more computer instructions. When the computer program is loaded and executed on a computer, the process or function described in accordance with the embodiments of the present application is generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via a wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) method. The computer-readable storage medium may be any available medium that can be stored on a computer or a data storage device such as a server or data center that includes one or more available media. The available medium may be a magnetic medium (e.g., a floppy disk, hard disk, or magnetic tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state drive (SSD)).

[0180] The above is a detailed introduction to the technical solutions provided in the embodiments of the present application. Specific examples are used in the embodiments of the present application to illustrate the principles and implementation methods of the embodiments of the present application. The description of the above embodiments is only used to help understand the methods and core ideas of the embodiments of the present application. At the same time, for those skilled in the art, according to the ideas of the embodiments of the present application, there will be changes in the specific implementation methods and application scopes. In summary, the content of this specification should not be understood as a limitation on the embodiments of the present application.

Claims

1. A method for instruction scheduling decision-making, characterized in that: Applied to instruction scheduling of a VLIW processor, the method comprises: Establishing a dependency graph based on the sequence of instructions to be executed, wherein the dependency graph includes a plurality of instruction nodes, wherein edges between adjacent instruction nodes represent dependency relationships between corresponding instructions, and weight values of the edges represent delays between the connected instruction nodes; Establishing a constraint condition including dependency constraints according to the dependency relationships and delays between the respective instruction nodes, wherein the number of dependency constraints included in the constraint condition is less than the number of dependency paths in the dependency graph; Constructing a plurality of candidate decisions, each candidate decision meeting the constraints, and each candidate decision including the execution status of all instructions in the entire execution cycle of the sequence of instructions to be executed; Obtaining a total consumption value for scheduling and executing instructions according to each candidate decision, where each total consumption value includes a time consumption value and a resource consumption value when scheduling and executing instructions according to the corresponding candidate decision; The instruction scheduling policy is obtained from multiple candidate decisions by minimizing the following objective function: O = l + β × C Where O is the total cost of a candidate decision; l is the total scheduling length of a candidate decision, which represents the total time required for all instructions to complete execution when executing instructions based on the candidate decision; C is the maximum number of virtual registers that can survive at the same time, which is used to ensure the execution of each instruction; β is a weight factor used to adjust the relative importance of l and C in the decision. The candidate decision with the smallest total consumption value is used as the instruction scheduling strategy; The establishment of constraint conditions including dependency constraints based on the dependency and delay between the various instruction nodes includes: Traversing target instruction node pairs having dependency relationships, and establishing dependency constraints based on a dependency path length between two instruction nodes in the target instruction node pairs; the dependency path length is obtained based on the delay of the two instruction nodes connected thereto; Obtaining the constraint conditions according to the dependency constraints of each target node pair; The establishing of dependency constraints based on the dependency path length between two instruction nodes in the target instruction node pair includes: If there is a unique dependency path between two instruction nodes, a dependency constraint is established based on the length of the dependency path; If there are multiple dependency paths between two instruction nodes, then the length of each dependency path is obtained; and Build dependency constraints based on the longest dependency path among multiple dependency paths.

2. The method according to claim 1, wherein The constraint condition also includes one of the following: Resource constraint conditions are configured to constrain that at each moment, the processing unit resources allocated to each instruction do not exceed the total amount of resources that the system can provide; Instruction scheduling constraints are configured to constrain each instruction to be scheduled only once; Timing constraints, configured to control the earliest and latest execution times for each instruction; and The instruction issuance constraint is configured to constrain the instructions that can be scheduled at the same time.

3. The method according to claim 1, wherein The multiple candidate decisions are constructed, including: Introducing a decision variable for the execution state of each instruction at each moment, wherein the decision variable is a binary variable, and different values represent different execution states, wherein the execution state includes execution or non-execution; By traversing the feasible value combinations of the decision variables of each instruction at each moment, candidate decisions are obtained, each value combination corresponds to a candidate decision, and any candidate decision meets the constraints.

4. The method according to claim 1, wherein There is at least one candidate decision scheduling instruction in each candidate decision that is executed in parallel; The specific content of the constraint conditions is adjusted based on hardware resources and performance targets.

5. An instruction scheduling decision device, applied to a VLIW processor, comprising: A first building module is configured to establish a dependency graph, wherein the dependency graph includes a plurality of instruction nodes, wherein edges between adjacent instruction nodes represent dependency relationships between corresponding instructions, and weight values of the edges represent delays between the connected instruction nodes; A second building module is configured to establish a constraint condition including dependency constraints according to the dependency relationships and delays between the respective instruction nodes, wherein the number of dependency constraints included in the constraint condition is less than the number of dependency paths in the dependency graph; a third building module configured to build a plurality of candidate decisions, each candidate decision meeting the constraint condition, and each candidate decision including execution states of all instructions in the entire execution cycle of the instruction sequence to be executed; An acquisition module is configured to acquire a total cost value of scheduling and executing instructions according to each candidate decision, where each total cost value includes a time cost value and a resource cost value when scheduling and executing instructions according to the corresponding candidate decision; wherein the instruction scheduling strategy is acquired from the plurality of candidate decisions by minimizing the following objective function: O = l + β × C Where O is the total cost of a candidate decision; l is the total scheduling length of a candidate decision, which represents the total time required for all instructions to complete execution when executing instructions based on the candidate decision; C is the maximum number of virtual registers that can survive at the same time, which is used to ensure the execution of each instruction; β is a weight factor used to adjust the relative importance of l and C in the decision; and The decision module is configured to use the candidate decision with the smallest total consumption value as the instruction scheduling strategy; The establishment of constraint conditions including dependency constraints based on the dependency and delay between the various instruction nodes includes: Traversing target instruction node pairs having dependency relationships, and establishing dependency constraints based on a dependency path length between two instruction nodes in the target instruction node pairs; the dependency path length is obtained based on the delay of the two instruction nodes connected thereto; Obtaining the constraint conditions according to the dependency constraints of each target node pair; The establishing of dependency constraints based on the dependency path length between two instruction nodes in the target instruction node pair includes: If there is a unique dependency path between two instruction nodes, a dependency constraint is established based on the length of the dependency path; If there are multiple dependency paths between two instruction nodes, then the length of each dependency path is obtained; and Build dependency constraints based on the longest dependency path among multiple dependency paths.

6. A computing device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the computer program, the method according to any one of claims 1 to 4 is implemented.

7. A computer-readable storage medium comprising instructions, which, when executed on a computer, causes the computer to perform the method according to any one of claims 1 to 4.

8. A computer program product comprising computer instructions, characterized in that When the computer instructions are executed by a processor, the method according to any one of claims 1 to 4 is implemented.

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