Display device

Abstract

The invention relates to a display device. Each of the plurality of pixel circuits includes: a light emitting element; a first power supply line for supplying a power supply voltage to the light emitting element; a driving transistor for controlling a current to the light emitting element; a sensing transistor, a gate electrode of which is connected to an end portion of the light emitting element; a second power line connected to a drain electrode of the sensing transistor; and a first switching transistor connected between a source electrode of the sensing transistor and a sensing line. The driving transistor controls a sensing current from the first power supply line to the light emitting element to measure a voltage at an end of the light emitting element. The sense transistor supplies a source voltage to the sense line when the light emitting element is supplied with the sense current. A measurement circuit determines a voltage of the light emitting element based on an output of the sense line.

Description

Technical Field

[0001] The present invention relates to display devices, and more particularly to measurement of light intensity degradation of light emitting elements. Background Art

[0002] Organic light emitting diode (OLED) elements are current-driven light emitting elements, so they do not require a backlight source. In addition, OLED elements have the advantages of achieving low power consumption, wide viewing angles, and high contrast; they are expected to contribute to the development of flat panel display devices.

[0003] There are irreversible changes in the characteristics of light-emitting elements such as OLED elements, which affect their light-emitting life. Specifically, such changes can lead to problems such as image burn-in or residual images, in which traces of a fixed image are continuously seen. An example of a method for solving or alleviating this problem compensates for the degradation of the light intensity of the OLED element. The method estimates the degree of degradation of each OLED element and controls its light emission by adjusting the light intensity according to the degree of degradation. Therefore, the difference in light intensity between pixels caused by the degradation of the OLED element can be reduced. Summary of the invention

[0004] The degree of degradation of the light intensity of the light emitting element can be estimated based on the change in the current-voltage characteristic of the light emitting element. An example of measuring the degradation of the light intensity of an OLED element is to supply a constant current to the OLED element from an external current source through a sensing line and measure the voltage at a monitoring point (anode of the OLED element) in the pixel when no image is displayed (e.g., during startup or blanking).

[0005] This measurement requires time to charge the line capacitor of the sense line, so if the supplied sense current is low, the measurement takes a long time. Although this time can be reduced by increasing the sense current, the voltage drop across the select switch transistor can be very large and interfere with a correct measurement. From a pixel layout perspective, it is not practical to increase the channel width of the select switch transistor to mitigate this voltage drop.

[0006] One aspect of the present invention is a display device, which includes a plurality of pixel circuits on a substrate, a sensing line on the substrate, and a measuring circuit. Each of the plurality of pixel circuits includes: a light emitting element; a first power line, the first power line is configured to supply a power supply voltage to the light emitting element so that a current flows through the light emitting element; a driving transistor, the driving transistor is configured to control the amount of light emitting current to the light emitting element; a sensing transistor, the gate electrode of the sensing transistor is connected to the end of the light emitting element; a second power line, the second power line is connected to the drain electrode of the sensing transistor; and a first switching transistor, the first switching transistor is connected between the source electrode of the sensing transistor and the sensing line. It should be noted that the ends of the circuit components can be represented by terminal symbols or connection symbols. The sensing transistor, the first switching transistor, the sensing line, and the second power line are included in the sensing circuit. The driving transistor is configured to control the sensing current from the first power line to the light emitting element to measure the voltage at the end of the light emitting element. The sensing transistor is configured to supply a source voltage to the sensing line when the light emitting element is supplied with the sensing current. The measurement circuit is configured to determine a voltage of the light emitting element based on an output of the sense line.

[0007] One aspect of the present invention is capable of measuring degradation of current-voltage characteristics of a light emitting element at high speed and accurately.

[0008] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are not restrictive of the invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 A configuration example of a display panel included in an OLED display device is schematically shown.

[0010] Figure 2 A configuration example of a pixel circuit and a circuit for measuring degradation of an OLED element in the pixel circuit is schematically shown.

[0011] Figure 3 Another configuration example of a display panel included in an OLED display device is schematically shown.

[0012] Figure 4 A configuration example of a circuit including a CDS circuit for measuring degradation of an OLED element is shown.

[0013] Figure 5 is a timing diagram showing the temporal changes of some control signals when reading a reference signal.

[0014] Figure 6The ON / OFF states of transistors in the pixel circuit and the CDS circuit during the period PR1 are shown.

[0015] Figure 7 is a timing diagram showing temporal changes of some control signals when reading an unknown measurement target signal.

[0016] Figure 8 The ON / OFF states of transistors in the pixel circuit and the CDS circuit during the period PR2 are shown.

[0017] Fig. 9 The time variations of the signals S2, Em, SSS, Φa, and Φb are shown.

[0018] Fig.10 It is used to control the pulse width of the signal Em with 5H. Figure 4 Timing diagram of the 7T1C pixel circuit and CDS circuit in FIG.

[0019] Fig.11 One example of a pixel circuit to which degradation measurement of an OLED element in the embodiment of this specification can be applied is shown.

[0020] Fig.12 It is used to measure Fig.11 A timing diagram of a control signal of an anode voltage in a pixel circuit in FIG.

[0021] Fig.13 Another example of a pixel circuit to which degradation measurement of an OLED element in the embodiment of this specification can be applied is shown.

[0022] Fig.14 It is used to measure Fig.13 A timing diagram of a control signal of an anode voltage in a pixel circuit in FIG.

[0023] Fig.15 A configuration example is shown in which the sensing line is divided for the upper area and the lower area of ​​the display panel to reduce the sensing line capacitance.

[0024] Fig.16 A configuration example is shown in which each pixel circuit column is divided into one pixel circuit group composed of odd-numbered pixel circuits and another pixel circuit group composed of even-numbered pixel circuits, and the respective pixel circuit groups are connected to different sensing lines.

[0025] Fig.17 Simulation results of changes in the voltage of a sensing line and the output of a CDS circuit in response to a data signal voltage calculated by a Monte Carlo method are provided in the case where sensing transistors have different threshold voltages Vth. DETAILED DESCRIPTION

[0026] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. It should be noted that these embodiments are merely examples for implementing the present invention and do not limit the technical scope of the present invention.

[0027] The display device in the embodiment of the present specification measures the degree of degradation of the light intensity of each light emitting element. The degree of degradation of the light intensity of the light emitting element can be estimated based on the change of the current-voltage characteristic of the light emitting element. The example of measurement supplies a constant current to the OLED element through a sensing line and measures the voltage at a monitoring point in the pixel (in the example described herein, the anode of the OLED element).

[0028] This measurement requires time to charge the line capacitor of the sense line, so if the supplied sense current is low, the measurement takes a long time.

[0029] Although this time can be reduced by increasing the sense current, the voltage drop across the select switch transistor can be significant and interfere with proper measurement. From a pixel layout perspective, increasing the channel width of the select switch transistor to mitigate this voltage drop is not practical.

[0030] One embodiment of the present invention generates a sensing current for measuring the voltage of a light-emitting element from a power supply line for supplying a power supply voltage to be used in a pixel circuit, and supplies the sensing current to the light-emitting element. The circuit for reading the voltage of the light-emitting element includes a sensing circuit configured by a source follower circuit. The sensing circuit includes a sensing transistor, the gate of the sensing transistor is connected to a monitoring point. The source of the sensing transistor is connected to a sensing line directly or through a switching transistor. The sensing line is supplied with a constant current.

[0031] Since the sensing current is generated within the pixel circuit, even if the sensing current is low, the capacitance of the sensing line has little effect on the time constant, thereby enabling fast measurement. Since the monitoring voltage is supplied to the gate of the sensing transistor, the current does not flow, thereby preventing the voltage drop at the sensing transistor. In addition, one embodiment of the present invention uses a correlated double sampling (CDS) circuit to measure the voltage of the light-emitting element. The circuit effectively reduces the variation of the threshold voltage Vth between the sensing transistors.

[0032] First embodiment

[0033] Display panel configuration

[0034] A display device in one embodiment of the present specification is described. For a clear understanding of the description, the elements in the drawings may be exaggerated in size and / or shape. As an example of a display device, an OLED display device is described below. The measurement of the characteristics of the light-emitting element in the present invention is applicable to a current-driven light-emitting element other than an OLED element, such as an inorganic LED element.

[0035] Figure 1 Schematically shows an example of a configuration of a display panel 100 included in an OLED display device. The display panel 100 includes a display area 125 composed of a plurality of pixel circuits 210 arranged on an insulating substrate. Figure 1 , as an example, one of the pixel circuits is provided with reference numeral 210. The driving circuit of the pixel circuit 210, specifically, the vertical scanning circuits 131A and 131B for image display, the sensing signal vertical scanning circuit 132, the horizontal scanning circuit 133, and the data line driving circuit 134 are arranged on the periphery of the display area 125.

[0036] exist Figure 1 In the configuration example, the sensing signal vertical scanning circuit 132 is set on the left side of the display area 125; the vertical scanning circuits 131A and 131B for image display are set on the right side of the display area 125; the horizontal scanning circuit 133 is set on the upper side of the display area 125; and the data line driving circuit 134 is set on the lower side of the display area 125.

[0037] Each pixel circuit 210 includes an OLED element (light emitting element) and a thin film transistor (TFT) circuit for controlling the light emission of the OLED element or measuring the degradation of the OLED element. Figure 1 In the configuration example of , the display area 125 is composed of M pixel circuit rows, each pixel circuit row is composed of a plurality of pixel circuits 210 arranged along the X axis. The pixel circuit rows are arranged one above the other along the Y axis. Each pixel circuit row is a pixel circuit line. In one example, the pixel circuits constituting the pixel circuit rows are connected to one or more common selection lines (control lines) and are controlled simultaneously.

[0038] The display area 125 is also composed of N pixel circuit columns, each pixel circuit column is composed of a plurality of pixel circuits 210 arranged along the Y axis. The pixel circuit columns are arranged side by side along the X axis. The layout of the pixel circuit 210 can be appropriately determined according to the design. A pixel row or a pixel column is a pixel line. In one example, the pixel circuits constituting the pixel circuit column are connected to the same data line, and the data signal is written from the data line to the pixel circuits selected one by one.

[0039] The OLED element in the pixel circuit 210 emits light of a specific color. Figure 1As shown, the colors of the light emitted from all pixel circuits 210 may be the same white, or different colors among red, green, and blue. Figure 1 In the example of FIG. 1 , each pixel circuit column includes an OLED element for the same color. The pixel circuit 210 included in the display area 125 displays an image based on video data from the outside.

[0040] For example, the vertical scanning circuits 131A and 131B for image display output a plurality of selection signals to each pixel circuit row so as to write a data signal for displaying an image into the pixel circuit 210 therein and light up / extinguish the OLED element therein. Figure 1 Scan lines for transmitting selection signals from the vertical scanning circuits 131A and 131B for image display to the pixel circuits 210 in each pixel circuit row are not included. Each scan line is connected to a terminal of the vertical scanning circuit 131A or 131B for image display and one or more pixel circuit rows.

[0041] The data line drive circuit 134 outputs a data signal to the pixel circuit row selected for displaying an image (frame). The data signal specifies the luminous intensity of the OLED elements in the pixel circuit row according to the grayscale level of the image to be displayed. Figure 1 A data line for transmitting a data signal from the data line driving circuit 134 to a pixel circuit 210 selected from each pixel circuit column is not included. Each data line is connected to a terminal of the data line driving circuit 134 and a pixel circuit column.

[0042] The pixel circuits in the pixel circuit row are connected to a common sensing signal scanning line SS extending along the X-axis. Figure 1 2, one of the sensing signal scanning lines is provided with a reference numeral SS as an example. The sensing signal scanning line SS is driven by a sensing signal vertical scanning circuit 132. The sensing signal vertical scanning circuit 132 outputs a selection signal for a pixel circuit row to measure degradation of an OLED element in a pixel circuit 210 therein. Each pixel circuit 210 includes a selection switch transistor M9 that is turned on / off according to a selection signal transmitted by the sensing signal scanning line SS.

[0043] The horizontal scanning circuit 133 outputs a selection signal for a pixel circuit column to measure the degradation of the OLED element in the pixel circuit 210 therein. The selection signal turns on the selected selection switch transistor M10. The transistor M10 is connected to a sensing line SL extending along the Y axis, and the sensing line SL is connected to a transistor M9 (pixel circuit 210) in one pixel column. Figure 1 , as an example, one of the transistors is provided with reference sign M10.

[0044] The sensing line SL transmits a sensing signal indicating the degree of degradation of the selected OLED element. The horizontal scanning circuit 133 selects a sensing line SL or a pixel column to read the sensing signal therefrom. Figure 1 In FIG. 1 , as an example, one of the sensing lines is provided with a reference sign SL.

[0045] exist Figure 1 In the configuration example of , each terminal of the horizontal scanning circuit 133 is connected to the transistor M10 for three pixel columns of different colors of red, blue and green, and these pixel columns are selected together. The transistor M10 for the pixel column of the same color is connected to the same transmission line extending to the output terminal 101. There are three output terminals 101 for outputting signals of the red pixel circuit, the blue pixel circuit, and the green pixel circuit. In Figure 1 , as an example, one of the output terminals is provided with reference numeral 101. The transistor M10 electrically connects the sensing line SL and the output terminal 101, thereby selecting the sensing line SL for outputting the signal. The sensing signal indicating the degradation of the OLED element read from the sensing line SL is transmitted from the output terminal 101 to the external control circuit. The circuit including the external control circuit and the driving circuit of the display panel may be referred to as a control driving circuit.

[0046] Measurement of OLED element degradation

[0047] The pixel circuit 210 includes an OLED element, and controls the light intensity of the OLED element by controlling the current supplied to the anode of the OLED element. Figure 2 An example of the configuration of a pixel circuit 210 and a circuit for measuring degradation of an OLED element in the pixel circuit is schematically shown.

[0048] The pixel circuit 210 includes an OLED element E1, nine thin film transistors (TFTs) M1 to M9, and a storage capacitor Cst. The pixel circuit 210 is used to control the light emission of the OLED element E1, and is also used to measure the degradation of the OLED element E1 in the pixel circuit 210. The degradation measurement measures the current-voltage characteristics of the OLED element E1. In this example, the transistors M1 to M9 are p-type, and the transistors except the transistor M3 are switching transistors.

[0049] The transistor M3 is a driving transistor for controlling the amount of current to the OLED element E1. The driving transistor M3 controls the amount of current to be supplied to the OLED element E1 from the power supply line VDDL for supplying the anode power supply voltage VDD according to the voltage maintained by the storage capacitor Cst. The cathode of the OLED element E1 is connected to the power supply line for supplying the cathode power supply voltage VEE. The storage capacitor Cst maintains the gate-source voltage (also referred to as the gate voltage) of the driving transistor M3.

[0050] Transistors M1 and M6 control whether to light up the OLED element E1. Transistor M1 turns on / off the current supply from the anode power supply line VDDL to the driving transistor M3. Transistor M6 turns on / off the current supply from the driving transistor M3 to the OLED element E1. Transistors M1 and M6 are controlled by a control signal Em input from a vertical scanning circuit 131A or 131B for image display.

[0051] The transistor M5 controls whether to supply a reference voltage to the gate of the driving transistor M3. When the transistor M5 is turned on by the selection signal S1 from the vertical scanning circuit 131A or 131B for image display, it supplies a reference voltage Vref from the reference power line to the gate of the driving transistor M3. The reference voltage Vref is a constant voltage lower than the power supply voltage VDD and may be equal to or higher than the power supply voltage VEE.

[0052] The transistor M2 is a selection transistor for selecting the pixel circuit 210 to be supplied with a data signal. The gate voltage of the transistor M2 is controlled by the selection signal S2 supplied from the vertical scanning circuit 131A or 131B for image display. When the selection transistor M2 is turned on, it supplies the data signal Vdata from the data line to the gate (storage capacitor Cst) of the driving transistor M3.

[0053] The selection transistor M2 (its source and drain) in this example is connected between the data line and the source of the driving transistor M3. The transistor M4 (its source and drain) is connected between the drain and the gate of the driving transistor M3. The transistor M4 is used to compensate for the change of the threshold voltage of the driving transistor M3. The data signal Vdata from the data line is supplied to the storage capacitor Cst through the selection transistor M2, the driving transistor M3 and the transistor M4 in the on state. The storage capacitor Cst stores the voltage that adds the threshold voltage Vth of the driving transistor M3 to the data signal.

[0054] The transistor M7 controls whether to supply the reset voltage Vrst to the anode of the OLED element E1. When the transistor M7 is turned on by the selection signal S2 from the vertical scanning circuit 131A or 131B for image display, it supplies the reset voltage Vrst to the anode of the OLED element E1 from the reset power line. The reset voltage Vrst is a constant voltage that is lower than the power supply voltage VDD and can be equal to or higher than the power supply voltage VEE.

[0055] Transistor M8 is a sensing transistor for measuring the anode voltage of OLED element E1 to measure degradation of OLED element E1. The gate of transistor M8 is connected to a sensing node located between the anode of OLED element E1 and transistor M6 and supplied with the anode voltage of OLED element E1. When measuring degradation of OLED element E1, the anode voltage is represented by Vf.

[0056] like Figure 2 As shown, a sense current SC for measuring degradation of the OLED element E1 is supplied from the power supply line VDDL through transistors M1, M3 and M6. The amount of the sense current SC is predetermined and constant. The path of the sense current SC is the same as the path of the current to the OLED element E1 in a conventional image display. In this configuration, the parasitic capacitance associated with the path of the sense current is very small because the current path is confined within a single pixel, thereby enabling rapid degradation measurement.

[0057] The drain of transistor M8 is supplied with reference voltage Vref, and its source is connected to the drain of transistor M9. The source of transistor M9 is connected to the sensing line SL. The gate of transistor M9 is connected to the sensing signal scanning line SS and is controlled by the selection signal SSS from the sensing signal vertical scanning circuit 132. The supply line of reference voltage Vref, transistor M8, and transistor M9 are specially provided for pixels to constitute the sensing circuit 310. The voltage source connected to the drain of M8 can be a voltage source separated from Vref. However, in order to simplify the pixel layout design, it is preferred to use Vref.

[0058] The sensing line SL has a sensing line capacitance (parasitic capacitance) Cp. The drain of the transistor M10 is connected to the sensing line SL, and the source thereof is connected to the output terminal 101. The gate of the transistor M10 is controlled by a selection signal SSC from the horizontal scanning circuit 133. The transistors M9 and M10 are switches for selecting the pixel circuit 210 to measure the characteristics of the OLED element E1 therein.

[0059] The control circuit 300 may be provided outside the display panel 100. The control circuit 300 generates a data signal according to video data received from the outside to display an image corresponding to the video data, and controls the driving circuits 131A, 131B, and 134. The control circuit 300 also controls the sensing signal vertical scanning circuit 132, and also acquires a signal representing the characteristics of the OLED element E1 through the sensing line SL to evaluate the OLED element E1. The control circuit 300 determines the data signal to be supplied to the pixel circuit 210 according to the condition of the OLED element E1.

[0060] The control circuit 300 measures degradation of the OLED element E1. The measurement is performed in a mode different from a normal mode for displaying an image. The degradation measurement may be performed in response to an instruction from a user or automatically before an activated display device starts displaying an image.

[0061] The control circuit 300 measures the voltage VOUT transmitted by the sensing line SL and output from the output terminal 101. The measurement writes a data signal for degradation measurement into the storage capacitor Cst, and then turns on the transistors M1, M6, M8, M9 and M10, and turns off the transistors M2, M4, M5 and M7.

[0062] A predetermined sense current SC flows from the power line VDDL into the OLED element E1; the anode voltage of the OLED element E1 is represented by Vf. This embodiment measures the anode voltage Vf of the OLED element E1 using the sense circuit 310. This configuration enables fast measurement with less delay even if the sense current is low.

[0063] The drain of transistor M8 is supplied with a reference voltage Vref lower than the power supply voltage VDD. The control circuit 300 supplies a constant current Is to the sensing line SL, which is substantially determined by the resistor RL, the power supply voltage VDD, and the reference voltage Vref. The anode of the OLED element E1 is connected to the gate of the transistor M8. The source of the transistor M8 is connected to the drain of the transistor M9. The source voltage of the transistor M8 is (Vf-Vth), where Vth represents the threshold voltage of the transistor M8. The sensing voltage VOUT is a value obtained by adding the voltage drop represented by the product (Ron×Is) of the on-resistance Ron of the transistor M9 and the constant current Is to the source voltage of the transistor M8 (Vf–Vth+Ron×Is). The circuit configuration for the constant current supply of the sensing line is determined as desired and is not limited to this example.

[0064] Since transistors M8 and M9 are specifically provided for pixel circuits, the sensing voltage VOUT is affected by the threshold voltage Vth of transistor M8 and the on-resistance Ron of transistor M9, resulting in variations between pixel circuits. However, the column selection switch transistor M10 can have a wide channel width because it is provided at the periphery of the display area 125. Therefore, the voltage drop caused by the on-resistance of M10 is small enough, and the variation between columns is small enough to be negligible.

[0065] The input / output gain G of the sensing circuit 310 is defined by the ratio of the output voltage (sense voltage) VOUT of the sensing circuit to the input voltage VIN (anode voltage Vf):

[0066] G=(VIN–Vth+Ron×Is) / VIN.

[0067] In the case of a p-type transistor (such as Figure 2The input / output gain G takes a value less than 1 because VIN takes a negative value, Vth takes a negative value, and Ron×Is takes a positive value. In the case where the transistor is an n-type, the input / output gain G also takes a value less than 1 because VIN takes a positive value, Vth takes a positive value, and Ron×Is takes a negative value.

[0068] In order to reduce the variation between pixel circuits 210, the control circuit 300 may have information about the sensed voltage VOUT of each pixel circuit 210 (OLED element E1) measured in the initial state in the memory, and calculate the difference with the sensed voltage obtained in the degradation measurement. Then, the influence of the threshold voltage Vth and the on-resistance Ron on the degradation measurement can be reduced. If the threshold voltage does not substantially affect the degradation measurement, or the variation between pixel circuits can be ignored, the measurement result does not need to be calibrated.

[0069] Alternatively, the control circuit 300 may eliminate the influence of the variation by storing information about the input / output gain G of each sensing circuit 310 in a memory and calibrating the sensing voltage VOUT measured from each pixel.

[0070] Second embodiment

[0071] Another embodiment of measuring degradation of an OLED element is described. The following mainly describes the differences from the first embodiment. This embodiment not only uses a source follower circuit, but also uses a correlated double sampling (CDS) circuit to calibrate the sensing voltage VOUT when measuring degradation of an OLED element. As described above, the sensing voltage VOUT is affected by the threshold voltage of the sensing transistor and the on-resistance Ron of the transistor M9. The CDS circuit calibrates the signal with an analog voltage when acquiring the signal. Therefore, the control circuit 300 does not need to store the initial value in advance, and further, the aging changes of the threshold value Vth and the on-resistance Ron of the transistor M9 can be eliminated in real time.

[0072] Figure 3 Schematically shows another configuration example of the display panel 100 included in the OLED display device. Figure 1 Compared with the configuration of the display panel in FIG. 1 , a CDS circuit 320 is added. Each CDS circuit 320 is provided for a different sensing line. In other words, each CDS circuit 320 is provided between the sensing line SL and the transistor M10. The display panel 100 including the CDS circuit 320 can perform more accurate measurement, and does not require a CDS circuit in the control circuit 300. One CDS circuit can perform sensing voltage calibration for multiple sensing lines.

[0073] Figure 4FIG. 2 shows a configuration example of a circuit including a CDS circuit 320 for measuring degradation of an OLED element E1. Figure 2 Compared with the configuration example of the circuit in , the CDS circuit 320 is added, and the resistor RL for determining the constant current to be supplied to the sensing line SL is provided on the insulating substrate of the display panel 100. Figure 3 Some components on the display panel 100 are omitted, such as a VDD line in a source follower circuit, a resistor RL, and transmission lines of signals Φa and Φb.

[0074] In reference Figure 3 In the described example, the CDS circuit 320 is disposed on the insulating substrate of the display panel 100. When the CDS circuit 320 processes a signal including variations (noise), it samples the unknown signal and the reference signal and takes the difference between them to remove the noise associated with the unknown signal. In order for the CDS circuit 320 to eliminate variations in the threshold voltage Vth of the sensing transistor M8 and the on-resistance Ron of the transistor M9, a reference signal including these variations must be prepared.

[0075] The reference signal must be a known signal, and the present embodiment uses the reset voltage Vrst supplied to the anode of the OLED element E1. This configuration effectively enables the CDS circuit 320 to be supplied with the reference signal without preparing an additional line and power supply for the reference signal.

[0076] like Figure 4 As shown, the CDS circuit 320 includes capacitors Ca and Cb and switching transistors M21 to M24. The transistors M21 to M24 in this example are p-type thin film transistors. The capacitor Ca, the transistor M22, and the transistor M23 are connected in series in this order from the sensing line SL toward the output terminal 101. One end of the capacitor Ca is connected to the sensing line SL, and the other end is connected to one of the source / drain of the transistor M22.

[0077] The other of the source / drain of the transistor M22 is connected to one of the source / drain of the transistor M23. The other of the source / drain of the transistor M23 is connected to the output terminal 101. The gate of the transistor M22 is supplied with a selection signal Φb from the control circuit 300 or the horizontal scanning circuit 133. The gate of the transistor M23 is supplied with a selection signal SSC from the horizontal scanning circuit 133.

[0078] One of the source / drain of the transistor M21 is connected to the node between the capacitor Ca and the transistor M22, and the other of the source / drain is supplied with a constant voltage Vc, which is a voltage between VDD and VEE. One of the source / drain of the transistor M24 is connected to the node between the transistors M22 and M23, and the other of the source / drain is supplied with a ground voltage GND. The ground voltage GND is a constant voltage lower than the power supply voltage VDD, and may be equal to or higher than the power supply voltage VEE. The gates of the transistors M21 and M24 are supplied with a selection signal Φa from the control circuit 300 or the horizontal scanning circuit 133. One end of the capacitor Cb is connected to the node between the transistors M22 and M23, and the other end is supplied with a reference voltage Vref2. The reference voltage Vref2 is a constant voltage lower than the power supply voltage VDD, and may be equal to or higher than the power supply voltage VEE.

[0079] When performing degradation measurement on the OLED element E1, the CDS circuit 320 is supplied with a signal obtained by multiplying the anode voltage Vf of the OLED element E1 by the input / output gain G of the sensing circuit 310, and outputs a signal VOUT in which changes included in the input / output gain G or changes in the threshold voltage Vth of the transistor M8 and the on-resistance of the transistor M9 are eliminated.

[0080] The following describes an operation example of degradation measurement using the CDS circuit 320. The CDS circuit 320 samples (reads) a reference signal (Vrst×G) when a reset voltage (reference voltage) Vrst is supplied to the anode of the OLED element E1, samples (reads) a measurement target signal (unknown signal) (Vf×G) when a sense current SC is supplied to the anode of the OLED element E1, and outputs a signal VOUT indicating a difference between these signals.

[0081] Figure 5 is a timing diagram showing the time variation of some control signals when reading a reference signal. Specifically, Figure 5 The temporal variations of the signals Em(N), S1(N), S2(N), Φa(N), Φb(N), and SSS(N) are shown, where N represents the signal of the Nth pixel circuit row.

[0082] At time T1, signal Em(N) changes from L level (low level) to H level (high level); signal S1(N) changes from H level to L level; signal S2(N) maintains H level; signal Φa(N) maintains H level; signal Φb(N) maintains H level; signal SSS(N) maintains H level.

[0083] Since the signal Em(N) becomes H level, the transistors M1 and M6 are turned off. Since the signal S1(N) becomes L level, the transistor M5 is turned on. Since the signal S2(N) remains H level, the transistors M2, M4 and M7 remain turned off. This means that the sense current does not flow in the pixel circuit, and the reference voltage Vref is supplied to the gate of the transistor M3. Since the signals Φa(N), Φb(N) and SSS(N) remain H level, the transistors M9, M21, M22 and M24 are turned off. The transistor M23 is also turned off.

[0084] At time T2, which is 1 H later than time T1, signal Em(N) maintains the H level; signal S1(N) changes from the L level to the H level; signal S2(N) changes from the H level to the L level; signal Φa(N) changes from the H level to the L level; signal Φb(N) maintains the H level; and signal SSS(N) changes from the H level to the L level.

[0085] Since the signal Em(N) maintains the H level, the transistors M1 and M6 are turned off. Since the signal S1(N) becomes the H level, the transistor M5 is turned off. Since the signal S2(N) becomes the L level, the transistors M2, M4 and M7 are turned on. This means that the sense current does not flow in the pixel circuit, and the data signal for supplying the sense current SC is written to the storage capacitor Cst. The anode of the OLED element E1 is supplied with the reset voltage Vrst.

[0086] Since the signals Φa(N) and SSS(N) become L level, the transistors M21, M24 and M9 are turned on. Since the signal Φb(N) remains H level, the transistor M22 is turned off. One end of the capacitor Ca is supplied with a voltage (Vrst×G), and the other end is supplied with a voltage Vc. Both ends of the capacitor Cb are supplied with a ground voltage and a reference voltage Vref2. The transistor M23 is turned off.

[0087] From time T2 to time T3, the level of the signal remains unchanged. During the period PR1 of 1H, the CDS circuit 320 reads the reference signal (Vrst×G). That is, during the period PR1, the signals Em(N), S1(N) and Φb(N) are at the H level, and the signals S2(N), Φa(N) and SSS(N) are at the L level.

[0088] Figure 6 The ON / OFF states of the transistors in the pixel circuit 210 and the CDS circuit 320 during the period PR1 are shown. Since the signals Em(N), S1(N) and Φb(N) are at the H level, the p-type switching transistors controlled by these signals are turned off. Specifically, the transistors M1, M6, M5 and M22 are turned off.

[0089] Since the signals S2(N), Φa(N) and SSS(N) are at L level, the p-type switching transistors controlled by these signals are turned on. Specifically, transistors M2, M4, M7, M9, M21 and M24 are turned on. Transistor M23 is turned off.

[0090] During this period PR1, the sensing line SL outputs the reference signal (Vrst×G). In the CDS circuit 320, the node between the capacitor Ca and the transistor M22 is at a voltage Vc. This is because the transistor M21 is turned on and the transistor M22 is turned off.

[0091] Next, reading of an unknown measurement target signal is described. Figure 7 is a timing diagram showing the time variation of some control signals when reading an unknown measurement target signal. Specifically, Figure 7 The time variations of the signals Em(N), S1(N), S2(N), Φa(N), Φb(N), and SSS(N) are shown. Figure 5 Same as shown.

[0092] The CDS circuit 320 reads the measurement target signal (Vf×G) during the 1H period PR2 from time T3 to time T4 when the period PR1 ends. At time T3, the signal Em(N) changes from the H level to the L level; the signal S1(N) maintains the H level; the signal S2(N) changes from the L level to the H level; the signal Φa(N) changes from the L level to the H level; the signal Φb(N) changes from the H level to the L level; and the signal SSS(N) maintains the L level.

[0093] Since the signal Em(N) becomes L level, the transistors M1 and M6 are turned on. Since the signal S1(N) remains H level, the transistor M5 remains off. Since the signal S2(N) becomes H level, the transistors M2, M4 and M7 are turned off. This means that the sense current based on the voltage stored in the storage capacitor Cst flows within the pixel circuit.

[0094] Since the signal Φa(N) becomes H level, the transistors M21 and M24 are turned off. Since the signal Φb(N) becomes L level, the transistor M22 is turned on. Since the signal SSS remains L level, the transistor M9 remains turned on. One end of the capacitor Ca is supplied with a voltage (Vf×G), and the other end is electrically connected to the capacitor Cb.

[0095] Therefore, during the period PR2, the signals S1(N), S2(N), and Φa(N) are at the H level, and the signals Em(N), Φb(N), and SSS(N) are at the L level. Figure 8The ON / OFF states of the transistors in the pixel circuit 210 and the CDS circuit 320 during the period PR2 are shown. Since the signals S1(N), S2(N) and Φa(N) are at the H level, the p-type switching transistors controlled by these signals are turned off. Specifically, the transistors M5, M2, M4, M7, M21 and M24 are turned off.

[0096] Since the signals Em(N), Φb(N), and SSS(N) are at the L level, the p-type switching transistors controlled by these signals are turned on. Specifically, the transistors M1, M6, M9, and M22 are turned on. The transistor M23 is turned on.

[0097] During this period PR2, the sensing line SL outputs the measurement target signal (Vf×G). The presence of the capacitor Ca allows only the change in voltage to be transmitted (AC component), so the voltage in which the threshold voltage Vth of the transistor M8 is eliminated is output to the capacitor Cb. Specifically, the voltage at the capacitor Cb is (Vc+(Vf×G)–(Vrst×G)=Vc+Vf–Vrst), where the voltages Vc and Vrst are known. This voltage (Vc+Vf–Vrst) is the final output voltage VOUT.

[0098] At time T4, signal Em(N) maintains L level; signal S1(N) maintains H level; signal S2(N) maintains H level; signal Φa(N) maintains H level; signal Φb(N) changes from L level to H level; signal SSS(N) changes from L level to H level.

[0099] The description of the control of the transistor in the pixel circuit 210 for measuring the degradation of the OLED element E1 can be applied to the description of the conventional control for image display. That is, instead of the data signal for determining the sensing current, the data signal for displaying the image is written to the storage capacitor Cst. The reference signal of CDS is read in the reset period of the anode voltage of the OLED element E1, and the measurement target signal is read in a part of the subsequent light emission period. As described above, when displaying an image and measuring the degradation of the OLED element, the switching transistor (excluding the transistor M9) in the pixel circuit that is turned on / off in the conventional image display is controlled with the same timing, realizing an efficient circuit and efficient control.

[0100] The time variation of the control signal is further described. Fig. 9 The time variation of the signals S2, Em, SSS, Φa, and Φb is shown. The variable in brackets attached to each signal indicates the pixel circuit row; (N) means that the signal is for the Nth pixel circuit row. Although Fig. 9 Does not include signal S1, but as referenced Figure 5 and Figure 7As described above, signal S1 changes in the same manner as signal S2, but 1H earlier than signal S2. Fig. 9 The periods PR1 and PR2 in φ are periods for measuring degradation of the OLED element E1 in the N-th pixel circuit row.

[0101] Fig. 9 It is used to control the signal Em when it has a pulse width of 2H (H level period). Figure 4 1C pixel circuit 210 and CDS circuit 320 in FIG. 1C. Signals S1 and S2 have a pulse width of 1H (L level period). Signal SSS has a pulse width of 2H (L level period). Signals Φa and Φb have a pulse width of 1H. This timing enables the fastest measurement of OLED element E1.

[0102] As described above, the reset voltage Vrst of the OLED element E1 is read as a reference voltage for calibrating the threshold voltage Vth of the transistor M8 in the sensing circuit 310. The signal (clamp signal) Φa of the CDS circuit 320 is synchronized with the signal S2 for resetting the anode of the OLED element E1.

[0103] Then, when the OLED element E1 is supplied with a predetermined sense current SC from the pixel circuit and starts to emit light, the anode voltage Vf is read. The signal (sampling signal) Φb of the CDS circuit 320 is synchronized with the signal S2 of the next pixel circuit row (N+1).

[0104] This driving method samples two voltages of the reset voltage Vrst and the anode voltage Vf and inputs them to the CDS circuit 320 while displaying a grating image using a reference current; therefore, a signal in which gain variation of the sensing circuit 310 is canceled is obtained.

[0105] The measurement of voltage Vrst and voltage Vf requires 1H respectively, and each pixel row requires 2H in total. Therefore, the selection signal SSS has a pulse width of 2H. Therefore, a measurement must be performed every two rows. That is, the odd-numbered rows are measured in the first frame period, and then the even-numbered rows are measured in the second frame period to obtain data from all rows. Through this operation, the measurement of one pixel circuit column is completed. The number of times the measurement is repeated is equal to the number of pixel circuit columns to complete the measurement of all pixel circuits.

[0106] Estimated acquisition times are provided here. Assuming a full HD display area consisting of 1920H×1080V, with RGB multiplexed output, and measurements performed at a frame rate of 60Hz, the time required to measure all pixels can be calculated as follows:

[0107] Time required to measure all pixels = 2 × 16.7ms × 1920 = 64.1s

[0108] This acquisition time is approximately 1 / 500 of the acquisition time required using the existing method of supplying the same magnitude of sensing current from an external current source.

[0109] Fig.10 It is used to control the signal Em when it has a pulse width of 5H (H level period). Figure 4 1C pixel circuit 210 and CDS circuit 320 in FIG. 1C. When the signal Em has a pulse width of 5H, each pixel occupies the sensing line SL for 5H; the OLED element is measured once every five rows. The signals S1 and S2 have a pulse width of 1H (L level period); the signal SSS has a pulse width of 5H (L level period); the signals Φa and Φb have a pulse width of 1H (L level period). In this case, the data acquisition time required for all rows is 5 frame periods.

[0110] Assuming that the full HD display area consists of 1920H×1080V, with RGB multiplexed output, and measurement is performed at a frame rate of 60Hz, the time required to measure all pixels can be calculated as follows:

[0111] Time required to measure all pixels = 5 × 16.7 ms × 1920 = 160.3 s

[0112] Although this time is longer than the case where the pulse width is 2H, the method of this embodiment is applicable regardless of how long the pulse width of the signal Em is.

[0113] Pixel circuits in other embodiments

[0114] Fig.11 An example of a pixel circuit to which degradation measurement of an OLED element in an embodiment of the present specification can be applied is shown. The pixel circuit has a 4T2C configuration, and all transistors therein are n-type thin film transistors. The transistors in the CDS circuit are also n-type thin film transistors. Except for the polarity reversal, the relationship between the constant voltages VDD, VEE, Vrst, and Vref is the same as that in the first embodiment.

[0115] Transistor N1 is a driving transistor for controlling the amount of light emitting current to OLED element E1. Storage capacitors Cst1 and Cst2 are arranged in series between the gate of transistor N1 and the cathode of OLED element E1. The gate of transistor N1 is connected to the drain of transistor N3 and one of the source / drain of transistor N2. The gate of transistor N3 is controlled by signal S3, and reference voltage Vref is supplied to the gate of transistor N1 through transistor N3.

[0116] The gate of the transistor N2 is controlled by the signal S2 , and the data signal Vdata is supplied to the gate of the transistor N1 , or the storage capacitors Cst1 and Cst2 through the transistor N2 .

[0117] The drain of transistor N4 is connected to the anode of OLED element E1, and the source thereof is supplied with reset voltage Vrst. Reset voltage Vrst is supplied to the anode of OLED element E1 through transistor N4. The gate of transistor N4 is controlled by signal S1.

[0118] Transistor N5 is a sensing transistor for measuring the anode voltage of OLED element E1. The gate of transistor N5 is connected to the anode of OLED element E1, and its drain is supplied with power supply voltage VDD. Sense line SL is connected to the source of transistor N5 through transistor N6. The gate of transistor N6 is controlled by signal SSS. Transistors N5 and N6 are included in a source follower circuit for measuring the anode voltage.

[0119] Fig.12 It is used to measure Fig.11 1. The example of the embodiment of the present invention is a timing diagram of a control signal of the anode voltage in the pixel circuit of the embodiment of the present invention. As in the second embodiment, this example reads the reference signal (Vrst×G) of the CDS during the period in which the reset voltage is supplied to the anode of the OLED element E1, and reads the measurement target signal (Vf×G) when the sensing current flows through the OLED element E1. Reading the measurement target signal is included in the light emission period of the normal image display. As in the first embodiment, measurement without using the CDS is also applicable to this pixel circuit.

[0120] refer to Fig.12 , the CDS circuit reads the reference signal (Vrst×G) in the period PR1 of 1H. During the period PR1, the signals S1(N), S3(N), SSS(N) and Φa(N) are at the H level. The signals S2(N) and Φb(N) are at the L level. Since the signal S1(N) is at the H level, the anode of the OLED element E1 is supplied with a reset voltage. Since the signal SSS(N) is at the H level, the reference signal (Vrst×G) is read from the sensing line SL.

[0121] The CDS circuit reads the unknown measurement target signal (Vf×G) in the 1H period PR2 which is 2H later than the period PR1. During the period PR2, the signals S1(N), S2(N), S3(N) and Φa(N) are at the L level, and the signals SSS(N) and Φb(N) are at the H level. In this state, the sense current flows from the power supply line VDDL into the OLED element E1, and the anode voltage of the OLED element E1 is Vf. The measurement target signal (Vf×G) is read from the sense line SL.

[0122] refer to Fig.12The temporal variation of the described signals S1(N), S2(N) and S3(N) is the same as that in conventional image display. Instead of a data signal for determining a sensing current, a data signal for determining light intensity is written to the storage capacitors Cst1 and Cst2 to display an image. If the pixel circuit control for image display includes a reset period for the anode of the OLED element as in this example, efficient measurement of the OLED element can be obtained. The constant voltage of the reference signal can be a voltage different from the reset voltage Vrst. As in the first embodiment, the measurement can use a method different from CDS.

[0123] Fig.13 Another example of a pixel circuit to which degradation measurement of an OLED element in an embodiment of the present specification can be applied is shown. The pixel circuit has a 6T1C configuration in which all transistors are p-type thin film transistors. The relationship between the constant voltages VDD, VEE, Vrst, and Vref is the same as that in the first embodiment. Fig.13 The pixel circuit in FIG. 1 has a configuration in which the transistor M5 is excluded from the Figure 2 Outside the pixel circuit.

[0124] For control Fig.13 The signal of the pixel circuit in is different from Figure 2 Specifically, the gate of transistor M1 is controlled by signal Em1, and the gate of transistor M6 is controlled by signal Em2. The gate of transistor M4 is controlled by signal S1, and the gates of transistors M2 and M7 are controlled by signal S2.

[0125] Fig.14 It is used to measure Fig.13 1. The example of the embodiment of the present invention is a timing diagram of a control signal of the anode voltage in the pixel circuit of the embodiment of the present invention. As in the second embodiment, this example reads the reference signal (Vrst×G) of the CDS during the period in which the reset voltage is supplied to the anode of the OLED element E1, and reads the measurement target signal (Vf×G) when the sensing current flows through the OLED element E1. Reading the measurement target signal is included in the light emission period of the normal image display. As in the first embodiment, measurement without using the CDS is applicable to this pixel circuit.

[0126] The signal S1(N) has a pulse width (L level period) of 2H, and the signal S2(N) has a pulse width (L level period) of 1H. The signal Em1 has a pulse width (H level period) of 2H, and the signal Em2 has a pulse width (H level period) of 1H. The signal SSS(N) has a pulse width (L level period) of 2H, and the signals Φa(N) and Φb(N) have pulse widths (L level periods) of 1H.

[0127] refer to Fig.14, the CDS circuit 320 reads the reference signal (Vrst×G) in the period PR1 of 1H. During the period PR1, the signals S1(N), S2(N), SSS(N) and Φa(N) are at the L level. The signals Em1(N), Em2(N) and Φb(N) are at the H level. Since the signal S2(N) is at the H level, the transistor M7 is turned on, and the anode of the OLED element E1 is supplied with a reset voltage. Since the signals Em1(N) and Em2(N) are at the H level, the transistors M1 and M6 are turned off, and the sensing current does not flow. The reference signal (Vrst×G) is read from the sensing line SL.

[0128] The CDS circuit 320 reads the unknown measurement target signal (Vf×G) in the period PR2 of 1H immediately after the period PR1. During the period PR2, the signals S1(N), S2(N), SSS(N), and Φa(N) are at the H level, and the signals Em1(N), Em2(N), and Φb(N) are at the L level. In this state, the sense current flows from the power supply line VDDL into the OLED element E1, and the anode voltage of the OLED element E1 is Vf. The measurement target signal (Vf×G) is read from the sense line SL.

[0129] refer to Fig.14 The time variation of the described signals S1(N), S2(N), Em1(N) and Em2(N) is the same as the time variation in conventional image display. Instead of the data signal for determining the sensing current, the data signal for determining the light intensity is written to the storage capacitor Cst to display the image. If the pixel circuit control for image display includes a reset period for the anode of the OLED element as in this example, efficient measurement of the OLED element can be obtained. The constant voltage of the reference signal can be a voltage different from the reset voltage Vrst. As in the first embodiment, the measurement can use a method different from CDS.

[0130] Circuit Layouts in Other Embodiments

[0131] Hereinafter, some circuit layouts of the display panel 100 are described. Fig.15 An example of a configuration is shown in which the sensing lines are divided for the upper and lower regions of the display panel 100 to reduce the capacitance of the sensing lines. Reducing the capacitance of the sensing lines can reduce the time required to read a signal through the sensing lines.

[0132] exist Fig.15 In a configuration example of , the pixel circuits in each pixel circuit column are divided into two pixel circuit groups, and each pixel circuit group is composed of consecutive pixel circuits. In one example, each pixel circuit group includes the same number of pixel circuits. The number of pixel circuits may be different. Fig.15In , each pixel circuit column is divided into an upper pixel circuit group and a lower pixel circuit group. Each pixel circuit column can be divided into three or more pixel circuit groups. The pixel circuit 210 in the upper pixel circuit group is connected to the sensing line SLA. The pixel circuit 210 in the lower pixel circuit group is connected to the sensing line SLB. The sensing lines SLA and SLB are separated. In Fig.15 In FIG. 1 , as an example, one of the upper sensing lines is provided with a reference numeral SLA and one of the lower sensing lines is provided with a reference numeral SLB. The sensing lines SLA and SLB are shorter than the pixel circuit columns, substantially equal to half of the pixel circuit columns.

[0133] Each sensing line SLA is connected to a CDS circuit 320A provided on the upper side of the display area 125. A plurality of CDS circuits 320A are provided for each sensing line SLA. A switching transistor M10A is provided between the CDS circuit 320A and the output terminal 101A. Fig.15 , as an example, one of the upper CDS circuits is provided with reference numeral 320A, and one of the upper transistors is provided with reference numeral M10A.

[0134] The CDS circuits 320A for the pixel circuits of the same color are connected to the same output terminal 101A, and the CDS circuit 320A to be electrically connected to the output terminal 101A is changed by the switching transistor M10A. The switching transistor M10A is controlled to be turned on / off by the horizontal scanning circuit 133A provided on the upper side of the display area 125.

[0135] Each sensing line SLB is connected to a CDS circuit 320B provided at the lower side of the display area 125. A plurality of CDS circuits 320B are provided for each sensing line SLB. A switching transistor M10B is provided between the CDS circuit 320B and the output terminal 101B. Fig.15 , as an example, one of the lower CDS circuits is provided with reference numeral 320B, and one of the lower transistors is provided with reference numeral M10B.

[0136] The CDS circuits 320B for the pixel circuits of the same color are connected to the same output terminal 101B, and the CDS circuit 320 to be electrically connected to the output terminal 101B is changed by the switching transistor M10B. The switching transistor M10B is controlled to be turned on / off by the horizontal scanning circuit 133B provided on the lower side of the display area 125. Fig.15 The data line driving circuit 134 is omitted.

[0137] Fig.16The configuration example shown is such that each pixel circuit column is divided into two pixel circuit groups, and each pixel circuit group is connected to a different sensing line. Specifically, each pixel circuit column is divided into a pixel circuit group consisting of odd-numbered pixel circuits and a pixel circuit group consisting of even-numbered pixel circuits. Reducing the number of pixel circuits connected to a sensing line reduces the capacitance of the path of the sensing signal, thereby reducing the time required to read the signal. Each pixel circuit column can be divided into three or more pixel circuit groups.

[0138] like Fig.16 As shown, each pixel circuit column is provided with a sensing line SLO and SLE. As an example, one of these sensing lines is provided with a reference numeral SLO or SLE. The sensing line SLO is connected to the odd-numbered pixel circuits in the associated pixel circuit column, and the sensing line SLE is connected to the even-numbered pixel circuits in the associated pixel circuit column.

[0139] Each sensing line SLO is connected to a CDS circuit 320O. The CDS circuit 320O processes a reference signal and a measurement target signal transmitted by the sensing line SLO. An output terminal of the CDS circuit 320O is connected to a switching transistor M10O. Each sensing line SLO is provided with a CDS circuit 320O and a switching transistor M10O.

[0140] Each sensing line SLE is connected to a CDS circuit 320E. The CDS circuit 320E processes a reference signal and a measurement target signal transmitted by the sensing line SLE. The output terminal of the CDS circuit 320E is connected to a switching transistor M10E. Each sensing line SLE is provided with a CDS circuit 320E and a switching transistor M10E.

[0141] The signals on the sensing lines SLO for the pixel circuits of the same color are output from the same output terminal (not shown) through the CDS circuit 320O and the switching transistor M10O. The switching transistor M10O selects one CDS circuit 320O to output the signal therefrom. The signals on the sensing lines SLE for the pixel circuits of the same color are output from the same output terminal (not shown) through the CDS circuit 320E and the switching transistor M10E. The switching transistor M10E selects one CDS circuit 320E to output the signal therefrom.

[0142] Fig.17 Simulation results calculated by a Monte Carlo method regarding changes in the voltage of a sensing line and the output of a CDS circuit in response to a data signal voltage in a case where sensing transistors have different threshold voltages Vth are provided.

[0143] exist Fig.17In the curve graph, the horizontal axis represents the data signal voltage corresponding to the sensing current, and the vertical axis represents the voltage. Curve 501 represents the anode voltage Vf of the OLED element. Curve 502 represents the voltage of the sensing line when the sensing transistor has different threshold voltages Vth. Curve 503 represents the output voltage when the sensing transistor has different threshold voltages Vth. Fig.17 As shown, the variation in the threshold voltage Vth is effectively eliminated in the output of the CDS circuit.

[0144] As described above, the embodiments of the present invention have been described; however, the present invention is not limited to the above-described embodiments. Those skilled in the art can easily modify, add or convert each element in the above-described embodiments within the scope of the present invention. A part of the configuration of one embodiment can be replaced with the configuration of another embodiment, or the configuration of one embodiment can be incorporated into the configuration of another embodiment.

Claims

1. A display device, comprising: a plurality of pixel circuits on a substrate; a sensing line on the substrate; as well as Measuring circuit, Wherein, each of the plurality of pixel circuits comprises: Light emitting element; a first power supply line configured to supply a power supply voltage to the light emitting element so as to cause a current to flow through the light emitting element; a driving transistor configured to control an amount of light emitting current to the light emitting element; a sensing transistor, a gate electrode of the sensing transistor being connected to an end of the light emitting element; a second power supply line connected to a drain electrode of the sensing transistor; and a first switch transistor connected between a source electrode of the sensing transistor and the sensing line, wherein the sensing transistor, the first switch transistor, the sensing line, and the second power line are included in a sensing circuit, wherein the driving transistor is configured to control a sensing current from the first power line to the light emitting element to measure a voltage at an end of the light emitting element, wherein the sensing transistor is configured to supply a source voltage to the sensing line when the light emitting element is supplied with the sensing current, and The measurement circuit is configured to determine the voltage of the light emitting element based on the output of the sensing line.

2. The display device according to claim 1, wherein: The measurement circuit is configured as follows: maintaining information about an input / output gain of the sensing circuit; as well as The output of the sense line is calibrated based on the information about the input / output gain.

3. The display device according to claim 1, further comprising: Correlated double sampling circuit, Wherein, the correlated double sampling circuit is configured as: When a reference voltage is supplied to an end of the light emitting element, a reference signal is received through the sensing line; When the light emitting element is supplied with the sensing current, an unknown signal is received through the sensing line; and outputting a difference signal between the reference signal and the unknown signal, and Wherein, the measurement circuit is configured to determine the voltage of the light emitting element based on the output from the correlated double sampling circuit.

4. The display device according to claim 3, wherein: The correlated double sampling circuit is mounted on the substrate.

5. The display device according to claim 3, in, Each of the plurality of pixel circuits includes a second switch transistor configured to supply a reset voltage to an end of the light emitting element before displaying an image, and The reset voltage is used as the reference voltage.

6. The display device according to claim 1, in, The display device includes a plurality of sensing lines, the plurality of sensing lines including the sensing line on the substrate, wherein the plurality of pixel circuits are arranged to form a plurality of pixel circuit columns, Each of the plurality of pixel circuit columns is divided into two pixel circuit groups. Each of the two pixel circuit groups is composed of continuous pixel circuits, and The two pixel circuit groups are connected to different sensing lines.

7. The display device according to claim 1, in, The display device includes a plurality of sensing lines, the plurality of sensing lines including the sensing line on the substrate, wherein the plurality of pixel circuits are arranged to form a plurality of pixel circuit columns, Each of the plurality of pixel circuit columns is divided into two pixel circuit groups. wherein one of the two pixel circuit groups consists of pixel circuits with odd numbers, and the other of the two pixel circuit groups consists of pixel circuits with even numbers, and The two pixel circuit groups are connected to different sensing lines.

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