Heat treatment device

By connecting multiple flash lamps in parallel and using fewer component groups to control the current, the cost and space problems caused by excessive number of components in the prior art are solved, and annealing technology with high temperature heating and low heat history is realized.

CN119542181APending Publication Date: 2025-02-28SCREEN HOLDINGS CO LTD
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
CN202411070153.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-08-30
Filing Date
2024-08-06
Publication Date
2025-02-28

AI Technical Summary

Technical Problem

In the manufacturing process of semiconductor devices, in order to achieve high-temperature heating and low-heat history, existing flash annealing technology requires the installation of a large number of IGBT components, resulting in an increase in device cost and space occupation.

Method used

By connecting multiple flashes in parallel to the substrate and using fewer component groups to control current flow through these flashes, thereby reducing the number of components arranged in the device.

Benefits of technology

An annealing technology that reduces the number of components to achieve high temperature heating and low heat history without increasing device cost and space.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119542181A_ABST
    Figure CN119542181A_ABST
Patent Text Reader

Abstract

The invention provides a heat treatment device which can reduce the number of elements arranged in the device. Element groups, each including a capacitor (93), a coil (94), a thyristor (96), and a regenerative diode (97), are provided for three flash lamps (FL) connected in parallel. One thyristor (96) controls the on / off of the current flowing through the corresponding three flash lamps (FL) connected in parallel. The tail current flowing through the flash lamp (FL) during flash irradiation can be suppressed by the thyristor (96). Furthermore, since the number of element groups is less than the number of flash lamps (FL) connected in parallel, the number of elements provided in the heat treatment apparatus can be reduced compared with a case in which the element groups are individually provided in the flash lamps (FL). As a result, it is possible to suppress an increase in device cost, and to reduce the installation space of elements.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to a heat treatment apparatus for heating a substrate by irradiating the substrate with a flash of light. The substrate to be treated includes, for example, a semiconductor wafer, a liquid crystal display device substrate, a flat panel display (FPD) substrate, an optical disk substrate, a magnetic disk substrate, or a solar cell substrate. Background Art

[0002] Flash lamp annealing (FLA), which heats semiconductor wafers in an extremely short time, has attracted much attention in the semiconductor device manufacturing process. Flash lamp annealing is a heat treatment technology that uses a xenon flash lamp (hereinafter simply referred to as a "flash lamp") to irradiate the surface of a semiconductor wafer with a flash of light, raising the temperature of the semiconductor wafer surface within an extremely short period of time (less than a few milliseconds).

[0003] Xenon flash lamps emit light with a spectral distribution ranging from the ultraviolet to the near-infrared region, with wavelengths shorter than those of conventional halogen lamps, roughly aligning with the fundamental absorption band of silicon semiconductor wafers. Therefore, when a xenon flash lamp irradiates a semiconductor wafer, less light is transmitted, enabling the wafer to be heated rapidly. Furthermore, it has been shown that extremely short flash irradiation times of a few milliseconds or less can selectively increase the temperature near the surface of the semiconductor wafer.

[0004] Flash lamp annealing is used for processes requiring extremely short heating times, typically for activating impurities implanted into semiconductor wafers. By irradiating the surface of a semiconductor wafer into which impurities have been implanted using ion implantation with a flash lamp, the surface temperature of the semiconductor wafer can be raised to the activation temperature in a very short period of time, enabling activation of the impurities without causing deep diffusion.

[0005] Patent Documents 1 and 2 disclose heat treatment devices using xenon flash lamps that control the flash lamp's light emission by placing an insulated gate bipolar transistor (IGBT) in the flash lamp's discharge circuit. In these devices, a specific pulse signal is input to the IGBT's gate to control the current waveform flowing through the flash lamp, allowing for flexible adjustment of the flash lamp's light emission duration and intensity. In these devices, the flash lamp and IGBT are connected in series in a one-to-one configuration.

[0006] [Background Art Literature]

[0007] [Patent Document]

[0008] [Patent Document 1] Japanese Patent Application Laid-Open No. 2009-070948

[0009] [Patent Document 2] Japanese Patent Application Laid-Open No. 2011-119562 Summary of the Invention

[0010] [Problems to be solved by the invention]

[0011] In recent years, in the manufacturing of cutting-edge semiconductors, annealing technologies that achieve high temperatures and a low thermal history are being sought to address changes in materials and structures. Low thermal history annealing refers to heat treatments that require a relatively low total heat input to the semiconductor wafer. Flash lamp annealing requires rapidly raising the surface temperature of the semiconductor wafer to a high temperature in a relatively short period of time. To achieve this, a high-intensity flash of light must be applied with a shorter exposure time. For example, a flash exposure time of 0.1 milliseconds is required to raise the surface temperature of the semiconductor wafer to over 600°C.

[0012] However, in order to significantly raise the surface temperature of the semiconductor wafer using flash irradiation with a very short irradiation time, a considerable number of flash lamps must be used. Consequently, a corresponding number of IGBTs and other components must be installed. This increases the cost of the device and the space required for installation.

[0013] The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide a heat treatment apparatus capable of reducing the number of components provided in the apparatus.

[0014] [Technical solutions to the problem]

[0015] In order to solve the above-mentioned problem, the first aspect of the present invention is a heat treatment device for heating a substrate by irradiating the substrate with a flash, comprising: a chamber for accommodating the substrate; a holding portion for holding the substrate in the chamber; a plurality of flash lamps for irradiating the substrate held by the holding portion with a flash; a discharge circuit for causing current to flow through the plurality of flash lamps to cause the plurality of flash lamps to emit light; and a control portion for controlling the discharge circuit; and the discharge circuit comprises M (M is an integer less than N) element groups for N (N is an integer greater than 2) flash lamps connected in parallel.

[0016] Furthermore, a second aspect is the heat treatment apparatus according to the first aspect, wherein one element group is provided for the N flash lamps connected in parallel.

[0017] Furthermore, a third aspect is the heat treatment device according to the second aspect, wherein the element group includes one switching element for controlling the current flowing through the N flash lamps.

[0018] Furthermore, a fourth aspect is the heat treatment apparatus according to the third aspect, wherein the element group further includes one coil, one capacitor, and one diode.

[0019] Furthermore, a fifth aspect is the heat treatment device according to the third or fourth aspect, wherein the switching element is a thyristor.

[0020] In addition, a sixth aspect is the heat treatment device according to the fifth aspect, wherein the thyristor is a GTO thyristor or a GCT thyristor.

[0021] Furthermore, a seventh aspect is the heat treatment device according to the third or fourth aspect, wherein the switching element is an IGBT.

[0022] [Effects of the Invention]

[0023] According to the heat treatment device of aspects 1 to 7, since N flash lamps (N is an integer greater than 2) connected in parallel are provided with M (M is an integer less than N) element groups, the number of elements provided in the heat treatment device can be reduced compared to the case where the element groups are provided for individual flash lamps. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 It is a longitudinal sectional view showing the structure of the heat treatment apparatus of the present invention.

[0025] Figure 2 It is a perspective view showing the overall appearance of the holding portion.

[0026] Figure 3 This is a top view of the base.

[0027] Figure 4 This is a cross-sectional view of the base.

[0028] Figure 5 It is a top view of the transfer mechanism.

[0029] Figure 6 It is a side view of the transfer mechanism.

[0030] Figure 7 It is a plan view showing the arrangement of multiple halogen lamps.

[0031] Figure 8 This is a diagram showing a discharge circuit of a flash lamp.

[0032] Figure 9 It is a block diagram showing the configuration of a control unit.

[0033] Figure 10 This is a graph showing changes in the current flowing through the flash lamp. DETAILED DESCRIPTION

[0034] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. Hereinafter, expressions indicating relative or absolute positional relationships (e.g., "in a direction," "along a direction," "parallel," "orthogonal," "center," "concentric," "coaxial," etc.) unless otherwise specified strictly indicate the positional relationship and also indicate a state of relative displacement of angles or distances within a tolerance or range that allows for the same degree of functionality. Furthermore, expressions indicating an equal state (e.g., "same," "equal," "homogeneous," etc.) unless otherwise specified strictly indicate a state of quantitatively strict equality and also indicate a state of difference with a tolerance or the ability to achieve the same degree of functionality. Furthermore, expressions indicating a shape (e.g., "circular," "quadrilateral," "cylindrical," etc.) unless otherwise specified strictly indicate the shape geometrically and also indicate a shape within a range that allows for the same degree of functionality, such as concave-convex or chamfered corners. Furthermore, expressions such as "equipped," "equipped," "equipped with," "including," and "having" a component are not exclusive expressions that exclude the presence of other components. Furthermore, the expression “at least one of A, B, and C” includes “only A,” “only B,” “only C,” “any two of A, B, and C,” and “all of A, B, and C.”

[0035] Figure 1 It is a longitudinal sectional view showing the structure of the heat treatment apparatus 1 of the present invention. Figure 1 The heat treatment apparatus 1 is a flash lamp annealing apparatus that heats a semiconductor wafer W in the shape of a circular plate as a substrate by flash irradiating the semiconductor wafer W. The size of the semiconductor wafer W to be processed is not particularly limited, and may be, for example, φ300 mm or φ450 mm (φ300 mm in this embodiment). Impurities are injected into the semiconductor wafer W before it is carried into the heat treatment apparatus 1, and activation treatment of the injected impurities is performed by the heating treatment of the heat treatment apparatus 1. In addition, Figure 1 In the following drawings, the size or quantity of each component is exaggerated or simplified as needed to facilitate understanding.

[0036] Heat treatment apparatus 1 includes a chamber 6 for accommodating semiconductor wafers W, a flash heating unit 5 containing multiple flash lamps FL, and a halogen heating unit 4 containing multiple halogen lamps HL. Flash heating unit 5 is located above chamber 6, while halogen heating unit 4 is located below. Heat treatment apparatus 1 also includes a holding unit 7 within chamber 6 for holding semiconductor wafers W in a horizontal position, and a transfer mechanism 10 for transferring semiconductor wafers W between holding unit 7 and the outside of the apparatus. Heat treatment apparatus 1 also includes a control unit 3 that controls the various operating mechanisms provided in halogen heating unit 4, flash heating unit 5, and chamber 6 to cause them to perform heat treatment on semiconductor wafers W.

[0037] The chamber 6 is constructed by attaching quartz chamber windows to the top and bottom of a cylindrical chamber side portion 61. The chamber side portion 61 is generally cylindrical with openings at the top and bottom. The upper opening is sealed by attaching an upper chamber window 63, while the lower opening is sealed by attaching a lower chamber window 64. The upper chamber window 63, forming the top plate of the chamber 6, is a disc-shaped member made of quartz and functions as a quartz window that allows the flash light emitted from the flash heater 5 to pass into the chamber 6. Furthermore, the lower chamber window 64, forming the floor of the chamber 6, is also a disc-shaped member made of quartz and functions as a quartz window that allows the light from the halogen heater 4 to pass into the chamber 6.

[0038] In addition, a reflection ring 68 is installed on the upper part of the inner wall of the chamber side portion 61, and a reflection ring 69 is installed on the lower part. Both reflection rings 68 and 69 are formed in a circular ring shape. The upper reflection ring 68 is installed by inserting it from the upper side of the chamber side portion 61. On the other hand, the lower reflection ring 69 is installed by inserting it from the lower side of the chamber side portion 61 and fixing it with screws (not shown). In other words, the reflection rings 68 and 69 can be freely installed on the chamber side portion 61. The inner space of the chamber 6, that is, the space surrounded by the upper chamber window 63, the lower chamber window 64, the chamber side portion 61 and the reflection rings 68 and 69 is defined as the heat treatment space 65.

[0039] By attaching reflection rings 68 and 69 to chamber side portion 61, a recess 62 is formed on the inner wall of chamber 6. Specifically, recess 62 is formed by the central portion of the inner wall of chamber side portion 61 where reflection rings 68 and 69 are not attached, the lower end surface of reflection ring 68, and the upper end surface of reflection ring 69. Recess 62 is formed in a horizontal annular shape on the inner wall of chamber 6, surrounding holding portion 7 that holds semiconductor wafer W. Chamber side portion 61 and reflection rings 68 and 69 are formed from a metal material (e.g., stainless steel) with excellent strength and heat resistance.

[0040] Furthermore, a transfer opening (furnace port) 66 for loading and unloading semiconductor wafers W into and out of the chamber 6 is formed in the chamber side portion 61. The transfer opening 66 can be opened and closed by a gate valve 185. The transfer opening 66 is in communication with the outer peripheral surface of the recess 62. Therefore, when the gate valve 185 opens the transfer opening 66, semiconductor wafers W can be loaded into and unloaded from the heat treatment space 65 through the recess 62 via the transfer opening 66. Furthermore, when the gate valve 185 closes the transfer opening 66, the heat treatment space 65 within the chamber 6 becomes a sealed space.

[0041] Furthermore, through-holes 61a and 61b are formed in the chamber side portion 61. Through-hole 61a is a cylindrical hole used to guide infrared light emitted from the upper surface of the semiconductor wafer W held by the susceptor 74 (described later) to the infrared sensor 29 of the upper radiation thermometer 25. Meanwhile, through-hole 61b is a cylindrical hole used to guide infrared light emitted from the lower surface of the semiconductor wafer W to the lower radiation thermometer 20. Through-holes 61a and 61b are arranged at an angle relative to the horizontal, with their axes of penetration intersecting the main surface of the semiconductor wafer W held by the susceptor 74. A transparent window 26 made of calcium fluoride is attached to the end of through-hole 61a facing the heat treatment space 65. This window transmits infrared light within the wavelength range measurable by the upper radiation thermometer 25. Furthermore, a transparent window 21 made of a barium fluoride material that transmits infrared light in a wavelength range measurable by the lower radiation thermometer 20 is attached to the end portion of the through hole 61 b ​​facing the heat treatment space 65 .

[0042] In addition, a gas supply hole 81 for supplying a processing gas to the heat treatment space 65 is formed on the upper part of the inner wall of the chamber 6. The gas supply hole 81 is formed at a position higher than the recess 62, and can also be provided on the reflection ring 68. The gas supply hole 81 is connected to the gas supply pipe 83 via a buffer space 82 formed in an annular shape inside the side wall of the chamber 6. The gas supply pipe 83 is connected to the processing gas supply source 85. In addition, a valve 84 is inserted in the middle of the path of the gas supply pipe 83. When the valve 84 is opened, the processing gas is supplied from the processing gas supply source 85 to the buffer space 82. The processing gas flowing into the buffer space 82 flows in a manner that diffuses in the buffer space 82 where the fluid resistance is smaller than that of the gas supply hole 81, and is supplied from the gas supply hole 81 to the heat treatment space 65. As the processing gas, for example, an inert gas such as nitrogen (N2), or a reactive gas such as hydrogen (H2) or ammonia (NH3), or a mixed gas thereof (nitrogen in this embodiment) can be used.

[0043] On the other hand, a gas exhaust hole 86 for exhausting the gas in the heat treatment space 65 is formed on the lower portion of the inner wall of the chamber 6. The gas exhaust hole 86 is provided below the recess 62 and may also be provided on the reflective ring 69. The gas exhaust hole 86 is connected to a gas exhaust pipe 88 via a buffer space 87 formed in an annular shape within the side wall of the chamber 6. The gas exhaust pipe 88 is connected to the exhaust section 190. In addition, a valve 89 is inserted midway along the path of the gas exhaust pipe 88. When the valve 89 is opened, the gas in the heat treatment space 65 is discharged from the gas exhaust hole 86 through the buffer space 87 to the gas exhaust pipe 88. In addition, the gas supply hole 81 and the gas exhaust hole 86 can be provided in a plurality along the circumference of the chamber 6, or can be slit-shaped holes. In addition, the processing gas supply source 85 and the exhaust section 190 can be mechanisms provided in the heat treatment apparatus 1 or can be practical facilities in the factory where the heat treatment apparatus 1 is installed.

[0044] Furthermore, a gas exhaust pipe 191 for exhausting the gas in the heat treatment space 65 is connected to the front end of the transfer opening 66. The gas exhaust pipe 191 is connected to the exhaust unit 190 via a valve 192. By opening the valve 192, the gas in the chamber 6 is exhausted through the transfer opening 66.

[0045] Figure 2 This is a perspective view showing the overall appearance of the holding portion 7. The holding portion 7 holds the semiconductor wafer W within the chamber 6. The holding portion 7 comprises a base ring 71, a connecting portion 72, and a susceptor 74. The base ring 71, connecting portion 72, and susceptor 74 are all made of quartz. In other words, the entire holding portion 7 is made of quartz.

[0046] The base ring 71 is a quartz component with an arc shape and a portion missing from the circular ring. The missing portion is provided to prevent interference between the transfer arm 11 of the transfer mechanism 10 described later and the base ring 71. The base ring 71 is supported by the wall of the chamber 6 by being placed on the bottom surface of the recess 62 (see Figure 1 ). On the upper surface of the base ring 71, a plurality of connecting portions 72 (four in this embodiment) are provided along the circumference of the annular shape. The connecting portion 72 is also a quartz component and is fixed to the base ring 71 by welding.

[0047] The base 74 is supported by four connecting portions 72 provided on the base ring 71 . Figure 3 is a top view of the base 74. In addition, Figure 4 The figure is a cross-sectional view of the susceptor 74. The susceptor 74 includes a holding plate 75, a guide ring 76, and a plurality of substrate support pins 77. The holding plate 75 is a substantially circular, flat member formed of quartz. The diameter of the holding plate 75 is larger than the diameter of the semiconductor wafer W. In other words, the holding plate 75 has a planar dimension larger than that of the semiconductor wafer W.

[0048] A guide ring 76 is provided on the peripheral edge of the upper surface of the retaining plate 75. The guide ring 76 is a circular ring-shaped component having an inner diameter larger than the diameter of the semiconductor wafer W. For example, if the diameter of the semiconductor wafer W is φ300 mm, the inner diameter of the guide ring 76 is φ320 mm. The inner circumference of the guide ring 76 is formed into a tapered surface that widens upward from the retaining plate 75. The guide ring 76 is formed of the same quartz as the retaining plate 75. The guide ring 76 may be welded to the upper surface of the retaining plate 75 or fixed to the retaining plate 75 by separately processed pins or the like. Alternatively, the retaining plate 75 and the guide ring 76 may be processed as a single component.

[0049] The area on the upper surface of the holding plate 75, further inward from the guide ring 76, serves as a flat holding surface 75a for holding the semiconductor wafer W. Multiple substrate support pins 77 are erected on the holding surface 75a of the holding plate 75. In this embodiment, a total of twelve substrate support pins 77 are erected at 30° intervals along a circumference concentric with the outer circumference of the holding surface 75a (the inner circumference of the guide ring 76). The diameter of the circle in which the twelve substrate support pins 77 are arranged (the distance between opposing substrate support pins 77) is smaller than the diameter of the semiconductor wafer W. For a semiconductor wafer W with a diameter of 300 mm, this diameter is between 270 mm and 280 mm (270 mm in this embodiment). Each substrate support pin 77 is made of quartz. The multiple substrate support pins 77 can be attached to the upper surface of the holding plate 75 by welding or can be integrally formed with the holding plate 75.

[0050] return Figure 2 The four connecting portions 72 erected on the base ring 71 are fixed to the periphery of the retaining plate 75 of the base 74 by welding. In other words, the base 74 and the base ring 71 are fixedly connected via the connecting portions 72. By supporting the base ring 71 of the retaining unit 7 on the wall of the chamber 6, the retaining unit 7 is mounted in the chamber 6. When the retaining unit 7 is mounted in the chamber 6, the retaining plate 75 of the base 74 is in a horizontal position (a position in which the normal line is aligned with the vertical direction). In other words, the retaining surface 75a of the retaining plate 75 is horizontal.

[0051] The semiconductor wafer W, after being loaded into the chamber 6, is placed and held in a horizontal position on a susceptor 74 attached to the holding portion 7 of the chamber 6. At this time, the semiconductor wafer W is supported and held on the susceptor 74 by twelve substrate support pins 77 erected on the holding plate 75. More strictly speaking, the upper ends of the twelve substrate support pins 77 contact the lower surface of the semiconductor wafer W, thereby supporting the semiconductor wafer W. Because the height of the twelve substrate support pins 77 (the distance from the upper ends of the substrate support pins 77 to the holding surface 75a of the holding plate 75) is uniform, the twelve substrate support pins 77 can support the semiconductor wafer W in a horizontal position.

[0052] Furthermore, the semiconductor wafer W is supported by the plurality of substrate support pins 77 at a predetermined distance from the holding surface 75a of the holding plate 75. The thickness of the guide ring 76 is greater than the height of the substrate support pins 77. Therefore, the guide ring 76 prevents the semiconductor wafer W supported by the plurality of substrate support pins 77 from being displaced in the horizontal direction.

[0053] In addition, if Figure 2 and Figure 3 As shown, an opening 78 is formed vertically through the holding plate 75 of the base 74. The opening 78 is provided to allow the lower radiation thermometer 20 to receive radiation light (infrared light) emitted from the lower surface of the semiconductor wafer W. Specifically, the lower radiation thermometer 20 receives the light emitted from the lower surface of the semiconductor wafer W via the transparent window 21 attached to the opening 78 and the through-hole 61b in the chamber side 61, thereby measuring the temperature of the semiconductor wafer W. Furthermore, four through-holes 79 are formed in the holding plate 75 of the base 74. These four through-holes 79 penetrate the lift pins 12 of the transfer mechanism 10, described later, for transferring the semiconductor wafer W.

[0054] Figure 5 : is a top view of the transfer mechanism 10. In addition, Figure 6 : is a side view of the transfer mechanism 10. The transfer mechanism 10 includes two transfer arms 11. The transfer arms 11 are formed in an arc shape along the substantially annular recess 62. Two lifting pins 12 are erected on each transfer arm 11. The transfer arms 11 and the lifting pins 12 are formed of quartz. Each transfer arm 11 can be rotated by a horizontal moving mechanism 13. The horizontal moving mechanism 13 enables a pair of transfer arms 11 to be in a transfer action position ( Figure 5 solid line position), and a retreat position ( Figure 5 As the horizontal moving mechanism 13, each transfer arm 11 can be rotated separately by a separate motor, or a link mechanism can be used to rotate a pair of transfer arms 11 in conjunction with one motor.

[0055] In addition, the pair of transfer arms 11 are moved up and down together with the horizontal moving mechanism 13 by the lifting mechanism 14. When the lifting mechanism 14 raises the pair of transfer arms 11 to the transfer operation position, a total of four lifting pins 12 pass through the through holes 79 (refer to Figure 2 、 3), the upper end of the lifting pin 12 protrudes from the upper surface of the base 74. On the other hand, the lifting mechanism 14 lowers the pair of transfer arms 11 in the transfer action position, extracts the lifting pin 12 from the through hole 79, and when the horizontal moving mechanism 13 moves in a manner to open the pair of transfer arms 11, each transfer arm 11 moves to the retreat position. The retreat position of the pair of transfer arms 11 is directly above the base ring 71 of the holding portion 7. Because the base ring 71 is placed on the bottom surface of the recess 62, the retreat position of the transfer arm 11 becomes the inner side of the recess 62. In addition, an exhaust mechanism (not shown) is also provided near the portion where the drive portion (horizontal moving mechanism 13 and lifting mechanism 14) of the transfer mechanism 10 is provided, and is configured to exhaust the atmosphere around the drive portion of the transfer mechanism 10 to the outside of the chamber 6.

[0056] return Figure 1 Two radiation thermometers (pyrometers in this embodiment) are installed in chamber 6: an upper radiation thermometer 25 and a lower radiation thermometer 20. The upper radiation thermometer 25 is located obliquely above the semiconductor wafer W held on the susceptor 74 and receives infrared light emitted from the upper surface of the semiconductor wafer W to measure the upper surface temperature. The infrared sensor 29 of the upper radiation thermometer 25 includes an InSb (indium antimony) optical element to cope with the sudden temperature change of the upper surface of the semiconductor wafer W at the moment of the irradiation flash. Meanwhile, the lower radiation thermometer 20 is located obliquely below the semiconductor wafer W held on the susceptor 74 and receives infrared light emitted from the lower surface of the semiconductor wafer W to measure the lower surface temperature.

[0057] The flash heating unit 5, which is arranged above the chamber 6, is composed of a light source including a plurality of (63 in this embodiment) xenon flash lamps FL and a reflector 52 arranged to cover the light source inside a housing 51. The flash lamp FL irradiates a flash of light onto the semiconductor wafer W held by the holding unit 7. In addition, a light irradiation window 53 is installed at the bottom of the housing 51 of the flash heating unit 5. The light irradiation window 53, which constitutes the floor portion of the flash heating unit 5, is a plate-shaped quartz window formed of quartz. By arranging the flash heating unit 5 above the chamber 6, the light irradiation window 53 faces the upper chamber window 63. The flash lamp FL irradiates a flash of light onto the heat treatment space 65 from above the chamber 6 through the light irradiation window 53 and the upper chamber window 63.

[0058] The multiple flash lamps FL are rod-shaped lamps each having an elongated cylindrical shape. They are arranged in a planar manner with their respective longitudinal directions parallel to each other along the main surface of the semiconductor wafer W held by the holding portion 7 (i.e., in the horizontal direction). Therefore, the plane formed by the arrangement of the flash lamps FL is also a horizontal plane. Alternatively, the multiple flash lamps FL may be arranged in two or more stages.

[0059] Figure 8FIG. 1 is a diagram showing a discharge circuit of the flash lamp FL. The discharge circuit allows current to flow through the flash lamp FL, causing the flash lamp FL to emit light. Figure 8 As shown, multiple flash lamps FL (three in this embodiment) are connected in parallel. Capacitors 93, coils 94, and thyristors 96 are connected in series with the three flash lamps FL. In other words, a single component group consisting of capacitors 93, coils 94, and thyristors 96 is provided for each of the three flash lamps FL.

[0060] Each flash lamp FL comprises a rod-shaped glass tube (discharge tube) 92, which contains xenon gas and has an anode and a cathode disposed at its ends; and a trigger electrode 91 attached to the outer circumference of glass tube 92. A high voltage can be applied to trigger electrode 91 from a trigger circuit (not shown). The timing of the voltage application from the trigger circuit to trigger electrode 91 is controlled by control unit 3.

[0061] The capacitor 93 is a passive element that stores the charge used to discharge the flash lamp FL. A specified voltage is applied to the capacitor 93 by the power supply unit 95, and the charge corresponding to the applied voltage (charging voltage) is charged. In addition, the coil 94 is a passive element that resists the sudden change in current when the discharge circuit generates the change. Figure 8 In the circuit, a floating resistor 98 is provided in series with the flash lamp FL. However, this is not provided as a component but is a resistance inevitably generated in the circuit.

[0062] The thyristor 96 is an active element that controls the current flowing through the three flash lamps FL. The thyristor 96 in this embodiment is, for example, a GCT (Gate Commutated Turn off) thyristor. A GCT thyristor is a modified version of a GTO (Gate Turn Off) thyristor. Therefore, like a GTO thyristor, a GCT thyristor has a self-arc extinguishing function that switches from an on state to an off state by applying a negative signal to the gate. Furthermore, as a basic thyristor function, a GCT thyristor has the function of switching from an off state to an on state by applying a positive signal to the gate. In other words, the thyristor 96 is a switching element that has a switching function that switches on and off according to a signal applied to the gate. By turning the thyristor 96 on and off, the current flowing through the flash lamp FL is turned on and off.

[0063] Even if thyristor 96 is turned on while capacitor 93 is charged, applying a high voltage to the electrodes at both ends of glass tube 92, xenon gas is an electrical insulator, so under normal conditions, electricity does not flow within glass tube 92. However, if a high voltage is applied to trigger electrode 91, breaking the insulation, current momentarily flows within glass tube 92 due to discharge between the electrodes. The excitation of xenon atoms or molecules at this moment causes light to be emitted. The light emitted from glass tube 92 due to this momentary discharge is called a flash.

[0064] In this embodiment, since the thyristor 96 is connected in series with the flash lamp FL, when the thyristor 96 is turned off, a sudden change in current causes a coil surge that instantly generates a large voltage in the reverse direction on the coil 94. Because there is a concern that the high voltage caused by this coil surge will damage other circuit components, Figure 8 As shown in FIG. 1 , a regenerative diode 97 is provided in the discharge circuit to absorb the high voltage caused by the coil surge. The regenerative diode 97 protects the components in the discharge circuit from the influence of the coil surge.

[0065] like Figure 8 As shown, in this embodiment, one component group is provided for each of the three flash lamps FL connected in parallel. Each component group includes one capacitor 93, one coil 94, one thyristor 96, and one regenerative diode 97. Furthermore, in this embodiment, 63 flash lamps FL are provided in the flash heating unit 5. Therefore, 21 (=63 / 3) component groups are provided in the heat treatment apparatus 1, with 21 capacitors 93, coils 94, thyristors 96, and 21 regenerative diodes 97 provided for each of the 63 flash lamps FL. Each thyristor 96 collectively controls the current flowing through the corresponding three flash lamps FL connected in parallel. In other words, the current flowing through each of the 63 flash lamps FL is individually turned on and off by the corresponding thyristor 96.

[0066] In addition, return Figure 1 The reflector 52 is positioned above the multiple flash lamps FL, covering them entirely. The reflector 52's primary function is to reflect the flash light emitted from the multiple flash lamps FL toward the heat treatment space 65. The reflector 52 is formed from an aluminum alloy plate, and its surface (the surface facing the flash lamps FL) is roughened by sandblasting.

[0067] The halogen heating unit 4, located below the chamber 6, has a plurality (40 in this embodiment) of halogen lamps HL built into a housing 41. The halogen heating unit 4 is a light irradiation unit that heats the semiconductor wafer W by irradiating a heat treatment space 65 with light from below the chamber 6 through a lower chamber window 64 using the plurality of halogen lamps HL.

[0068] Figure 7This is a top view showing the arrangement of a plurality of halogen lamps HL. 40 halogen lamps HL are arranged in two sections, upper and lower. 20 halogen lamps HL are arranged in the upper section close to the holding portion 7, and 20 halogen lamps HL are also arranged in the lower section farther away from the holding portion 7 than the upper section. Each halogen lamp HL is a rod-shaped lamp with a long cylindrical shape. In both the upper and lower sections, the 20 halogen lamps HL are arranged in parallel with each other along the main surface of the semiconductor wafer W held by the holding portion 7 (that is, in the horizontal direction) with their respective length directions. Therefore, the planes formed by the arrangement of the halogen lamps HL in the upper and lower sections are both horizontal planes.

[0069] In addition, if Figure 7 As shown, in both the upper and lower sections, the halogen lamps HL are arranged at a higher density in the area facing the periphery than in the area facing the center of the semiconductor wafer W held by the holding portion 7. In other words, in both the upper and lower sections, the spacing between the halogen lamps HL in the periphery is shorter than in the center of the arrangement. This allows for a greater amount of light to be irradiated to the periphery of the semiconductor wafer W, which is prone to temperature drops when heated by light from the halogen heating unit 4.

[0070] Furthermore, the lamp group comprising the upper halogen lamps HL and the lamp group comprising the lower halogen lamps HL are arranged in a cross-lattice pattern. Specifically, the longitudinal directions of the 20 halogen lamps HL arranged in the upper section and the longitudinal directions of the 20 halogen lamps HL arranged in the lower section are perpendicular to each other, for a total of 40 halogen lamps HL.

[0071] The halogen lamp HL is a filament-type light source that turns the filament incandescent and emits light by energizing a filament disposed inside a glass tube. A gas containing a trace amount of a halogen element (such as iodine or bromine) is sealed inside the glass tube. The introduction of the halogen element prevents breakage of the filament and allows the filament temperature to be set to a high temperature. Therefore, compared to conventional incandescent bulbs, the halogen lamp HL has a long life and can continuously emit strong light. In other words, the halogen lamp HL is a continuously lit lamp that emits light continuously for at least one second. Furthermore, because the halogen lamp HL is a rod-shaped lamp, it has a long life, and by arranging the halogen lamp HL in a horizontal direction, the radiation efficiency toward the semiconductor wafer W above is excellent.

[0072] Furthermore, a reflector 43 ( Figure 1 The reflector 43 reflects the light emitted from the plurality of halogen lamps HL toward the heat treatment space 65 .

[0073] The control unit 3 controls the various operating mechanisms provided in the heat treatment apparatus 1 . Figure 9This is a block diagram showing the configuration of control unit 3. The hardware configuration of control unit 3 is the same as that of a general computer. Specifically, control unit 3 includes: a CPU (Central Processing Unit), a circuit that performs various computations; ROM (Read Only Memory), a read-only memory that stores basic programs; RAM (Random Access Memory), a read-only memory that stores various information; and a storage unit 34 (such as a magnetic disk or SSD (Solid State Drive)) that pre-stores control software and data. The processing in heat treatment apparatus 1 is performed by the CPU of control unit 3 executing a designated processing program.

[0074] The storage unit 34 of the control unit 3 stores a process recipe 35 that determines the order and conditions for processing semiconductor wafers W. The process recipe 35 is input by, for example, an operator of the apparatus via an input unit 32 (described later), stored in the storage unit 34, and retrieved by the thermal processing apparatus 1. Alternatively, a host computer that manages a plurality of thermal processing apparatuses 1 may transmit the process recipe 35 to the thermal processing apparatus 1 via communication and store it in the storage unit 34.

[0075] The control unit 3 is electrically connected to elements such as the thyristor 96. The control unit 3 controls the discharge circuit of the flash lamp FL, for example, according to the contents of the treatment recipe 35. Specifically, the control unit 3 controls the signal applied to the gate of the thyristor 96 to switch the thyristor 96 between an on state (conducting state) and an off state (disconnecting state).

[0076] In addition, the control unit 3 is connected to a display unit 33 and an input unit 32. The display unit 33 and the input unit 32 function as a user interface of the heat treatment device 1. The control unit 3 displays various information on the display unit 33. The operator of the heat treatment device 1 can input various instructions or parameters from the input unit 32 while confirming the information displayed on the display unit 33. As the input unit 32, for example, a keyboard or a mouse can be used. As the display unit 33, for example, a liquid crystal display can be used. In this embodiment, as the display unit 33 and the input unit 32, a liquid crystal touch panel provided on the outer wall of the heat treatment device 1 is used to have both functions.

[0077] In addition to the aforementioned configuration, the heat treatment apparatus 1 includes various cooling mechanisms to prevent excessive temperature increases in the halogen heating unit 4, flash heating unit 5, and chamber 6 due to the heat energy generated by the halogen lamp HL and flash lamp FL during heat treatment of semiconductor wafers W. For example, water cooling pipes (not shown) are installed in the walls of the chamber 6. Furthermore, the halogen heating unit 4 and flash heating unit 5 are air-cooled by creating an internal gas flow to dissipate heat. Furthermore, air is supplied to the gap between the upper chamber window 63 and the lamp radiation window 53 to cool the flash heating unit 5 and the upper chamber window 63.

[0078] Next, the processing operations in heat treatment apparatus 1 will be described. The semiconductor wafer W to be processed is a semiconductor substrate to which impurities (ions) have been added by ion implantation. The impurities are activated by flash irradiation heating (annealing) in heat treatment apparatus 1. The various operating mechanisms of heat treatment apparatus 1 are controlled by control unit 3, and the processing sequence of heat treatment apparatus 1 described below is performed.

[0079] First, valve 84 for gas supply is opened, and valves 89 and 192 for exhaust are opened to start supplying and exhausting gas in chamber 6. When valve 84 is opened, nitrogen gas is supplied from gas supply hole 81 to heat treatment space 65. Furthermore, when valve 89 is opened, gas in chamber 6 is exhausted from gas exhaust hole 86. As a result, nitrogen gas supplied from the upper portion of heat treatment space 65 in chamber 6 flows downward, and exhaust is performed from the lower portion of heat treatment space 65.

[0080] Furthermore, by opening valve 192, the gas in chamber 6 is also exhausted from transfer opening 66. Furthermore, an exhaust mechanism (not shown) is also used to exhaust the atmosphere around the drive unit of transfer mechanism 10. Furthermore, during the heat treatment of semiconductor wafers W in heat treatment apparatus 1, nitrogen gas is continuously supplied to heat treatment space 65, and the supply amount is appropriately changed according to the treatment step.

[0081] Next, gate valve 185 is opened to release transfer opening 66, and a transfer robot outside the apparatus carries the semiconductor wafer W to be processed into heat treatment space 65 within chamber 6 through transfer opening 66. At this time, although there is a concern that the atmosphere outside the apparatus may be drawn into the chamber 6 as the semiconductor wafer W is carried in, nitrogen gas is continuously supplied to chamber 6, allowing nitrogen gas to flow out of transfer opening 66, minimizing the influx of the outside atmosphere.

[0082] The semiconductor wafer W loaded by the transfer robot is advanced to a position directly above the holding portion 7 and stops. Furthermore, the pair of transfer arms 11 of the transfer mechanism 10 are horizontally moved from the retracted position and raised to the transfer operation position, whereby the lift pins 12 protrude from the upper surface of the holding plate 75 of the base 74 through the through-holes 79 to receive the semiconductor wafer W. At this time, the lift pins 12 are raised above the upper ends of the substrate support pins 77.

[0083] After the semiconductor wafer W is placed on the lifting pins 12, the transport robot withdraws from the heat treatment space 65 and closes the transport opening 66 by the gate valve 185. Then, the semiconductor wafer W is transferred from the transport mechanism 10 to the base 74 of the holding portion 7 by a pair of transfer arms 11 descending, and is held in a horizontal position from below. The semiconductor wafer W is supported and held on the base 74 by a plurality of substrate support pins 77 erected on the holding plate 75. In addition, the semiconductor wafer W is held on the holding portion 7 with the surface on which the pattern is formed and the impurities are injected as the upper surface. A specified gap is formed between the back surface (the main surface opposite to the front side) of the semiconductor wafer W supported by the plurality of substrate support pins 77 and the holding surface 75a of the holding plate 75. The pair of transfer arms 11 that have descended to the bottom of the base 74 retreat to the retreat position, that is, the inner side of the recess 62, by the horizontal moving mechanism 13.

[0084] After the semiconductor wafer W is held horizontally from below by the quartz base 74 of the holding unit 7, the 40 halogen lamps HL of the halogen heating unit 4 are simultaneously illuminated to begin preliminary heating (auxiliary heating). The halogen light emitted by the halogen lamps HL passes through the lower chamber window 64 and the base 74 formed of quartz and irradiates the lower surface of the semiconductor wafer W. By receiving light from the halogen lamps HL, the semiconductor wafer W is preheated and its temperature rises. In addition, because the transfer arm 11 of the transfer mechanism 10 retreats to the inside of the recess 62, it does not hinder heating by the halogen lamps HL.

[0085] During preheating with the halogen lamp HL, the temperature of the semiconductor wafer W is measured by the lower radiation thermometer 20. Specifically, the lower radiation thermometer 20 receives infrared light emitted from the lower surface of the semiconductor wafer W held by the susceptor 74 through the opening 78 through the transparent window 21 and measures the wafer temperature during heating. The measured temperature of the semiconductor wafer W is transmitted to the control unit 3. The control unit 3 controls the output of the halogen lamp HL while monitoring whether the temperature of the semiconductor wafer W, raised by the light from the halogen lamp HL, reaches a predetermined preheating temperature T1. Specifically, based on the measurement value of the lower radiation thermometer 20, the control unit 3 performs feedback control of the output of the halogen lamp HL so that the temperature of the semiconductor wafer W reaches the preheating temperature T1. Thus, the lower radiation thermometer 20 is a radiation thermometer used to control the temperature of the semiconductor wafer W during preheating. The preheating temperature T1 is set to approximately 200°C to 800°C, preferably approximately 350°C to 600°C (400°C in this embodiment), to minimize the risk of impurities added to the semiconductor wafer W diffusing due to heat.

[0086] After the temperature of the semiconductor wafer W reaches the preliminary heating temperature T1, the control unit 3 temporarily maintains the semiconductor wafer W at the preliminary heating temperature T1. Specifically, the control unit 3 adjusts the output of the halogen lamp HL when the temperature of the semiconductor wafer W measured by the lower radiation thermometer 20 reaches the preliminary heating temperature T1, thereby maintaining the temperature of the semiconductor wafer W approximately at the preliminary heating temperature T1.

[0087] By performing this preliminary heating with the halogen lamps HL, the entire semiconductor wafer W is uniformly heated to the preliminary heating temperature T1. During the preliminary heating with the halogen lamps HL, the temperature of the peripheral portion of the semiconductor wafer W, where heat is more easily dissipated, tends to drop compared to the central portion. However, the density of the halogen lamps HL in the halogen heating unit 4 is higher in the area facing the peripheral portion than in the area facing the central portion of the semiconductor wafer W. Consequently, the amount of light irradiating the peripheral portion of the semiconductor wafer W, where heat is more easily dissipated, is increased, achieving a uniform in-plane temperature distribution across the semiconductor wafer W during the preliminary heating stage.

[0088] When the temperature of the semiconductor wafer W reaches the preliminary heating temperature T1 and a predetermined time has elapsed, the flash lamp FL flashes the surface of the semiconductor wafer W. At this time, a portion of the flash light emitted from the flash lamp FL is directed directly into the chamber 6, while the remaining portion is temporarily reflected by the reflector 52 and then directed into the chamber 6. This flash light irradiation flashes the semiconductor wafer W.

[0089] When flash lamp FL performs flash irradiation, power supply unit 95 applies a predetermined charging voltage to capacitor 93 in advance to store charge in capacitor 93. The amount of charge stored in capacitor 93 is determined by the product of capacitance C of capacitor 93 and charging voltage V of power supply unit 95.

[0090] With charge accumulated in capacitor 93, a positive signal is applied to the gate of thyristor 96 under control of control unit 3, turning thyristor 96 on. Furthermore, a high voltage (trigger voltage) is applied to trigger electrode 91 in synchronization with the timing of thyristor 96 turning on, under control of control unit 3. With charge accumulated in capacitor 93, thyristor 96 turns on, and a high voltage is applied to trigger electrode 91 in synchronization with the timing of thyristor 96 turning on. This causes a current to flow between the two electrodes within glass tube 92. The excitation of xenon atoms or molecules at this time causes light to be emitted, and flash lamp FL emits a flash. In this way, the 63 flash lamps FL of flash heating unit 5 emit light, irradiating the surface of semiconductor wafer W held by holding unit 7 with a flash of light, thereby heating the surface of semiconductor wafer W. In this embodiment, 21 thyristors 96 are turned on simultaneously, and high voltages are applied to trigger electrodes 91 of all 63 flash lamps FL simultaneously.

[0091] Figure 10 This diagram shows the change in current flowing through the flash lamp FL. Current begins to flow through the flash lamp FL at the same time that the thyristor 96 is turned on. The waveform of the current flowing through the flash lamp FL while the thyristor 96 is turned on is determined by the capacitance C of the capacitor 93, the inductance L of the coil 94, and the charging voltage V. In this embodiment, the maximum value of the current flowing through the flash lamp FL is I MAX Reaching about 4000A.

[0092] At time t1, 0.1 milliseconds after thyristor 96 is turned on and current begins to flow through flash lamp FL, a negative signal is applied to the gate of thyristor 96 under the control of control unit 3, turning thyristor 96 off. By turning thyristor 96 off, the discharge current flowing through flash lamp FL is forcibly cut off, stopping the flash lamp FL from emitting light.

[0093] exist Figure 1 The dotted line after time t1 is the waveform of the current flowing through the flash lamp FL when the thyristor 96 is not provided and the flash lamp FL is lit. Figure 1 As shown by the dotted line in FIG0 , without the thyristor 96, the current flowing through the flash lamp FL is not forcibly shut off, so the tail current continues to flow for a long time. Therefore, the surface of the semiconductor wafer W continues to be heated even after time t1, and the cooling rate of the semiconductor wafer W after the flash irradiation decreases, hindering the thermal process.

[0094] exist Figure 1 The solid line after time t1 is the current change in this embodiment when the thyristor 96 is turned off. Figure 10 Compared to the dashed line, the tail current is significantly suppressed. As a result, after time t1 when thyristor 96 turns off, semiconductor wafer W is barely heated, reducing the total amount of heat input to semiconductor wafer W and enabling annealing with a low thermal history. Furthermore, the cooling rate of semiconductor wafer W after time t1 can be increased.

[0095] However, when the thyristor 96 is turned off, there is a concern that a coil surge, which generates a large voltage in the reverse direction, may occur in the coil 94 due to a sudden change in current. Therefore, a regenerative diode 97 ( Figure 8 Although the components in the discharge circuit can be protected from the coil surge by providing the regenerative diode 97, the current caused by the voltage generated in the coil 94 still flows through the regenerative diode 97 and the flash lamp FL after the thyristor 96 is turned off. Figure 10 As shown, some tail current remains.

[0096] Through Figure 10 The current of the waveform shown flows, causing the flash lamps FL to emit light. Flash light is irradiated from the 63 flash lamps FL for approximately 0.1 milliseconds onto the surface of the semiconductor wafer W, causing the surface temperature to rise instantaneously to a processing temperature T2 and then rapidly cool down. In this embodiment, processing temperature T2 is 1000°C. Specifically, in this embodiment, by instantaneously flowing a high current of up to 4000A through the 63 flash lamps FL, the surface temperature of the semiconductor wafer W is raised to approximately 600°C by flash light irradiation for approximately 0.1 milliseconds. This suppresses the thermal diffusion of impurities implanted into the semiconductor wafer W and promotes the activation of these impurities.

[0097] After a specified time has passed since the current supply to the flash lamp FL was stopped, the halogen lamp HL is extinguished. This causes the semiconductor wafer W to rapidly cool from the preheating temperature T1. The temperature of the semiconductor wafer W during cooling is measured by the lower radiation thermometer 20, and the measurement result is transmitted to the control unit 3. Based on the measurement result of the lower radiation thermometer 20, the control unit 3 monitors whether the temperature of the semiconductor wafer W has fallen to a specified temperature. After the temperature of the semiconductor wafer W has fallen below the specified temperature, the pair of transfer arms 11 of the transfer mechanism 10 again move horizontally from the retracted position and rise to the transfer operation position. This causes the lift pins 12 to protrude from the upper surface of the base 74, receiving the heat-treated semiconductor wafer W from the base 74. Next, the transfer opening 66, which was closed by the gate valve 185, is opened, and a transfer robot outside the apparatus removes the semiconductor wafer W placed on the lift pins 12, completing the heat treatment of the semiconductor wafer W in the heat treatment apparatus 1.

[0098] In this embodiment, by adjusting the capacitance C of capacitor 93, the inductance L of coil 94, and the charge voltage V applied to capacitor 93, the flash lamps FL are instantly discharged with a high current of up to 4000A, while the flash lamp FL irradiation time is extremely short, approximately 0.1 milliseconds. Even with this extremely short flash irradiation time of approximately 0.1 milliseconds, by passing a high current of up to 4000A through 63 flash lamps FL, the surface temperature of the semiconductor wafer W can be raised from the preheating temperature T1 by approximately 600°C. Consequently, the amount of heat input to the semiconductor wafer W can be kept low (a low-heating process), while the surface temperature of the semiconductor wafer W can be instantly raised to a high temperature, thereby achieving high activation and preventing diffusion of impurities implanted on the wafer surface.

[0099] In other words, to raise the surface temperature of a semiconductor wafer W by 600°C through flash irradiation with an irradiation time of approximately 0.1 milliseconds, 63 flash lamps FL each discharging a high current of up to 4000 A are required. If component groups were individually provided for each of the 63 flash lamps FL, at least 63 thyristors 96 and capacitors 93 would be required. This would significantly increase the cost of the device and increase the space required to install the components.

[0100] In this embodiment, one capacitor 93, one coil 94, one thyristor 96, and one regenerative diode 97 are provided for each of the three flash lamps FL connected in parallel. In other words, 21 component groups are provided for each of the 63 flash lamps FL. This reduces the number of components required for the heat treatment apparatus 1, suppresses increases in apparatus costs, and reduces the space required to accommodate the components, compared to providing component groups for each flash lamp FL.

[0101] However, if Figure 8As in the circuit configuration of FIG, when one thyristor 96 is connected to three flash lamps FL arranged in parallel, all the current flowing through the three flash lamps FL flows through the one thyristor 96. For example, as described above, when a maximum current of 4000 A flows through each flash lamp FL, a large current of 12000 A also flows through the thyristor 96.

[0102] The thyristor 96 of this embodiment is a GCT thyristor. The typical on-state current of a GCT thyristor is 6000A. In other words, according to the on-state current specification, it is not possible to connect two flash lamps FL, each of which has a maximum current of 4000A, in parallel to one thyristor 96. However, the rated surge on-state current (I TSM ), for example, 50,000 A. The rated surge current is the peak value of a non-repetitive 60 Hz half-sine wave current that can flow within the rated junction temperature range. Since a 60 Hz half-sine wave is approximately 8 milliseconds, the current flowing through the flash lamp FL during the flash irradiation, which lasts approximately 0.1 milliseconds in this embodiment, is shorter than this. Furthermore, the flash irradiation from the flash lamp FL is also non-repetitive. Therefore, if the rated junction temperature can be maintained during flash irradiation, current can flow until it reaches the rated surge current of the thyristor 96. Thus, a GCT thyristor (i.e., thyristor 96) with a rated surge current of 50,000 A can be connected in parallel to twelve flash lamps FL, each of which can flow a maximum current of 4,000 A based on simple current calculations. Therefore, it is entirely possible to provide one thyristor 96 for each of the three flash lamps FL connected in parallel, with the three flash lamps FL being switched on and off collectively by the thyristor 96.

[0103] While the embodiments of the present invention have been described above, various modifications other than those described above are possible without departing from the spirit of the present invention. For example, thyristor 96 is not limited to a GCT thyristor but may also be a GTO thyristor. GTO thyristors also have the ability to be turned off by applying a reverse signal to the gate.

[0104] Alternatively, an IGBT (Insulated Gate Bipolar Transistor) can be used instead of thyristor 96. An IGBT is a semiconductor device that switches between on and off states based on a signal input to the gate. While IGBTs have lower rated currents than GCT or GTO thyristors, they can switch between on and off states at high speed. GCT, GTO, and IGBTs are all switching elements that switch the current flowing through the connected flash lamps FL on and off. In other words, a single switching element can be connected to three flash lamps FL connected in parallel, and this switching element can collectively control the current flowing through all three flash lamps FL.

[0105] Furthermore, in the above embodiment, one component group is provided for the three flash lamps FL connected in parallel. However, this is not limiting. For example, two component groups may be provided for the three flash lamps FL. Alternatively, one component group may be provided for two, four, or more flash lamps FL connected in parallel. In short, it suffices to provide a smaller number of component groups than the number of flash lamps FL connected in parallel, as long as M component groups (M is an integer less than N) are provided for N flash lamps FL (N is an integer greater than or equal to 2) connected in parallel. This reduces the number of components provided in the heat treatment apparatus 1 compared to providing individual component groups for the flash lamps FL.

[0106] Furthermore, as a countermeasure to prevent the flash lamp FL from failing to ignite prematurely due to its lifespan, a technique called shimmer discharge is used. Instead of immediately transitioning to the main discharge after the trigger discharge, this technique temporarily maintains a weak discharge (shimmer discharge) within glass tube 92 after the trigger discharge occurs, before generating the main discharge. The shimmer discharge moves in a direction opposite to gravity over time due to convection of the xenon gas enclosed within glass tube 92. Therefore, if the main discharge occurs at the timing when the discharge path moves near the central axis of glass tube 92, damage to glass tube 92 can be reduced.

[0107] In order to produce this shimmering discharge, Figure 8 In the discharge circuit, a resistor must be connected in parallel with thyristor 96. Furthermore, a switching element such as an IGBT or thyristor is required to transition from shimmer discharge to main discharge. In this case, the same effects as those of the aforementioned embodiment can be achieved by providing fewer switching elements than the number of flash lamps FL connected in parallel. Furthermore, the switching element used to transition from shimmer discharge to main discharge can be a thyristor that only conducts and has no shutdown function.

[0108] Furthermore, in the above embodiment, the flash heating unit 5 includes 63 flash lamps FL, but this is not limited to this number and the number of flash lamps FL can be any number. Furthermore, the flash lamps FL are not limited to xenon flash lamps and can also be krypton flash lamps. Furthermore, the number of halogen lamps HL included in the halogen heating unit 4 is not limited to 40 and can be any number.

[0109] In addition, in the embodiment, a filament-type halogen lamp HL is used as a continuous-lighting lamp that continuously emits light for more than one second to perform preliminary heating of the semiconductor chip W, but this is not limited to this. A discharge-type arc lamp (such as a xenon arc lamp) or an LED (Light Emitting Diode) lamp may be used as a continuous-lighting lamp to perform preliminary heating instead of the halogen lamp HL.

[0110] Furthermore, the heat treatment apparatus 1 is not limited to heat treatment for activating impurities, and can also perform heat treatment of a high-dielectric-constant gate insulating film (High-k film), bonding of metal and silicon, or crystallization of polysilicon.

[0111] [Explanation of Symbols]

[0112] 1 Heat treatment device

[0113] 3. Control Unit

[0114] 4 halogen heating unit

[0115] 5Flash heating unit

[0116] 6 chambers

[0117] 7. Maintaining part

[0118] 10Transfer mechanism

[0119] 20 Lower radiation thermometer

[0120] 25 Upper radiation thermometer

[0121] 32 Input unit

[0122] 33 Display unit

[0123] 34 Storage Department

[0124] 63 Upper chamber window

[0125] 64 lower chamber window

[0126] 65 heat treatment space

[0127] 74 base

[0128] 91 trigger electrode

[0129] 92 glass tube

[0130] 93 capacitors

[0131] 94 coils

[0132] 96 thyristor

[0133] 97 regenerative diode

[0134] FL flash

[0135] HL halogen lamp

[0136] W semiconductor wafer.

Claims

1. A heat treatment apparatus, which is an apparatus for heating a substrate by irradiating the substrate with a flash, comprising: a chamber for receiving a substrate; a holding portion for holding the substrate in the chamber; a plurality of flash lamps for irradiating flash light to the substrate held by the holding portion; a discharge circuit for causing current to flow through the plurality of flash lamps to cause the plurality of flash lamps to emit light; and A control unit controls the discharge circuit; and The discharge circuit includes M (M is an integer less than N) element groups for N (N is an integer greater than or equal to 2) flash lamps connected in parallel.

2. The heat treatment device according to claim 1, wherein One element group is provided for the N flash lamps connected in parallel.

3. The heat treatment device according to claim 2, wherein The element group includes one switching element for controlling current flowing through the N flash lamps.

4. The heat treatment device according to claim 3, wherein The component group further includes one coil, one capacitor and one diode.

5. The heat treatment device according to claim 3, wherein The switch element is a thyristor.

6. The heat treatment device according to claim 5, wherein The thyristor is a GTO thyristor or a GCT thyristor.

7. The heat treatment device according to claim 3, wherein The switching element is an IGBT.

Citation Information

Patent Citations

  • Heat treatment apparatus

    JP2009070948A

  • Heat treatment method and apparatus

    JP2011119562A