Electronic equipment and power supply method

Abstract

The invention relates to the technical field of electronic equipment, in particular to electronic equipment and a power supply method. The electronic equipment comprises a power supply module, an interface module, a charging module, a first switch module and a first to-be-powered module, wherein the interface module is connected with a first end of the charging module, a second end of the charging module is connected with a first end of the first switch module, a second end of the first switch module is connected with a first end of the first to-be-powered module, a third end of the charging module is connected with the power supply module, and the power supply module is further connected with a second end of the first to-be-powered module; and when the interface module is connected with the external power supply and the first switch module is in a conducting state, the power supply module stops supplying power to the first to-be-powered module, and current input by the external power supply sequentially passes through the interface module, the charging module and the first switch module to supply power to the first to-be-powered module. By adopting the scheme, the use convenience of the electronic equipment can be improved.

Description

Technical Field

[0001] The present disclosure relates to the technical field of electronic equipment, and in particular to an electronic equipment and a power supply method. Background Art

[0002] With the development of science and technology, electronic devices are becoming more and more popular, which improves people's production and life. When electronic devices are working, they need internal power supplies to power internal components to work. In the process of powering internal components, a large amount of heat will be generated and dissipated because the power supply voltage needs to be converted to match the working voltage of the internal components. If the internal power supply is charged at the same time in this case, the heat generated by charging will be superimposed on the heat generated by power supply, causing the electronic device to heat up seriously, resulting in low convenience when using the electronic device. Summary of the invention

[0003] The present disclosure provides an electronic device and a power supply method, the main purpose of which is to improve the convenience of using the electronic device.

[0004] According to one aspect of the present disclosure, an electronic device is provided, comprising: a power module, an interface module, a charging module, a first switch module and a first module to be powered; wherein:

[0005] The interface module is connected to a first end of the charging module, a second end of the charging module is connected to a first end of the first switch module, a second end of the first switch module is connected to a first end of the first module to be powered, a third end of the charging module is connected to the power module, and the power module is also connected to a second end of the first module to be powered;

[0006] When the interface module is connected to the external power supply and the first switch module is in the on state, the power module stops supplying power to the first module to be powered, and the current input by the external power supply sequentially passes through the interface module, the charging module, and the first switch module to supply power to the first module to be powered.

[0007] Optionally, in one embodiment of the present disclosure, the interface module includes an interface terminal and a second switch module; wherein,

[0008] The interface terminal is connected to a first end of the second switch module, and a second end of the second switch module is connected to a first end of the charging module.

[0009] Optionally, in one embodiment of the present disclosure, a driving end of the charging module is connected to a control end of the first switch module and / or a control end of the second switch module.

[0010] Optionally, in one embodiment of the present disclosure, the charging module includes at least one charge pump circuit; wherein,

[0011] A first end of each of the charge pump circuits is connected to the interface module, and a third end of each of the charge pump circuits is connected to a first end of the power module;

[0012] A second end of at least one of the charge pump circuits is connected to a first end of the first switch module.

[0013] Optionally, in one embodiment of the present disclosure, a driving end of a first charge pump circuit is connected to a control end of the first switch module, wherein the first charge pump circuit is a charge pump circuit in the charging module connected to the first switch module.

[0014] Optionally, in an embodiment of the present disclosure, when the number of the charge pump circuits is not less than 2, the electronic device further comprises: a third switch module and a second power supply module; wherein,

[0015] The second end of the second charge pump circuit is connected to the first end of the third switch module, the second end of the third switch module is connected to the first end of the second module to be powered, the second end of the second module to be powered is connected to the power module, and the second charge pump circuit is a charge pump circuit in the charging module except the first charge pump circuit;

[0016] When the interface module is connected to the external power supply and the third switch module is in the on state, the power supply module stops supplying power to the second module to be powered, so as to control the current input by the external power supply to pass through the interface module, the charging module and the third switch module in sequence to supply power to the second module to be powered.

[0017] Optionally, in one embodiment of the present disclosure, the first module to be powered includes a boost circuit and a component to be powered; wherein,

[0018] The first end of the boost circuit is connected to the power module, and the second end of the boost circuit is connected to the power supply component and the second end of the first switch module respectively;

[0019] When the interface module is connected to the external power supply and the first switch module is in a conducting state, the boost circuit is in a non-operating state, so that the power module stops supplying power to the component to be powered.

[0020] Optionally, in one embodiment of the present disclosure, the switch module includes at least one of the following switch circuits:

[0021] Back-to-back transistor switching circuit;

[0022] Single transistor switching circuit.

[0023] Optionally, in one embodiment of the present disclosure, the switch module includes the back-to-back transistor switch circuit and the single transistor switch circuit, and the back-to-back transistor switch circuit and the single transistor switch circuit are connected in series.

[0024] Optionally, in one embodiment of the present disclosure, the back-to-back transistor switch circuit includes a first transistor, a second transistor, a first diode and a second diode; wherein,

[0025] The connection point between the source of the first transistor and the anode of the first diode is the first end of the back-to-back transistor switch circuit, the drain of the first transistor is respectively connected to the drain of the second transistor, the cathode of the first diode and the cathode of the second diode, the connection point between the source of the second transistor and the anode of the second diode is the second end of the back-to-back transistor switch circuit, and the connection point between the gate of the first transistor and the gate of the second transistor is the control end of the back-to-back transistor switch circuit.

[0026] Optionally, in one embodiment of the present disclosure, the single transistor switch circuit includes a third transistor and a third diode; wherein,

[0027] The connection point between the drain of the third transistor and the cathode of the third diode is the first end of the single-transistor switch circuit, the connection point between the source of the third transistor and the anode of the third diode is the second end of the single-transistor switch circuit, and the gate of the third transistor is the control end of the single-transistor switch circuit.

[0028] Optionally, in one embodiment of the present disclosure, the charge pump circuit includes a charge pump chip; wherein,

[0029] The ratio of the port voltage corresponding to the first end of the charge pump chip to the port voltage corresponding to the second end of the charge pump chip and the port voltage corresponding to the third end of the charge pump chip is 4:2:1.

[0030] Optionally, in one embodiment of the present disclosure, the charge pump chip integrates a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a first transistor module, a second transistor module, a third transistor module, a fourth transistor module, a fifth transistor module, a sixth transistor module, a seventh transistor module, an eighth transistor module, a ninth transistor module, a tenth transistor module, an eleventh transistor module, a twelfth transistor module, a thirteenth transistor module, a fourteenth transistor module, a fifteenth transistor module, a sixteenth transistor module, a seventeenth transistor module, and an eighteenth transistor module; wherein,

[0031] The connection point between the drain of the first transistor module and the drain of the second transistor module is the first end of the charge pump chip, the source of the first transistor module is respectively connected to the drain of the fourth transistor module and the first end of the first capacitor, the source of the second transistor module is respectively connected to the drain of the third transistor module and the first end of the second capacitor, and the connection point between the source of the third transistor module, the source of the fourth transistor module, the drain of the fifth transistor module, the drain of the sixth transistor module and the first end of the fifth capacitor is the second end of the charge pump chip;

[0032] The source of the fifth transistor module is respectively connected to the drain of the seventh transistor module, the drain of the tenth transistor module and the first end of the third capacitor, the source of the seventh transistor module is respectively connected to the drain of the eighth transistor module and the second end of the first capacitor, the second end of the third capacitor is respectively connected to the source of the ninth transistor module, the source of the eleventh transistor module and the drain of the twelfth transistor module, and the drain of the eleventh transistor module is respectively connected to the drain of the sixteenth transistor module and the first end of the sixth capacitor;

[0033] The source of the sixth transistor module is respectively connected to the drain of the thirteenth transistor module, the drain of the eighteenth transistor module and the first end of the fourth capacitor, the source of the eighteenth transistor module is respectively connected to the drain of the seventeenth transistor module and the second end of the second capacitor, the second end of the fourth capacitor is respectively connected to the source of the fourteenth transistor module, the source of the sixteenth transistor module and the drain of the fifteenth transistor module, and the connection point between the source of the tenth transistor module, the drain of the ninth transistor module, the source of the thirteenth transistor module and the drain of the fourteenth transistor module is the third end of the charge pump chip;

[0034] A source of the eighth transistor module, a source of the twelfth transistor module, a source of the fifteenth transistor module, a source of the seventeenth transistor module, a second end of the fifth capacitor, and a second end of the sixth capacitor are grounded.

[0035] According to another aspect of the present disclosure, a power supply method is provided, characterized in that it is applied to the electronic device as described in any one of the above aspects, and the method includes:

[0036] When the interface module is connected to an external power supply, the first switch module is controlled to be in an on state, and the power supply module is controlled to stop supplying power to the first module to be powered, so as to control the current input by the external power supply to pass through the interface module, the charging module, and the first switch module in sequence to supply power to the first module to be powered.

[0037] Optionally, in one embodiment of the present disclosure, the method further includes:

[0038] When the interface module is connected to the external power supply, the current input by the external power supply is controlled to pass through the interface module and the charging module in sequence to charge the power supply module.

[0039] Optionally, in one embodiment of the present disclosure, the method further includes:

[0040] When the interface module is connected to an external power supply, the third switch module is controlled to be in an on state, and the power supply module is controlled to stop supplying power to the second module to be powered, so as to control the current input by the external power supply to pass through the interface module, the charging module, and the third switch module in sequence to supply power to the second module to be powered.

[0041] Optionally, in one embodiment of the present disclosure, the method further includes:

[0042] When the interface terminal is connected to the external power supply, the second switch module is controlled to be in an on state, and the charge pump chip is controlled to be in a pre-charging state, so as to control the charge pump chip to charge the first capacitor, the second capacitor, the third capacitor and the fourth capacitor according to the first voltage input from the interface terminal, until the capacitor voltage corresponding to the first capacitor and the capacitor voltage corresponding to the second capacitor are both the second voltage, and the capacitor voltage corresponding to the third capacitor and the capacitor voltage corresponding to the fourth capacitor are both the third voltage, wherein the second voltage is the power supply voltage when the charging module supplies power to the module to be powered, and the third voltage is the charging voltage when the charging module charges the power supply module;

[0043] The charge pump chip is controlled to switch alternately between a first conduction state and a second conduction state, so as to control the second end of the charge pump chip to output the second voltage and the third end of the charge pump chip to output the third voltage.

[0044] Optionally, in one embodiment of the present disclosure, the method further includes:

[0045] Controlling the first transistor module to be in an on state, the second transistor module to be in an off state, the third transistor module to be in an on state, the fourth transistor module to be in an off state, the fifth transistor module to be in an on state, the sixth transistor module to be in an off state, the seventh transistor module to be in an on state, the eighth transistor module to be in an off state, the ninth transistor module to be in an on state, the tenth transistor module to be in an off state, the eleventh transistor module to be in an on state, the twelfth transistor module to be in an off state, the thirteenth transistor module to be in an on state, the fourteenth transistor module to be in an off state, the fifteenth transistor module to be in an on state, the sixteenth transistor module to be in an off state, the seventeenth transistor module to be in an on state, and the eighteenth transistor module to be in an off state, so that the charge pump chip is in the first on state;

[0046] Control the first transistor module to be in the off state, the second transistor module to be in the on state, the third transistor module to be in the off state, the fourth transistor module to be in the on state, the fifth transistor module to be in the off state, the sixth transistor module to be in the on state, the seventh transistor module to be in the off state, the eighth transistor module to be in the on state, the ninth transistor module to be in the off state, the tenth transistor module to be in the on state, the eleventh transistor module to be in the off state, the twelfth transistor module to be in the on state, the thirteenth transistor module to be in the off state, the fourteenth transistor module to be in the on state, the fifteenth transistor module to be in the off state, the sixteenth transistor module to be in the on state, the seventeenth transistor module to be in the off state, and the eighteenth transistor module to be in the on state, so that the charge pump chip is in the second on state.

[0047] According to another aspect of the present disclosure, there is provided an electronic device, comprising:

[0048] at least one processor; and

[0049] a memory communicatively connected to the at least one processor; wherein,

[0050] The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform any one of the methods described in the above aspect.

[0051] According to another aspect of the present disclosure, a non-transitory computer-readable storage medium storing computer instructions is provided, wherein the computer instructions are used to enable the computer to execute any one of the methods described in the above aspect.

[0052] According to another aspect of the present disclosure, a computer program product is provided, including a computer program, wherein when the computer program is executed by a processor, the computer program implements any one of the methods described in the aforementioned aspect.

[0053] In summary, the electronic device provided by the embodiment of the present disclosure includes: a power module, an interface module, a charging module, a first switch module and a first module to be powered; wherein the interface module is connected to the first end of the charging module, the second end of the charging module is connected to the first end of the first switch module, the second end of the first switch module is connected to the first end of the first module to be powered, the third end of the charging module is connected to the power module, and the power module is also connected to the second end of the first module to be powered; when the interface module is connected to the external power supply and the first switch module is in the on state, the power module stops supplying power to the first module to be powered, and the current input by the external power supply sequentially passes through the interface module, the charging module, and the first switch module to supply power to the first module to be powered. Therefore, it is not necessary to supply power to the module to be powered through the power module, the power supply efficiency can be improved, the heating degree of the electronic device can be reduced, thereby improving the convenience of the electronic device when in use, and improving the user experience.

[0054] Additional aspects and advantages of the present disclosure will be given in part in the following description and in part will be obvious from the following description or learned through practice of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0055] The above and / or additional aspects and advantages of the present disclosure will become apparent and easily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0056] Figure 1 A schematic diagram of the structure of a Smart PA provided in an embodiment of the present disclosure;

[0057] Figure 2 A schematic diagram of the structure of an electronic device provided by an embodiment of the present disclosure;

[0058] Figure 3 A schematic diagram of the structure of another electronic device provided by an embodiment of the present disclosure;

[0059] Figure 4 A schematic diagram of the structure of another electronic device provided by an embodiment of the present disclosure;

[0060] Figure 5 A schematic diagram of the structure of a charge pump chip provided by an embodiment of the present disclosure;

[0061] Figure 6 A schematic diagram of a flow chart of a power supply method provided in an embodiment of the present disclosure;

[0062] Figure 7 A block diagram of an electronic device provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0063] Embodiments of the present disclosure are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present disclosure, and are not to be construed as limitations of the present disclosure. On the contrary, the embodiments of the present disclosure include all changes, modifications, and equivalents that fall within the spirit and connotation of the appended claims.

[0064] In the related art, electronic devices need internal power to power internal components to work. For example, smart power amplifiers (Smart PAs) can bring higher volume, deeper bass and better sound quality to electronic devices such as mobile phones, portable music players and tablet computers, and can also increase the average volume of music without exceeding the speaker's own tolerance. For music lovers and game enthusiasts, Smart PA can improve the user experience of electronic devices. For better performance, two or more Smart PAs are usually integrated in electronic devices.

[0065] Figure 1 This is a schematic diagram of the structure of a Smart PA provided by an embodiment of the present disclosure. Figure 1 As shown, in the SmartPA chip, the boost power pin VP, the boost switch pin SW and the boost output pin VBST are interconnected to form a boost circuit, which can boost the system voltage VPH_PWR (3.6V to 4.5V) received by the boost power pin VP from the built-in power input, and input the boosted power voltage (10V) to the power amplifier power input pin VBST through the boost output pin VBST to power the power amplifier (Amplifier) ​​in the Smart PA chip.

[0066] It should be noted that when the boost circuit is boosting the system voltage VPH_PWR, it is affected by the loss of the switching device Q4 and the loss of the inductor L itself. Its efficiency η can be described by the following formula:

[0067]

[0068] Among them, P out is the output power, that is, the power of the boosted power supply voltage. in is the input power, that is, the power of the system voltage VPH_PWR. L is the resistance of the inductor L. D is the duty cycle of the driving signal of the switching device Q4. R is the load resistance.

[0069] That is, when the output power P out When the power consumption is 500mW, the total efficiency η of the boost circuit is 85%, which will generate a lot of heat and be dissipated.

[0070] It is easy to understand that it is common to play games or watch videos while charging. When users play games or watch videos while charging their electronic devices, Smart PA needs to be in working state. In this case, the heat generated by charging itself and the heat generated by Smart PA operation will be superimposed on each other, causing serious heating of the electronic device, which makes the electronic device less convenient to use.

[0071] The present disclosure is described in detail below with reference to specific embodiments.

[0072] Figure 2 A schematic diagram of the structure of an electronic device provided by an embodiment of the present disclosure.

[0073] like Figure 2 As shown, the electronic device includes: a power module, an interface module, a charging module, a first switch module and a first power supply module; wherein,

[0074] The interface module is connected to the first end of the charging module, the second end of the charging module is connected to the first end of the first switch module, the second end of the first switch module is connected to the first end of the first module to be powered, the third end of the charging module is connected to the power module, and the power module is also connected to the second end of the first module to be powered.

[0075] According to some embodiments, the interface module refers to a module used to connect to an external device, including but not limited to a wired interface module, a wireless interface module, and the like.

[0076] In some embodiments, the charging module is used to charge the power module according to a first voltage input by the external power source received by the interface module when the interface module is connected to the external power source.

[0077] According to some embodiments, the module to be powered refers to a module that needs to be powered by a power supply module to work. The module to be powered may be, for example, a Smart PA. The "first" in the first module to be powered is only used for distinction and has no special meaning.

[0078] In some embodiments, the power module may include, for example, a battery BAT. When the third terminal of the charging module is connected to the power module, it may be specifically connected to the positive electrode of the battery BAT, and the negative electrode of the battery BAT is grounded.

[0079] According to some embodiments, when the interface module is connected to an external power supply and the first switch module is in an on state, the power module can stop supplying power to the first module to be powered, and the current input by the external power supply can sequentially pass through the interface module, the charging module, and the first switch module to supply power to the first module to be powered.

[0080] In some embodiments, when the interface module is not connected to an external power source, the power module may supply power to the first module to be powered.

[0081] Optionally, in one embodiment of the present disclosure, Figure 3 This is a schematic diagram of the structure of an electronic device provided by an embodiment of the present disclosure. Figure 3 As shown, the interface module includes an interface terminal and a second switch module; wherein,

[0082] The interface terminal is connected to a first end of the second switch module, and a second end of the second switch module is connected to a first end of the charging module.

[0083] According to some embodiments, the interface terminal includes but is not limited to a wired interface terminal, a wireless interface terminal, etc.

[0084] In some embodiments, the wired interface terminal is used to establish a wired connection with an external device. The wired interface terminal may be, for example, a Universal Serial Bus (USB) interface.

[0085] For example, when a wired connection is established between the USB interface and the external power source, a first voltage input from the external power source may be received through a power supply (VBUS) pin of the USB interface, and the first voltage may be transmitted to the second switch module.

[0086] In some embodiments, the wireless interface terminal is used to wirelessly connect to an external device. The wireless interface terminal may be, for example, a wireless charging chip.

[0087] For example, during wireless forward charging, the wireless charging chip is wirelessly connected to an external power source, and the wireless charging chip, as a receiving (receive, Rx) end, can convert the AC signal received from the external power source input into a DC signal and output it to the second switch module for forward charging.

[0088] Optionally, in one embodiment of the present disclosure, the charging module includes at least one charge pump circuit; wherein,

[0089] A first end of each charge pump circuit is connected to the interface module, and a third end of each charge pump circuit is connected to a first end of the power module;

[0090] The second end of the at least one charge pump circuit is connected to the first end of the first switch module.

[0091] According to some embodiments, when the number of charge pump circuits is not less than 2, the electronic device further includes: a third switch module and a second power supply module; wherein,

[0092] The second end of the second charge pump circuit is connected to the first end of the third switch module, the second end of the third switch module is connected to the first end of the second module to be powered, and the second end of the second module to be powered is connected to the power module.

[0093] In some embodiments, the second charge pump circuit is a charge pump circuit in the charging module other than the first charge pump circuit, and the first charge pump circuit is a charge pump circuit in the charging module connected to the first switch module.

[0094] According to some embodiments, the “second” in the second module to be powered is only used for distinction and has no special meaning.

[0095] In some embodiments, when the interface module is connected to the external power supply and the third switch module is in the on state, the power module stops supplying power to the second module to be powered, so as to control the current input from the external power supply to pass through the interface module, the charging module, and the third switch module in sequence to supply power to the second module to be powered.

[0096] It should be noted that the total number of modules to be powered may not be greater than the total number of charge pump circuits, so that each module to be powered can be connected to the second end of a charge pump circuit, so that the charge pump circuit connected to the module to be powered can power the module to be powered connected to it.

[0097] For example, the charging module may include four charge pump circuits and three modules to be powered. The three modules to be powered may be connected to the second ends of any three of the four charge pump circuits in a one-to-one correspondence.

[0098] According to some embodiments, the module to be powered includes a first module to be powered and a second module to be powered, which may include a boost circuit and a component to be powered; wherein,

[0099] The first end of the boost circuit is connected to the power module, and the second end of the boost circuit is connected to the component to be powered;

[0100] In some embodiments, the second end of the boost circuit in the first module to be powered is respectively connected to the element to be powered in the first module to be powered and the second end of the first switch module; when the interface module is connected to an external power supply and the first switch module is in an on state, the boost circuit in the first module to be powered is in a non-working state, so that the power supply module stops supplying power to the element to be powered in the first module to be powered.

[0101] In some embodiments, the second end of the boost circuit in the second module to be powered is respectively connected to the element to be powered in the second module to be powered and the second end of the third switch module; when the interface module is connected to an external power supply and the third switch module is in a conductive state, the boost circuit in the second module to be powered is in a non-working state, so that the power supply module stops supplying power to the element to be powered in the second module to be powered.

[0102] According to some embodiments, the boost circuit is used to boost an input voltage.

[0103] In some embodiments, the component to be powered refers to an electronic component that needs to be powered by a power module in the electronic device to work. The component to be powered may be, for example, a power amplifier.

[0104] Optionally, in an embodiment of the present disclosure, the switch modules provided in the embodiment of the present disclosure include but are not limited to the first switch module, the second switch module, and the third switch module, and their on and off states can be controlled by at least one of the following modules in the electronic device:

[0105] Control module;

[0106] Driver module;

[0107] The charging module includes a first charging module and a second charging module.

[0108] According to some embodiments, when the on / off state of the switch module is controlled by the charging module, the driving end of the charging module can be connected to the control end of at least one of the first switch module, the second switch module, and the third switch module. Therefore, the charging module can be reused to control the on / off state of the switch module, and there is no need to set up a control module or a driving module separately, which can reduce the cost of the electronic device.

[0109] For example, the driving end of the charging module may be connected to the control end of the first switch module and / or the control end of the second switch module.

[0110] It should be noted that when the charging module includes at least one charge pump circuit, the driving end of the first charge pump circuit can be connected to the control end of the first switch module, and the driving end of the first charge pump circuit can also be connected to the control end of the first switch module and the control end of the second switch module. When the charging module includes at least two charge pump circuits, the driving end of the second charge pump circuit can be connected to the control end of the third switch module.

[0111] In some embodiments, the control module and the driving module may include, for example, a central processing unit, a micro control unit, and other electronic components that can control the on and off states of the switch module.

[0112] Optionally, in one embodiment of the present disclosure, the switch module includes at least one of the following switch circuits:

[0113] Back-to-back transistor switching circuit;

[0114] Single transistor switching circuit.

[0115] It should be noted that when the switch module includes a back-to-back transistor switch circuit and a single transistor switch circuit, the back-to-back transistor switch circuit and the single transistor switch circuit may be connected in series.

[0116] According to some embodiments, a back-to-back transistor switch circuit refers to a circuit formed by connecting two transistors back-to-back. The back-to-back transistor switch circuit can prevent voltage backflow and improve the safety of electronic equipment when in use.

[0117] In some embodiments, the back-to-back transistor switch circuit includes a first transistor, a second transistor, a first diode, and a second diode; wherein,

[0118] The connection point between the source of the first transistor and the anode of the first diode is the first end of the back-to-back transistor switch circuit, the drain of the first transistor is respectively connected to the drain of the second transistor, the cathode of the first diode and the cathode of the second diode, the connection point between the source of the second transistor and the anode of the second diode is the second end of the back-to-back transistor switch circuit, and the connection point between the gate of the first transistor and the gate of the second transistor is the control end of the back-to-back transistor switch circuit.

[0119] In some embodiments, when a driving signal received at a control terminal of the back-to-back transistor switch circuit can drive the first transistor and the second transistor to be in a conducting state, the back-to-back transistor switch circuit is in a conducting state.

[0120] For example, when the first transistor and the second transistor are both N-type metal oxide semiconductor field effect transistors (MOSFET, MOS), the gate of the first transistor and the gate of the second transistor can be in the on state when receiving a high-level driving signal; when the first transistor and the second transistor are both PMOS, the gate of the first transistor and the gate of the second transistor can be in the on state when receiving a low-level driving signal.

[0121] According to some embodiments, a single-transistor switch circuit refers to a switch circuit that uses only one transistor as a switch.

[0122] In some embodiments, the single transistor switch circuit includes a third transistor and a third diode; wherein,

[0123] The connection point between the drain of the third transistor and the cathode of the third diode is the first end of the single transistor switch circuit, the connection point between the source of the third transistor and the anode of the third diode is the second end of the single transistor switch circuit, and the gate of the third transistor is the control end of the single transistor switch circuit.

[0124] In some embodiments, when the driving signal received at the control terminal of the single-transistor switch circuit can drive the third transistor to be in the on state, the single-transistor switch circuit can be in the on state.

[0125] For example, when the third transistor is an NMOS, the gate of the third transistor can be turned on by receiving a high-level driving signal; when the third transistor is a PMOS, the gate of the third transistor can be turned on by receiving a low-level driving signal.

[0126] In some embodiments, the first diode, the second diode and the third diode can all be body diodes. Models of the first transistor, the second transistor and the third transistor include but are not limited to bipolar junction transistor (Bipolar Junction Transistor, BJT), gate turn-off thyristor (Gate Turn-off Thyristor, GTO), insulated gate bipolar transistor (Insulated Gate Bipolar Transistor, IGBT), integrated gate commutated thyristor (Integrated Gate Commuted Transistor, IGCT), MOSFET, gallium nitride field effect transistor (GaN FET), etc.

[0127] Take a scenario as an example. Figure 4 This is a schematic diagram of the structure of an electronic device provided by an embodiment of the present disclosure. Figure 4As shown, the charging module includes two charge pump circuits, namely a first charge pump circuit and a second charge pump circuit. The second switch module includes a back-to-back transistor switch circuit, and the control end of the back-to-back transistor switch circuit is connected to the driving end of the first charge pump circuit. The first switch module is connected to the second end of the first charge pump circuit, and the first switch module includes a back-to-back transistor switch circuit and a single transistor switch circuit connected in series.

[0128] It should be noted that the charging power of the charging module may be greater than 27 W, for example. When only one charge pump circuit is used for charging, the charging power may be 90 W. When two charge pump circuits are used for charging at the same time, the charging power may be 120 W.

[0129] Optionally, in one embodiment of the present disclosure, the charge pump circuit includes a charge pump chip (charger pump, CP); wherein,

[0130] The OVPGATE end of the charge pump chip may be a first driving end of the charge pump circuit, the WPCGATE end of the charge pump chip may be a second driving end of the charge pump circuit, the first end of the charge pump chip is a first end of the charge pump circuit, the second end of the charge pump chip is a second end of the charge pump circuit, and the third end of the charge pump chip is a third end of the charge pump circuit;

[0131] The ratio of the port voltage corresponding to the first end of the charge pump chip to the port voltage corresponding to the second end of the charge pump chip and the port voltage corresponding to the third end of the charge pump chip is 4:2:1.

[0132] For example, when the input voltage received by the first end of the charge pump chip, that is, the first voltage is 20V, the second voltage output by the second end of the charge pump chip is 10V, and the third voltage output by the third end of the charge pump chip is 5V.

[0133] In some embodiments, the control terminal of the switch module may be connected to the OVPGATE terminal and / or the WPCGATE terminal of the charge pump chip, for example.

[0134] For example, Figure 4 As shown, the control end of the back-to-back transistor switch circuit in the first switch module can be connected to the OVPGATE end of the charge pump chip, the control end of the single transistor switch circuit in the first switch module can be connected to the WPCGATE end of the charge pump chip, and the control end of the back-to-back transistor switch circuit in the second switch module can be connected to the OVPGATE end of the charge pump chip.

[0135] According to some embodiments, Figure 5 Schematic diagram of the structure of a charge pump chip provided by an embodiment of the present disclosure. Figure 5As shown, the charge pump chip integrates a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a first transistor module Q1, a second transistor module Q2, a third transistor module Q3, a fourth transistor module Q4, a fifth transistor module Q5, a sixth transistor module Q6, a seventh transistor module Q7, an eighth transistor module Q8, a ninth transistor module Q9, a tenth transistor module Q10, an eleventh transistor module Q11, a twelfth transistor module Q12, a thirteenth transistor module Q13, a fourteenth transistor module Q14, a fifteenth transistor module Q15, a sixteenth transistor module Q16, a seventeenth transistor module Q17, and an eighteenth transistor module Q18; wherein,

[0136] The connection point between the drain of the first transistor module Q1 and the drain of the second transistor module Q2 is the first end of the charge pump chip, the source of the first transistor module Q1 is respectively connected to the drain of the fourth transistor module Q4 and the first end of the first capacitor C1, the source of the second transistor module Q2 is respectively connected to the drain of the third transistor module Q3 and the first end of the second capacitor C2, and the connection point between the source of the third transistor module Q3, the source of the fourth transistor module Q4, the drain of the fifth transistor module Q5, the drain of the sixth transistor module Q6 and the first end of the fifth capacitor C5 is the second end of the charge pump chip;

[0137] The source of the fifth transistor module Q5 is respectively connected to the drain of the seventh transistor module Q7, the drain of the tenth transistor module Q10 and the first end of the third capacitor C3, the source of the seventh transistor module Q7 is respectively connected to the drain of the eighth transistor module Q8 and the second end of the first capacitor C1, the second end of the third capacitor C3 is respectively connected to the source of the ninth transistor module Q9, the source of the eleventh transistor module Q11 and the drain of the twelfth transistor module Q12, the drain of the eleventh transistor module Q11 is respectively connected to the drain of the sixteenth transistor module Q16 and the first end of the sixth capacitor C6;

[0138] The source of the sixth transistor module Q6 is respectively connected to the drain of the thirteenth transistor module Q13, the drain of the eighteenth transistor module Q18 and the first end of the fourth capacitor C4, the source of the eighteenth transistor module Q18 is respectively connected to the drain of the seventeenth transistor module Q17 and the second end of the second capacitor C2, the second end of the fourth capacitor C4 is respectively connected to the source of the fourteenth transistor module Q14, the source of the sixteenth transistor module Q16 and the drain of the fifteenth transistor module Q15, the connection point between the source of the tenth transistor module Q10, the drain of the ninth transistor module Q9, the source of the thirteenth transistor module Q13 and the drain of the fourteenth transistor module Q14 is the second output end of the charge pump chip;

[0139] The source of the eighth transistor module Q8 , the source of the twelfth transistor module Q12 , the source of the fifteenth transistor module Q15 , the source of the seventeenth transistor module Q17 , the second end of the fifth capacitor C5 , and the second end of the sixth capacitor C6 are grounded.

[0140] In some embodiments, Figure 5 As shown, the charge pump chip also integrates a seventh capacitor C7 and an eighth capacitor C8; wherein,

[0141] A connection point between a first end of the seventh capacitor C7 and the drain of the first transistor module Q1 and the drain of the second transistor module Q2 is an input end of the charge pump chip, and a second end of the seventh capacitor C7 is grounded;

[0142] The connection point between the first end of the eighth capacitor C8 and the source of the tenth transistor module Q10, the drain of the ninth transistor module Q9, the source of the thirteenth transistor module Q13 and the drain of the fourteenth transistor module Q14 is the second output end of the charge pump chip, and the second end of the eighth capacitor C8 is grounded.

[0143] In some embodiments, before the charge pump chip enters the working state, a pre-charging operation is performed, and the first capacitor C1, the second capacitor C2, the third capacitor C3 and the fourth capacitor C4 are charged according to the first voltage Vin, until the capacitor voltage corresponding to the first capacitor C1 and the capacitor voltage corresponding to the second capacitor C2 are both the second voltage, and the capacitor voltage corresponding to the third capacitor C3 and the capacitor voltage corresponding to the fourth capacitor C4 are both the third voltage. Then, the charge pump chip will enter the working state, that is, alternately switch between the first conduction state and the second conduction state, so that the second end outputs the second voltage and the third end outputs the third voltage.

[0144] In some embodiments, when the charge pump chip switches from the pre-charging state to the working state, the charge pump chip first enters the first conduction state, at which time, the first transistor module Q1 is in the conduction state, the second transistor module Q2 is in the disconnection state, the third transistor module Q3 is in the conduction state, the fourth transistor module Q4 is in the disconnection state, the fifth transistor module Q5 is in the conduction state, the sixth transistor module Q6 is in the disconnection state, the seventh transistor module Q7 is in the conduction state, the eighth transistor module Q8 is in the disconnection state, the ninth transistor module Q9 is in the conduction state, the tenth transistor module Q10 is in the disconnection state, the eleventh transistor module Q11 is in the conduction state, the twelfth transistor module 12 is in the disconnection state, the thirteenth transistor module Q13 is in the conduction state, the fourteenth transistor module Q14 is in the disconnection state, the fifteenth transistor module Q15 is in the conduction state, the sixteenth transistor module Q16 is in the disconnection state, the seventeenth transistor module Q17 is in the conduction state, and the eighteenth transistor module Q18 is in the disconnection state.

[0145] In this case, there will be the following three paths inside the charge pump chip:

[0146] In the first path, the current flows sequentially through the first end of the charge pump chip, the first transistor module Q1, the first capacitor C1, the seventh transistor module Q7, the third capacitor C3, the ninth transistor module Q9, the third end of the charge pump chip, and the ground.

[0147] In the second path, the current flows sequentially through the first end of the charge pump chip, the first transistor module Q1, the first capacitor C1, the seventh transistor module Q7, the third capacitor C3, the eleventh transistor module Q11, the sixth capacitor C6, and the ground.

[0148] In the third path, the current flows sequentially through the first end of the charge pump chip, the first transistor module Q1, the first capacitor C1, the seventh transistor module Q7, the fifth transistor module Q5, the fifth capacitor C5, and the ground.

[0149] It should be noted that, since the ratio between the input voltage corresponding to the first end of the charge pump chip and the output voltage corresponding to the second end and the output voltage corresponding to the third end of the charge pump chip is 4:2:1, that is, the first voltage is twice the second voltage and four times the third voltage. Therefore, the capacitance values ​​of the first capacitor C1, the second capacitor C2, and the fifth capacitor C5 are all the same, and are all twice the capacitance values ​​of the third capacitor C3, the fourth capacitor C4, and the sixth capacitor C6, so that the fifth capacitor C5 can be charged to the second voltage.

[0150] For example, when the first voltage is 20V and the capacitor voltage of the second capacitor C2 is 10V, the fifth capacitor C5 can be charged to 20V-10V=10V.

[0151] Next, the charge pump chip is converted from the first conduction state to the second conduction state. At this time, the first transistor module Q1 is in the off state, the second transistor module Q2 is in the on state, the third transistor module Q3 is in the off state, the fourth transistor module Q4 is in the on state, the fifth transistor module Q5 is in the off state, the sixth transistor module Q6 is in the on state, the seventh transistor module Q7 is in the off state, the eighth transistor module Q8 is in the on state, the ninth transistor module Q9 is in the off state, the tenth transistor module Q10 is in the on state, the eleventh transistor module Q11 is in the off state, the twelfth transistor module Q12 is in the on state, the thirteenth transistor module Q13 is in the off state, the fourteenth transistor module Q14 is in the on state, the fifteenth transistor module Q15 is in the off state, the sixteenth transistor module Q16 is in the on state, the seventeenth transistor module Q17 is in the off state, and the eighteenth transistor module Q18 is in the on state.

[0152] In this case, there will be the following three paths inside the charge pump chip:

[0153] In the first path, the current flows sequentially through the first terminal of the charge pump chip, the second transistor module Q2, the second capacitor C2, the eighteenth transistor module Q18, the fourth capacitor C4, the fourteenth transistor module Q14, the third terminal of the charge pump chip, and the ground.

[0154] In the second path, the current flows sequentially through the first end of the charge pump chip, the second transistor module Q2, the second capacitor C2, the eighteenth transistor module Q18, the fourth capacitor C4, the sixteenth transistor module Q16, the sixth capacitor C6, and the ground.

[0155] In the third path, the current flows sequentially through the first end of the charge pump chip, the second transistor module Q2, the second capacitor C2, the eighteenth transistor module Q18, the sixth transistor module Q6, the fifth capacitor C5, and the ground.

[0156] At this time, since the fifth capacitor C5 has been charged to the second voltage, the above three paths can all remain in the on state. Then, the charge pump chip switches alternately between the first on state and the second on state, and the fifth capacitor C5 can maintain a constant voltage output of the second voltage, for example, a constant voltage output of 10V.

[0157] Taking a scenario as an example, when the first module to be powered is Smart PA, the third end of the charging module can directly output a 10V supply voltage to the power amplifier power input pin VBST of the Smart PA chip, thereby eliminating the need to use a boost circuit for power supply, avoiding losses and heat generation in the boost circuit, and improving power supply efficiency.

[0158] Alternatively, when the first module to be powered is a liquid crystal display (LCD) screen, since the LCD screen mainly relies on the backlight layer, which is composed of a large number of light emitting diodes (LEDs), the voltage required by the LCD screen under the backlight condition is relatively large. If the LCD screen requires a power supply voltage of 20V, then by comparison, boosting from 10V to 20V is more efficient and has lower loss than boosting from the system voltage to 20V.

[0159] According to some embodiments, Figure 5 As shown, the transistor modules in the charge pump chip, namely the first transistor module Q1 to the eighteenth transistor module Q18, can each include an NMOS and a body diode; wherein,

[0160] The connection point between the drain of the NMOS and the cathode of the body diode is the drain of the transistor module, the connection point between the source of the NMOS and the anode of the body diode is the source of the transistor module, and the gate of the NMOS is the gate of the transistor module.

[0161] It should be noted that Figure 5 Only the circuit between the first end, the second end and the third end of the charge pump chip is shown, and the circuit corresponding to the OVPGATE end and the WPCGATE end of the charge pump chip is not limited. The OVPGATE end and the WPCGATE end can output high-level or low-level driving signals.

[0162] In summary, in the electronic device provided by the embodiment of the present disclosure, when the interface module is connected to the external power supply and the first switch module is in the on state, the power module can stop supplying power to the first module to be powered, and the current input by the external power supply can sequentially pass through the interface module, the charging module, and the first switch module to supply power to the first module to be powered. Therefore, it is not necessary to supply power to the module to be powered through the power module, which can improve the power supply efficiency, reduce the heating degree of the electronic device, thereby improving the convenience of using the electronic device and improving the user experience.

[0163] According to an embodiment of the present disclosure, the present disclosure also provides a power supply method.

[0164] like Figure 6 As shown, Figure 6 A schematic flow chart of a power supply method provided in an embodiment of the present disclosure, wherein the power supply method is applied to any electronic device shown in the above embodiments.

[0165] Specifically, the power supply method includes:

[0166] S101, when the interface module is connected to the external power supply, control the first switch module to be in the on state, control the power supply module to stop supplying power to the first module to be powered, so as to control the current input by the external power supply to pass through the interface module, the charging module, and the first switch module in sequence to supply power to the first module to be powered.

[0167] Optionally, the power supply method further includes:

[0168] When the interface module is connected to the external power supply, the current input by the external power supply is controlled to pass through the interface module and the charging module in sequence to charge the power supply module.

[0169] Optionally, the power supply method further includes:

[0170] When the interface module is connected to the external power supply, the third switch module is controlled to be in the on state, and the power supply module is controlled to stop supplying power to the second module to be powered, so as to control the current input by the external power supply to pass through the interface module, the charging module, and the third switch module in sequence to supply power to the second module to be powered.

[0171] Optionally, the power supply method further includes:

[0172] When the interface terminal is connected to the external power supply, the second switch module is controlled to be in an on state, and the charge pump chip is controlled to be in a pre-charging state, so as to control the charge pump chip to charge the first capacitor, the second capacitor, the third capacitor and the fourth capacitor according to the first voltage input from the interface terminal, until the capacitor voltage corresponding to the first capacitor and the capacitor voltage corresponding to the second capacitor are both the second voltage, and the capacitor voltage corresponding to the third capacitor and the capacitor voltage corresponding to the fourth capacitor are both the third voltage, wherein the second voltage is the power supply voltage when the charging module supplies power to the module to be powered, and the third voltage is the charging voltage when the charging module charges the power supply module;

[0173] The charge pump chip is controlled to switch alternately between the first conduction state and the second conduction state, so as to control the second end of the charge pump chip to output the second voltage and the third end of the charge pump chip to output the third voltage.

[0174] Optionally, the power supply method further includes:

[0175] Controlling the first transistor module to be in an on state, the second transistor module to be in an off state, the third transistor module to be in an on state, the fourth transistor module to be in an off state, the fifth transistor module to be in an on state, the sixth transistor module to be in an off state, the seventh transistor module to be in an on state, the eighth transistor module to be in an off state, the ninth transistor module to be in an on state, the tenth transistor module to be in an off state, the eleventh transistor module to be in an on state, the twelfth transistor module to be in an off state, the thirteenth transistor module to be in an on state, the fourteenth transistor module to be in an off state, the fifteenth transistor module to be in an on state, the sixteenth transistor module to be in an off state, the seventeenth transistor module to be in an on state, and the eighteenth transistor module to be in an off state, so that the charge pump chip is in a first on state;

[0176] Control the first transistor module to be in the off state, the second transistor module to be in the on state, the third transistor module to be in the off state, the fourth transistor module to be in the on state, the fifth transistor module to be in the off state, the sixth transistor module to be in the on state, the seventh transistor module to be in the off state, the eighth transistor module to be in the on state, the ninth transistor module to be in the off state, the tenth transistor module to be in the on state, the eleventh transistor module to be in the off state, the twelfth transistor module to be in the on state, the thirteenth transistor module to be in the off state, the fourteenth transistor module to be in the on state, the fifteenth transistor module to be in the off state, the sixteenth transistor module to be in the on state, the seventeenth transistor module to be in the off state, and the eighteenth transistor module to be in the on state, so that the charge pump chip is in the second on state.

[0177] It should be noted that the power supply method provided in the above embodiment belongs to the same concept as the electronic device embodiment, and its implementation process is detailed in the electronic device embodiment, which will not be repeated here.

[0178] In summary, the power supply method proposed in the embodiment of the present disclosure controls the first switch module to be in the on state when the interface module is connected to the external power supply, controls the power supply module to stop supplying power to the first module to be powered, and controls the current input by the external power supply to sequentially pass through the interface module, the charging module, and the first switch module to supply power to the first module to be powered. Therefore, it is not necessary to supply power to the module to be powered through the power supply module, which can improve the power supply efficiency, reduce the heat generation of the electronic device, thereby improving the convenience of using the electronic device and improving the user experience.

[0179] According to an embodiment of the present disclosure, the present disclosure also provides an electronic device, a readable storage medium and a computer program product.

[0180] Figure 7 A schematic block diagram of an example electronic device 700 that can be used to implement embodiments of the present disclosure is shown. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit implementations of the present disclosure described and / or claimed herein.

[0181] like Figure 7As shown, the electronic device 700 includes a computing unit 701, which can perform various appropriate actions and processes according to a computer program stored in a read-only memory (ROM) 702 or a computer program loaded from a storage unit 708 into a random access memory (RAM) 703. In the RAM 703, various programs and data required for the operation of the electronic device 700 can also be stored. The computing unit 701, the ROM 702, and the RAM 703 are connected to each other via a bus 704. An input / output (I / O) interface 705 is also connected to the bus 704.

[0182] Multiple components in the electronic device 700 are connected to the I / O interface 705, including: an input unit 706, such as a keyboard, a mouse, etc.; an output unit 707, such as various types of displays, speakers, etc.; a storage unit 708, such as a disk, an optical disk, etc.; and a communication unit 709, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 709 allows the electronic device 700 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.

[0183] The computing unit 701 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the computing unit 701 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, digital signal processors (DSPs), and any appropriate processors, controllers, microcontrollers, etc. The computing unit 701 performs the various methods and processes described above, such as the power supply method. For example, in some embodiments, the power supply method may be implemented as a computer software program, which is tangibly contained in a machine-readable medium, such as a storage unit 708. In some embodiments, part or all of the computer program may be loaded and / or installed on the electronic device 700 via the ROM 702 and / or the communication unit 709. When the computer program is loaded into the RAM 703 and executed by the computing unit 701, one or more steps of the power supply method described above may be performed. Alternatively, in other embodiments, the computing unit 701 may be configured to perform the power supply method in any other appropriate manner (e.g., by means of firmware).

[0184] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0185] The program code for implementing the method of the present disclosure may be written in any combination of one or more programming languages. These program codes may be provided to a processor or controller of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that the program code, when executed by the processor or controller, enables the functions / operations specified in the flow chart and / or block diagram to be implemented. The program code may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.

[0186] In the context of the present disclosure, a machine-readable medium may be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, device, or equipment. A machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or equipment, or any suitable combination of the foregoing. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0187] To provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user can provide input to the computer. Other types of devices can also be used to provide interaction with the user; for example, the feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, voice input, or tactile input).

[0188] The systems and techniques described herein can be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), the Internet, and a blockchain network.

Claims

1. An electronic device, characterized in that: include: A power module, an interface module, a charging module, a first switch module and a first power supply module; wherein, The interface module is connected to a first end of the charging module, a second end of the charging module is connected to a first end of the first switch module, a second end of the first switch module is connected to a first end of the first module to be powered, a third end of the charging module is connected to the power module, and the power module is also connected to a second end of the first module to be powered; When the interface module is connected to the external power supply and the first switch module is in the on state, the power module stops supplying power to the first module to be powered, and the current input by the external power supply sequentially passes through the interface module, the charging module, and the first switch module to supply power to the first module to be powered.

2. The electronic device according to claim 1, characterized in that: The interface module includes an interface terminal and a second switch module; wherein, The interface terminal is connected to a first end of the second switch module, and a second end of the second switch module is connected to a first end of the charging module.

3. The electronic device according to claim 2, characterized in that: The driving end of the charging module is connected to the control end of the first switch module and / or the control end of the second switch module.

4. The electronic device according to claim 1, characterized in that: The charging module includes at least one charge pump circuit; wherein, A first end of each of the charge pump circuits is connected to the interface module, and a third end of each of the charge pump circuits is connected to a first end of the power module; A second end of at least one of the charge pump circuits is connected to a first end of the first switch module.

5. The electronic device according to claim 4, characterized in that: A driving end of the first charge pump circuit is connected to a control end of the first switch module, wherein the first charge pump circuit is a charge pump circuit in the charging module connected to the first switch module.

6. The electronic device according to claim 4, characterized in that: In the case where the number of the charge pump circuits is not less than 2, the electronic device further comprises: a third switch module and a second power supply module; wherein, The second end of the second charge pump circuit is connected to the first end of the third switch module, the second end of the third switch module is connected to the first end of the second module to be powered, the second end of the second module to be powered is connected to the power module, and the second charge pump circuit is a charge pump circuit in the charging module except the first charge pump circuit; When the interface module is connected to the external power supply and the third switch module is in the on state, the power supply module stops supplying power to the second module to be powered, so as to control the current input by the external power supply to pass through the interface module, the charging module and the third switch module in sequence to supply power to the second module to be powered.

7. The electronic device according to claim 1, characterized in that: The first module to be powered includes a boost circuit and a component to be powered; wherein, The first end of the boost circuit is connected to the power module, and the second end of the boost circuit is connected to the power supply component and the second end of the first switch module respectively; When the interface module is connected to the external power supply and the first switch module is in a conducting state, the boost circuit is in a non-operating state, so that the power module stops supplying power to the component to be powered.

8. The electronic device according to any one of claims 2 or 6, characterized in that: The switch module includes at least one of the following switch circuits: Back-to-back transistor switch circuit; Single transistor switching circuit.

9. The electronic device according to claim 8, characterized in that: The switch module includes the back-to-back transistor switch circuit and the single transistor switch circuit, and the back-to-back transistor switch circuit and the single transistor switch circuit are connected in series.

10. The electronic device according to claim 8, characterized in that: The back-to-back transistor switch circuit comprises a first transistor, a second transistor, a first diode and a second diode; wherein, The connection point between the source of the first transistor and the anode of the first diode is the first end of the back-to-back transistor switch circuit, the drain of the first transistor is respectively connected to the drain of the second transistor, the cathode of the first diode and the cathode of the second diode, the connection point between the source of the second transistor and the anode of the second diode is the second end of the back-to-back transistor switch circuit, and the connection point between the gate of the first transistor and the gate of the second transistor is the control end of the back-to-back transistor switch circuit.

11. The electronic device according to claim 8, characterized in that: The single transistor switch circuit comprises a third transistor and a third diode; wherein, The connection point between the drain of the third transistor and the cathode of the third diode is the first end of the single-transistor switch circuit, the connection point between the source of the third transistor and the anode of the third diode is the second end of the single-transistor switch circuit, and the gate of the third transistor is the control end of the single-transistor switch circuit.

12. The electronic device according to claim 4, characterized in that: The charge pump circuit includes a charge pump chip; wherein, The ratio of the port voltage corresponding to the first end of the charge pump chip to the port voltage corresponding to the second end of the charge pump chip and the port voltage corresponding to the third end of the charge pump chip is 4:2:

1.

13. The electronic device according to claim 12, characterized in that: The charge pump chip is integrated with a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a first transistor module, a second transistor module, a third transistor module, a fourth transistor module, a fifth transistor module, a sixth transistor module, a seventh transistor module, an eighth transistor module, a ninth transistor module, a tenth transistor module, an eleventh transistor module, a twelfth transistor module, a thirteenth transistor module, a fourteenth transistor module, a fifteenth transistor module, a sixteenth transistor module, a seventeenth transistor module, and an eighteenth transistor module; wherein, The connection point between the drain of the first transistor module and the drain of the second transistor module is the first end of the charge pump chip, the source of the first transistor module is respectively connected to the drain of the fourth transistor module and the first end of the first capacitor, the source of the second transistor module is respectively connected to the drain of the third transistor module and the first end of the second capacitor, and the connection point between the source of the third transistor module, the source of the fourth transistor module, the drain of the fifth transistor module, the drain of the sixth transistor module and the first end of the fifth capacitor is the second end of the charge pump chip; The source of the fifth transistor module is respectively connected to the drain of the seventh transistor module, the drain of the tenth transistor module and the first end of the third capacitor, the source of the seventh transistor module is respectively connected to the drain of the eighth transistor module and the second end of the first capacitor, the second end of the third capacitor is respectively connected to the source of the ninth transistor module, the source of the eleventh transistor module and the drain of the twelfth transistor module, and the drain of the eleventh transistor module is respectively connected to the drain of the sixteenth transistor module and the first end of the sixth capacitor; The source of the sixth transistor module is respectively connected to the drain of the thirteenth transistor module, the drain of the eighteenth transistor module and the first end of the fourth capacitor, the source of the eighteenth transistor module is respectively connected to the drain of the seventeenth transistor module and the second end of the second capacitor, the second end of the fourth capacitor is respectively connected to the source of the fourteenth transistor module, the source of the sixteenth transistor module and the drain of the fifteenth transistor module, and the connection point between the source of the tenth transistor module, the drain of the ninth transistor module, the source of the thirteenth transistor module and the drain of the fourteenth transistor module is the third end of the charge pump chip; A source of the eighth transistor module, a source of the twelfth transistor module, a source of the fifteenth transistor module, a source of the seventeenth transistor module, a second end of the fifth capacitor, and a second end of the sixth capacitor are grounded.

14. A power supply method, characterized in that: Applied to the electronic device according to any one of claims 1 to 13, the method comprises: When the interface module is connected to an external power supply, the first switch module is controlled to be in an on state, and the power supply module is controlled to stop supplying power to the first module to be powered, so as to control the current input by the external power supply to pass through the interface module, the charging module, and the first switch module in sequence to supply power to the first module to be powered.

15. The power supply method according to claim 14, characterized in that: The method further comprises: When the interface module is connected to the external power supply, the current input by the external power supply is controlled to pass through the interface module and the charging module in sequence to charge the power supply module.

16. The power supply method according to claim 14, characterized in that: The method further comprises: When the interface module is connected to an external power supply, the third switch module is controlled to be in an on state, and the power supply module is controlled to stop supplying power to the second module to be powered, so as to control the current input by the external power supply to pass through the interface module, the charging module, and the third switch module in sequence to supply power to the second module to be powered.

17. The power supply method according to claim 14, characterized in that: The method further comprises: When the interface terminal is connected to the external power supply, the second switch module is controlled to be in an on state, and the charge pump chip is controlled to be in a pre-charging state, so as to control the charge pump chip to charge the first capacitor, the second capacitor, the third capacitor and the fourth capacitor according to the first voltage input from the interface terminal, until the capacitor voltage corresponding to the first capacitor and the capacitor voltage corresponding to the second capacitor are both the second voltage, and the capacitor voltage corresponding to the third capacitor and the capacitor voltage corresponding to the fourth capacitor are both the third voltage, wherein the second voltage is the power supply voltage when the charging module supplies power to the module to be powered, and the third voltage is the charging voltage when the charging module charges the power supply module; The charge pump chip is controlled to switch alternately between a first conduction state and a second conduction state, so as to control the second end of the charge pump chip to output the second voltage and the third end of the charge pump chip to output the third voltage.

18. The power supply method according to claim 17, characterized in that: The method further comprises: Controlling the first transistor module to be in an on state, the second transistor module to be in an off state, the third transistor module to be in an on state, the fourth transistor module to be in an off state, the fifth transistor module to be in an on state, the sixth transistor module to be in an off state, the seventh transistor module to be in an on state, the eighth transistor module to be in an off state, the ninth transistor module to be in an on state, the tenth transistor module to be in an off state, the eleventh transistor module to be in an on state, the twelfth transistor module to be in an off state, the thirteenth transistor module to be in an on state, the fourteenth transistor module to be in an off state, the fifteenth transistor module to be in an on state, the sixteenth transistor module to be in an off state, the seventeenth transistor module to be in an on state, and the eighteenth transistor module to be in an off state, so that the charge pump chip is in the first on state; Control the first transistor module to be in the off state, the second transistor module to be in the on state, the third transistor module to be in the off state, the fourth transistor module to be in the on state, the fifth transistor module to be in the off state, the sixth transistor module to be in the on state, the seventh transistor module to be in the off state, the eighth transistor module to be in the on state, the ninth transistor module to be in the off state, the tenth transistor module to be in the on state, the eleventh transistor module to be in the off state, the twelfth transistor module to be in the on state, the thirteenth transistor module to be in the off state, the fourteenth transistor module to be in the on state, the fifteenth transistor module to be in the off state, the sixteenth transistor module to be in the on state, the seventeenth transistor module to be in the off state, and the eighteenth transistor module to be in the on state, so that the charge pump chip is in the second on state.

19. An electronic device, characterized in that: include: at least one processor; as well as a memory communicatively connected to the at least one processor; wherein, The memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the method of any one of claims 14 to 18.

20. A non-transitory computer-readable storage medium storing computer instructions, wherein: The computer instructions are used to cause the computer to execute the method according to any one of claims 14 to 18.

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