An oscillation circuit for a MEMS resonator

Abstract

This invention provides an oscillation circuit for a MEMS resonator, wherein: a bias circuit provides the DC bias voltage and tail current source bias voltage of the PMOS cross-coupled transistors to the core circuit of the main oscillator; therefore, each branch in the core circuit of the main oscillator can have only three transistors connected in series, and the three transistors are sufficient to realize the function of generating an oscillating sine wave signal, without the need to stack a large number of transistors; with fewer series transistors, the operating voltage of the core circuit of the main oscillator is correspondingly reduced, and the core circuit of the main oscillator can operate in a low power supply voltage environment, reducing the power consumption of the core circuit of the main oscillator. In other words, the oscillation circuit of the MEMS resonator provided in this application can reduce transistor stacking and lower power supply voltage while ensuring low phase noise and providing the same negative resistance, thereby reducing the power consumption of the oscillator and improving the quality factor of the oscillator.

Description

Technical Field

[0001] This invention belongs to the field of power electronics technology, and more specifically, relates to an oscillation circuit for a MEMS resonator. Background Technology

[0002] With the rapid development of portable devices, the Internet of Things (IoT), and wearable technologies, battery life and energy efficiency have become key indicators for measuring the performance of electronic devices. In these devices, the oscillator, as a crucial component of integrated circuits, directly impacts the stability and energy efficiency of the entire system. Therefore, reducing oscillator power consumption while maintaining low phase noise and stable frequency has become a current research hotspot.

[0003] Traditionally, LC oscillators have been widely used in various electronic devices. However, with technological advancements and changing application requirements, MEMS oscillators are gradually emerging. MEMS oscillators utilize micromechanical resonators as frequency-determining elements, offering significant advantages over LC oscillators in providing lower phase noise and more stable frequencies at the same power consumption. These characteristics make MEMS oscillators promising for applications in wireless communication, sensor networks, and consumer electronics.

[0004] To reduce power consumption, MEMS resonator-based oscillators typically employ a complementary cross-coupling structure. This structure introduces positive feedback through cross-coupling, thereby increasing the overall small-signal gain and reducing start-up power consumption without increasing current. However, this structure is limited by transistor stacking effects, resulting in a reduced output swing, and the operating voltage is typically above 1V. This restricts the application of the oscillator in low-supply-voltage environments and further reductions in power consumption. Summary of the Invention

[0005] In view of this, the purpose of the present invention is to provide an oscillation circuit for a MEMS resonator, which reduces transistor stacking and power supply voltage while ensuring low phase noise and providing the same negative resistance, thereby reducing the power consumption of the oscillator and improving the quality factor of the oscillator.

[0006] This application discloses an oscillation circuit for a MEMS resonator, including: a main oscillator core circuit and a bias circuit;

[0007] The first output terminal of the bias circuit is connected to the first input terminal of the core circuit of the main oscillator.

[0008] The second output terminal of the bias circuit is connected to the second input terminal of the core circuit of the main oscillator.

[0009] The bias circuit is used to provide a tail current source bias voltage to the core circuit of the main oscillator through its second output terminal, and to provide a DC bias voltage for the PMOS cross-coupled transistors to the core circuit of the main oscillator through its first output terminal.

[0010] The core circuit of the main oscillator is used to generate an oscillating sine wave signal; the core circuit of the main oscillator includes two branches, both located between the power supply and ground; three transistors are connected in series in the branches.

[0011] Optionally, the switches on the two branches of the core circuit of the main oscillator constitute three sets of switch groups;

[0012] The two switch groups are connected by a cross-coupling structure; the first switch group only forms a cross-coupling structure under AC conditions.

[0013] In the first switching group, the source of each transistor is directly connected to the power supply.

[0014] Optionally, the first switch group includes: a first PMOS transistor and a second PMOS transistor;

[0015] The source of both the first PMOS transistor and the source of the second PMOS transistor are connected to the power supply.

[0016] A first resistor and a second resistor are connected in series between the gate of the first PMOS transistor and the gate of the second PMOS transistor.

[0017] The connection point between the first resistor and the second resistor serves as the first input terminal of the core circuit of the main oscillator.

[0018] The drain of the first PMOS transistor is connected to the gate of the second PMOS transistor through a second capacitor;

[0019] The drain of the second PMOS transistor is connected to the gate of the first PMOS transistor through the first capacitor;

[0020] The drain of the first PMOS transistor is also connected to the first output terminal of the core circuit of the main oscillator.

[0021] The drain of the second PMOS transistor is also connected to the second output terminal of the core circuit of the main oscillator.

[0022] Optionally, the second switch group includes: a first NMOS transistor and a second NMOS transistor;

[0023] The drain of the first NMOS transistor is connected to the gate of the second NMOS transistor, and the connection point is connected to the first output terminal of the core circuit of the main oscillator.

[0024] The drain of the second NMOS transistor is connected to the gate of the first NMOS transistor, and the connection point is connected to the second output terminal of the core circuit of the main oscillator.

[0025] Optionally, the third switch group includes: a third NMOS transistor and a fourth NMOS transistor;

[0026] The drain of the third NMOS transistor is connected to one end of the fourth capacitor and the source of the first NMOS transistor, respectively.

[0027] The drain of the fourth NMOS transistor is connected to the other end of the fourth capacitor and the source of the second NMOS transistor.

[0028] The gate of the third NMOS transistor is connected to the gate of the fourth NMOS transistor, and the connection point serves as the second input terminal of the core circuit of the main oscillator.

[0029] The source of both the third NMOS transistor and the source of the fourth NMOS transistor are grounded.

[0030] Optionally, the core circuit of the main oscillator further includes: a MEMS resonator and a third capacitor;

[0031] The MEMS resonator and the third capacitor are connected in parallel and are positioned between the first output terminal and the second output terminal of the core circuit of the main oscillator.

[0032] Optionally, the bias circuit includes a current branch and a voltage branch;

[0033] Both the current branch and the voltage branch are located between the power supply and ground;

[0034] The output terminal of the current branch is connected to the control terminal of the voltage branch, and the connection point serves as the second output terminal of the bias circuit.

[0035] The output terminal of the voltage branch serves as the first output terminal of the bias circuit.

[0036] Optionally, the current branch includes: a fifth NMOS transistor and a current source;

[0037] The input terminal of the current source is connected to the power supply;

[0038] The output terminal of the current source is connected to the gate and drain of the fifth NMOS transistor, respectively, and the connection point serves as the output terminal of the current branch.

[0039] The source of the fifth NMOS transistor is grounded.

[0040] Optionally, the voltage branch includes: a sixth NMOS transistor and a third PMOS transistor;

[0041] The source of the third PMOS transistor is connected to the power supply;

[0042] The drain of the third PMOS transistor is connected to the gate of the third PMOS transistor and the drain of the sixth NMOS transistor, respectively, and the connection point serves as the output terminal of the voltage branch.

[0043] The gate of the sixth NMOS transistor serves as the control terminal of the voltage branch.

[0044] The source of the sixth NMOS transistor is grounded.

[0045] Optionally, the two transistors in the same switching group can be the same size.

[0046] As can be seen from the above technical solution, the oscillation circuit of the MEMS resonator provided by the present invention includes: a bias circuit that provides the DC bias voltage and tail current source bias voltage of the PMOS cross-coupled transistors to the core circuit of the main oscillator; therefore, each branch in the core circuit of the main oscillator can have only three transistors connected in series, and the three transistors are sufficient to realize the function of generating an oscillating sine wave signal in the core circuit of the main oscillator, without the need to stack a large number of transistors; with fewer transistors connected in series, the operating voltage of the core circuit of the main oscillator is correspondingly reduced, and the core circuit of the main oscillator can operate in a low power supply voltage environment, reducing the power consumption of the core circuit of the main oscillator. That is, the oscillation circuit of the MEMS resonator provided by this application can reduce transistor stacking and lower power supply voltage while ensuring low phase noise and providing the same negative resistance, thereby reducing the power consumption of the oscillator and improving the quality factor of the oscillator. Attached Figure Description

[0047] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0048] Figure 1 This is a schematic diagram of an oscillation circuit for a MEMS resonator provided in an embodiment of the present invention;

[0049] Figure 2 This is a schematic diagram of an oscillation circuit for another MEMS resonator provided in an embodiment of the present invention;

[0050] Figure 3This is a schematic diagram of an oscillation circuit for another MEMS resonator provided in an embodiment of the present invention.

[0051] Figure label:

[0052] 101 - Core circuit of main oscillator; 102 - Bias circuit; 103 - Current branch; 104 - Voltage branch; I1 - Current source; MP1 - First PMOS transistor; MP2 - Second PMOS transistor; MP3 - Third PMOS transistor; MN1 - First NMOS transistor; MN2 - Second NMOS transistor; MN3 - Third NMOS transistor; MN4 - Fourth NMOS transistor; MN5 - Fifth NMOS transistor; MN6 - Sixth NMOS transistor; C1 - First capacitor; C2 - Second capacitor; C3 - Third capacitor; C4 - Fourth capacitor; R1 - First resistor; R2 - Second resistor; M1 - MEMS resonator; N1 - First input terminal of core circuit 101 of main oscillator; N2 - Second input terminal of core circuit 101 of main oscillator; VDD - Power supply; GND - Ground; Vout1 - First output terminal of core circuit 101 of main oscillator; Vout2 - Second output terminal of core circuit 101 of main oscillator. Detailed Implementation

[0053] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0054] In this application, the terms "comprising," "including," or any other variations thereof are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element. Furthermore, the terms "first," "second," "third," "fourth," etc. (if present) in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a particular order or sequence. It should be understood that such data used can be interchanged where appropriate so that embodiments of this application described herein can be implemented, for example, in orders other than those illustrated or described herein.

[0055] This application provides an oscillation circuit for a MEMS resonator to address the problem that existing structures are limited by transistor stacking effects, resulting in reduced output swing, and the operating voltage is typically above 1V, which restricts the application of oscillators in low power supply voltage environments and further reductions in power consumption.

[0056] See Figure 1 It includes: the main oscillator core circuit 101 and the bias circuit 102.

[0057] The first output terminal of the bias circuit 102 is connected to the first input terminal of the core circuit 101 of the main oscillator.

[0058] The second output terminal of the bias circuit 102 is connected to the second input terminal of the core circuit 101 of the main oscillator.

[0059] The bias circuit 102 is used to provide the tail current source bias voltage to the main oscillator core circuit 101 through its second output terminal, and to provide the DC bias voltage of the PMOS cross-coupled transistors to the main oscillator core circuit 101 through its first output terminal.

[0060] In other words, the design of the bias circuit 102 enables connection and functional coordination with the core circuit 101 of the main oscillator. Specifically, the first output terminal of the bias circuit 102 is connected to the first input terminal of the core circuit 101 of the main oscillator. This connection is used to provide the necessary DC bias voltage for the PMOS cross-coupled pair in the core circuit 101 of the main oscillator, ensuring that the circuit can operate stably and efficiently.

[0061] Meanwhile, the second output terminal of the bias circuit 102 is connected to the second input terminal of the master oscillator core circuit 101. This connection is particularly crucial because it is responsible for providing the tail current source bias voltage to the master oscillator core circuit 101. The tail current source bias voltage plays a vital role in regulating the oscillation frequency, stability, and overall performance of the circuit.

[0062] In summary, the bias circuit 102, through its carefully designed two output terminals, not only provides the necessary DC bias voltage to the main oscillator core circuit 101, but also ensures the accurate supply of the tail current source bias voltage, thereby jointly ensuring that the main oscillator core circuit 101 can perform its oscillation function normally and efficiently.

[0063] The core circuit 101 of the main oscillator is used to generate an oscillating sine wave signal. The core circuit 101 of the main oscillator includes two branches, both of which are located between the power supply and ground. Three transistors are connected in series in the branches.

[0064] The master oscillator core circuit 101 is the core component of the oscillation system, and its main function is to generate a stable oscillating sine wave signal. To achieve this goal, the circuit is cleverly designed to include two parallel branches, both of which span between the power supply and ground.

[0065] In each branch, three transistors are connected in series. The arrangement and connection of these transistors in the circuit are crucial; they work together to achieve precise control of the circuit current through periodic switching on and off. This control mechanism is key to generating a stable sinusoidal signal.

[0066] Specifically, when a transistor in a branch switches according to a specific timing sequence, it guides current to flow between the transistor and the input, creating voltage fluctuations across the branch. These voltage fluctuations, combined by the actions of multiple branches, eventually superimpose and transform into a stable sinusoidal signal.

[0067] Therefore, the core circuit 101 of the main oscillator, through its dual-branch design and precise control of the transistor, successfully achieves the stable generation of oscillating sinusoidal signals.

[0068] In this embodiment, the bias circuit 102 provides the DC bias voltage and tail current source bias voltage of the PMOS cross-coupled pair transistors to the main oscillator core circuit 101. Therefore, each branch in the main oscillator core circuit 101 can have only three transistors connected in series. These three transistors are sufficient to generate the oscillating sine wave signal, eliminating the need for stacking a large number of transistors. With fewer transistors connected in series, the operating voltage of the main oscillator core circuit 101 is correspondingly reduced, enabling it to operate in a low power supply voltage environment and reducing its power consumption. In other words, the oscillation circuit of the MEMS resonator provided in this application can reduce transistor stacking and lower the power supply voltage while ensuring low phase noise and providing the same negative resistance, thereby reducing the power consumption of the oscillator and improving its quality factor.

[0069] Optionally, the switches on the two branches of the main oscillator core circuit 101 form three sets of switch groups.

[0070] The two switch groups are connected by a cross-coupling structure; the first switch group only forms a cross-coupling structure under AC conditions.

[0071] In the first switching group, the source of each transistor is directly connected to the power supply VDD.

[0072] Of these three switch groups, two employ a cross-coupling connection method. Cross-coupling is an effective circuit design technique that enhances the small-signal gain of the circuit through current multiplexing without increasing additional current, thereby reducing start-up power consumption. The application of this structure in the core circuit 101 of the main oscillator undoubtedly provides strong support for optimizing its performance.

[0073] In summary, the core circuit 101 of the main oscillator achieves efficient, stable and precise oscillation through its unique three-group switch design, the cross-coupling connection of two of the switch groups, and the direct connection between the transistor in the first switch group and the power supply VDD.

[0074] Optional, such as Figure 2 As shown, the first switch group includes: a first PMOS transistor MP1 and a second PMOS transistor MP2.

[0075] The source of the first PMOS transistor MP1 and the source of the second PMOS transistor MP2 are both connected to the power supply VDD; that is, the source of the first PMOS transistor MP1 and the source of the second PMOS transistor MP2 are connected to the power supply VDD together, ensuring that the two share the same power supply VDD.

[0076] A first resistor R1 and a second resistor R2 are connected in series between the gate of the first PMOS transistor MP1 and the gate of the second PMOS transistor MP2; the connection point between the first resistor R1 and the second resistor R2 serves as the first input terminal N1 of the core circuit 101 of the main oscillator.

[0077] A first resistor R1 and a second resistor R2 are cleverly connected in series between the gate of the first PMOS transistor MP1 and the gate of the second PMOS transistor MP2, forming a voltage divider circuit. The connection point between these two resistors is designed as the first input terminal N1 of the main oscillator core circuit 101, used to receive the DC bias voltage.

[0078] The drain of the first PMOS transistor MP1 is connected to the gate of the second PMOS transistor MP2 through the second capacitor C2; the drain of the second PMOS transistor MP2 is connected to the gate of the first PMOS transistor MP1 through the first capacitor C1.

[0079] To increase the complexity and stability of the circuit, the drain of the first PMOS transistor MP1 is connected to the gate of the second PMOS transistor MP2 through a second capacitor C2, forming a feedback path. Simultaneously, the drain of the second PMOS transistor MP2 is also connected to the gate of the first PMOS transistor MP1 through a first capacitor C1, forming another feedback path. The introduction of these two capacitors helps to adjust the oscillation frequency and stability of the circuit.

[0080] The drain of the first PMOS transistor MP1 is also connected to the first output terminal Vout1 of the main oscillator core circuit 101; the drain of the second PMOS transistor MP2 is also connected to the second output terminal Vout2 of the main oscillator core circuit 101.

[0081] Furthermore, the drain of the first PMOS transistor MP1 is directly connected to the first output terminal Vout1 of the main oscillator core circuit 101, while the drain of the second PMOS transistor MP2 is connected to the second output terminal Vout2 of the main oscillator core circuit 101, providing the circuit with two independent output signals. It should be noted that these two output signals can output sine wave signals separately, or they can together form a sine wave signal. However, in practice, differential output is generally used, meaning that both output terminals together form a sine wave signal.

[0082] Optionally, the second switch group includes: a first NMOS transistor MN1 and a second NMOS transistor MN2.

[0083] The drain of the first NMOS transistor MN1 is connected to the gate of the second NMOS transistor MN2, and the connection point is connected to the first output terminal Vout1 of the main oscillator core circuit 101.

[0084] The drain of the second NMOS transistor MN2 is connected to the gate of the first NMOS transistor MN1, and the connection point is connected to the second output terminal Vout2 of the main oscillator core circuit 101.

[0085] In other words, the first NMOS transistor MN1 and the second NMOS transistor MN2 are connected to the output terminal of the main oscillator core circuit 101 through a cross connection.

[0086] In other words, the first NMOS transistor MN1 and the second NMOS transistor MN2 in the second switch group are connected to the output terminal of the main oscillator core circuit 101 through a cross connection.

[0087] Optionally, the third switch group includes: a third NMOS transistor MN3 and a fourth NMOS transistor MN4.

[0088] The drain of the third NMOS transistor MN3 is connected to one end of the fourth capacitor C4 and the source of the first NMOS transistor MN1, respectively; the drain of the fourth NMOS transistor MN4 is connected to the other end of the fourth capacitor C4 and the source of the second NMOS transistor MN2, respectively; the gate of the third NMOS transistor MN3 is connected to the gate of the fourth NMOS transistor MN4, and the connection point serves as the second input terminal N2 of the main oscillator core circuit 101; the sources of the third NMOS transistor MN3 and the fourth NMOS transistor MN4 are both grounded to GND.

[0089] In other words, the drain of the third NMOS transistor MN3 is not only connected to one end of the fourth capacitor C4, but also to the source of the first NMOS transistor MN1, forming a current path.

[0090] The drain of the fourth NMOS transistor MN4 is connected to the other end of the fourth capacitor C4 and the source of the second NMOS transistor MN2, forming another current path.

[0091] It is worth noting that the gate of the third NMOS transistor MN3 is connected to the gate of the fourth NMOS transistor MN4, and this connection point is designed as the second input terminal N2 of the main oscillator core circuit 101 to receive the tail current bias voltage.

[0092] The sources of both NMOS transistors are grounded to GND, ensuring stable operation of the circuit.

[0093] Optionally, the two transistors in the same switching group can be the same size.

[0094] To ensure circuit consistency and stability, the dimensions of the two transistors in the same switching group are designed to be identical. That is, the first PMOS transistor MP1 and the second PMOS transistor MP2 in the first switching group are exactly the same size; the first NMOS transistor MN1 and the second NMOS transistor MN2 in the second switching group are also exactly the same size; and the third NMOS transistor MN3 and the fourth NMOS transistor MN4 in the third switching group are also identical in size. This design helps reduce mismatches and errors in the circuit, improving the overall circuit performance and stability.

[0095] Additionally, the capacitance values ​​of the first capacitor C1 and the second capacitor C2 can be configured to be equal; and the resistance values ​​of the first resistor R1 and the second resistor R2 can be configured to be equal.

[0096] Optionally, the main oscillator core circuit 101 also includes: a MEMS resonator M1 and a third capacitor C3.

[0097] MEMS resonator M1 and third capacitor C3 are connected in parallel between the first output terminal Vout1 and the second output terminal Vout2 of the main oscillator core circuit 101.

[0098] The MEMS resonator M1 and the third capacitor C3 constitute the resonant cavity of the core circuit 101 of the main oscillator.

[0099] In other words, the first output terminal Vout1 and the second output terminal Vout2 of the core circuit 101 of the main oscillator are respectively located at both ends of the resonant cavity.

[0100] The following example illustrates the specific structure of the core circuit 101 of the main oscillator:

[0101] The core circuit 101 of the main oscillator includes: a first PMOS transistor MP1, a second PMOS transistor MP2, a first NMOS transistor MN1, a second NMOS transistor MN2, a third NMOS transistor MN3, a fourth NMOS transistor MN4, a MEMS resonator M1, a first resistor R1, a second resistor R2, a first capacitor C1, a second capacitor C2, a third capacitor C3, and a fourth capacitor C4.

[0102] The first PMOS transistor MP1, the first NMOS transistor MN1, and the third NMOS transistor MN3 are connected in series to form the first branch. The source of the first PMOS transistor MP1 is connected to the power supply VDD. The drain of the third NMOS transistor MN3 is grounded to GND.

[0103] The second PMOS transistor MP2, the second NMOS transistor MN2, and the fourth NMOS transistor MN4 are connected in series to form the second branch. The source of the second PMOS transistor MP2 is connected to the power supply VDD. The drain of the fourth NMOS transistor MN4 is grounded to GND.

[0104] One end of the first capacitor C1 is connected to one end of the first resistor R1 and the gate of the first PMOS transistor MP1.

[0105] The other end of the first capacitor C1 is connected to the drain of the second PMOS transistor MP2, one end of the MEMS resonator M1, one end of the third capacitor C3, the gate of the first NMOS transistor MN1, and the drain of the second NMOS transistor MN2, respectively. The connection point serves as the second output terminal Vout2 of the core circuit 101 of the main oscillator.

[0106] One end of the second capacitor C2 is connected to one end of the second resistor R12 and the gate of the second PMOS transistor MP2.

[0107] The other end of the second capacitor C2 is connected to the drain of the first PMOS transistor MP1, the other end of the MEMS resonator M1, the other end of the third capacitor C3, the gate of the second NMOS transistor MN2, and the drain of the first NMOS transistor MN1, respectively. The connection point serves as the first output terminal Vout1 of the core circuit 101 of the main oscillator.

[0108] The other end of the first resistor R1 is connected to the other end of the second resistor R12. The connection point serves as the first input terminal N1 of the core circuit 101 of the main oscillator, receiving the DC bias voltage output by the bias circuit 102.

[0109] The source of the first NMOS transistor MN1 is connected to the drain of the third NMOS transistor MN3 and one end of the fourth capacitor C4, respectively.

[0110] The source of the second NMOS transistor MN2 is connected to the drain of the fourth NMOS transistor MN4 and the other end of the fourth capacitor C4, respectively.

[0111] The gate of the third NMOS transistor MN3 is connected to the gate of the fourth NMOS transistor MN4. The connection point serves as the second input terminal N2 of the core circuit 101 of the main oscillator, receiving the micro-current bias voltage output by the bias circuit 102.

[0112] In other words, the MEMS resonator M1 and capacitor C3 form the resonant cavity circuit. The first NMOS transistor MN1, the second NMOS transistor MN2, the third NMOS transistor MN3, the fourth NMOS transistor MN4, the first PMOS transistor MP1, the second PMOS transistor MP2, the first capacitor C1, the second capacitor C2, the fourth capacitor C4, the first resistor R1, and the second resistor R2 form an active network that provides negative resistance to compensate for the resonant cavity losses. The first NMOS transistor MN1 and the second NMOS transistor MN2 introduce positive feedback through cross-coupling, as do the first PMOS transistor MP1 and the second PMOS transistor MP2, increasing the overall small-signal gain, thereby increasing the circuit's negative conductance and reducing power consumption.

[0113] It should be noted that, because a capacitor and a resistor are placed between the gates of the first PMOS transistor PM1 and the second PMOS transistor PM2 in the core circuit 101 of the main oscillator, under DC conditions, the first capacitor C1 and the second capacitor C2 are equivalent to an open circuit. The gates of the first PMOS transistor MP1 and the second PMOS transistor MP2 are connected, but their drains are not connected, thus not forming cross-coupling. The DC bias voltage is provided by the bias circuit 102, preventing DC lock-in. Therefore, the source of the first PMOS transistor PM1 and the source of the second PMOS transistor PM2 can be connected to the power supply VDD, eliminating one layer of transistors, reducing the required power supply voltage, and increasing the voltage margin. Under AC conditions, the first capacitor C1 and the second capacitor C2 are equivalent to a short circuit. The first PMOS transistor PM1 and the second PMOS transistor PM2 introduce positive feedback through cross-coupling, increasing the overall small-signal gain, thereby increasing the negative conductance of the circuit and generating negative resistance, making the oscillator easier to start.

[0114] Some structures require four or more layers of transistors (such as...) Figure 3 As shown in the diagram, the MEMS resonator M1 and the second capacitor C2 constitute the resonant cavity circuit. Active transistors MN1, MN2, MN3, MN4, MP1, MP2, MP3, and MP4 provide negative resistance to offset the losses in the resonant circuit. PMOS transistors MP3 and MP4 introduce positive feedback through cross-coupling, as do NMOS transistors MN1 and MN2. This increases the overall small-signal gain without increasing the current, thereby increasing the circuit's negative conductance and reducing power consumption. However, this circuit structure involves the stacking of four transistor layers, and the operating voltage is typically above 1V, making it difficult to meet the requirements for low power supply voltage operation. That is, Figure 3 The cross-coupling in a MEMS cross-coupled oscillator lacks capacitors and resistors, thus operating under both DC and AC conditions. However, directly connecting the source stage of a MEMS cross-coupled oscillator to GND or VDD will result in DC lockout. Therefore, the cross-coupled transistor cannot be directly connected to GND or VDD and requires an additional transistor layer.

[0115] Since the source-drain voltage VDS of each transistor layer is greater than 0, reducing one transistor layer reduces voltage consumption and lowers the required power supply voltage. Furthermore, because the first PMOS transistor PM1 and the second PMOS transistor PM2 do not cross-couple under DC conditions and are biased by the bias voltage 102, the voltage at the first input terminal N1 of the main oscillator core circuit 101 can be set lower than the gate voltages (i.e., the VOUT point voltage) of MN1 and MN2, which also reduces the required power supply voltage.

[0116] That is, by using a complementary cross-coupled oscillator circuit as the core circuit, a first capacitor C1 is introduced between the gate of the first PMOS transistor MP1 and the drain of the second PMOS transistor MP2, and a second capacitor C2 is introduced between the gate of the second PMOS transistor MP2 and the drain of the first PMOS transistor MP1. The gate of the first PMOS transistor MP1, the first resistor R1, the second resistor R2, and the gate of the second PMOS transistor MP2 are connected in series. A first node N1 is provided at the connection between the first resistor R1 and the second resistor R2. The gate of the sixth NMOS transistor MN6 of the voltage branch 104 is connected to the first node N1 to provide a DC bias voltage, so that the sources of the first PMOS transistor MP1 and the second PMOS transistor MP2 can be directly connected to the power supply VDD to meet the low power supply voltage requirement.

[0117] It should also be noted that Cadence simulations show that, using a MEMS resonator, the phase noise can reach -137.34 dBc / Hz@1 MHz at an output frequency of 2.45 GHz, with a supply voltage of 0.5 V, power consumption of 0.05 mW, and a quality factor of -218 dB. This demonstrates that the example disclosed in this paper can reduce the supply voltage while maintaining low phase noise, thereby reducing the oscillator's power consumption and improving its quality factor, making it suitable for applications requiring low supply voltage and high performance.

[0118] In this embodiment, reducing the stacking of transistors reduces the power supply voltage while ensuring low phase noise and providing the same negative resistance, thereby reducing the power consumption of the oscillator and improving the quality factor of the oscillator; reducing the stacking of transistors also increases the output swing of the oscillator.

[0119] Optional, such as Figure 2 As shown, the bias circuit 102 includes a current branch 103 and a voltage branch 104.

[0120] Both the current branch 103 and the voltage branch 104 are located between the power supply VDD and the ground GND.

[0121] Specifically, the power supply terminal of current branch 103 is connected to power supply VDD, and the ground terminal of current branch 103 is grounded to GND.

[0122] The power supply terminal of voltage branch 104 is connected to power supply VDD, and the ground terminal of voltage branch 104 is grounded to GND.

[0123] The output terminal of the current branch 103 is connected to the control terminal of the voltage branch 104. The connection point serves as the second output terminal of the bias circuit 102, which outputs the tail current bias voltage.

[0124] The output terminal of voltage branch 104 serves as the first output terminal of bias circuit 102, outputting DC bias voltage.

[0125] Optionally, the current branch 103 includes: a fifth NMOS transistor MN5 and a current source I1.

[0126] The input terminal of current source I1 is connected to power supply VDD, which supplies power to it.

[0127] The output terminal of current source I1 is connected to the gate and drain of the fifth NMOS transistor MN5, respectively, and the connection point serves as the output terminal of current branch 103.

[0128] In other words, the output terminal of current source I1, the gate of the fifth NMOS transistor MN5, and the drain of the fifth NMOS transistor MN5 are connected together, and this connection point together constitutes the output terminal of current branch 103.

[0129] The source of the fifth NMOS transistor MN5 is grounded to GND, ensuring the correct operation of the circuit.

[0130] Optionally, voltage branch 104 includes: a sixth NMOS transistor MN6 and a third PMOS transistor MP3.

[0131] The source of the third PMOS transistor MP3 is connected to the power supply VDD.

[0132] The drain of the third PMOS transistor MP3 is connected to the gate of the third PMOS transistor MP3 and the drain of the sixth NMOS transistor MN6, respectively, and the connection point serves as the output terminal of the voltage branch 104.

[0133] The gate of the sixth NMOS transistor MN6 serves as the control terminal of voltage branch 104.

[0134] The source of the sixth NMOS transistor MN6 is grounded to GND.

[0135] In this embodiment, the DC bias voltage of the PMOS transistor is generated by the voltage branch 104, reducing the input of external signals.

[0136] The sixth NMOS transistor MN6 in voltage branch 104 has the same size as the fifth NMOS transistor MN5 in current branch 103.

[0137] The dimensions of the third NMOS transistor MN3 and the fourth NMOS transistor MN4 in the core circuit 101 of the main oscillator are both larger than the fifth NMOS transistor MN5 in the current branch 103, and are integer multiples of the fifth NMOS transistor MN5.

[0138] The features described in the various embodiments of this specification can be substituted for or combined with each other. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, for system or system embodiments, since they are basically similar to method embodiments, the description is relatively simple; relevant parts can be referred to the descriptions in the method embodiments. The systems and system embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without creative effort.

[0139] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0140] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An oscillation circuit for a MEMS resonator, characterized in that, include: The core circuit (101) and bias circuit (102) of the main oscillator; The first output terminal of the bias circuit (102) is connected to the first input terminal of the main oscillator core circuit (101); The second output terminal of the bias circuit (102) is connected to the second input terminal of the main oscillator core circuit (101); The bias circuit (102) is used to provide a tail current source bias voltage to the main oscillator core circuit (101) through its second output terminal, and to provide a DC bias voltage for the PMOS cross-coupled transistors to the main oscillator core circuit (101) through its first output terminal. The core circuit (101) of the main oscillator is used to generate an oscillating sine wave signal; the core circuit (101) of the main oscillator includes two branches, both of which are located between the power supply (VDD) and the ground (GND); three transistors are connected in series in the branches; Among them, the switches on the two branches of the core circuit (101) of the main oscillator constitute three sets of switch groups; The two switch groups are connected by a cross-coupling structure; the first switch group only forms a cross-coupling structure under AC conditions. In the first switching group, the source of each transistor is directly connected to the power supply (VDD); The first switch group includes: a first PMOS transistor (MP1) and a second PMOS transistor (MP2). The source of the first PMOS transistor (MP1) and the source of the second PMOS transistor (MP2) are both connected to the power supply (VDD); A first resistor (R1) and a second resistor (R2) are connected in series between the gate of the first PMOS transistor (MP1) and the gate of the second PMOS transistor (MP2). The connection point between the first resistor (R1) and the second resistor (R2) serves as the first input terminal of the core circuit (101) of the main oscillator; The drain of the first PMOS transistor (MP1) is connected to the gate of the second PMOS transistor (MP2) through the second capacitor (C2); The drain of the second PMOS transistor (MP2) is connected to the gate of the first PMOS transistor (MP1) through the first capacitor (C1); The drain of the first PMOS transistor (MP1) is also connected to the first output terminal of the core circuit (101) of the main oscillator; The drain of the second PMOS transistor (MP2) is also connected to the second output terminal of the core circuit (101) of the main oscillator; The second switch group includes: a first NMOS transistor (MN1) and a second NMOS transistor (MN2); The drain of the first NMOS transistor (MN1) is connected to the gate of the second NMOS transistor (MN2), and the connection point is connected to the first output terminal of the core circuit (101) of the main oscillator. The drain of the second NMOS transistor (MN2) is connected to the gate of the first NMOS transistor (MN1), and the connection point is connected to the second output terminal of the main oscillator core circuit (101). The third switch group includes: a third NMOS transistor (MN3) and a fourth NMOS transistor (MN4); The drain of the third NMOS transistor (MN3) is connected to one end of the fourth capacitor (C4) and the source of the first NMOS transistor (MN1), respectively. The drain of the fourth NMOS transistor (MN4) is connected to the other end of the fourth capacitor (C4) and the source of the second NMOS transistor (MN2); The gate of the third NMOS transistor (MN3) is connected to the gate of the fourth NMOS transistor (MN4), and the connection point serves as the second input terminal of the core circuit (101) of the main oscillator. The source of the third NMOS transistor (MN3) and the source of the fourth NMOS transistor (MN4) are both grounded (GND).

2. The oscillation circuit of the MEMS resonator according to claim 1, characterized in that, The core circuit of the main oscillator (101) also includes: a MEMS resonator (M1) and a third capacitor (C3). The MEMS resonator (M1) and the third capacitor (C3) are connected in parallel and are positioned between the first output terminal and the second output terminal of the main oscillator core circuit (101).

3. The oscillation circuit of the MEMS resonator according to claim 1, characterized in that, The bias circuit (102) includes a current branch (103) and a voltage branch (104). Both the current branch (103) and the voltage branch (104) are located between the power supply (VDD) and the ground (GND); The output terminal of the current branch (103) is connected to the control terminal of the voltage branch (104), and the connection point serves as the second output terminal of the bias circuit (102). The output terminal of the voltage branch (104) serves as the first output terminal of the bias circuit (102).

4. The oscillation circuit of the MEMS resonator according to claim 3, characterized in that, The current branch (103) includes: a fifth NMOS transistor (MN5) and a current source (I1); The input terminal of the current source (I1) is connected to the power supply (VDD); The output terminal of the current source (I1) is connected to the gate and drain of the fifth NMOS transistor (MN5) respectively, and the connection point serves as the output terminal of the current branch (103). The source of the fifth NMOS transistor (MN5) is grounded (GND).

5. The oscillation circuit of the MEMS resonator according to claim 3, characterized in that, The voltage branch (104) includes: a sixth NMOS transistor (MN6) and a third PMOS transistor (MP3); The source of the third PMOS transistor (MP3) is connected to the power supply (VDD); The drain of the third PMOS transistor (MP3) is connected to the gate of the third PMOS transistor (MP3) and the drain of the sixth NMOS transistor (MN6), respectively, and the connection point serves as the output terminal of the voltage branch (104). The gate of the sixth NMOS transistor (MN6) serves as the control terminal of the voltage branch (104); The source of the sixth NMOS transistor (MN6) is grounded (GND).

6. The oscillation circuit of the MEMS resonator according to claim 1, characterized in that, The two transistors in the same switching group are the same size.

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