High-speed single-channel digital isolation chip

Abstract

The invention discloses a high-speed single-channel digital isolation chip, relates to a digital isolator, and aims to provide a high-speed single-channel digital isolation chip with strong anti-electromagnetic interference capability and stable output signal, the high-speed single-channel digital isolation chip comprises a receiving end RX circuit, the receiving end RX circuit comprises an OSC oscillator and at least two capacitors, the OSC oscillator is used for controlling the number of the capacitors mounted in the receiving end RX circuit, and the OSC oscillator is used for controlling the number of the capacitors mounted in the receiving end RX circuit. The invention has the beneficial effects that the OSC oscillator is added in the receiving end RX circuit, an oscillation signal of about 10 MHz can be generated, a 16-bit clock signal is generated through a 16-bit digital switching circuit, and the frequency of the receiving end RX circuit is increased, so that the frequency of the receiving end RX circuit is increased, and the power consumption of the receiving end RX circuit is reduced, so that the power consumption of the receiving end RX circuit is reduced, and the power consumption of the receiving end RX circuit is reduced. Therefore, the number of capacitors mounted between the isolation transformer and the demodulator DEMODE is controlled, a high-frequency signal with small-amplitude fluctuation frequency is generated, and the function is mainly used for reducing electromagnetic interference EMI in a circuit.

Description

Technical Field

[0001] The present invention relates to the technical field of digital isolators, and more particularly to a high-speed single-channel digital isolation chip. Background Art

[0002] Digital isolation chip is an integrated circuit chip used for circuit isolation. Its main function is to achieve electrical isolation between input and output circuits to ensure that there is no direct circuit connection between input and output. At present, digital isolation chips are widely used in the field of new energy vehicles, mainly used to avoid signal interference, reduce electromagnetic interference, and thus ensure stable signal transmission. When the circuit is working, it will emit electromagnetic interference, which seriously affects the stable transmission of the signal. Therefore, a digital isolation chip with strong anti-interference ability and stable signal transmission is needed. Summary of the invention

[0003] In view of the problems existing in the prior art, the present invention provides a high-speed single-channel digital isolation chip to solve the technical problems mentioned in the background technology.

[0004] To achieve the above object, the present invention provides the following technical solution: a high-speed single-channel digital isolation chip, comprising: The transmitting end TX circuit is used to receive the input signal Vin and generate high-frequency oscillation signals TX_indp and TX_indn; An isolation transformer, used for receiving high frequency oscillation signals TX_inp and TX_indn, and generating signals RX_indp and RX_indn; The receiving end RX circuit is used to receive signals RX_indp and RX_indn and output a signal VOUT; The receiving end RX circuit includes an OSC oscillator and at least two capacitors, wherein: The OSC oscillator is used to control the number of capacitors mounted in the RX circuit at the receiving end to generate a high-frequency signal with a small frequency fluctuation, thereby reducing the electromagnetic interference EMI in the circuit.

[0005] The present invention is further configured such that a 16-bit digital switching circuit is provided in the OSC oscillator, and the 16-bit digital switching circuit is used to receive an oscillation signal generated in the OSC oscillator and generate a 16-bit clock signal, thereby controlling the number of capacitors mounted in the receiving end RX circuit.

[0006] The present invention is further configured that the transmitting end TX circuit includes a bandgap reference source BGR, a low dropout linear regulator LDO and an LC oscillator, wherein: The bandgap reference source BGR is used to provide a reference voltage; The low-dropout linear regulator LDO is used to connect to the bandgap reference source BGR and provide a stable operating voltage for the LC oscillator; The LC oscillator is used to provide a high-frequency oscillation carrier, which is modulated by the input signal Vin. When the Vin signal is high, the LC oscillator generates high-frequency oscillation signals TX_indp and TX_indn; when the Vin signal is 0V, the LC oscillator stops oscillating.

[0007] The present invention is further configured such that the receiving end RX circuit includes a demodulator DEMODE, a hysteresis comparator COMP and a BEFFER circuit, the isolation transformer, the demodulator DEMODE, the hysteresis comparator COMP and the BEFFER circuit are electrically connected in sequence, and the output signals RX_indp and RX_indn of the isolation transformer are first demodulated by the demodulator DEMODE and the hysteresis comparator COMP, and then driven by the BUFFER circuit to be output as a VOUT signal.

[0008] The present invention is further configured such that at least two capacitors are mounted between the isolation transformer and the demodulator DEMODE.

[0009] The present invention is further configured such that the LC oscillator includes a startup circuit, a pull-up network MP4 and C2, the startup circuit is used to pull down the high-level Vin signal, and turn on the pull-up network MP4 to inject current into C2, thereby enabling the LC oscillator to generate high-frequency oscillation signals TX_indp and TX_indn when the input signal Vin is high.

[0010] The present invention is further configured such that the LC oscillator further includes a common mode voltage Vcom and a pull-down network MN1. When the input signal Vin is 0, the pull-down network MN1 pulls the common mode voltage Vcom down to the ground voltage, thereby stopping the LC oscillator.

[0011] The present invention is further configured such that a cross-coupling tube is provided in the LC oscillator, the cross-coupling tube adopts a PMOS cross-coupling structure, and the cross-coupling tube is used to compensate for the energy loss of the resonant network in the LC oscillator.

[0012] Compared with the prior art, the present invention provides a high-speed single-channel digital isolation chip, which has the following beneficial effects: 1. In the present invention, an OSC oscillator is added to the receiving end RX circuit, which can generate an oscillation signal of about 10MHz, and a 16-bit clock signal is generated through a 16-bit digital switching circuit, thereby controlling the number of capacitors mounted between the isolation transformer and the demodulator DEMODE, thereby generating a high-frequency signal with a small frequency fluctuation. This function is mainly to reduce the electromagnetic interference EMI in the circuit.

[0013] 2. In the present invention, a cross-coupling transistor is added to the transmitting end TX circuit, and a PMOS cross-coupling structure is adopted, thereby fully offsetting the influence of the resistance in the circuit and maintaining the high-frequency oscillation of the circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 A schematic diagram of a high-speed single-channel digital isolation chip in the present invention; Figure 2 It is a schematic diagram of series-parallel resistors and an equivalent circuit in the present invention. DETAILED DESCRIPTION

[0015] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application may be combined with each other. The present invention will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0016] It should be noted that, unless otherwise specified, all technical and scientific terms used in this application have the same meanings as commonly understood by ordinary technicians in the technical field to which this application belongs.

[0017] In the present invention, unless otherwise specified, the directions used, such as "up" and "down", usually refer to the directions shown in the drawings, or to the vertical, perpendicular or gravity directions; similarly, for ease of understanding and description, "left" and "right" usually refer to the left and right shown in the drawings; "inside" and "outside" refer to the inside and outside relative to the outline of each component itself, but the above-mentioned directions are not used to limit the present invention. Embodiment 1:

[0018] A cross-coupling tube is provided in the LC oscillator. The cross-coupling tube adopts a PMOS cross-coupling structure. When in use, the cross-coupling tube generates a negative resistance to compensate for the energy loss of the resistor in the resonant network. Specifically, The main principle of the oscillator is to use LC resonance. The coil inductance of the transformer is L=2Ld, and the resonant capacitance is C1=C3=C2=C So its resonant angular frequency is (1) The quality factor of the inductor is ,so (2) Due to the existence of Rp, there will be energy loss in the resonant network, so a negative resistor -Rp must be connected in parallel with the positive resistor to compensate for the energy loss of the resistor.

[0019] See also Figure 2 , where (a) is the LC resonant cavity, (b) is the series equivalent model of the actual LC, and (c) is the parallel equivalent model of the actual LC.

[0020] Commonly used negative resistance pairs include PMOS and NMOS negative resistance pairs. In this circuit, we use a PMOS cross-coupled structure to make a negative resistance pair, which has a simple structure and a negative resistance of , in order to maintain oscillation, it must be satisfied (3) Generally, in order to maintain some design redundancy, Rp is made , which helps to fully offset the influence of resistance and maintain the high-frequency oscillation of the circuit. Embodiment 2:

[0021] The OSC oscillator installed in the receiving end RX circuit generates an oscillation signal of about 10MHz when in use. After passing through the 16-bit digital switching circuit, it generates a 16-bit clock signal to control the number of capacitors mounted between the isolation transformer and the demodulator DEMODE. According to formula (1), the angular frequency can be obtained , so that the frequency of the oscillator fluctuates at the center frequency, with an approximate fluctuation range of 40MHz. This is mainly to reduce the electromagnetic interference EMI of the circuit when it works at high frequency. Embodiment 3:

[0022] The digital isolation chip provided by the present invention can achieve data transmission of up to 50Mbps, pulse width distortion PWD is less than 10ns, propagation delays tPHL and tPLH are up to 20ns, isolation voltage is up to 3.75KVrms, and CMTI can be as low as ±125KV / us.

[0023] In all the schemes mentioned above, the connection between two parts can be selected according to actual conditions by welding, bolt and nut matching connection, bolt or screw connection or other well-known connection methods, which will not be described one by one here. In the above, all fixed connections are preferably welded. Although the embodiments of the present invention have been shown and described, it can be understood by ordinary technicians in this field that various changes, modifications, substitutions and variations can be made to these embodiments without departing from the principle and spirit of the present invention. The scope of the present invention is defined by the attached claims and their equivalents.

Claims

1. A high-speed single-channel digital isolation chip, characterized in that: include: The transmitting end TX circuit is used to receive the input signal Vin and generate high-frequency oscillation signals TX_indp and TX_indn; An isolation transformer, used for receiving high frequency oscillation signals TX_inp and TX_indn, and generating signals RX_indp and RX_indn; The receiving end RX circuit is used to receive signals RX_indp and RX_indn and output a signal VOUT; The receiving end RX circuit includes an OSC oscillator and at least two capacitors, wherein: The OSC oscillator is used to control the number of capacitors mounted in the RX circuit at the receiving end to generate a high-frequency signal with a small frequency fluctuation, thereby reducing the electromagnetic interference EMI in the circuit.

2. A high-speed single-channel digital isolation chip according to claim 1, characterized in that: The OSC oscillator is provided with a 16-bit digital switching circuit, which is used to receive the oscillation signal generated in the OSC oscillator and generate a 16-bit clock signal, thereby controlling the number of capacitors mounted in the receiving end RX circuit.

3. A high-speed single-channel digital isolation chip according to claim 1, characterized in that: The transmitting end TX circuit includes a bandgap reference source BGR, a low-dropout linear regulator LDO and an LC oscillator, wherein: The bandgap reference source BGR is used to provide a reference voltage; The low-dropout linear regulator LDO is used to connect to the bandgap reference source BGR and provide a stable operating voltage for the LC oscillator; The LC oscillator is used to provide a high-frequency oscillation carrier, which is modulated by the input signal Vin. When the Vin signal is high, the LC oscillator generates high-frequency oscillation signals TX_indp and TX_indn; when the Vin signal is 0V, the LC oscillator stops oscillating.

4. A high-speed single-channel digital isolation chip according to claim 2, characterized in that: The receiving end RX circuit includes a demodulator DEMODE, a hysteresis comparator COMP and a BEFFER circuit. The isolation transformer, the demodulator DEMODE, the hysteresis comparator COMP and the BEFFER circuit are electrically connected in sequence. The output signals RX_indp and RX_indn of the isolation transformer are first demodulated by the demodulator DEMODE and the hysteresis comparator COMP, and then driven by the BUFFER circuit to be output as a VOUT signal.

5. A high-speed single-channel digital isolation chip according to claim 4, characterized in that: At least two capacitors are mounted between the isolation transformer and the demodulator DEMODE.

6. A high-speed single-channel digital isolation chip according to claim 3, characterized in that: The LC oscillator includes a startup circuit, a pull-up network MP4 and C2. The startup circuit is used to pull down the high-level Vin signal and turn on the pull-up network MP4 to inject current into C2, thereby enabling the LC oscillator to generate high-frequency oscillation signals TX_indp and TX_indn when the input signal Vin is high.

7. A high-speed single-channel digital isolation chip according to claim 6, characterized in that: The LC oscillator further includes a common mode voltage Vcom and a pull-down network MN1. When the input signal Vin is 0, the pull-down network MN1 pulls the common mode voltage Vcom down to the ground voltage, thereby stopping the LC oscillator.

8. A high-speed single-channel digital isolation chip according to claim 7, characterized in that: A cross-coupling tube is arranged in the LC oscillator. The cross-coupling tube adopts a PMOS cross-coupling structure and is used to compensate for the energy loss of the resonant network in the LC oscillator.

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