Intermittent short-circuit fault positioning method for controller area network

Abstract

The invention discloses an intermittent short-circuit fault positioning method for a controller area network. Comprising the following steps that firstly, a CAN bus system is modeled into a switching system, each sending node corresponds to a subsystem, and the subsystems are modeled in a dual-port network modeling mode so as to describe the characteristics of CAN bus circuits under different topological structures; when an intermittent short-circuit fault occurs, the data acquisition sensor records error information and identifies the address of the node sending the error information. And determining a fault domain by combining topological information and statistical significance through a voltage transmission difference equation set method. And finally, determining the accurate position of the ISC fault by using a two-way expelling positioning algorithm. The method provided by the invention is suitable for a complex CAN bus topological structure, can be used for positioning a short-circuit fault of a cable in a bus system, and provides an effective solution for fault diagnosis of the CAN bus system.

Description

Technical Field

[0001] The invention belongs to the field of controller area network fault diagnosis and is a controller area network fault locating method, in particular to a controller area network (CAN) intermittent short circuit fault locating method based on dual-port network modeling. Background Art

[0002] The controller area network (CAN) is a fieldbus that can effectively support distributed and real-time control. Due to its good real-time performance, reliability, scalability and low cost, the CAN bus is widely used in fields with strict reliability requirements such as in-vehicle communication systems, industrial automation control, and aviation communication systems. However, in actual applications, adverse factors such as improper human intervention, environmental interference, vibration and wear of electronic equipment, and aging-related degradation may cause intermittent (IC) failures, thereby deteriorating the reliability of the network. IC failures may interrupt normal message transmission, causing message transmission delays or losses, thereby deteriorating the quality of network services and reducing system performance. In severe cases, communication errors caused by IC failures can cause nodes to enter a bus-off state, which may cause system-level failures in critical systems, increase network maintenance costs, and even lead to security incidents. Therefore, it is crucial to detect, locate, and repair IC failures before they damage the entire system for industrial applications of the CAN bus.

[0003] There are many types of intermittent (IC) faults in controller area networks. Among them, since the data acquisition system of existing methods needs to be embedded inside the node, there is still no effective, practical and online detection method suitable for complex topology network structures to diagnose intermittent short circuit (ISC) faults. Summary of the invention

[0004] The purpose of the present invention is to overcome the shortcomings of existing fault diagnosis methods, and propose a controller area network intermittent short circuit fault location method based on dual-port network modeling for the common intermittent short circuit faults in the controller area network. The method proposed in the present invention overcomes the defects of existing fault diagnosis methods in intermittent short circuit fault diagnosis. It only needs to collect the network port voltage to correctly and effectively locate the occurrence location of the intermittent short circuit fault, without considering the accessibility within the network, ensuring the security and reliability of the controller area network, and can be applied to a variety of complex network topologies and single fault and multiple fault location scenarios.

[0005] The technical solution adopted by the present invention is:

[0006] 1. A method for locating intermittent short circuit faults in a controller area network

[0007] Step 1: Arrange data acquisition sensors based on field programmable gate arrays (FPGAs) at the terminals of each branch of the controller area network. When an intermittent short circuit fault occurs in the controller area network, use each data acquisition sensor to continuously collect CAN signals of the corresponding branch terminals.

[0008] Step 2: Extract and obtain the voltage of the corresponding sending node and all network terminals from each CAN signal continuously collected;

[0009] Step 3: For a CAN signal at a certain moment, the sending node N corresponding to the current CAN signal i The terminal of the branch is recorded as the main terminal T main , and the controller area network in addition to the main terminal T main Terminals other than the secondary terminal T sub Then, based on the current voltage of all network terminals, the voltage transfer difference equation group is used to obtain the current sending node N i Direction event; continue to process and obtain the current sending node N i Direction events at different fault occurrence times, thereby generating the current sending node N i The main terminal T main Corresponding fault domains and health domains and secondary terminals T sub Corresponding fault domains and health domains;

[0010] Step 4: Repeat step 3, traverse and process each data acquisition sensor to continuously collect the CAN signal of the corresponding branch terminal, and obtain all the main terminals T when the controller LAN has an intermittent short circuit fault main The corresponding fault domain and healthy domain and all secondary terminals T sub Corresponding fault domains and healthy domains, using all major terminals T main The corresponding fault domain and healthy domain and all secondary terminals T sub After the corresponding fault domain and healthy domain perform bidirectional expulsion and location of the ISC fault, the location and diagnosis results of all ISC faults in the controller area network are obtained.

[0011] In step 3, based on the current voltage of all network terminals, the current sending node N is determined. i After the fault direction occurs, the current sending node N is obtained i Direction event; continue to process and obtain the current sending node N i Direction events at different times, specifically:

[0012] First, the two-port network modeling method is used to respectively i and the main terminal T main The link between them and the current sending node N iand secondary terminal T sub The links between the two are modeled to obtain the main link equivalent circuit and the secondary link equivalent circuit; then, according to the current voltage of all network terminals, the voltage transfer difference function value of the main link equivalent circuit is calculated using the voltage transfer difference equation group method And the voltage transfer difference function value of the secondary link equivalent circuit If the voltage transfer difference function value of the main link equivalent circuit is Less than the voltage transfer difference function value of the secondary link equivalent circuit Then the ISC fault occurs at the current sending node N i and the main terminal T main Between, the current sending node N i The direction event is recorded as If the voltage transfer difference function value of the secondary link equivalent circuit is Less than the voltage transfer difference function value of the main link equivalent circuit Then the ISC failure occurs at the sending node N i and secondary terminal T sub Between, the current sending node N i The direction event is recorded as

[0013] The voltage transfer difference function value of the main link equivalent circuit And the voltage transfer difference function value of the secondary link equivalent circuit The calculation formula is as follows:

[0014]

[0015] N i =Nx k 、Ny k or Nz k

[0016] Wherein, x is the number of nodes on the first branch X with terminal resistors, y is the number of nodes on the second branch Y with terminal resistors, and z is the number of nodes on the branch Z without terminal resistors. and They are the nodes Nz on branch Z without terminal resistors. k The corresponding voltage transfer difference function value of the primary link equivalent circuit and the voltage transfer difference function value of the secondary link equivalent circuit, and They are respectively the node Nx on the first branch X with terminal resistance k The corresponding voltage transfer difference function value of the primary link equivalent circuit and the voltage transfer difference function value of the secondary link equivalent circuit, and They are respectively the node Ny on the second branch Y with terminal resistance k The corresponding voltage transfer difference function value of the primary link equivalent circuit and the voltage transfer difference function value of the secondary link equivalent circuit, and The terminal voltage and current matrices corresponding to the first branch X with terminal resistance, the second branch Y with terminal resistance and the branch Z without terminal resistance are respectively, are the terminal voltages corresponding to the first branch X with terminal resistance, the second branch Y with terminal resistance and the branch Z without terminal resistance, respectively. and The terminal resistances of the first branch X with terminal resistance and the second branch Y with terminal resistance are Q x is the transmission parameter matrix O of the two-port network model consisting of X branches in the fault-free coupling unit x The first row, Q y is the transmission parameter matrix O of the two-port network model consisting of Y branches in the fault-free coupling unit y The first row, Q z is the transmission parameter matrix O of the two-port network model consisting of Z branches in the fault-free coupling unit z The first row, V x is the transmission parameter matrix of the two-port network model consisting of X branches in the faulty coupling unit, V y is the transmission parameter matrix of the two-port network model consisting of Y branches in the faulty coupling unit, V z is the transmission parameter matrix of the two-port network model consisting of Z branches in the faulty coupling unit, A i , A j , A p , A q are the transmission parameter matrices of the two-port network model of the i-th receiving node, j-th receiving node, p-th receiving node, and q-th receiving node on any branch, respectively. k+1 is the transmission parameter matrix A of the two-port network model of the k+1th receiving node on any branch k+1 The first line of is the short-circuit contact resistance R of the two-port network model of the k+1th fault node on any branch S The first row of the transmission parameter matrix of the model far from the terminal side is B S The short-circuit contact resistance R of the two-port network model with the k+1th fault node on any branch S The product of the transmission parameter matrices of the model close to the terminal side, || is the absolute value, and T represents the transpose.

[0017] In step 3, the current sending node N is generatedi The main terminal T main Corresponding fault domains and health domains and secondary terminals T sub The corresponding fault domains and health domains are as follows:

[0018] Within the preset time, if the current sending node N i When the proportion of a certain type of directional event is greater than the preset fault occurrence coefficient, the current sending node N i The data path between the terminals corresponding to the event in this direction is recorded as the fault domain corresponding to the terminal in this direction; if the current sending node N i When the proportion of a certain type of directional event is less than the preset fault occurrence coefficient, the current sending node N i The data path between the terminals corresponding to the event in this direction is recorded as the health domain corresponding to the terminal corresponding to the event in this direction; traverse and process the current sending node N i After two types of directional events, the current sending node N is obtained i The main terminal T main Corresponding fault domains and health domains and secondary terminals T sub Corresponding fault domains and healthy domains.

[0019] In step 4, all major terminals T main The corresponding fault domain and healthy domain and all secondary terminals T sub After the corresponding fault domain and healthy domain perform bidirectional expulsion location of the ISC fault, the location and diagnosis results of all ISC faults in the controller area network are obtained, specifically:

[0020] Connect the main terminal T main The intersection of all fault domains minus the primary terminal T main After the union of all healthy domains, the first fault location set is obtained; the secondary terminal T of the controller area network is sub The intersection of all fault domains minus the secondary terminal T sub After taking the union of all healthy domains, a second fault location set is obtained; finally, after taking the union of the first fault location set and the second fault location set, the positioning diagnosis results of all ISC faults in the controller area network are obtained.

[0021] 2. A computer device

[0022] The device comprises a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the method for locating intermittent short circuit faults in a controller area network when executing the computer program.

[0023] 3. A computer-readable storage medium

[0024] The medium stores a computer program, and when the computer program is executed by a processor, the steps of the method for locating an intermittent short circuit fault in a controller area network are implemented.

[0025] IV. A COMPUTER PROGRAM PRODUCT

[0026] The product includes a computer program / instruction, which, when executed by a processor, implements the steps of a method for locating intermittent short circuit faults in a controller area network.

[0027] The beneficial effects of the present invention are as follows:

[0028] The present invention uses a two-port network modeling method to perform equivalent circuit modeling on a controller area network system with different sending states of nodes, develops a set of voltage transfer difference equations based on the model, and develops a general diagnostic framework for a variety of network topologies, especially tree network topologies that cannot be handled by existing methods.

[0029] Based on the voltage transfer difference equations of two subsystems for fault location, the present invention proposes a bidirectional expulsion location strategy to locate various intermittent short circuit faults, including single fault and multiple fault scenarios. This method can locate ISC faults by only collecting the network port voltage without considering the accessibility within the network. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 It is a subsystem equivalent circuit model established based on the two-terminal network modeling method.

[0031] Figure 2 The present invention is a flow chart of a method for locating intermittent short circuit faults in a controller area network based on dual-port network modeling.

[0032] Figure 3 It is a general receiving node two-port network model.

[0033] Figure 4 It is a two-port network model of a receiving node with a short-circuit fault.

[0034] Figure 5 It is a general coupled unit two-port network model.

[0035] Figure 6 It is a two-port network model of coupled units with a short-circuit fault. DETAILED DESCRIPTION

[0036] In order to enable those skilled in the art to better understand the scheme of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific implementation methods. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present invention.

[0037] The present invention proposes a method for locating intermittent short circuit faults in a controller area network based on dual-port network modeling. The present invention models the subsystem to which the bus node belongs through dual-port network modeling. When an intermittent short circuit fault occurs, the data acquisition sensor locates the node address that sends the error information. The voltage information of different endpoints in the error frame network is processed by the voltage transfer difference equation group algorithm, and then statistical calculations are performed on the network topology structure obtained by modeling, and finally the location of the intermittent short circuit fault is obtained. Figure 2 As shown, the specific steps include:

[0038] Step 1: Arrange the data acquisition sensors based on field programmable gate array (FPGA) at the terminals of each branch of the controller area network. When a short circuit fault (ISC fault) occurs, the corresponding differential voltage will be much lower than the normal dominant voltage, and the corresponding signal will be extracted as the fault voltage. At the same time, the sending node address of the signal and the voltage of all network terminals, that is, the fault voltage, will be recorded. Therefore, when an intermittent short circuit fault occurs in the controller area network, the present invention uses each data acquisition sensor to continuously collect the CAN signal of the corresponding branch terminal;

[0039] Step 2: Extract and obtain the voltage of the corresponding sending node and all network terminals from each CAN signal continuously collected;

[0040] Step 3: For a CAN signal at a certain moment, the sending node N corresponding to the current CAN signal i The terminal of the branch is recorded as the main terminal T main , and the controller area network in addition to the main terminal T main Terminals other than the secondary terminal T sub Then, the voltage transfer difference equations are used to obtain the direction event of the current sending node Ni; the current sending node N is continuously processed and obtained. i Direction events at different times, thereby generating the current sending node N i The main terminal T main Corresponding fault domains and health domains and secondary terminals T sub Corresponding fault domains and health domains;

[0041] In step 3, based on the current voltage of all network terminals, determine the current sending node Ni After the fault direction occurs, the current sending node N is obtained i Direction event; continue to process and obtain the current sending node N i Direction events at different times, specifically:

[0042] First, if Figure 1 As shown, the dual-port network modeling method is used to respectively i and the main terminal T main The link between them and the current sending node N i and secondary terminal T sub The links between the two links are modeled to obtain the main link equivalent circuit and the secondary link two-port network model; then, according to the current voltage of all network terminals, the voltage transfer difference function value of the main link equivalent circuit is calculated using the voltage transfer difference equation group (VTDFG) method. And the voltage transfer difference function value of the secondary link equivalent circuit The calculated voltage transfer difference function value can be used for comparison to obtain the "direction event" for the sending node, that is, between which terminal the ISC failure occurs. The specific comparison method is: if the voltage transfer difference function value of the equivalent circuit of the main link is Less than the voltage transfer difference function value of the secondary link equivalent circuit Then the ISC fault occurs at the current sending node N i and the main terminal T main Between, the current sending node N i The direction event is recorded as If the voltage transfer difference function value of the secondary link equivalent circuit is Less than the voltage transfer difference function value of the main link equivalent circuit Then the ISC failure occurs at the sending node N i and secondary terminal T sub Between, the current sending node N i The direction event is recorded as Voltage transfer difference function value of the main link equivalent circuit Equal to the voltage transfer difference function value of the secondary link equivalent circuit There is no failure. On the basis of the failure, this situation does not exist.

[0043] Among them, the CAN bus system is modeled as a switching system, each sending node corresponds to a subsystem, and these subsystems are modeled using a two-port network modeling method to describe the characteristics of the CAN bus circuit under different topologies. Based on the two-port network modeling method, the subsystem of the controller area network bus is modeled as a subsystem circuit consisting of a sending node, a receiving node, a fault node, and a coupling unit, where each component can be described by a two-terminal network to describe its current-voltage relationship. The mathematical modeling of different components is as follows:

[0044] like Figure 3 As shown, the receiving node is responsible for receiving data in the circuit. It consists of a differential resistor and two cable resistors. The transmission model of its current-voltage relationship is:

[0045]

[0046] like Figure 4 As shown, the fault node is the short-circuit contact resistance R in the middle of the cable resistance. s The transmission model of the current-voltage relationship of the linked receiving node is:

[0047]

[0048] Among them, R s Represents the short-circuit contact resistance of the fault node.

[0049] The coupling unit represents the intersection of branches in the network topology, e.g. Figure 5 As shown in Figure 2, when there is no fault, the transfer model of the current-voltage relationship is:

[0050]

[0051] like Figure 6 As shown in Figure 1, when there is a short circuit fault in the coupling unit, the transmission model of its current-voltage relationship is:

[0052]

[0053] Among them, U i+1 and U i are the differential voltage of the i+1th node and the differential voltage of the ith node on any branch, I i and I i-1 are the current on the i-th node and the current on the i-1-th node on any branch, respectively, R i The differential internal resistance of the ith node on any branch, r is the resistance of the cable between the two nodes, B i is the transmission parameter matrix A of the two-port network model of the i-th receiving node on any branch i The first line of BS is the short-circuit contact resistance R of the two-port network model of the i-th fault node on any branch S The first row of the transmission parameter matrix of the model far from the terminal side, For B S The short-circuit contact resistance R of the two-port network model with the i-th fault node on any branch S The product of the transmission parameter matrices of the model close to the terminal side, o y is the transmission parameter matrix of the two-port network model composed of Y branches in the fault-free coupling unit, o z is the transmission parameter matrix of the two-port network model consisting of Z branches in the fault-free coupling unit, U x , U y , U z They are the nodes adjacent to the coupling unit on branches X, Y, and Z (i.e. Figure 1 Midpoint x x ,y y ,z z ,) differential voltage, I x ,I y and I z They are the nodes adjacent to the coupling unit on branches X, Y, and Z (i.e. Figure 1 Midpoint x x ,y y ,z z ,) current, R y and R z They are the nodes adjacent to the coupling unit on branches Y and Z (i.e. Figure 1 Midpoint y y ,z z ,)'s differential internal resistance, O y and O z are the transmission parameter matrices of the two-port network model composed of Y and Z branches in the fault-free coupling unit, Q y and Q z O y and O z The first row, U k is the differential voltage of the kth sending node on any branch, v y and v z are the transmission parameter matrices of the two-port network model consisting of Y and Z branches in the faulty coupling unit.

[0054] Voltage transfer difference function value of the main link equivalent circuit And the voltage transfer difference function value of the secondary link equivalent circuit The calculation formula is as follows:

[0055]

[0056] N i =Nx k 、Ny k or Nz k

[0057] Wherein, x is the number of nodes on the first branch X with terminal resistors, y is the number of nodes on the second branch Y with terminal resistors, and z is the number of nodes on the branch Z without terminal resistors. and They are the nodes Nz on branch Z without terminal resistors. k The corresponding voltage transfer difference function value of the primary link equivalent circuit and the voltage transfer difference function value of the secondary link equivalent circuit, and They are respectively the node Nx on the first branch X with terminal resistance k The corresponding voltage transfer difference function value of the primary link equivalent circuit and the voltage transfer difference function value of the secondary link equivalent circuit, and They are respectively the node Ny on the second branch Y with terminal resistance k The corresponding voltage transfer difference function value of the primary link equivalent circuit and the voltage transfer difference function value of the secondary link equivalent circuit, and The terminal voltage and current matrices corresponding to the first branch X with terminal resistance, the second branch Y with terminal resistance and the branch Z without terminal resistance are respectively, are the terminal voltages corresponding to the first branch X with terminal resistance, the second branch Y with terminal resistance and the branch Z without terminal resistance, respectively. and The terminal resistances of the first branch X with terminal resistance and the second branch Y with terminal resistance are Q x is the transmission parameter matrix O of the two-port network model consisting of X branches in the fault-free coupling unit x The first row, Q y is the transmission parameter matrix O of the two-port network model consisting of Y branches in the fault-free coupling unit y The first row, Q z is the transmission parameter matrix O of the two-port network model consisting of Z branches in the fault-free coupling unit z The first row, V x is the transmission parameter matrix of the two-port network model consisting of X branches in the faulty coupling unit, V y is the transmission parameter matrix of the two-port network model consisting of Y branches in the faulty coupling unit, V z is the transmission parameter matrix of the two-port network model consisting of Z branches in the faulty coupling unit, Ai , A j , A p , A q are the transmission parameter matrices of the two-port network model of the i-th receiving node, j-th receiving node, p-th receiving node, and q-th receiving node on any branch, respectively. k+1 is the transmission parameter matrix A of the two-port network model of the k+1th receiving node on any branch k+1 The first line of is the short-circuit contact resistance R of the two-port network model of the k+1th fault node on any branch S The first row of the transmission parameter matrix of the model far from the terminal side is B S The short-circuit contact resistance R of the two-port network model with the k+1th fault node on any branch S The product of the transmission parameter matrices of the model close to the terminal side, || is the absolute value, and T represents the transpose.

[0058] Among them, the current sending node N is generated i The main terminal T main Corresponding fault domains and health domains and secondary terminals T sub The corresponding fault domains and health domains are as follows:

[0059] As the ISC fault persists over time, each sending node has a sufficient number of directional events. i When the proportion of a certain type of directional event is greater than the preset fault occurrence coefficient, the current sending node N i The data path between the terminals corresponding to the event in this direction is recorded as the fault domain corresponding to the terminal in this direction; if the current sending node N i When the proportion of a certain type of directional event is less than the preset health maintenance coefficient, the current sending node N i The data path between the terminals corresponding to the event in this direction is recorded as the health domain corresponding to the terminal corresponding to the event in this direction; traverse and process the current sending node N i After two types of directional events, the current sending node N is obtained i The main terminal T main Corresponding fault domains and health domains and secondary terminals T sub The corresponding fault domain and health domain. Represents the sending node N i and terminal T h All data paths between, h = sub or main, Represents the sending node N i and terminal T h All physical links in the data path between them. If the terminal Th If the proportion of the corresponding directional events (i.e., the proportion of this type of directional events to the total directional events within the preset time) is greater than the preset fault occurrence coefficient, it is considered that the ISC fault occurs in All links in the network may have ISC failures, defining the failure domain Likewise, if the terminal T h If the proportion of the corresponding directional events is less than the preset health maintenance coefficient, it is considered that the ISC fault did not occur in Defining Health Domains

[0060] Step 4: Repeat step 3, traverse and process each data acquisition sensor to continuously collect the CAN signal of the corresponding branch terminal, and obtain all the main terminals T when the controller LAN has an intermittent short circuit fault main The corresponding fault domain and healthy domain and all secondary terminals T sub Corresponding fault domains and healthy domains, using all major terminals T main The corresponding fault domain and healthy domain and all secondary terminals T sub After the corresponding fault domain and healthy domain perform bidirectional eviction location (BEL) of the ISC fault, the location diagnosis results of all ISC faults in the controller area network are obtained and the obtained fault information is reported to the storage domain for later network diagnosis and fault repair.

[0061] Among them, using all major terminals T main The corresponding fault domain and healthy domain and all secondary terminals T sub After the corresponding fault domain and healthy domain perform bidirectional eviction location (BEL) of the ISC fault, the location and diagnosis results of all ISC faults in the controller area network are obtained, specifically:

[0062] Connect the main terminal T main The intersection of all fault domains minus the primary terminal T main After the union of all healthy domains, the first fault location set is obtained Connect the secondary terminal T sub The intersection of all fault domains minus the secondary terminal T sub After the union of all healthy domains, the second fault location set is obtained Right now n represents the total number of sending nodes. Finally, the first fault location set and the second fault location set are combined to obtain the location diagnosis results of all ISC faults in the controller area network ISC Network ,Right now

[0063] Finally, it should be noted that the above embodiments and explanations are only used to illustrate the technical solution of the present invention rather than to limit it. Those skilled in the art should understand that the technical solution of the present invention can be modified or replaced by equivalents without departing from the spirit and scope disclosed in the technical solution of the present invention, which should be included in the scope of protection of the claims of the present invention.

Claims

1. A method for locating intermittent short circuit faults in a controller area network, characterized in that: The following steps are involved: Step 1: Arrange data acquisition sensors based on field programmable gate arrays (FPGAs) at the terminals of each branch of the controller area network. When an intermittent short circuit fault occurs in the controller area network, use each data acquisition sensor to continuously collect CAN signals of the corresponding branch terminals. Step 2: Extract and obtain the voltage of the corresponding sending node and all network terminals from each CAN signal continuously collected; Step 3: For a CAN signal at a certain moment, the sending node N corresponding to the current CAN signal i The terminal of the branch is recorded as the main terminal T main , and the controller area network in addition to the main terminal T main Terminals other than the secondary terminal T sub Then, based on the current voltage of all network terminals, the voltage transfer difference equation group is used to obtain the current sending node N i Direction event; continue to process and obtain the current sending node N i Direction events at different fault occurrence times, thereby generating the current sending node N i The main terminal T main Corresponding fault domains and health domains and secondary terminals T sub Corresponding fault domains and health domains; Step 4: Repeat step 3, traverse and process each data acquisition sensor to continuously collect the CAN signal of the corresponding branch terminal, and obtain all the main terminals T when the controller LAN has an intermittent short circuit fault main The corresponding fault domain and healthy domain and all secondary terminals T sub Corresponding fault domains and healthy domains, using all major terminals T main The corresponding fault domain and healthy domain and all secondary terminals T sub After the corresponding fault domain and healthy domain perform bidirectional expulsion and location of the ISC fault, the location and diagnosis results of all ISC faults in the controller area network are obtained.

2. A method for locating intermittent short circuit faults in a controller area network according to claim 1, characterized in that: In step 3, based on the current voltage of all network terminals, the current sending node N is determined. i After the fault direction occurs, the current sending node N is obtained i Direction event; continue to process and obtain the current sending node N i Direction events at different times, specifically: First, the two-port network modeling method is used to respectively i and the main terminal T main The link between them and the current sending node N i and secondary terminal T sub The links between the two are modeled to obtain the main link equivalent circuit and the secondary link equivalent circuit; then, according to the current voltage of all network terminals, the voltage transfer difference function value of the main link equivalent circuit is calculated using the voltage transfer difference equation group method And the voltage transfer difference function value of the secondary link equivalent circuit If the voltage transfer difference function value of the main link equivalent circuit is Less than the voltage transfer difference function value of the secondary link equivalent circuit Then the ISC fault occurs at the current sending node N i and the main terminal T main Between, the current sending node N i The direction event is recorded as If the voltage transfer difference function value of the secondary link equivalent circuit is Less than the voltage transfer difference function value of the main link equivalent circuit Then the ISC failure occurs at the sending node N i and secondary terminal T sub Between, the current sending node N i The direction event is recorded as 3. A method for locating intermittent short circuit faults in a controller area network according to claim 2, characterized in that: The voltage transfer difference function value of the main link equivalent circuit And the voltage transfer difference function value of the secondary link equivalent circuit The calculation formula is as follows: Wherein, x is the number of nodes on the first branch X with terminal resistors, y is the number of nodes on the second branch Y with terminal resistors, and z is the number of nodes on the branch Z without terminal resistors. and They are the nodes Nz on branch Z without terminal resistors. k The corresponding voltage transfer difference function value of the primary link equivalent circuit and the voltage transfer difference function value of the secondary link equivalent circuit, and They are respectively the node Nx on the first branch X with terminal resistance k The corresponding voltage transfer difference function value of the primary link equivalent circuit and the voltage transfer difference function value of the secondary link equivalent circuit, and They are respectively the node Ny on the second branch Y with terminal resistance k The corresponding voltage transfer difference function value of the primary link equivalent circuit and the voltage transfer difference function value of the secondary link equivalent circuit, and The terminal voltage and current matrices corresponding to the first branch X with terminal resistance, the second branch Y with terminal resistance and the branch Z without terminal resistance are respectively, are the terminal voltages corresponding to the first branch X with terminal resistance, the second branch Y with terminal resistance and the branch Z without terminal resistance, respectively. and The terminal resistances of the first branch X with terminal resistance and the second branch Y with terminal resistance are Q x is the transmission parameter matrix O of the two-port network model consisting of X branches in the fault-free coupling unit x The first row, Q y is the transmission parameter matrix O of the two-port network model consisting of Y branches in the fault-free coupling unit y The first row, Q z is the transmission parameter matrix O of the two-port network model consisting of Z branches in the fault-free coupling unit z The first row, V x is the transmission parameter matrix of the two-port network model consisting of X branches in the faulty coupling unit, V y is the transmission parameter matrix of the two-port network model consisting of Y branches in the faulty coupling unit, V z is the transmission parameter matrix of the two-port network model consisting of Z branches in the faulty coupling unit, A i , A j , A p , A q are the transmission parameter matrices of the two-port network model of the i-th receiving node, j-th receiving node, p-th receiving node, and q-th receiving node on any branch, respectively. k+1 is the transmission parameter matrix A of the two-port network model of the k+1th receiving node on any branch k+1 The first line of is the short-circuit contact resistance R of the two-port network model of the k+1th fault node on any branch S The first row of the transmission parameter matrix of the model far from the terminal side is B S The short-circuit contact resistance R of the two-port network model with the k+1th fault node on any branch S The product of the transmission parameter matrices of the model close to the terminal side, | | is the absolute value, and T represents the transpose.

4. A method for locating intermittent short circuit faults in a controller area network according to claim 1, characterized in that: In step 3, the current sending node N is generated i The main terminal T main Corresponding fault domains and health domains and secondary terminals T sub The corresponding fault domains and health domains are as follows: Within the preset time, if the current sending node N i When the proportion of a certain type of directional event is greater than the preset fault occurrence coefficient, the current sending node N i The data path between the terminals corresponding to the event in this direction is recorded as the fault domain corresponding to the terminal in this direction; if the current sending node N i When the proportion of a certain type of directional event is less than the preset fault occurrence coefficient, the current sending node N i The data path between the terminals corresponding to the event in this direction is recorded as the health domain corresponding to the terminal corresponding to the event in this direction; traverse and process the current sending node N i After the two types of directional events, the current sending node N is obtained i The main terminal T main Corresponding fault domains and health domains and secondary terminals T sub Corresponding fault domains and healthy domains.

5. A method for locating intermittent short circuit faults in a controller area network according to claim 1, characterized in that: In step 4, all major terminals T main The corresponding fault domain and healthy domain and all secondary terminals T sub After the corresponding fault domain and healthy domain perform bidirectional expulsion location of the ISC fault, the location diagnosis results of all ISC faults in the controller area network are obtained, specifically: Connect the main terminal T main The intersection of all fault domains minus the primary terminal T main After the union of all healthy domains, the first fault location set is obtained; the secondary terminal T of the controller area network is sub The intersection of all fault domains minus the secondary terminal T sub After taking the union of all healthy domains, a second fault location set is obtained; finally, after taking the union of the first fault location set and the second fault location set, the positioning diagnosis results of all ISC faults in the controller area network are obtained.

6. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that: When the processor executes the computer program, the steps of the method for locating intermittent short circuit faults in a controller area network as described in any one of claims 1 to 5 are implemented.

7. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of a method for locating an intermittent short circuit fault in a controller area network as claimed in any one of claims 1 to 5 are implemented.

8. A computer program product comprising a computer program / instructions, characterized in that When the computer program / instruction is executed by a processor, the steps of a method for locating intermittent short circuit faults in a controller area network as described in any one of claims 1 to 5 are implemented.

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