Image sensor, operating method thereof, and image processing system including the same

Abstract

The invention relates to an image sensor, an operation method thereof, and an image processing system including the same. Disclosed are an image sensor and an image processing system including the same, the image sensor including: a first pixel pair arranged in a first row and configured to generate a first pixel signal and a second pixel signal according to a first order during a first single readout time; a second pixel pair arranged in the first row and configured to generate a third pixel signal and a fourth pixel signal according to a second order different from the first order during a first single readout time; and a row controller configured to control the first pixel pair according to the first order and the second pixel pair according to the second order during a first single readout time.

Description

Technical Field

[0001] Various embodiments of the present disclosure relate to semiconductor design technology, and more particularly, to an image sensor and an image processing system including the same. Background Art

[0002] An image sensor is a device that uses the properties of semiconductors that react to light to capture images. Image sensors can be roughly classified into charge coupled device (CCD) image sensors and complementary metal oxide semiconductor (CMOS) image sensors. Recently, CMOS image sensors are widely used because CMOS image sensors can allow both analog control circuits and digital control circuits to be directly implemented on a single integrated circuit (IC).

[0003] The image sensor supports the phase detection autofocus (PDAF) function. The phase detection autofocus function is a function that adjusts the focus by detecting the phase difference of incident light. The phase detection autofocus function is useful in high-speed shooting or video shooting where fast focus adjustment is required. Summary of the invention

[0004] Various embodiments of the present disclosure are directed to an image sensor capable of suppressing noise reflected in a pixel signal and an image processing system including the image sensor.

[0005] According to an embodiment of the present disclosure, an image sensor may include: a first pixel pair arranged in a first row and configured to generate a first pixel signal and a second pixel signal according to a first order during a first single readout time; a second pixel pair arranged in the first row and configured to generate a third pixel signal and a fourth pixel signal according to a second order different from the first order during the first single readout time; and a row controller configured to control the first pixel pair according to the first order and the second pixel pair according to the second order during the first single readout time.

[0006] According to an embodiment of the present disclosure, an image processing system may include: an image sensor, which includes pixel pairs arranged at intersections of multiple rows and columns, and is configured to differently control the readout order of pixel pairs arranged in the same row among the multiple pixel pairs, and differently control the readout order of pixel pairs arranged in the same column among the multiple pixel pairs; and an image processor, which is configured to generate image data related to phase detection autofocus (PDAF) based on pixel signals generated by the image sensor.

[0007] According to an embodiment of the present disclosure, a method for operating an image sensor may include the following steps: generating a first pixel signal and a second pixel signal by a first pixel pair arranged in a first row according to a first order during a first single readout time; and generating a third pixel signal and a fourth pixel signal by a second pixel pair arranged in the first row according to a second order different from the first order during the first single readout time, wherein the first pixel pair and the second pixel pair are connected to adjacent columns. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 is a block diagram illustrating an image processing system according to an embodiment of the present disclosure.

[0009] Figure 2 It is shown Figure 1 Detailed block diagram of the image sensor shown.

[0010] Figure 3 It is shown Figure 2 A schematic diagram of an example of a pixel array is shown.

[0011] Figure 4 It is shown that the Figure 3 A circuit diagram of an example of pixel pairs and signal lines in the first row is shown.

[0012] Figure 5 It is shown that the Figure 3 A circuit diagram of another example of pixel pairs and signal lines in the first row shown.

[0013] Figures 6 to 11 is a diagram illustrating the operation of the image processing system according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0014] Various embodiments of the present disclosure are described below with reference to the accompanying drawings in order to describe the embodiments of the present disclosure in detail so that a person having ordinary skills in the field to which the present disclosure belongs can easily implement the technical spirit of the present disclosure.

[0015] It will be understood that when an element is referred to as being "connected to" or "coupled to" another element, the element may be directly connected to or coupled to the other element, or electrically connected to or coupled to the other element with one or more elements interposed therebetween. In addition, it will be understood that, unless otherwise mentioned, the terms "comprises" and "comprising" when used in this specification do not exclude the presence of one or more other elements, but may also include or have one or more other elements. In the description throughout the specification, some components are described in the singular, but the present disclosure is not limited thereto, and it will be understood that components may be formed in plural.

[0016] Figure 1is a block diagram showing an image processing system 10 according to an embodiment of the present disclosure.

[0017] Reference Figure 1 , the image processing system 10 may include an image sensor 100 and an image processor 200 .

[0018] The image sensor 100 may generate a pixel signal DPX based on incident light.

[0019] The image processor 200 may generate image data PDAF related to phase detection autofocus (PDAF) based on the pixel signal DPX. For example, the image processor 200 may generate image data PDAF by performing an average calculation operation and a subtraction operation on the pixel signals DPX of each region. Herein, the image data PDAF may be data for PDAF having excellent quality as the noise reflected in the pixel signal DPX is removed (eliminated) or offset. The noise may be power noise that varies according to the readout time point at which the image sensor 100 reads out the pixel signal DPX.

[0020] Figure 2 It is shown Figure 1 A detailed block diagram of image sensor 100 is shown.

[0021] Reference Figure 2 , the image sensor 100 may include a row controller 110 , a pixel array 120 , and a signal converter 130 .

[0022] The row controller 110 may generate a row control signal RCTRL for each row to control the pixel array 120. For example, the row controller 110 may generate a first row control signal for controlling pixels arranged in a first row of the pixel array 120 and a y-th row control signal for controlling pixels arranged in a y-th row of the pixel array 120, where "y" is a natural number greater than 1. The first row control signal and the y-th row control signal may be included in the row control signal RCTRL.

[0023] The pixel array 120 may generate a pixel signal VPX corresponding to incident light in response to the row control signal RCTRL. The pixel array 120 may include a plurality of pixel pairs PX11 to PX44 (refer to Figure 3 ). A plurality of pixel pairs PX11 to PX44 may be arranged at intersections of a plurality of rows and a plurality of columns.

[0024] The signal converter 130 may generate a digital pixel signal DPX based on the analog pixel signal VPX. For example, the signal converter 130 may include an analog-to-digital converter (ADC).

[0025] Figure 3 It is shown Figure 2FIG. 1 is a schematic diagram of an example of a pixel array 120 shown in FIG. Figure 3 , the pixel array 120 includes 4×4 pixel pairs, ie, a first pixel pair PX11 to a 16th pixel pair PX44.

[0026] Reference Figure 3 , the pixel array 120 may include first to fourth pixel pairs PX11 to PX14 arranged in the first row ROW1; fifth to eighth pixel pairs PX21 to PX24 arranged in the second row ROW2; ninth to twelfth pixel pairs PX31 to PX34 arranged in the third row ROW3; and thirteenth to sixteenth pixel pairs PX41 to PX44 arranged in the fourth row ROW4.

[0027] For example, the first pixel pair PX11 and the second pixel pair PX12 arranged in the first row ROW1 may be controlled according to the first order during the first single readout time, and the third pixel pair PX13 and the fourth pixel pair PX14 arranged in the first row ROW1 may be controlled according to the second order during the first single readout time. The fifth pixel pair PX21 and the sixth pixel pair PX22 arranged in the second row ROW2 may be controlled according to the second order during the second single readout time, and the seventh pixel pair PX23 and the eighth pixel pair PX24 arranged in the second row ROW2 may be controlled according to the first order during the second single readout time. The ninth pixel pair PX31 and the tenth pixel pair PX32 arranged in the third row ROW3 may be controlled according to the second order during the third single readout time, and the eleventh pixel pair PX33 and the twelfth pixel pair PX34 arranged in the third row ROW3 may be controlled according to the first order during the third single readout time. The 13th pixel pair PX41 and the 14th pixel pair PX42 arranged in the fourth row ROW4 may be controlled according to the first order during the fourth single readout time, and the 15th pixel pair PX43 and the 16th pixel pair PX44 arranged in the fourth row ROW4 may be controlled according to the second order during the fourth single readout time. The second order may be different from the first order. For example, the second order may be opposite to the first order.

[0028] The first pixel pair PX11, the fifth pixel pair PX21, the ninth pixel pair PX31, and the thirteenth pixel pair PX41 may be arranged in the first column COL1. The second pixel pair PX12, the sixth pixel pair PX22, the tenth pixel pair PX32, and the fourteenth pixel pair PX42 may be arranged in the second column COL2. The third pixel pair PX13, the seventh pixel pair PX23, the eleventh pixel pair PX33, and the fifteenth pixel pair PX43 may be arranged in the third column COL3. The fourth pixel pair PX14, the eighth pixel pair PX24, the twelfth pixel pair PX34, and the sixteenth pixel pair PX44 may be arranged in the fourth column COL4.

[0029] In addition, the first pixel pair PX11, the third pixel pair PX13, the ninth pixel pair PX31, and the eleventh pixel pair PX33 may have the same color filter (e.g., a red color filter). The second pixel pair PX12, the fourth pixel pair PX14, the tenth pixel pair PX32, and the twelfth pixel pair PX34 may have the same color filter (e.g., a green color filter). The fifth pixel pair PX21, the seventh pixel pair PX23, the thirteenth pixel pair PX41, and the fifteenth pixel pair PX43 may have the same color filter (e.g., a green color filter). The sixth pixel pair PX22, the eighth pixel pair PX24, the fourteenth pixel pair PX42, and the sixteenth pixel pair PX44 may have the same color filter (e.g., a blue color filter).

[0030] Each of the first pixel pair PX11 to the 16th pixel pair PX44 may include two pixels (i.e., a left pixel and a right pixel) based on the dotted line. The left pixel may be arranged on the left side in the layout of each pixel pair, and the right pixel may be arranged on the right side in the layout of each pixel pair. For example, the left pixel and the right pixel may share a lens (e.g., a microlens) and have the same color filter. Each of the first pixel pair PX11 to the 16th pixel pair PX44 may have a 2PD (photodiode) structure.

[0031] Figure 4 is shown with Figure 3 An exemplary circuit diagram of some pixel pairs and some signal lines related to the first row ROW1 is shown. Figure 4 The illustrated first transmission control signal TX1_1 , second transmission control signal TX1_2 , first reset control signal RX1 , and first selection control signal SX1 may be signals included in a first row control signal among the row control signals RCTRL.

[0032] Reference Figure 4 The first pixel pair PX11 and the third pixel pair PX13 may be connected to a first signal line SL1 and a second signal line SL2. The first signal line SL1 may transmit a first transmission control signal TX1_1, and the second signal line SL2 may transmit a second transmission control signal TX1_2.

[0033] The first pixel pair PX11 may include a first photodiode P_L1 , a first transfer transistor TT_L1 , a second photodiode P_R1 , a second transfer transistor TT_R1 , a first floating diffusion node FD1 , a first reset transistor RT1 , a first driving transistor DT1 , and a first selection transistor ST1 .

[0034] The first photodiode P_L1 may be connected between a low voltage terminal (e.g., a ground terminal) and the first transfer transistor TT_L1. The first photodiode P_L1 may be a light receiving element that generates a first charge corresponding to the incident light. For example, the first photodiode P_L1 may correspond to a left pixel. The first photodiode P_L1 may be replaced with a different type of light receiving element, such as a phototransistor, a photogate, a pinned photodiode, or a combination thereof.

[0035] The first transfer transistor TT_L1 may be connected between the first photodiode P_L1 and the first floating diffusion node FD1. The first transfer transistor TT_L1 may transfer the first charges generated by the first photodiode P_L1 to the first floating diffusion node FD1 in response to the first transfer control signal TX1_1.

[0036] The second photodiode P_R1 may be connected between the low voltage terminal and the second transfer transistor TT_R1. The second photodiode P_R1 may be a light receiving element that generates a second charge corresponding to the incident light. For example, the second photodiode P_R1 may correspond to the right pixel. The second photodiode P_R1 may be replaced with a different type of light receiving element, such as a phototransistor, a photogate, a pinned photodiode, or a combination thereof.

[0037] The second transfer transistor TT_R1 may be connected between the second photodiode P_R1 and the first floating diffusion node FD1. The second transfer transistor TT_R1 may transfer the second charges generated by the second photodiode P_R1 to the first floating diffusion node FD1 in response to the second transfer control signal TX1_2.

[0038] The first floating diffusion node FD1 may accumulate and store first and / or second charges transferred from the first and second transfer transistors TT_L1 and TT_R1. Although not shown, a parasitic capacitor capable of accumulating and storing the first and / or second charges may be connected to the first floating diffusion node FD1.

[0039] The first reset transistor RT1 may reset the first floating diffusion node FD1. For example, the first reset transistor RT1 may electrically connect the first floating diffusion node FD1 to a high voltage terminal (eg, VDD) in response to a first reset control signal RX1, thereby removing or releasing charges remaining in the first floating diffusion node FD1.

[0040] The first drive transistor DT1 may be connected between the high voltage terminal and the first selection transistor ST1. A gate terminal of the first drive transistor DT1 may be connected to the first floating diffusion node FD1. The first drive transistor DT1 may generate a first pixel signal VPX1 based on a voltage level loaded on the first floating diffusion node FD1.

[0041] The first selection transistor ST1 may be connected between the first driving transistor DT1 and the first column line CL1. The first selection transistor ST1 may output a first pixel signal VPX1 through the first column line CL1 in response to a first selection control signal SX1.

[0042] Likewise, the third pixel pair PX13 may include a fifth photodiode P_L3 , a fifth transfer transistor TT_L3 , a sixth photodiode P_R3 , a sixth transfer transistor TT_R3 , a third floating diffusion node FD3 , a third reset transistor RT3 , a third driving transistor DT3 , and a third selection transistor ST3 .

[0043] The fifth photodiode P_L3 may be connected between the low voltage terminal and the fifth transfer transistor TT_L3. The fifth photodiode P_L3 may be a light receiving element that generates a fifth charge corresponding to the incident light. For example, the fifth photodiode P_L3 may correspond to a left pixel. The fifth photodiode P_L3 may be replaced with a different type of light receiving element, such as a phototransistor, a photogate, a pinned photodiode, or a combination thereof.

[0044] The fifth transfer transistor TT_L3 may be connected between the fifth photodiode P_L3 and the third floating diffusion node FD3. The fifth transfer transistor TT_L3 may transfer the fifth charges generated by the fifth photodiode P_L3 to the third floating diffusion node FD3 in response to the second transfer control signal TX1_2.

[0045] The sixth photodiode P_R3 may be connected between the low voltage terminal and the sixth transfer transistor TT_R3. The sixth photodiode P_R3 may be a light receiving element that generates a sixth charge corresponding to the incident light. For example, the sixth photodiode P_R3 may correspond to the right pixel. The sixth photodiode P_R3 may be replaced with a different type of light receiving element, such as a phototransistor, a photogate, a pinned photodiode, or a combination thereof.

[0046] The sixth transfer transistor TT_R3 may be connected between the sixth photodiode P_R3 and the third floating diffusion node FD3. The sixth transfer transistor TT_R3 may transfer the sixth charges generated by the sixth photodiode P_R3 to the third floating diffusion node FD3 in response to the first transfer control signal TX1_1.

[0047] The third floating diffusion node FD3 may accumulate and store the fifth and / or sixth charges transferred from the fifth and sixth transfer transistors TT_L3 and TT_R3. Although not shown, a parasitic capacitor capable of accumulating and storing the fifth and / or sixth charges may be connected to the third floating diffusion node FD3.

[0048] The third reset transistor RT3 may reset the third floating diffusion node FD3. For example, the third reset transistor RT3 may electrically connect the third floating diffusion node FD3 to the high voltage terminal in response to the first reset control signal RX1, thereby removing or releasing charges remaining in the third floating diffusion node FD3.

[0049] The third driving transistor DT3 may be connected between the high voltage terminal and the third selection transistor ST3. The gate terminal of the third driving transistor DT3 may be connected to the third floating diffusion node FD3. The third driving transistor DT3 may generate a third pixel signal VPX3 based on a voltage level loaded on the third floating diffusion node FD3.

[0050] The third selection transistor ST3 may be connected between the third driving transistor DT3 and the third column line CL3 The third selection transistor ST3 may output a third pixel signal VPX3 through the third column line CL3 in response to the first selection control signal SX1.

[0051] like Figure 4 As shown, the left pixel of the first pixel pair PX11 may be connected to the first signal line SL1, and the right pixel of the first pixel pair PX11 may be connected to the second signal line SL2. Conversely, the left pixel of the third pixel pair PX13 may be connected to the second signal line SL2, and the right pixel of the third pixel pair PX13 may be connected to the first signal line SL1. Therefore, the first pixel pair PX11 may generate a first pixel signal VPX1 corresponding to the left pixel according to the first order, and then generate a first pixel signal VPX1 corresponding to the right pixel. The third pixel pair PX13 may generate a third pixel signal VPX3 corresponding to the right pixel according to the second order, and then generate a third pixel signal VPX3 corresponding to the left pixel.

[0052] Figure 5 It is shown that the Figure 3 A circuit diagram of another example of pixel pairs and signal lines in the first row shown. Figure 5 The illustrated first, second, third, and fourth transmission control signals TX1_L1, TX1_R1, TX1_L2, TX1_R2, first reset control signal RX1, and first selection control signal SX1 may be signals included in the first row control signal among the row control signals RCTRL.

[0053] because Figure 5 The first pixel pair PX11 and the third pixel pair PX13 shown have Figure 4The configuration shown in FIG. 1 is the same configuration, so its detailed description is omitted. However, in the first pixel pair PX11, the left pixel may be connected to the first signal line SL1 and controlled by the first transmission control signal TX1_L1, the right pixel may be connected to the second signal line SL2 and controlled by the second transmission control signal TX1_R1, and in the third pixel pair PX13, the left pixel may be connected to the third signal line SL3 and controlled by the third transmission control signal TX1_L2, and the right pixel may be connected to the fourth signal line SL4 and controlled by the fourth transmission control signal TX1_R2. In this case, the first transmission control signal TX1_L1 and the second transmission control signal TX1_R1 may be enabled according to the first order. For example, the first transmission control signal TX1_L1 may be enabled, and then the second transmission control signal TX1_R1 may be enabled. On the contrary, the third transmission control signal TX1_L2 and the fourth transmission control signal TX1_R2 may be enabled according to the second order. For example, the fourth transmission control signal TX1_R2 may be enabled, and then the third transmission control signal TX1_L2 may be enabled.

[0054] Below, refer to Figures 6 to 11 The operation of the image processing system 10 according to the present embodiment having the above-described configuration is described.

[0055] Figures 6 to 8 1 is a diagram showing the operation of the image sensor 100 according to an embodiment of the present disclosure according to the first readout method. The first readout method refers to a method of sequentially reading out a reset signal R1 and a data signal S1 of one pixel of a pixel pair as a pixel signal, and then sequentially reading out a reset signal R2 and a data signal S2 of the other pixel of the pixel pair as a pixel signal (i.e., R1->S1->R2->S2).

[0056] Figure 6 is a timing diagram showing an operation of first reading out the pixel signal of the left pixel of the pixel pair according to the first readout method. Figure 6 2 is a timing chart representatively showing a readout operation related to the first pixel pair PX11 .

[0057] Reference Figure 6 During the first single readout time, the first pixel pair PX11 may output a reset signal of the left pixel of the first pixel pair PX11 as the first pixel signal VPX1 at a first time point t1, output a data signal of the left pixel as the first pixel signal VPX1 at a second time point t2 after the first time point t1, output a reset signal of the right pixel of the first pixel pair PX11 as the first pixel signal VPX1 at a third time point t3 after the second time point t2, and output the data signal of the right pixel as the first pixel signal VPX1 at a fourth time point t4 after the third time point t3.

[0058] Figure 7is a timing diagram showing an operation of first reading out the pixel signal of the right pixel of the pixel pair according to the first readout method. Figure 7 2 is a timing chart representatively showing a readout operation related to the first pixel pair PX11 .

[0059] Reference Figure 7 The first pixel pair PX11 may output a reset signal of the right pixel of the first pixel pair PX11 as the first pixel signal VPX1 at a first time point t1, output a data signal of the right pixel as the first pixel signal VPX1 at a second time point t2 after the first time point t1, output a reset signal of the left pixel of the first pixel pair PX11 as the first pixel signal VPX1 at a third time point t3 after the second time point t2, and output a data signal of the left pixel as the first pixel signal VPX1 at a fourth time point t4 after the third time point t3.

[0060] Figure 8 1 is a schematic diagram showing a readout order according to the first readout method. Hereinafter, operations related to the first pixel pair PX11, the third pixel pair PX13, the ninth pixel pair PX31, and the eleventh pixel pair PX33 having the same color filter (eg, red color filter) are representatively described.

[0061] Reference Figure 8 , during the first single readout time allocated to the first row ROW1, the first pixel pair PX11 arranged in the first row ROW1 may generate pixel signals according to the first order. For example, the first pixel pair PX11 may read out (1) the first pixel signal VPX1 corresponding to the left pixel, and then read out (2) the first pixel signal VPX1 corresponding to the right pixel. In this case, the first power noise (a) may be reflected in the first pixel signal VPX1 corresponding to the left pixel that is read out first (1), and the second power noise (b) may be reflected in the first pixel signal VPX1 corresponding to the right pixel that is read out later (2).

[0062] In contrast, during the first single readout time, the third pixel pair PX13 arranged in the first row ROW1 may generate pixel signals according to the second order. For example, the third pixel pair PX13 may read out (1) a third pixel signal VPX3 corresponding to the right pixel, and then read out (2) a third pixel signal VPX3 corresponding to the left pixel. In this case, the first power noise (a) may be reflected in the third pixel signal VPX3 corresponding to the right pixel that is read out first (1), and the second power noise (b) may be reflected in the third pixel signal VPX3 corresponding to the left pixel that is read out subsequently (2).

[0063] During the third single readout time allocated to the third row ROW3, ​​the ninth pixel pair PX31 arranged in the third row ROW3 may generate pixel signals according to the second order. For example, the ninth pixel pair PX31 may read out (5) the first pixel signal VPX1 corresponding to the right pixel, and then read out (6) the first pixel signal VPX1 corresponding to the left pixel. In this case, the first power noise (a) may be reflected in the first pixel signal VPX1 corresponding to the right pixel that is read out first (5), and the second power noise (b) may be reflected in the first pixel signal VPX1 corresponding to the left pixel that is read out later (6).

[0064] In contrast, during the third single readout time, the 11th pixel pair PX33 arranged in the third row ROW3 may generate pixel signals according to the first order. For example, the 11th pixel pair PX33 may read out (5) the third pixel signal VPX3 corresponding to the left pixel, and then read out (6) the third pixel signal VPX3 corresponding to the right pixel. In this case, the first power noise (a) may be reflected in the third pixel signal VPX3 corresponding to the left pixel that is read out first (5), and the second power noise (b) may be reflected in the third pixel signal VPX3 corresponding to the right pixel that is read out subsequently (6).

[0065] The image processor 200 may calculate a first average value AVR1 based on a first pixel signal VPX1 corresponding to a left pixel of a first pixel pair PX11, a third pixel signal VPX3 corresponding to a left pixel of a third pixel pair PX13, a first pixel signal VPX1 corresponding to a left pixel of a ninth pixel pair PX31, and a third pixel signal VPX3 corresponding to a left pixel of an eleventh pixel pair PX33. For example, the first average value AVR1 may be calculated as shown in the following formula 1.

[0066] [Formula 1]

[0067] AVR1=(L1+L3+L9+L11) / 4+(2a+2b) / 4

[0068] Herein, "L1" may refer to a pixel value of a first pixel signal VPX1 corresponding to a left pixel of a first pixel pair PX11, "L3" may refer to a pixel value of a third pixel signal VPX3 corresponding to a left pixel of a third pixel pair PX13, "L9" may refer to a pixel value of a first pixel signal VPX1 corresponding to a left pixel of a ninth pixel pair PX31, and "L11" may refer to a pixel value of a third pixel signal VPX3 corresponding to a left pixel of an eleventh pixel pair PX33. "2a" may be a value obtained by adding a first power noise (a) reflected in a first pixel signal VPX1 corresponding to a left pixel of a first pixel pair PX11 and a first power noise (a) reflected in a third pixel signal VPX3 corresponding to a left pixel of an eleventh pixel pair PX33. “2b” may be a value obtained by adding the second power noise (b) reflected in the third pixel signal VPX3 corresponding to the left pixel of the third pixel pair PX13 and the second power noise (b) reflected in the first pixel signal VPX1 corresponding to the left pixel of the ninth pixel pair PX31.

[0069] The image processor 200 may calculate the second average value AVR2 based on the first pixel signal VPX1 corresponding to the right pixel of the first pixel pair PX11, the third pixel signal VPX3 corresponding to the right pixel of the third pixel pair PX13, the first pixel signal VPX1 corresponding to the right pixel of the ninth pixel pair PX31, and the third pixel signal VPX3 corresponding to the right pixel of the eleventh pixel pair PX33. For example, the second average value AVR2 may be calculated as shown in the following formula 2.

[0070] [Formula 2]

[0071] AVR2=(R1+R3+R9+R11) / 4+(2a+2b) / 4

[0072] Herein, "R1" may refer to a pixel value of a first pixel signal VPX1 corresponding to a right pixel of a first pixel pair PX11, "R3" may refer to a pixel value of a third pixel signal VPX3 corresponding to a right pixel of a third pixel pair PX13, "R9" may refer to a pixel value of a first pixel signal VPX1 corresponding to a right pixel of a ninth pixel pair PX31, and "R11" may refer to a pixel value of a third pixel signal VPX3 corresponding to a right pixel of an eleventh pixel pair PX33. "2a" may be a value obtained by adding a first power noise (a) reflected in a third pixel signal VPX3 corresponding to a right pixel of a third pixel pair PX13 and a first power noise (a) reflected in a first pixel signal VPX1 corresponding to a right pixel of a ninth pixel pair PX31. “2b” may be a value obtained by adding the second power noise (b) reflected in the first pixel signal VPX1 corresponding to the right pixel of the first pixel pair PX11 and the second power noise (b) reflected in the third pixel signal VPX3 corresponding to the right pixel of the 11th pixel pair PX33.

[0073] The image processor 200 may generate image data PDAF by performing an average calculation operation and a subtraction operation on the pixel signals DPX of each region. For example, the image processor 200 may generate first image data PDAF1 corresponding to the difference between the first average value AVR1 and the second average value AVR2 in a 4×4 region including the first pixel pair PX11 to the 16th pixel pair PX44. Although the embodiments of the present disclosure are described using a 4×4 region as an example, the present disclosure is not necessarily limited thereto and may be implemented in a wider region (e.g., a 64×64 region, etc.). For example, the first image data PDAF1 may be calculated as shown in Formula 3 below.

[0074] [Formula 3]

[0075] PDAF1={(L1+L3+L9+L11) / 4+(2a+2b) / 4}-{(R1+R3+R9+R11) / 4+(2a+2b) / 4}

[0076] =(L1+L3+L9+L11) / 4-(R1+R3+R9+R11) / 4

[0077] As shown in the above formula 3, the first image data PDAF1 can be image data for PDAF having excellent quality as the first power noise (a) and the second power noise (b) reflected in the pixel signals of the first pixel pair PX11, the third pixel pair PX13, the ninth pixel pair PX31 and the eleventh pixel pair PX33 are removed or offset.

[0078] Figures 9 to 111 is a diagram showing the operation of the image sensor 100 according to an embodiment of the present disclosure according to the second readout method. The second readout method refers to a method of sequentially reading out a reset signal R1 and a data signal S1 of a pixel included in a pixel pair as a pixel signal, and then reading out a summed data signal S2 of the pixel included in the pixel pair as a pixel signal (i.e., R1->S1->S2).

[0079] Fig. 9 is a timing diagram showing an operation of first reading out the pixel signal of the left pixel of the pixel pair according to the second readout method. Fig. 9 2 is a timing chart representatively showing a readout operation related to the first pixel pair PX11 .

[0080] Reference Fig. 9 During the second single readout time, the first pixel pair PX11 may output a reset signal of the left pixel included in the first pixel pair PX11 as the first pixel signal VPX1 at a first time point t1, output a data signal of the left pixel as the first pixel signal VPX1 at a second time point t2 after the first time point t1, and output a summed data signal of the data signals of the left pixel and the right pixel included in the first pixel pair PX11 as the first pixel signal VPX1 at a third time point t3 after the second time point t2.

[0081] Fig.10 is a timing diagram showing an operation of first reading out the pixel signal of the right pixel of the pixel pair according to the second readout method. Fig.10 2 is a timing chart representatively showing a readout operation related to the first pixel pair PX11 .

[0082] Reference Fig.10 The first pixel pair PX11 may output a reset signal of the right pixel included in the first pixel pair PX11 as the first pixel signal VPX1 at a first time point t1, output a data signal of the right pixel as the first pixel signal VPX1 at a second time point t2 after the first time point t1, and output a summed data signal of the data signals of the right pixel and the left pixel included in the first pixel pair PX11 as the first pixel signal VPX1 at a third time point t3 after the second time point t2.

[0083] Fig.11 2 is a diagram showing a readout order according to the second readout method. Hereinafter, operations related to the first pixel pair PX11, the third pixel pair PX13, the ninth pixel pair PX31, and the eleventh pixel pair PX33 having the same color filter (eg, red color filter) are representatively described.

[0084] Reference Fig.11, during the first single readout time allocated to the first row ROW1, the first pixel pair PX11 arranged in the first row ROW1 may generate pixel signals according to the first order. For example, the first pixel pair PX11 may read out (1) a first pixel signal VPX1 corresponding to a left pixel, and then read out (2) a summed pixel signal corresponding to the left pixel and the right pixel as the first pixel signal VPX1. In this case, the first power noise (a) may be reflected in the first pixel signal VPX1 corresponding to the left pixel that is read out first (1), and the second power noise (b) may be reflected in the first pixel signal VPX1 corresponding to the left pixel and the right pixel that is read out subsequently (2).

[0085] In contrast, during the first single readout time, the third pixel pair PX13 arranged in the first row ROW1 may generate pixel signals according to the second order. For example, the third pixel pair PX13 may read out (1) a third pixel signal VPX3 corresponding to the right pixel, and then read out (2) a summed pixel signal corresponding to the left pixel and the right pixel as the third pixel signal VPX3. In this case, the first power noise (a) may be reflected in the third pixel signal VPX3 corresponding to the right pixel that is read out first (1), and the second power noise (b) may be reflected in the third pixel signal VPX3 corresponding to the left pixel and the right pixel that is read out subsequently (2).

[0086] During the third single readout time allocated to the third row ROW3, ​​the ninth pixel pair PX31 arranged in the third row ROW3 may generate pixel signals according to the second order. For example, the ninth pixel pair PX31 may read out (5) the first pixel signal VPX1 corresponding to the right pixel, and then read out (6) the summed pixel signal corresponding to the left pixel and the right pixel as the first pixel signal VPX1. In this case, the first power noise (a) may be reflected in the first pixel signal VPX1 corresponding to the right pixel that is read out first (5), and the second power noise (b) may be reflected in the first pixel signal VPX1 corresponding to the left pixel and the right pixel that is read out later (6).

[0087] In contrast, during the third single readout time, the 11th pixel pair PX33 arranged in the third row ROW3 may generate pixel signals according to the first order. For example, the 11th pixel pair PX33 may read out (5) the third pixel signal VPX3 corresponding to the left pixel, and then read out (6) the summed pixel signal corresponding to the right pixel and the left pixel as the third pixel signal VPX3. In this case, the first power noise (a) may be reflected in the third pixel signal VPX3 corresponding to the left pixel that is first read out (5), and the second power noise (b) may be reflected in the third pixel signal VPX3 corresponding to the left pixel and the right pixel that is subsequently read out (6).

[0088] The image processor 200 may calculate a third average value AVR3 based on the first pixel signal VPX1 corresponding to the left pixel of the first pixel pair PX11, the third pixel signal VPX3 corresponding to the left pixel and the right pixel of the third pixel pair PX13, the first pixel signal VPX1 corresponding to the left pixel and the right pixel of the ninth pixel pair PX31, and the third pixel signal VPX3 corresponding to the left pixel of the 11th pixel pair PX33. For example, the third average value AVR3 may be calculated as shown in the following Formula 4.

[0089] [Formula 4]

[0090] AVR3=(L1+L3+L9+L11) / 4+{2a+2(ba)} / 4=(L1+L3+L9+L11) / 4+2b / 4

[0091] Herein, "L1" may refer to the pixel value of the first pixel signal VPX1 corresponding to the left pixel of the first pixel pair PX11. "L3" may refer to the pixel value of the third pixel signal VPX3 corresponding to the left pixel of the third pixel pair PX13. "L3" may be obtained by subtracting the pixel value R3 of the pixel signal corresponding to the right pixel of the third pixel pair PX13 from the pixel value S3 of the summed pixel signal corresponding to the third pixel pair PX13 (L3=S3-R3). "L9" may refer to the pixel value of the first pixel signal VPX1 corresponding to the left pixel of the ninth pixel pair PX31. "L9" may be obtained by subtracting the pixel value R9 of the pixel signal corresponding to the right pixel of the ninth pixel pair PX31 from the pixel value S9 of the summed pixel signal corresponding to the ninth pixel pair PX31 (L9=S9-R9). "L11" may refer to the pixel value of the third pixel signal VPX3 corresponding to the left pixel of the 11th pixel pair PX33. "2a" may be a value obtained by adding the first power noise (a) reflected in the first pixel signal VPX1 corresponding to the left pixel of the first pixel pair PX11 and the first power noise (a) reflected in the third pixel signal VPX3 corresponding to the left pixel of the 11th pixel pair PX33. "2(ba)" may be a value obtained by adding the third power noise (ba) reflected in the third pixel signal VPX3 corresponding to the left pixel of the third pixel pair PX13 and the fourth power noise (ba) reflected in the first pixel signal VPX1 corresponding to the left pixel of the ninth pixel pair PX31. The third power noise (ba) may be obtained by subtracting the first power noise (a) reflected in the third pixel signal VPX3 corresponding to the right pixel of the third pixel pair PX13 from the second power noise (b) reflected in the third pixel signal VPX3 corresponding to the third pixel pair PX13. The fourth power noise (ba) may be obtained by subtracting the first power noise (a) reflected in the first pixel signal VPX1 corresponding to the right pixel of the ninth pixel pair PX31 from the second power noise (b) reflected in the first pixel signal VPX1 corresponding to the ninth pixel pair PX31.

[0092] The image processor 200 may calculate a fourth average value AVR4 based on the first pixel signal VPX1 corresponding to the right pixel of the first pixel pair PX11, the third pixel signal VPX3 corresponding to the right pixel of the third pixel pair PX13, the first pixel signal VPX1 corresponding to the right pixel of the ninth pixel pair PX31, and the third pixel signal VPX3 corresponding to the right pixel of the eleventh pixel pair PX33. For example, the fourth average value AVR4 may be calculated as shown in the following Formula 5.

[0093] [Formula 5]

[0094] AVR4=(R1+R3+R9+R11) / 4+{2a+2(ba)} / 4=(R1+R3+R9+R11) / 4+2b / 4

[0095] Herein, "R1" may refer to the pixel value of the first pixel signal VPX1 corresponding to the right pixel of the first pixel pair PX11. "R1" may be obtained by subtracting the pixel value L1 of the pixel signal corresponding to the left pixel of the first pixel pair PX11 from the pixel value S1 of the summed pixel signal corresponding to the first pixel pair PX11 (R1=S1-L1). "R3" may refer to the pixel value of the third pixel signal VPX3 corresponding to the right pixel of the third pixel pair PX13. "R9" may refer to the pixel value of the first pixel signal VPX1 corresponding to the right pixel of the ninth pixel pair PX31. "R11" may refer to the pixel value of the third pixel signal VPX3 corresponding to the right pixel of the eleventh pixel pair PX33. "R11" may be obtained by subtracting the pixel value L11 of the pixel signal corresponding to the left pixel of the eleventh pixel pair PX33 from the pixel value S11 of the summed pixel signal corresponding to the eleventh pixel pair PX33 (R11=S11-L11). "2a" may be a value obtained by adding the first power noise (a) reflected in the third pixel signal VPX3 corresponding to the right pixel of the third pixel pair PX13 and the first power noise (a) reflected in the first pixel signal VPX1 corresponding to the right pixel of the ninth pixel pair PX31. "2(ba)" may be a value obtained by adding the fifth power noise (ba) reflected in the first pixel signal VPX1 corresponding to the right pixel of the first pixel pair PX11 and the sixth power noise (ba) reflected in the third pixel signal VPX3 corresponding to the eleventh pixel pair PX33. The fifth power noise (ba) may be obtained by subtracting the first power noise (a) reflected in the first pixel signal VPX1 corresponding to the left pixel of the first pixel pair PX11 from the second power noise (b) reflected in the first pixel signal VPX1 corresponding to the first pixel pair PX11. The sixth power noise (ba) may be obtained by subtracting the first power noise (a) reflected in the third pixel signal VPX3 corresponding to the left pixel of the 11th pixel pair PX33 from the second power noise (b) reflected in the third pixel signal VPX3 corresponding to the 11th pixel pair PX33.

[0096] The image processor 200 may generate the image data PDAF by performing an average calculation operation and a subtraction operation on the pixel signals DPX of each region. For example, the image processor 200 may generate the first image data PDAF1 corresponding to the difference between the third average value AVR3 and the fourth average value AVR4 in the 4×4 region including the first pixel pair PX11 to the 16th pixel pair PX44. The first image data PDAF1 may be calculated as shown in the following formula 6.

[0097] [Formula 6]

[0098] PDAF1={(L1+L3+L9+L11) / 4+2b / 4}-{(R1+R3+R9+R11) / 4+2b / 4}

[0099] =(L1+L3+L9+L11) / 4-(R1+R3+R9+R11) / 4

[0100] In the same manner as the first readout method, the first image data PDAF1 generated by the second readout method can be image data for PDAF having excellent quality as the first power noise (a) and the second power noise (b) reflected in the pixel signals of the first pixel pair PX11, the third pixel pair PX13, the ninth pixel pair PX31 and the eleventh pixel pair PX33 are removed or offset.

[0101] According to an embodiment of the present disclosure, the readout order of adjacent pixel pairs may be controlled differently, which makes it possible to remove or cancel noise that is reflected differently depending on a readout time point.

[0102] According to an embodiment of the present disclosure, noise reflected in a pixel signal can be suppressed, which makes it possible to improve the quality of an image (eg, image data used for PDAF).

[0103] Although the present disclosure is shown and described with respect to specific embodiments, the disclosed embodiments are provided for the purpose of description and are not intended to be limiting. In addition, it should be noted that, as will be appreciated by those skilled in the art in view of the present disclosure, the present disclosure may be implemented in various ways by substitutions, changes and modifications falling within the scope of the following claims. In addition, these embodiments may be combined to form additional embodiments.

[0104] CROSS-REFERENCE TO RELATED APPLICATIONS

[0105] This application claims priority to Korean Patent Application No. 10-2023-0114641, filed on August 30, 2023, the disclosure of which is incorporated herein by reference in its entirety.

Claims

1. An image sensor, comprising: a first pixel pair that is arranged in a first row and generates a first pixel signal and a second pixel signal according to a first order during a first single readout time; a second pixel pair that is arranged in the first row and generates a third pixel signal and a fourth pixel signal according to a second order different from the first order during the first single readout time; as well as A row controller controls the first pixel pairs according to the first sequence and controls the second pixel pairs according to the second sequence during the first single readout time.

2. The image sensor according to claim 1, wherein: Pixels included in the first pixel pair and pixels included in the second pixel pair have the same color filter.

3. The image sensor according to claim 1, in, The first pixel pair comprises: a first floating diffusion node; a first transfer transistor connected to the first floating diffusion node; a first light receiving element connected between the first transfer transistor and a first voltage terminal and disposed on the left side of the first pixel pair; a second pass transistor connected to the first floating diffusion node; and a second light receiving element connected between the second transfer transistor and the first voltage terminal and provided on the right side of the first pixel pair, and Wherein, the second pixel pair comprises: a second floating diffusion node; a third transfer transistor connected to the second floating diffusion node; a third light receiving element connected between the third transfer transistor and the first voltage terminal and disposed on the left side of the second pixel pair; a fourth pass transistor connected to the second floating diffusion node; and A fourth light receiving element is connected between the fourth transfer transistor and the first voltage terminal and is provided on the right side of the second pixel pair.

4. The image sensor according to claim 3, further comprising a first signal line and a second signal line connected to the row controller, in, The first signal line is connected to a gate terminal of the first transfer transistor and a gate terminal of the fourth transfer transistor; and The second signal line is connected to a gate terminal of the second transfer transistor and a gate terminal of the third transfer transistor.

5. The image sensor according to claim 3, further comprising a first signal line, a second signal line, a third signal line, and a fourth signal line connected to the row controller, in, The first signal line is connected to a gate terminal of the first transfer transistor; the second signal line is connected to a gate terminal of the second transfer transistor; The third signal line is connected to the gate terminal of the third transfer transistor; and The fourth signal line is connected to a gate terminal of the fourth transfer transistor.

6. The image sensor according to claim 1, further comprising: a third pixel pair that is arranged in a second row and generates a fifth pixel signal and a sixth pixel signal according to the second order during a second single readout time; as well as a fourth pixel pair that is arranged in the second row and generates a seventh pixel signal and an eighth pixel signal according to the first sequence during the second single readout time, wherein the row controller controls the third pixel pair according to the second sequence and controls the fourth pixel pair according to the first sequence during the second single readout time.

7. The image sensor according to claim 6, in, The first pixel pair and the third pixel pair are connected to a first column line, and the first pixel signal and the second pixel signal as well as the fifth pixel signal and the sixth pixel signal are output through the first column line, and The second pixel pair and the fourth pixel pair are connected to a second column line, and the third pixel signal and the fourth pixel signal as well as the seventh pixel signal and the eighth pixel signal are output through the second column line.

8. The image sensor according to claim 6, wherein: Pixels included in the first pixel pair, pixels included in the second pixel pair, pixels included in the third pixel pair, and pixels included in the fourth pixel pair have the same color filter.

9. An image processing system, comprising: An image sensor including a plurality of pixel pairs arranged at intersections of a plurality of rows and a plurality of columns, and differently controlling a readout order of pixel pairs arranged in the same row among the plurality of pixel pairs and differently controlling a readout order of pixel pairs arranged in the same column among the plurality of pixel pairs; as well as An image processor generates image data related to phase detection auto focus (PDAF) based on pixel signals generated by the image sensor.

10. The image processing system according to claim 9, wherein: The image sensor comprises: a first pixel pair that is arranged in a first row and generates a first pixel signal and a second pixel signal according to a first order during a first single readout time; a second pixel pair that is arranged in the first row and generates third and fourth pixel signals according to a second order different from the first order during the first single readout time; and A row controller controls the first pixel pairs according to the first sequence and controls the second pixel pairs according to the second sequence during the first single readout time.

11. The image processing system according to claim 10, wherein: Pixels included in the first pixel pair and pixels included in the second pixel pair have the same color filter.

12. The image processing system according to claim 10, in, The first pixel pair comprises: a first floating diffusion node; a first transfer transistor connected to the first floating diffusion node; a first light receiving element connected between the first transfer transistor and a first voltage terminal and disposed on the left side of the first pixel pair; a second pass transistor connected to the first floating diffusion node; and a second light receiving element connected between the second transfer transistor and the first voltage terminal and provided on the right side of the first pixel pair, and Wherein, the second pixel pair comprises: a second floating diffusion node; a third transfer transistor connected to the second floating diffusion node; a third light receiving element connected between the third transfer transistor and the first voltage terminal and provided on the left side of the second pixel pair; a fourth pass transistor connected to the second floating diffusion node; and A fourth light receiving element is connected between the fourth transfer transistor and the first voltage terminal and is provided on the right side of the second pixel pair.

13. The image processing system according to claim 12, in, The image sensor further includes a first signal line and a second signal line connected to the row controller, wherein the first signal line is connected to a gate terminal of the first transfer transistor and a gate terminal of the fourth transfer transistor, and The second signal line is connected to a gate terminal of the second transfer transistor and a gate terminal of the third transfer transistor.

14. The image processing system according to claim 12, in, The image sensor further includes a first signal line, a second signal line, a third signal line, and a fourth signal line connected to the row controller, wherein the first signal line is connected to a gate terminal of the first transfer transistor, wherein the second signal line is connected to a gate terminal of the second transfer transistor, wherein the third signal line is connected to the gate terminal of the third transfer transistor, and Wherein, the fourth signal line is connected to the gate terminal of the fourth transfer transistor.

15. The image processing system according to claim 10, in, The image sensor further comprises: a third pixel pair that is arranged in a second row and generates a fifth pixel signal and a sixth pixel signal according to the second order during a second single readout time; and a fourth pixel pair that is arranged in the second row and generates a seventh pixel signal and an eighth pixel signal according to the first sequence during the second single readout time, wherein the row controller controls the third pixel pair according to the second sequence and controls the fourth pixel pair according to the first sequence during the second single readout time.

16. The image processing system according to claim 15, in, The first pixel pair and the third pixel pair are connected to a first column line, and the first pixel signal and the second pixel signal as well as the fifth pixel signal and the sixth pixel signal are output through the first column line, and The second pixel pair and the fourth pixel pair are connected to a second column line, and the third pixel signal and the fourth pixel signal as well as the seventh pixel signal and the eighth pixel signal are output through the second column line.

17. The image processing system according to claim 16, wherein: Pixels included in the first pixel pair, pixels included in the second pixel pair, pixels included in the third pixel pair, and pixels included in the fourth pixel pair have the same color filter.

18. The image processing system according to claim 9, wherein: The image processor performs an average calculation operation and a subtraction operation on the pixel signals of each area to generate the image data.

19. A method of operating an image sensor, the method comprising the steps of: generating a first pixel signal and a second pixel signal by a first pixel pair arranged in a first row according to a first order during a first single readout time; as well as generating third and fourth pixel signals by second pixel pairs arranged in the first row according to a second order different from the first order during the first single readout time, Wherein, the first pixel pair and the second pixel pair are connected to adjacent columns.

20. The method according to claim 19, further comprising the steps of: generating a fifth pixel signal and a sixth pixel signal by a third pixel pair arranged in a second row according to the second sequence during a second single readout time; as well as generating seventh and eighth pixel signals by fourth pixel pairs arranged in the second row according to the first sequence during the second single readout time, Wherein, the third pixel pair and the fourth pixel pair are connected to adjacent columns.

Images