IGBT device

Abstract

The invention discloses an IGBT (Insulated Gate Bipolar Translator) device, which comprises a drift region, a well region, a collector region, an emitter region and a plurality of trench gates which are arranged in parallel and longitudinally penetrate through the well region, the arrangement direction of the trench gates is an X direction, and the extension direction of the trench gates is a Y direction. A first conductive type heavily-doped first doped region and a second conductive type heavily-doped second doped region are formed in the surface region of the drift region at the bottom of the well region, both the first doped region and the second doped region extend along the X direction, and the first doped region and the second doped region are alternately arranged along the Y direction to form a first alternate arrangement structure; the first doped region serves as a carrier storage layer, and the second doped region serves as a charge balance layer of the first doped region. According to the invention, the on-state voltage drop of the device can be reduced, so that the on-state loss of the device is reduced, and the performance of the device is not affected.

Description

Technical Field

[0001] The present invention relates to a semiconductor power device, in particular to an insulated gate bipolar transistor (IGBT) device. Background Art

[0002] Compared with the planar gate structure, the trench gate technology eliminates the junction gate field-effect transistor (JEFT) area, has the characteristics of compact primitives and small on-state voltage drop, and can achieve a higher current density. Therefore, it is widely used in the field of electric vehicle chips.

[0003] The carrier concentration of existing traditional IGBT chips decreases from the back collector to the front emitter. The low carrier concentration of the front emitter limits the reduction of the on-state voltage drop. Therefore, to achieve the improvement of the current density of the IGBT chip and the reduction of power loss, it is also necessary to combine the carrier storage technology. By setting a carrier storage layer (CS layer) on the top of the drift region, the carrier distribution in the IGBT chip is closer to the optimal state.

[0004] like Figure 1 FIG. 1 is a schematic diagram of a cross-sectional structure of an existing IGBT device. Taking an N-type device as an example, the existing IGBT device includes:

[0005] N-type doped drift region 103 .

[0006] A P-type doped well region 104 is formed in the surface region of the drift region 103 .

[0007] An N-type heavily doped field stop layer 102 and a P-type heavily doped collector region 101 are sequentially formed on the back side of the drift region 103 .

[0008] A plurality of trench gates 105 are arranged in parallel, and each trench gate 105 vertically passes through the well region 104 .

[0009] Each trench gate 105 includes: a gate dielectric layer 106 and a gate conductive material layer 107, wherein the gate dielectric layer 106 is formed on the inner surface of the gate trench, and the gate conductive material layer 107 is filled in the gate trench formed in the gate dielectric layer 106. Generally, the material of the gate dielectric layer 106 includes an oxide layer; the material of the gate conductive material layer 107 includes polysilicon.

[0010] An N-type heavily doped emitter region 109 is formed in the surface region of the well region 104 . The emitter region 109 is self-aligned with the side surface of the corresponding trench gate 105 .

[0011] The emitter region 109 is connected to a source electrode composed of a front metal layer 112 through a contact hole 111 that passes through the interlayer film 110 at the top.

[0012] A collector electrode composed of a back metal layer 113 is formed on the back side of the collector region 101 .

[0013] The contact hole 111 at the top of the emitter region 109 also passes through the emitter region 109 and contacts the well region 104 . In order to reduce the contact resistance, a P+ doped well contact region 114 is also formed at the bottom of the contact hole 111 at the top of the emitter region 109 .

[0014] An N+ doped carrier storage layer 108 is formed in the top region of the drift region 103 at the bottom of the well region 104 . Figure 1 The existing IGBT device shown uses refined trench technology to improve the current density of the IGBT chip, and adds a carrier storage layer 108 to prevent holes from entering the P base region, i.e., the well region 104, so as to increase the hole concentration in the drift region 102 near the emitter region, thereby reducing the on-state voltage by at least 10%.

[0015] As the size of the IGBT cell is further reduced, the injection dose of the CS layer, i.e., the carrier storage layer 108, is also increased. However, the increase in the injection dose of the CS layer will lead to the problem of poor testability of the breakdown voltage (BV) and increased turn-off tailing. The problems of poor testability of BV and turn-off tailing limit the increase in the doping concentration of CS, which also limits the improvement of the on-state voltage drop when the size of the IGBT cell is reduced.

[0016] In addition, the emitter region 109 of the existing IGBT is self-aligned and formed in the surface area of ​​the platform area (mesa) between the trench gates 105, that is, the surface area of ​​the mesa area of ​​the planar structure is basically N+ doped, so it is necessary to form a well contact region 114 connected to the well region 104 through a contact hole (CT) injection to collect hole current. However, as the pitch of the IGBT decreases, the pitch is the sum of the width of the trench gate 105 and the width of the platform area between the trench gates 105, and the influence of CT injection on the threshold voltage (VTH) becomes increasingly greater, which will cause the VTH to be offset and unevenly distributed, affecting the in-plane uniformity and being unfavorable for subsequent parallel applications of the product. Summary of the invention

[0017] The technical problem to be solved by the present invention is to provide an IGBT device which can reduce the on-state voltage drop of the device, thereby reducing the on-state loss of the device, while not affecting the performance of the device.

[0018] In order to solve the above technical problems, the IGBT device provided by the present invention comprises:

[0019] A drift region doped with a first conductivity type.

[0020] A well region doped with a second conductivity type is formed in a surface region of the drift region.

[0021] A collector region heavily doped with a second conductivity type is formed on the back side of the drift region.

[0022] A plurality of trench gates are arranged in parallel, each of the trench gates vertically passing through the well region.

[0023] An emitter region heavily doped with a first conductivity type is formed in a surface region of the well region.

[0024] The arrangement direction of the trench gates is the X direction, and the extension direction of the trench gates is the Y direction.

[0025] A first doped region heavily doped with a first conductivity type and a second doped region heavily doped with a second conductivity type are formed in the surface area of ​​the drift region at the bottom of the well region, the first doped region and the second doped region both extend along the X direction, the first doped region and the second doped region are alternately arranged along the Y direction and form a first alternating arrangement structure, the first doped region serves as a carrier storage layer, and the second doped region serves as a charge balance layer of the first doped region, which is used to increase the doping concentration of the first doped region while ensuring that the breakdown voltage remains unchanged and thereby reduce the on-state voltage drop of the device; when turned off, the second doped region forms an extraction path for carriers of the second conductivity type, thereby accelerating the extraction of carriers of the second conductivity type, thereby reducing tail current and reducing turn-off loss.

[0026] A further improvement is that a third doping region heavily doped with the first conductivity type and a fourth doping region heavily doped with the second conductivity type are formed in the surface area of ​​the well region between each of the trench gates, the third doping region and the fourth doping region both extend along the X direction, the third doping region and the fourth doping region are alternately arranged along the Y direction and form a second alternating arrangement structure, the third doping region serves as the emitter region, and the fourth doping region serves as the well contact region.

[0027] A contact hole is formed at the top of each of the second alternatingly arranged structures, and the contact hole extends along the Y direction and is in contact with the third doping region and the fourth doping region at the same time, and the top of the contact hole is connected to the emitter composed of the front metal layer; no second conductive type heavily doped region is formed in the well region at the bottom of the contact hole, and the well region is connected to the contact hole through the fourth doping region, and the fourth doping region is used to ensure that the flow path of the second conductive type carriers is increased without affecting the threshold voltage, and to reduce the contact resistance to reduce the on-state voltage drop.

[0028] A further improvement is that each of the trench gates vertically passes through the first doping region and the second doping region.

[0029] A further improvement is that the bottom surface of the well region contacts the top surface of the first doping region and the top surface of the second doping region.

[0030] A bottom surface of the first doping region and a bottom surface of the second doping region are located above a bottom surface of the trench gate.

[0031] A further improvement is that each of the trench gates comprises: a gate dielectric layer and a gate conductive material layer, the gate dielectric layer is formed on the inner surface of the gate trench, and the gate conductive material layer is filled in the gate trench formed in the gate dielectric layer.

[0032] A further improvement is that the material of the gate dielectric layer includes an oxide layer; and the material of the gate conductive material layer includes polysilicon.

[0033] A further improvement is that a field stop layer heavily doped with the first conductivity type is formed between the bottom surface of the drift region and the top surface of the collector region.

[0034] A further improvement is that the IGBT device is an N-type device, the first conductivity type is N-type, and the second conductivity type is P-type; or the IGBT device is a P-type device, the first conductivity type is P-type, and the second conductivity type is N-type.

[0035] In order to solve the above technical problems, the IGBT device provided by the present invention comprises:

[0036] A drift region doped with a first conductivity type.

[0037] A well region doped with a second conductivity type is formed in a surface region of the drift region.

[0038] A collector region heavily doped with a second conductivity type is formed on the back side of the drift region.

[0039] A plurality of trench gates are arranged in parallel, each of the trench gates vertically passing through the well region.

[0040] The arrangement direction of the trench gates is the X direction, and the extension direction of the trench gates is the Y direction.

[0041] A third doping region heavily doped with the first conductivity type and a fourth doping region heavily doped with the second conductivity type are formed in the surface area of ​​the well region between the trench gates, the third doping region and the fourth doping region both extend along the X direction, the third doping region and the fourth doping region are alternately arranged along the Y direction and form a second alternating arrangement structure, the third doping region serves as an emitter region, and the fourth doping region serves as a well contact region.

[0042] A contact hole is formed at the top of each of the second alternatingly arranged structures, and the contact hole extends along the Y direction and is in contact with the third doping region and the fourth doping region at the same time, and the top of the contact hole is connected to the emitter composed of the front metal layer; no second conductive type heavily doped region is formed in the well region at the bottom of the contact hole, and the well region is connected to the contact hole through the fourth doping region, and the fourth doping region is used to ensure that the flow path of the second conductive type carriers is increased without affecting the threshold voltage, and to reduce the contact resistance to reduce the on-state voltage drop.

[0043] A further improvement is that a carrier storage layer heavily doped with the first conductivity type is formed in a surface area of ​​the drift region at the bottom of the well region.

[0044] A further improvement is that each of the trench gates comprises: a gate dielectric layer and a gate conductive material layer, the gate dielectric layer is formed on the inner surface of the gate trench, and the gate conductive material layer is filled in the gate trench formed in the gate dielectric layer.

[0045] A further improvement is that the material of the gate dielectric layer includes an oxide layer; and the material of the gate conductive material layer includes polysilicon.

[0046] A further improvement is that a field stop layer heavily doped with the first conductivity type is formed between the bottom surface of the drift region and the top surface of the collector region.

[0047] A further improvement is that the IGBT device is an N-type device, the first conductivity type is N-type, and the second conductivity type is P-type; or the IGBT device is a P-type device, the first conductivity type is P-type, and the second conductivity type is N-type.

[0048] Unlike the existing structure in which the carrier storage layer is a continuous structure, in the present invention, the first doping region constituting the carrier storage layer is divided by a second doping region of opposite doping type along the extension direction of the trench gate, i.e., the Y direction. The first doping region and the second doping region are alternately arranged along the Y direction to form a first alternating arrangement structure, so that the second doping region forms a charge balance layer of the first doping region, which can increase the doping concentration of the first doping region while ensuring that the breakdown voltage remains unchanged. The increase in the doping concentration of the first doping region can increase the blocking effect on the second conductive type carriers, i.e., the minority carriers in the drift region, thereby reducing the on-state voltage drop of the device and thus reducing the on-state loss. At the same time, when the device is turned off, the second doping region will form an extraction path for the second conductive type carriers, thereby accelerating the extraction of the second conductive type carriers, thereby reducing the tail current and reducing the turn-off loss. Therefore, the introduction of the first alternating arrangement structure can further increase the doping concentration of the carrier storage layer, thereby reducing the on-state voltage drop of the device and thereby reducing the on-state loss of the device, while not affecting the breakdown voltage of the device and reducing the tail current and turn-off loss, which meets the demand for the continuous reduction of the original cell size of the IGBT.

[0049] The present invention can also replace the continuously distributed emitter region in the existing structure with a second alternating arrangement structure formed by alternating arrangement of the third doping region and the fourth doping region along the Y direction, the third doping region serves as the emitter region, and the fourth doping region of the opposite doping type serves as the well contact region. Since the depth of the fourth doping region is the same as that of the emitter region, i.e., the third doping, and is not located at the bottom of the contact hole, the fourth doping region is farther away from the channel region on the side of the trench gate. Compared with the well contact region at the bottom of the contact hole in the existing structure, the fourth doping region of the present invention has a smaller influence on the channel region, so increasing the doping concentration of the fourth doping region will not have an adverse effect on the threshold voltage, such as causing the threshold voltage to shift and uneven distribution. Therefore, the present invention can increase the doping concentration of the fourth doping region, thereby increasing the flow path of the second conductive type carriers and increasing the collection effect of the second conductive type carriers. The increase in the doping concentration of the fourth doping region can also reduce the contact resistance of the contact hole, thereby effectively reducing the on-state voltage drop, and at the same time improve the stability and in-plane uniformity of the threshold voltage.

[0050] The present invention combines the first alternating arrangement structure and the second alternating arrangement structure, which can further reduce the on-state voltage drop of the device and thus further reduce the on-state loss, while not affecting the performance of the device, and is conducive to further reducing the size of the device unit cell. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] The present invention is further described in detail below with reference to the accompanying drawings and specific embodiments:

[0052] Figure 1 It is a schematic diagram of the cross-sectional structure of an existing IGBT device;

[0053] Figure 2 is a schematic cross-sectional structure diagram of an IGBT device according to a first embodiment of the present invention;

[0054] Figure 3 is along Figure 2 A schematic diagram of the cross-sectional structure at the middle dotted line AA;

[0055] Figure 4 It is a schematic diagram of the top view structure of the IGBT device according to the second embodiment of the present invention. DETAILED DESCRIPTION

[0056] like Figure 2 , which is a schematic cross-sectional structure diagram of an IGBT device according to a first embodiment of the present invention; Figure 3 is along Figure 2 A schematic cross-sectional structure diagram of the device at the dotted line AA; the IGBT device of the embodiment of the present invention comprises:

[0057] A drift region 203 doped with a first conductivity type.

[0058] A well region 204 doped with the second conductivity type is formed in the surface region of the drift region 203 .

[0059] A collector region 201 heavily doped with the second conductivity type is formed on the back side of the drift region 203 .

[0060] A plurality of trench gates 205 are arranged in parallel, and each trench gate 205 vertically passes through the well region 204 .

[0061] An emitter region 209 a heavily doped with the first conductivity type is formed in the surface region of the well region 204 .

[0062] The arrangement direction of the trench gates 205 is the X direction, and the extension direction of the trench gates 205 is the Y direction. Figure 2 The coordinate systems of the X-axis, Y-axis, and Z-axis are also shown. Figure 2 The corresponding section is the XZ plane. Figure 3 The corresponding section is the YZ plane.

[0063] like Figure 3As shown, a first doped region 208a heavily doped with the first conductivity type and a second doped region 208b heavily doped with the second conductivity type are formed in the surface area of ​​the drift region 203 at the bottom of the well region 204. The first doped region 208a and the second doped region 208b both extend along the X direction. The first doped region 208a and the second doped region 208b are alternately arranged along the Y direction to form a first alternating arrangement structure. The first doped region 208a serves as a carrier storage layer, and the second doped region 208b serves as a charge balance layer of the first doped region 208a, which is used to increase the doping concentration of the first doped region 208a while ensuring that the breakdown voltage remains unchanged and thereby reduce the on-state voltage drop of the device; when turned off, the second doped region 208b forms an extraction path for carriers of the second conductivity type, thereby accelerating the extraction of carriers of the second conductivity type, thereby reducing the tail current and reducing the turn-off loss. Figure 3 In the embodiment, the top region 203 a of the drift region 203 at the bottom of the first alternating structure is located between the trench gates 205 .

[0064] In the first embodiment of the present invention, each trench gate 205 vertically passes through the first doping region 208 a and the second doping region 208 b .

[0065] A bottom surface of the well region 204 contacts a top surface of the first doping region 208 a and a top surface of the second doping region 208 b .

[0066] The bottom surface of the first doping region 208 a and the bottom surface of the second doping region 208 b are located above the bottom surface of the trench gate 205 .

[0067] In other embodiments, each trench gate 205 does not completely vertically pass through the first doping region 208a and the second doping region 208b. In this case, the bottom surface of the first doping region 208a and the bottom surface of the second doping region 208b are located below the bottom surface of the trench gate 205. In the X direction, the first doping region 208a and the second doping region 208b will also extend to the bottom of the trench gate 205. The first doping regions 208a corresponding to the two sides of each trench gate 205 will be connected together, and the second doping regions 208b corresponding to the two sides of each trench gate 205 will be connected together.

[0068] Each trench gate 205 includes a gate dielectric layer 206 and a gate conductive material layer 207 . The gate dielectric layer 206 is formed on the inner surface of the gate trench, and the gate conductive material layer 207 is filled in the gate trench formed in the gate dielectric layer 206 .

[0069] In some embodiments, the material of the gate dielectric layer 206 includes an oxide layer; and the material of the gate conductive material layer 207 includes polysilicon.

[0070] A field stop layer 202 heavily doped with the first conductivity type is further formed between the bottom surface of the drift region 203 and the top surface of the collector region 201 .

[0071] The emitter region 209a is connected to an emitter electrode composed of a front metal layer 212 through a contact hole 211 that passes through the interlayer film 210 at the top.

[0072] A collector electrode composed of a back metal layer 213 is formed on the back side of the collector region 201 .

[0073] In the first embodiment of the present invention, the IGBT device is an N-type device, the first conductivity type is N-type, and the second conductivity type is P-type. In other embodiments, the IGBT device can also be a P-type device, the first conductivity type is P-type, and the second conductivity type is N-type.

[0074] Unlike the existing structure in which the carrier storage layer is a continuous structure, in the first embodiment of the present invention, the first doping region 208a constituting the carrier storage layer is divided by a second doping region 208b of opposite doping type along the extension direction of the trench gate 205, i.e., the Y direction. The first doping region 208a and the second doping region 208b are alternately arranged along the Y direction to form a first alternating arrangement structure, so that the second doping region 208b forms a charge balance layer of the first doping region 208a, which can increase the doping concentration of the first doping region 208a while ensuring that the breakdown voltage remains unchanged. The increase in the doping concentration of the first doping region 208a can increase the blocking effect on the second conductive type carriers, i.e., the minority carriers in the drift region 203, thereby reducing the on-state voltage drop of the device and thus reducing the on-state loss. At the same time, when the device is turned off, the second doping region 208b will form an extraction path for the second conductive type carriers, thereby accelerating the extraction of the second conductive type carriers, thereby reducing the tail current and reducing the turn-off loss. Therefore, the introduction of the first alternating arrangement structure can further increase the doping concentration of the carrier storage layer, thereby reducing the on-state voltage drop of the device and thereby reducing the on-state loss of the device, while not affecting the breakdown voltage of the device and reducing the tail current and turn-off loss, which meets the demand for the continuous reduction of the original cell size of the IGBT.

[0075] In the first embodiment of the present invention, after the CS layer (layer), i.e., the first doping region 208a, is injected, a P+ (P plus, PP) layer (layer), i.e., the second doping region 208b, is added. The injected ions are boron and the injection energy is MeV. Under high-energy injection, a P+ layer can be formed at the same depth as the CS layer. In this way, the P+ layer will have a depletion effect on the CS region, forming a charge balance structure similar to that of the SJ-IGBT. This can effectively increase the injection dose of the CS layer and achieve lower on-state loss. At the same time, when the device is turned off, P+ can accelerate the extraction of hole current, reduce the size of the tail current, and reduce the turn off loss.

[0076] like Figure 4 FIG. 2 is a schematic diagram of a top view of an IGBT device according to a second embodiment of the present invention. Figure 4 Please also refer to the cross-sectional structure at the dotted line BB in Figure 2 As shown, the IGBT device of the second embodiment of the present invention includes:

[0077] A drift region 203 doped with a first conductivity type.

[0078] A well region 204 doped with the second conductivity type is formed in the surface region of the drift region 203 .

[0079] A collector region 201 heavily doped with the second conductivity type is formed on the back side of the drift region 203 .

[0080] A plurality of trench gates 205 are arranged in parallel, and each trench gate 205 vertically passes through the well region 204 .

[0081] The arrangement direction of the trench gates 205 is the X direction, and the extension direction of the trench gates 205 is the Y direction.

[0082] like Figure 4 As shown, a third doping region 209a heavily doped with the first conductivity type and a fourth doping region 209b heavily doped with the second conductivity type are formed in the surface area of ​​the well region 204 between each trench gate 205, the third doping region 209a and the fourth doping region 209b both extend along the X direction, the third doping region 209a and the fourth doping region 209b are alternately arranged along the Y direction and form a second alternating arrangement structure, the third doping region 209a serves as an emitter region 209a, and the third doping region and the emitter region are both indicated by mark 209a; the fourth doping region 209b serves as a well contact region.

[0083] A contact hole 211 is formed at the top of each second alternating arrangement structure. The contact hole 211 extends along the Y direction and contacts the third doping region 209a and the fourth doping region 209b at the same time. The top of the contact hole 211 is connected to the emitter composed of the front metal layer 212; the third doping region 209a is connected to the emitter through the contact hole 211 that passes through the interlayer film 210 at the top.

[0084] No second conductive type heavily doped region is formed in the well region 204 at the bottom of the contact hole 211. The well region 204 is connected to the contact hole 211 through the fourth doped region 209b. The fourth doped region 209b is used to ensure that the flow path of the second conductive type carriers is increased without affecting the threshold voltage and to reduce the contact resistance to reduce the on-state voltage drop.

[0085] A carrier storage layer 208 a heavily doped with the first conductivity type is formed in the surface region of the drift region 203 at the bottom of the well region 204 .

[0086] Each trench gate 205 includes a gate dielectric layer 206 and a gate conductive material layer 207 . The gate dielectric layer 206 is formed on the inner surface of the gate trench, and the gate conductive material layer 207 is filled in the gate trench formed in the gate dielectric layer 206 .

[0087] In some embodiments, the material of the gate dielectric layer 206 includes an oxide layer; and the material of the gate conductive material layer 207 includes polysilicon.

[0088] A field stop layer 202 heavily doped with the first conductivity type is further formed between the bottom surface of the drift region 203 and the top surface of the collector region 201 .

[0089] A collector electrode composed of a back metal layer 213 is formed on the back side of the collector region 201 .

[0090] In the second embodiment of the present invention, the IGBT device is an N-type device, the first conductivity type is N-type, and the second conductivity type is P-type. In other embodiments, the IGBT device can also be a P-type device, the first conductivity type is P-type, and the second conductivity type is N-type.

[0091] In the second embodiment of the present invention, the continuously distributed emitter region 209a in the existing structure is replaced by a second alternating arrangement structure formed by alternating arrangement of the third doping region 209a and the fourth doping region 209b along the Y direction. The third doping region 209a serves as the emitter region 209a, and the fourth doping region 209b of opposite doping type serves as the well contact region. Since the depth of the fourth doping region 209b is the same as that of the emitter region 209a, i.e., the third doping, and is not located at the bottom of the contact hole 211, the fourth doping region 209b is farther away from the channel region on the side of the trench gate 205. Compared with the well contact region at the bottom of the contact hole 211 in the existing structure, The influence of the fourth doping region 209b of the second embodiment of the present invention on the channel region becomes smaller, so increasing the doping concentration of the fourth doping region 209b will not have an adverse effect on the threshold voltage, such as causing threshold voltage shift and uneven distribution. Therefore, the second embodiment of the present invention can increase the doping concentration of the fourth doping region 209b, thereby increasing the flow path of the second conductive type carriers and increasing the collection effect of the second conductive type carriers. The increase in the doping concentration of the fourth doping region 209b can also reduce the contact resistance of the contact hole 211, thereby effectively reducing the on-state voltage drop, and at the same time improving the stability and in-plane uniformity of the threshold voltage.

[0092] In the second embodiment of the present invention, after the injection of the well region 204, an additional PP layer, i.e., the injection of the fourth doping region 209b, is added. The injected ions are boron, and the injection energy is 80keV to 150keV. Under the injection of lower energy, the P+ / N+ regions alternately distributed in the mesa region are realized, and the formation of the P+ region effectively increases the flow path for collecting hole current; the purpose of collecting hole current is achieved without CT injection, thereby avoiding the influence of CT injection on VTH, improving VTH stability and in-plane uniformity, while reducing CT contact resistance, and effectively reducing the on-state voltage drop.

[0093] The third embodiment of the present invention is an IGBT device:

[0094] By combining the first alternating arrangement structure in the first embodiment of the present invention and the second alternating arrangement structure in the second embodiment of the present invention, an IGBT device in the third embodiment of the present invention having both the first alternating arrangement structure and the second alternating arrangement structure can be obtained. In this way, the on-state voltage drop of the device can be further reduced and the on-state loss can be further reduced without affecting the performance of the device, which is conducive to further reducing the size of the device cell.

[0095] In the third embodiment of the present invention, by adding the PP layer, i.e., the second doping region 208b and the fourth doping region 209b, the on-state loss can be effectively reduced. First, the second doping region 208b pinches off the CS layer, i.e., the first doping region 208a, to achieve a higher concentration of the CS layer, thereby reducing the on-state voltage drop of the IGBT. At the same time, when the IGBT is turned off, the extraction of carriers can be accelerated, the tail current can be reduced, and a better on-state saturation voltage drop (VCESAT) / turn-off loss (Eoff) compromise can be achieved. Second, the contact resistance of the body region, i.e., the well region 204, can be reduced by the fourth doping region 209b, thereby reducing the on-state voltage drop.

[0096] The present invention has been described in detail above through specific embodiments, but these do not constitute limitations of the present invention. Without departing from the principle of the present invention, those skilled in the art may also make many variations and improvements, which should also be considered as the protection scope of the present invention.

Claims

1. An IGBT device, characterized in that: include: a drift region doped with a first conductivity type; A well region doped with a second conductivity type is formed in a surface region of the drift region; A collector region heavily doped with a second conductivity type is formed on the back side of the drift region; A plurality of trench gates arranged in parallel, each of the trench gates vertically passing through the well region; An emitter region heavily doped with a first conductivity type is formed in a surface region of the well region; The arrangement direction of the trench gate is the X direction, and the extension direction of the trench gate is the Y direction; A first doped region heavily doped with a first conductivity type and a second doped region heavily doped with a second conductivity type are formed in the surface area of ​​the drift region at the bottom of the well region, the first doped region and the second doped region both extend along the X direction, the first doped region and the second doped region are alternately arranged along the Y direction and form a first alternating arrangement structure, the first doped region serves as a carrier storage layer, and the second doped region serves as a charge balance layer of the first doped region, which is used to increase the doping concentration of the first doped region while ensuring that the breakdown voltage remains unchanged and thereby reduce the on-state voltage drop of the device; when turned off, the second doped region forms an extraction path for carriers of the second conductivity type, thereby accelerating the extraction of carriers of the second conductivity type, thereby reducing tail current and reducing turn-off loss.

2. The IGBT device according to claim 1, characterized in that: A third doping region heavily doped with the first conductivity type and a fourth doping region heavily doped with the second conductivity type are formed in the surface area of ​​the well region between the trench gates, the third doping region and the fourth doping region both extend along the X direction, the third doping region and the fourth doping region are alternately arranged along the Y direction and form a second alternating arrangement structure, the third doping region serves as the emitter region, and the fourth doping region serves as the well contact region; A contact hole is formed at the top of each of the second alternatingly arranged structures, and the contact hole extends along the Y direction and is in contact with the third doping region and the fourth doping region at the same time, and the top of the contact hole is connected to the emitter composed of the front metal layer; no second conductive type heavily doped region is formed in the well region at the bottom of the contact hole, and the well region is connected to the contact hole through the fourth doping region, and the fourth doping region is used to ensure that the flow path of the second conductive type carriers is increased without affecting the threshold voltage, and to reduce the contact resistance to reduce the on-state voltage drop.

3. The IGBT device according to claim 1 or 2, characterized in that: Each of the trench gates vertically passes through the first doping region and the second doping region.

4. The IGBT device according to claim 3, characterized in that: The bottom surface of the well region is in contact with the top surface of the first doped region and the top surface of the second doped region; A bottom surface of the first doping region and a bottom surface of the second doping region are located above a bottom surface of the trench gate.

5. The IGBT device according to claim 3, characterized in that: Each of the trench gates comprises: a gate dielectric layer and a gate conductive material layer, wherein the gate dielectric layer is formed on the inner surface of the gate trench, and the gate conductive material layer is filled in the gate trench formed in the gate dielectric layer.

6. The IGBT device according to claim 5, characterized in that: The material of the gate dielectric layer includes an oxide layer; the material of the gate conductive material layer includes polysilicon.

7. The IGBT device according to claim 1, characterized in that: A field stop layer heavily doped with the first conductivity type is also formed between the bottom surface of the drift region and the top surface of the collector region.

8. The IGBT device according to any one of claims 1 to 8, characterized in that: The IGBT device is an N-type device, the first conductivity type is N-type, and the second conductivity type is P-type; or, the IGBT device is a P-type device, the first conductivity type is P-type, and the second conductivity type is N-type.

9. An IGBT device, characterized in that: include: a drift region doped with a first conductivity type; A well region doped with a second conductivity type is formed in a surface region of the drift region; A collector region heavily doped with a second conductivity type is formed on the back side of the drift region; A plurality of trench gates arranged in parallel, each of the trench gates vertically passing through the well region; The arrangement direction of the trench gate is the X direction, and the extension direction of the trench gate is the Y direction; A third doping region heavily doped with the first conductivity type and a fourth doping region heavily doped with the second conductivity type are formed in the surface area of ​​the well region between the trench gates, the third doping region and the fourth doping region both extend along the X direction, the third doping region and the fourth doping region are alternately arranged along the Y direction and form a second alternating arrangement structure, the third doping region serves as an emitter region, and the fourth doping region serves as a well contact region; A contact hole is formed at the top of each of the second alternatingly arranged structures, and the contact hole extends along the Y direction and is in contact with the third doping region and the fourth doping region at the same time, and the top of the contact hole is connected to the emitter composed of the front metal layer; no second conductive type heavily doped region is formed in the well region at the bottom of the contact hole, and the well region is connected to the contact hole through the fourth doping region, and the fourth doping region is used to ensure that the flow path of the second conductive type carriers is increased without affecting the threshold voltage, and to reduce the contact resistance to reduce the on-state voltage drop.

10. The IGBT device according to claim 9, characterized in that: A carrier storage layer heavily doped with a first conductivity type is formed in a surface region of the drift region at the bottom of the well region.

11. The IGBT device according to claim 9, characterized in that: Each of the trench gates comprises: a gate dielectric layer and a gate conductive material layer, wherein the gate dielectric layer is formed on the inner surface of the gate trench, and the gate conductive material layer is filled in the gate trench formed in the gate dielectric layer.

12. The IGBT device according to claim 11, characterized in that: The material of the gate dielectric layer includes an oxide layer; the material of the gate conductive material layer includes polysilicon.

13. The IGBT device according to claim 9, characterized in that: A field stop layer heavily doped with the first conductivity type is also formed between the bottom surface of the drift region and the top surface of the collector region.

14. The IGBT device according to any one of claims 9 to 13, characterized in that: The IGBT device is an N-type device, the first conductivity type is N-type, and the second conductivity type is P-type; or, the IGBT device is a P-type device, the first conductivity type is P-type, and the second conductivity type is N-type.

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