The invention relates to a semiconductor device with an electrostatic discharge protection structure and a layout structure thereof, the device includes an internal circuit and a GGNMOS, the internalcircuit includes a MOSFET, the semiconductor device further includes an active region, A MOSFET is arrange in that active region, characterized by, GGNMOS is also arrange in that active region, and the MOSFET is arranged on both lateral sides of the GGNMOS in the same active region, The active region comprises a P well, an N-type doped region of the GGNMOS and an N-type doped region of the MOSFETare arranged in the P well, the semiconductor device further comprises a P-type doped region as a substrate, and the P-type doped region is arranged on the outer sides of the MOSFET on both sides. When the electrostatic discharge occurs, if the MOSFET of the internal circuit is turned on, the substrate current is formed, thereby increasing the gate voltage of the intermediate GGNMOS, enabling theGGNMOS to be turned on more easily and improving the ESD capability.