A semiconductor device having an electrostatic discharge protection structure and a layout structure thereof

Abstract

The invention relates to a semiconductor device with an electrostatic discharge protection structure and a layout structure thereof, the device includes an internal circuit and a GGNMOS, the internalcircuit includes a MOSFET, the semiconductor device further includes an active region, A MOSFET is arrange in that active region, characterized by, GGNMOS is also arrange in that active region, and the MOSFET is arranged on both lateral sides of the GGNMOS in the same active region, The active region comprises a P well, an N-type doped region of the GGNMOS and an N-type doped region of the MOSFETare arranged in the P well, the semiconductor device further comprises a P-type doped region as a substrate, and the P-type doped region is arranged on the outer sides of the MOSFET on both sides. When the electrostatic discharge occurs, if the MOSFET of the internal circuit is turned on, the substrate current is formed, thereby increasing the gate voltage of the intermediate GGNMOS, enabling theGGNMOS to be turned on more easily and improving the ESD capability.

Description

technical field [0001] The invention relates to an antistatic protection device, in particular to a semiconductor device with an electrostatic discharge protection structure. Background technique [0002] Electrostatic discharge is a common natural phenomenon in our life, but the large current generated in a short period of time during electrostatic discharge will cause fatal damage to integrated circuits, which is an important problem causing failure in the production and application of integrated circuits. [0003] A traditional electrostatic discharge (ESD) circuit protection scheme is to connect the internal circuit of the semiconductor device in parallel with GGNMOS (Gate Grounded N-channel Metal-Oxide Semiconductor Field Effect Transistor) or other ESD protection devices to protect the internal circuit. However, when the internal circuit uses a small-width MOSFET (Metal Oxide Semiconductor Field Effect Transistor) as the port circuit, since the gate of the small-width ...

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Problems solved by technology

However, when the internal circuit uses a small-width MOSFET (Metal Oxide Semiconductor Field Effect Transistor) as the port circuit, since the gate of the small-width MOSFET is in a floating state and the trigger voltage is l...

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