Mitigating spur links via multi-junction qubits

Abstract

Systems and techniques are provided that facilitate mitigation of spurious links via multi-junction qubits. In various embodiments, an apparatus may include a first qubit having a plurality of Josephson junctions between a plurality of capacitor pads, respectively. In various aspects, the apparatus may also include a plurality of second qubits coupled to different ones of the plurality of capacitor pads, respectively, such that neither of the plurality of second qubits is coupled to a same one of the plurality of capacitor pads.

Description

Background Art

[0001] The subject disclosure relates to qubits, and more particularly to mitigating stray coupling via multi-junction qubits.

[0002] Quantum computing is facilitated by executing quantum circuits on qubits arranged within a qubit lattice. The type / content of quantum circuits that can be executed depends on which qubits are connected to each other within the qubit lattice. Higher-order connection topologies between qubits in a qubit lattice enable more interesting / useful quantum circuits to be executed. However, this higher-order connection topology also causes significant stray connections to occur, which may be undesirable.

[0003] Therefore, systems and / or techniques that can address one or more of these technical problems may be desirable. Summary of the invention

[0004] The following provides an overview to provide a basic understanding of one or more embodiments of the invention. This content is not intended to identify key or important elements, or to delineate any scope of a particular embodiment or any scope of the claims. Its sole purpose is to present concepts in a simplified form as a prelude to a more detailed description presented later. In one or more embodiments described herein, devices, systems, computer-implemented methods, devices, and / or computer program products that can facilitate mitigation of stray coupling via multi-junction qubits are described.

[0005] According to one or more embodiments, a device is provided. In various aspects, the device may include a first qubit having a plurality of Josephson junctions respectively between a plurality of capacitor pads. In various aspects, the device may also include a plurality of second qubits respectively connected to different capacitor pads in the plurality of capacitor pads, so that any two of the plurality of second qubits are not connected to the same capacitor pad in the plurality of capacitor pads. In various cases, the device may also include a plurality of induction loops respectively between the plurality of capacitor pads, and a plurality of third qubits respectively connected to different induction loops in the plurality of induction loops, so that any two of the plurality of third qubits are not connected to the same induction loop in the plurality of induction loops. In various cases, different Josephson junctions in the plurality of Josephson junctions may have different sizes.

[0006] According to one or more embodiments, a system is provided. In various embodiments, the system may include a qubit lattice. In various aspects, the system may also include at least one qubit within the qubit lattice, which is connected to three or more adjacent qubits within the qubit lattice. In various cases, at least one qubit may have three or more connection elements corresponding to three or more adjacent qubits, respectively. In various cases, no two of the three or more adjacent qubits are connected to the same connection element in the three or more connection elements. In various aspects, the connection element may be a capacitor pad or an inductive loop. In various instances, the qubit lattice may exhibit a dense hexagonal tiling layout.

[0007] In various embodiments, the above-described apparatus and / or systems may be implemented as methods.

[0008] Various additional details of the various embodiments described herein are provided in the following clauses:

[0009] Item 1: A device comprising: a first qubit having a plurality of Josephson junctions respectively between a plurality of capacitor pads; and a plurality of second qubits respectively coupled to different ones of the plurality of capacitor pads. As described herein, when the plurality of second qubits are respectively coupled to different ones of the plurality of capacitor pads, there may be no stray coupling (e.g., crosstalk) and / or an otherwise improved level of stray coupling between corresponding pairs of the plurality of second qubits.

[0010] Clause 2: An apparatus as described in any preceding clause specified in the Summary of the Invention, wherein no two of the plurality of second qubits are coupled to the same capacitor pad in the plurality of capacitor pads. Again, as described herein, this can eliminate and / or otherwise reduce stray coupling between the plurality of second qubits.

[0011] Clause 3: The apparatus of any preceding clause specified in the Summary of the Invention, further comprising: a plurality of inductive loops respectively between the plurality of capacitor pads; and a plurality of third qubits respectively coupled to different ones of the plurality of inductive loops. As described herein, when the plurality of third qubits are respectively coupled to different ones of the plurality of inductive loops, there may be no stray coupling (e.g., crosstalk) and / or an improved level of stray coupling in other ways between corresponding pairs of the plurality of third qubits.

[0012] Clause 4: The apparatus of any preceding clause specified in the Summary of the Invention, wherein no two third qubits in the plurality of third qubits are coupled to the same inductive loop in the plurality of inductive loops. Again, as described herein, this can eliminate and / or otherwise reduce stray coupling between the plurality of third qubits.

[0013] Clause 5: The apparatus of any preceding clause specified in the Summary, wherein the first qubit comprises a first Josephson junction between the first capacitor pad and the second capacitor pad, and wherein the first qubit further comprises a second Josephson junction between the second capacitor pad and the third capacitor pad.

[0014] Clause 6: A device according to any preceding clause specified in the invention content, wherein the plurality of second qubits include a first transmission sub-qubit connected to the first capacitor pad and connected to neither the second capacitor pad nor the third capacitor pad, a second transmission sub-qubit connected to the second capacitor pad and connected to neither the first capacitor pad nor the third capacitor pad, and a third transmission sub-qubit connected to the third capacitor pad and connected to neither the first capacitor pad nor the second capacitor pad.

[0015] Clause 7: The apparatus of any preceding clause specified in the Summary of the Invention, wherein the plurality of second qubits are respectively coupled to different ones of the plurality of capacitor pads via flux tunable couplers.

[0016] Clause 8: The apparatus of any preceding clause specified in the Summary of the Invention, wherein different Josephson junctions in the plurality of Josephson junctions are of different sizes. As described herein, such different (e.g., asymmetric) sizing of the plurality of Josephson junctions can result in different modes of operation compared to the same (e.g., symmetric) sizing of the plurality of Josephson junctions.

[0017] In various aspects, any combination and / or more combinations of any of clauses 1-8 may be implemented.

[0018] Item 9: A method comprising: providing a first qubit having a plurality of Josephson junctions respectively between a plurality of capacitor pads; and coupling a plurality of second qubits respectively to different ones of the plurality of capacitor pads. As described herein, when the plurality of second qubits are respectively coupled to different ones of the plurality of capacitor pads, there may be no stray coupling (e.g., crosstalk) and / or an otherwise improved level of stray coupling between corresponding pairs of the plurality of second qubits.

[0019] Clause 10: A method as recited in any preceding clause specified in the Summary of the Invention, wherein no two of the plurality of second qubits are coupled to the same capacitor pad of the plurality of capacitor pads. Again, as described herein, this can eliminate and / or otherwise reduce stray coupling between the plurality of second qubits.

[0020] Clause 11: A method according to any preceding clause specified in the Summary of the Invention, wherein the plurality of induction loops are respectively between the plurality of capacitor pads, and further comprising: connecting the plurality of third qubits to different ones of the plurality of induction loops, respectively. As described herein, when the plurality of third qubits are respectively connected to different ones of the plurality of induction loops, there may be no stray coupling (e.g., crosstalk) and / or an improved level of stray coupling in other ways between corresponding pairs of the plurality of third qubits.

[0021] Clause 12: A method according to any preceding clause specified in the Summary of the Invention, wherein no two third qubits in the plurality of third qubits are coupled to the same inductive loop in the plurality of inductive loops. Again, as described herein, this can eliminate and / or otherwise reduce stray coupling between the plurality of third qubits.

[0022] Clause 13: The method of any preceding clause specified in the Summary, wherein the first qubit comprises a first Josephson junction between the first capacitor pad and the second capacitor pad, and wherein the first qubit further comprises a second Josephson junction between the second capacitor pad and the third capacitor pad.

[0023] Clause 14: A method according to any preceding clause specified in the invention content, wherein the plurality of second qubits include a first transmission sub-qubit connected to the first capacitor pad and connected to neither the second capacitor pad nor the third capacitor pad, a second transmission sub-qubit connected to the second capacitor pad and connected to neither the first capacitor pad nor the third capacitor pad, and a third transmission sub-qubit connected to the third capacitor pad and connected to neither the first capacitor pad nor the second capacitor pad.

[0024] Clause 15: A method as recited in any preceding clause as specified in the Summary of the Invention, wherein the plurality of second qubits are respectively coupled to different ones of the plurality of capacitor pads via flux tunable couplers.

[0025] Clause 16: A method according to any preceding clause specified in the Summary of the Invention, wherein different Josephson junctions in the plurality of Josephson junctions are of different sizes. As described herein, such different (e.g., asymmetric) sizing of the plurality of Josephson junctions can result in different operating modes being achieved compared to the same (e.g., symmetric) sizing of the plurality of Josephson junctions.

[0026] In various aspects, any combination and / or combination of any of clauses 9-16 may be implemented.

[0027] Clause 17: A system comprising: a qubit lattice; and at least one qubit within the qubit lattice, the at least one qubit coupled to three or more adjacent qubits within the qubit lattice, wherein the at least one qubit has three or more coupling elements corresponding to the three or more adjacent qubits, respectively, wherein no two of the three or more adjacent qubits are coupled to the same coupling element of the three or more coupling elements, and wherein the coupling element is a capacitor pad or an inductive loop. As described herein, when no two of the three or more adjacent qubits are coupled to the same coupling element of the three or more coupling elements, there may be no stray coupling (e.g., crosstalk) and / or an otherwise improved level of stray coupling between corresponding pairs of the three or more adjacent qubits.

[0028] Clause 18: A system according to any preceding clause specified in the invention summary, wherein at least one qubit is coupled to three adjacent qubits, wherein at least one qubit has two Josephson junctions connected in series between three capacitor pads, and wherein the three adjacent qubits are respectively coupled to different ones of the three capacitor pads.

[0029] Clause 19: A system according to any preceding clause specified in the Summary of the Invention, wherein at least one qubit is coupled to five adjacent qubits, wherein at least one qubit has two Josephson junctions connected in series between three capacitor pads and two inductive loops, and wherein the five adjacent qubits are coupled to different ones of the three capacitor pads and the two inductive loops, respectively. As described herein, such embodiments can significantly increase the number of adjacent qubits that can be coupled to any given qubit without experiencing an undue increase in stray coupling between such adjacent qubits.

[0030] Clause 20: The system of any preceding clause specified in the Summary of the Invention, wherein the qubit lattice exhibits a dense hexagonal tiling layout.

[0031] In various aspects, any combination and / or combination of any of clauses 17-20 may be implemented. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] 1 illustrates a block diagram of an example non-limiting system that facilitates mitigation of stray coupling via multi-junction qubits in accordance with one or more embodiments described herein.

[0033] 2 illustrates a circuit diagram of an example non-limiting system that facilitates mitigation of stray coupling via multi-junction qubits in accordance with one or more embodiments described herein.

[0034] 3 illustrates a block diagram of an example non-limiting qubit lattice that facilitates mitigation of stray coupling via multi-junction qubits according to one or more embodiments described herein.

[0035] 4 illustrates a block diagram of an example non-limiting system including both capacitive and inductive couplings that facilitates mitigation of stray coupling via multi-junction qubits according to one or more embodiments described herein.

[0036] 5 illustrates a circuit diagram of an example non-limiting system including both capacitive and inductive couplings that facilitates mitigation of stray coupling via multi-junction qubits according to one or more embodiments described herein.

[0037] 6-7 illustrate flow diagrams of example non-limiting methods that facilitate mitigating stray coupling via multi-junction qubits, according to one or more embodiments described herein. DETAILED DESCRIPTION

[0038] The following detailed description is merely illustrative and is not intended to limit the application or use of the embodiments and / or the embodiments. In addition, it is not intended to be bound by any explicit or implicit information presented in the foregoing background technology or summary or detailed description.

[0039] One or more embodiments are now described with reference to the accompanying drawings, wherein the same reference numerals are used to refer to the same elements throughout. In the following description, for the purpose of explanation, many specific details are set forth in order to provide a more thorough understanding of one or more embodiments. However, it is apparent that in various cases, one or more embodiments may be practiced without these specific details.

[0040] Quantum computing can be facilitated by executing quantum circuits (e.g., sequences of parallel and / or serial quantum gates, such as Pauli-X gates, Pauli-Y gates, Pauli-Z gates, phase gates, controlled NOT gates, and / or controlled phase gates) on qubits (e.g., superconducting qubits, such as transporter qubits) arranged within a qubit lattice. The type / content of quantum circuits that can be executed on a qubit lattice can depend on which qubits are connected to each other within the qubit lattice. For example, an entanglement gate (e.g., a controlled NOT gate, a controlled phase gate) can only be executed on two qubits that are connected together, and cannot be executed on any two qubits that are not connected together. In this way, the quantum circuits that can be implemented on a qubit lattice can be limited by the connection topology of the qubit lattice.

[0041] Higher-order connection topologies between qubits in a qubit lattice can enable more interesting and / or more useful quantum circuits to be performed on the qubit lattice. In other words, it may be desirable to connect more qubits within a qubit lattice to each other. However, such higher-order connection topologies have the negative side effect of causing a large number of stray connections (e.g., bystander crosstalk) to occur. The prior art does not provide a solution to this increased level of stray connections other than to avoid higher-order connection topologies entirely and the more interesting / useful quantum circuits supported by such topologies.

[0042] Therefore, systems and / or techniques that can address one or more of these technical problems may be desirable.

[0043] Various embodiments described herein can address one or more of these technical issues. In particular, various implementations described herein can provide systems and / or techniques that can help mitigate stray coupling via multi-junction qubits. More specifically, the inventors of the various embodiments described herein determined how / why high-order coupling topologies cause increased levels of stray coupling, and further designed techniques that can utilize multi-junction qubits to reduce and / or otherwise improve stray coupling in such high-order coupling topologies. More specifically, the inventors recognized that increased stray coupling plagued the prior art because whenever three or more adjacent qubits are coupled to a given qubit according to such prior art, some of such three or more adjacent qubits are coupled to the same coupling element of the given qubit (e.g., coupled to the same capacitor pad and / or the same inductive loop). In various aspects, the inventors have recognized that such increased stray coupling may be avoided and / or otherwise reduced when a given qubit is a multi-junction qubit because such a multi-junction qubit may have more coupling elements (e.g., each adjacent qubit may have one coupling element) such that no two adjacent qubits are coupled to the same coupling element of the given qubit (e.g., such that no two adjacent qubits share the same coupling element of the given qubit).

[0044] As a non-limiting example, consider qubit A, qubit B, qubit C, and qubit D. In various cases, each of qubit A, qubit B, qubit C, and qubit D can be a transmission sub-qubit. In various aspects, the transmission sub-qubit can be a superconducting qubit formed by a Josephson junction, which is shunted by two capacitor pads (e.g., a planar capacitor pad, a trench capacitor pad, and / or any other suitable type of capacitor pad). In various cases, the transmission sub-qubit can have a charging energy that is significantly smaller (e.g., one or more orders of magnitude smaller) than its Josephson energy. Therefore, qubit A can be considered to be composed of a Josephson junction A, which is shunted by two capacitor pads: capacitor pad A1 and capacitor pad A2. Similarly, qubit B can be considered to be composed of a Josephson junction B, which is shunted by two capacitor pads: capacitor pad B1 and capacitor pad B2. Similarly, qubit C can be considered to be composed of a Josephson junction C, which is shunted by two capacitor pads: capacitor pad C1 and capacitor pad C2. Finally, qubit D can be considered to consist of a Josephson junction D shunted by two capacitor pads: capacitor pad D1 and capacitor pad D2.

[0045] In any case, assume that it is desired to couple qubit A to each of qubit B, qubit C, and qubit D. In various aspects, this can be facilitated by capacitively coupling one of the two capacitor pads A1 and A2 directly and / or indirectly (in a fixed and / or flux-tunable manner) to one of the two capacitor pads B1 and B2, by capacitively coupling one of the two capacitor pads A1 and A2 directly and / or indirectly (in a fixed and / or flux-tunable manner) to one of the two capacitor pads C1 and C2, and by capacitively coupling one of the two capacitor pads A1 and A2 directly and / or indirectly (in a fixed and / or flux-tunable manner) to one of the two capacitor pads D1 and D2.

[0046] Note that this configuration inevitably results in one of the two capacitor pads A1 and A2 being capacitively coupled to two different qubits, which may result in stray coupling between the two different qubits (e.g., this may result in aggravated bystander crosstalk). For example, without loss of generality, one of the two capacitor pads B1 and B2 of qubit B may be coupled to capacitor pad A1, and one of the two capacitor pads C1 and C2 of qubit C may be coupled to capacitor pad A2. In this case, one of the two capacitor pads D1 and D2 of qubit D may be coupled to capacitor pad A1 or capacitor pad A2. If one of the two capacitor pads D1 and D2 of qubit D is coupled to capacitor pad A1, capacitor pad A1 may be considered to be coupled to both qubit B and qubit D, which may undesirably result in excessive crosstalk between qubit B and qubit D. That is, when both qubit B and qubit D are coupled to capacitor pad A1, an entanglement gate configured to entangle qubit A with qubit B may inadvertently result in an entangled interaction between qubit B and qubit D. Similarly, an entanglement gate configured to entangle qubit A with qubit D may inadvertently cause an entanglement interaction between qubit B and qubit D when both qubit B and qubit D are coupled to capacitor pad A1.

[0047] On the other hand, if one of the two capacitor pads D1 and D2 of qubit D is coupled to capacitor pad A2, capacitor pad A2 may be considered coupled to both qubit C and qubit D, which may undesirably cause excessive crosstalk between qubit C and qubit D. That is, when qubit C and qubit D are both coupled to capacitor pad A2, an entanglement gate configured to entangle qubit A with qubit C may inadvertently cause an entangled interaction between qubit C and qubit D. Likewise, when qubit C and qubit D are both coupled to capacitor pad A2, an entanglement gate configured to entangle qubit A with qubit D may inadvertently cause an entangled interaction between qubit C and qubit D.

[0048] Therefore, when it is desired to connect a transmission sub-qubit to three or more other transmission sub-qubits according to the prior art, increased stray connections may be unavoidable. In fact, as recognized by the inventors, this may be due to the fact that the transmission sub-qubit has only two connection elements (e.g., two capacitor pads), and therefore connecting three or more neighboring objects to the transmission sub-qubit necessarily forces some of the three or more neighboring objects to be connected to the same connection element of the two connection elements. In other words, when implementing the prior art, such increased stray connections can be avoided and / or mitigated only by implementing a ring topology in which no more than two transmission sub-qubits are connected to any given transmission sub-qubit. That is, since the transmission sub-qubit has only two connection elements (e.g., two capacitor pads), connecting two or fewer neighboring objects to the transmission sub-qubit allows each of the two or fewer neighboring objects to be connected to its own corresponding one of the two connection elements. Unfortunately, a very large number of quantum circuits of interest cannot be implemented on such a ring topology.

[0049] The inventors recognize that this significant technical problem can be avoided, mitigated and / or otherwise improved by utilizing multi-junction qubits, because such multi-junction qubits can have a higher number of connection elements (e.g., a higher number of capacitor pads). A non-limiting example of a multi-junction qubit can be a double-junction transmission sub-qubit. In various aspects, the double-junction transmission sub-qubit can be a superconducting qubit that includes two capacitive shunt Josephson junctions connected in series (e.g., the double-junction transmission sub-qubit can be formed by two single-junction transmission sub-qubits connected and / or connected in series). In other words, the double-junction transmission sub-qubit can include a first Josephson junction and a second Josephson junction, wherein the first Josephson junction is connected in series between the first capacitor pad and the second capacitor pad, and wherein the second Josephson junction is connected in series between the second capacitor pad and the third capacitor pad. In various aspects, the second capacitor pad can be referred to as the middle capacitor pad of the double-junction transmission sub-qubit, and the first capacitor pad and the third capacitor pad can be referred to as the end capacitor pads of the double-junction transmission sub-qubit. In various cases, the double-junction transmission sub-qubit can also be referred to as a tunable connector qubit.

[0050] In various instances, a double-junction transmission sub-qubit may support and / or exhibit two different excitation modes: a dark mode and a bright mode. In various aspects, the two different excitation modes may have two different spatial symmetries and / or two different transition frequencies (e.g., a dark mode transition frequency and a bright transition frequency). More specifically, the dark mode of a double-junction transmission sub-qubit may be a higher frequency excitation mode without a net dipole moment. In other words, the dark mode may avoid coupling to a global electric field. In contrast, the bright mode of a double-junction transmission sub-qubit may be a lower frequency excitation mode with a net dipole moment. That is, the bright mode may be coupled to a global electric field. In various instances, a double-junction transmission sub-qubit may be encoded in a dark mode (and therefore may have a dark mode transition frequency) or a bright mode (and therefore may have a bright mode transition frequency). In various aspects, a short microwave pulse may be used to switch a double-junction transmission sub-qubit between encodings (e.g., a suitable microwave pulse may be applied to a double-junction transmission sub-qubit to switch the double-junction transmission sub-qubit from a dark mode to a bright mode and / or from a bright mode to a dark mode).

[0051] In any case, the inventors recognize that implementing a double-junction transmission sub-qubit in a qubit lattice can help mitigate and / or reduce stray coupling. Consider again the above non-limiting example, in which it is desired to connect qubit A to each of qubit B, qubit C, and qubit D. As described above, qubit B, qubit C, and qubit D can all be transmission sub-qubits. As further explained above, when qubit A is also a transmission sub-qubit, excessive stray coupling may occur because one of the capacitor pads of qubit A is forced to connect to at least two other qubits. However, as recognized by the inventors, this problem can be avoided and / or reduced when qubit A is a double-junction transmission sub-qubit. That is, assume that qubit A has a first Josephson junction between capacitor pad A1 and capacitor pad A2, and further assume that qubit A has a second Josephson junction between capacitor pad A2 and capacitor pad A3. In other words, qubit A can be considered to have three capacitor pads instead of just two capacitor pads. Now, without loss of generality, one of qubit B's two capacitor pads B1 and B2 can be coupled to capacitor pad A1, one of qubit C's two capacitor pads C1 and C2 can be coupled to capacitor pad A2, and one of qubit D's two capacitor pads D1 and D2 can be coupled to capacitor pad A3. Note that in such a configuration, none of qubit A's three capacitor pads need be coupled to more than one of qubit B, qubit C, and qubit D. In other words, none of qubit B, qubit C, and qubit D need be coupled to the same capacitor pad (e.g., coupled to the same coupling element) of qubit A. Thus, such a configuration in which qubit A is a double-junction transporter can experience significantly reduced stray coupling (e.g., significantly reduced bystander crosstalk) compared to a configuration in which qubit A is a single-junction transporter.

[0052] Furthermore, because the double junction transporter can exhibit different excitation modes as described above, when qubit A is a double junction transporter, qubit A can exhibit such different excitation modes: a bright mode and a dark mode. In various aspects, such different excitation modes can be utilized and / or used depending on the relative sizes of the two Josephson junctions of qubit A. As a non-limiting example, assume that the first Josephson junction and the second Josephson junction of qubit A are symmetrically sized (e.g., have the same size as each other). In such a case, the above configuration in which qubit B is coupled to capacitor pad A1, qubit C is coupled to capacitor pad A2, and qubit D is coupled to capacitor pad A3 can be considered to cause qubit B, qubit C, and qubit D to all be coupled to the dark mode of qubit A. In contrast and as another non-limiting example, assume that the sizes of the first Josephson junction and the second Josephson junction of qubit A are asymmetrical (e.g., one junction can be twice the size of the other junction). In such a case, the above configuration of qubit B coupled to capacitor pad A1, qubit C coupled to capacitor pad A2, and qubit D coupled to capacitor pad A3 can be considered to have qubit B, qubit C, and qubit D all coupled to the bright mode of qubit A. In various cases, coupling to the bright mode in this manner can be beneficial because the anharmonicity of the bright mode can be greater in the asymmetric case than in the symmetric case (e.g., greater anharmonicity can help avoid frequency conflicts).

[0053] In any case, and as the above non-limiting examples help illustrate, the inventors have recognized that the prior art precisely causes excessive stray coupling to occur in high-order coupling topologies because, whenever a qubit is coupled to three or more neighbors, such prior art forces some of the three or more neighbors to couple to the same coupling element of the qubit (e.g., to the same capacitor pad). Furthermore, the inventors have recognized that, whenever a qubit is coupled to three or more neighbors, such excessive stray coupling can be mitigated by configuring the qubit as a multi-junction qubit (e.g., as a double-junction transporter). After all, a multi-junction qubit can have more coupling elements (e.g., more capacitor pads), which can help ensure that each neighbor is coupled to its own corresponding coupling element (e.g., which can help ensure that no two neighbors are coupled to the same coupling element as each other). When each neighbor is coupled to its own corresponding coupling element (e.g., when no two neighbors are coupled to the same coupling element as each other), bystander crosstalk between neighbors can be reduced.

[0054] Although the present disclosure mainly describes various embodiments of the connection element of the qubit as a capacitor pad, this is merely a non-limiting example for ease of explanation. In various aspects, the connection element of the qubit can be any other suitable circuit structure and / or circuit component of the qubit, to which other qubits (e.g., adjacent qubits) can be connected. As a non-limiting example, a qubit can be made not only with one or more capacitor pads, but also with one or more inductive loops. In this case, one or more capacitor pads and one or more inductive loops can be considered and / or otherwise referred to as the connection element of the qubit. After all, adjacent objects can be directly and / or indirectly capacitively connected to one or more capacitor pads of the qubit, and / or adjacent objects can be directly and / or indirectly inductively connected to one or more inductive loops of the qubit.

[0055] In any case, the inventors have recognized that stray coupling within higher-order coupling topologies may be mitigated and / or otherwise reduced by implementing multi-junction qubits because such multi-junction qubits may include a greater number of coupling elements (e.g., may include more capacitor pads and / or more inductive loops) than single-junction qubits, and because such a greater number of coupling elements may help ensure that no two adjacent objects are coupled to the same coupling element as one another.

[0056] The various implementations described herein may be employed to use hardware and / or software to solve problems that are highly technical in nature (e.g., to help mitigate stray coupling via multi-junction qubits) that are not abstract, are not merely laws of nature, are not merely natural phenomena, and cannot be performed by a human as a set of mental actions. Rather, the various embodiments described herein include tangible circuit structures / architectures and / or methods related to such tangible circuit structures / architectures that may be implemented to reduce stray coupling in a qubit lattice. Indeed, as described above, whenever three or more adjacent qubits are coupled to a given qubit according to the prior art, the inventors recognize that enhanced stray coupling (e.g., enhanced bystander crosstalk) occurs because such prior art involves some of those three or more adjacent qubits being coupled to the same coupling element of the given qubit (e.g., coupled to the same capacitor pad, coupled to the same inductive loop).

[0057] In contrast, the various embodiments described herein can solve such technical problems. Specifically, the systems / techniques described herein can reduce stray connections by implementing multi-junction qubits. In particular, the inventors recognize that whenever three or more adjacent qubits are connected to a given qubit, when the given qubit is a multi-junction qubit (e.g., a double-junction transporter), stray connections can be significantly reduced. In fact, when a given qubit is a multi-junction qubit, the given qubit may have a higher number of connection elements (e.g., may have more capacitor pads and / or inductive loops) than would be possible if the given qubit was a single-junction qubit. Therefore, when a given qubit has a higher number of connection elements, any two adjacent objects can be prevented from connecting to the same connection element of a given qubit (e.g., the total number of connection elements of a given qubit may be greater than or equal to the total number of adjacent objects expected to be connected to the given qubit). Thus, when no two adjacent objects are coupled to the same coupling element of a given qubit (e.g., when no two adjacent objects are coupled to the same capacitor pad of a given qubit, and / or when no two adjacent objects are coupled to the same inductive loop of a given qubit), stray coupling (e.g., bystander crosstalk) between adjacent objects can be improved. Because the various embodiments described herein can alleviate these technical problems associated with the prior art (e.g., excessive stray coupling), such embodiments certainly constitute concrete and tangible technical improvements in the field of qubits.

[0058] In addition, various embodiments described herein can control tangible, hardware-based and / or software-based devices based on the disclosed teachings. For example, the embodiments described herein can include tangible quantum bits (e.g., superconducting quantum bits composed of Josephson junctions, capacitor pads, and / or inductive loops) that can be fabricated on a tangible quantum substrate (e.g., a silicon wafer).

[0059] It should be understood that the drawings and the disclosure herein describe non-limiting examples of various embodiments. It should also be understood that the drawings are not necessarily drawn to scale.

[0060] 1 shows a block diagram of an example non-limiting system 100 that can facilitate mitigation of stray coupling via a multi-junction qubit according to one or more embodiments described herein. As shown, system 100 can include a multi-junction qubit 102.

[0061] In various embodiments, multi-junction qubit 102 may include Josephson junction 104, Josephson junction 106, capacitor pad 108, capacitor pad 110, and / or capacitor pad 112. In various aspects, as shown, Josephson junction 104 may be coupled to capacitor pad 108 and capacitor pad 110 such that capacitor pad 108, Josephson junction 104, and capacitor pad 110 may be considered to be all connected in series with one another. Thus, in various cases, capacitor pad 108 and capacitor pad 110 may be collectively considered to form a capacitance that shunts Josephson junction 104.

[0062] Similarly, in various cases, as shown, the Josephson junction 106 can be coupled to the capacitor pad 110 and the capacitor pad 112, so that the capacitor pad 110, the Josephson junction 106, and the capacitor pad 112 can be considered to be all connected in series with each other. Therefore, in various aspects, the capacitor pad 110 and the capacitor pad 112 can be collectively considered to form a capacitance that shunts the Josephson junction 106.

[0063] In addition, in various cases, as shown, capacitor pad 108, Josephson junction 104, capacitor pad 110, Josephson junction 106, and capacitor pad 112 can be considered to be connected in series with each other. Therefore, in various cases, capacitor pad 108 and capacitor pad 112 can be considered to form a capacitance that shunts both Josephson junction 104 and Josephson junction 106.

[0064] Thus, in various aspects, the multi-junction qubit 102 can be considered as a double junction transporter formed by two single junction transporters connected in series. In particular, the capacitor pad 108, the Josephson junction 104, and the capacitor pad 110 can be collectively considered to form a first single junction transporter. Likewise, the capacitor pad 110, the Josephson junction 106, and the capacitor pad 112 can be collectively considered to form a second single junction transporter in series with the first single junction transporter. As can be seen, the first single junction transporter and the second single junction transporter can be considered to share the capacitor pad 110. Thus, in various cases, the capacitor pad 110 can be referred to as the middle pad of the multi-junction qubit 102, and / or the capacitor pad 108 and the capacitor pad 112 can be referred to as the end pads of the multi-junction qubit 102. In any case, because the multi-junction qubit 102 can be considered as a double junction transporter in the non-limiting example of FIG. 1, the multi-junction qubit 102 can be considered to have multiple excitation modes (e.g., dark mode and bright mode).

[0065] In various cases, capacitor pad 108, Josephson junction 104, capacitor pad 110, Josephson junction 106, and / or capacitor pad 112 can be fabricated and / or manufactured on any suitable quantum substrate (e.g., silicon wafer, not shown) via any suitable microfabrication and / or nanofabrication techniques (e.g., photolithography, deposition, etching, dual angle evaporation). In various cases, capacitor pad 108, Josephson junction 104, capacitor pad 110, Josephson junction 106, and / or capacitor pad 112 can be fabricated and / or manufactured from any suitable superconducting material and / or combination of superconducting materials as desired.

[0066] Although FIG. 1 depicts the Josephson junction 104 and the Josephson junction 106 as being identical to each other (e.g., identical size and / or identical structure), this is merely a non-limiting example for ease of illustration and / or explanation. In various aspects, the Josephson junction 104 and the Josephson junction 106 may have identical and / or different sizes, shapes, spatial dimensions, and / or material compositions.

[0067] Similarly, although FIG. 1 depicts capacitor pads 108, 110, and 112 as being identical to one another (e.g., identical in size and / or identical in structure), this is merely a non-limiting example for ease of illustration. In practice, in various examples, capacitor pads 108, 110, and 112 may have the same and / or different sizes, shapes, spatial dimensions, and / or material compositions as one another.

[0068] In various embodiments, as shown, there can be a qubit 114. In various aspects, the qubit 114 can include a Josephson junction 116, a capacitor pad 118, and / or a capacitor pad 120. In various cases, as shown, the Josephson junction 116 can be coupled to the capacitor pad 118 and the capacitor pad 120, such that the capacitor pad 118, the Josephson junction 116, and the capacitor pad 120 can be considered to be all connected in series with each other. Therefore, in various cases, the capacitor pad 118 and the capacitor pad 120 can be collectively considered to form a capacitance that shunts the Josephson junction 116. Therefore, in various aspects, the qubit 114 can be considered a single junction transporter.

[0069] In various aspects, any suitable microfabrication and / or nanofabrication techniques may be implemented to fabricate capacitor pad 118 , Josephson junction 116 , and / or capacitor pad 120 .

[0070] Although FIG. 1 depicts Josephson junction 116 as being the same as the Josephson junction of multi-junction quantum bit 102, this is merely a non-limiting example for ease of illustration and / or explanation. In various cases, Josephson junction 116 may have the same and / or different size, shape, spatial dimensions, and / or material composition as the Josephson junction of multi-junction quantum bit 102 in various aspects.

[0071] Likewise, although FIG. 1 depicts capacitor pads 118 and capacitor pads 120 as being the same as each other and / or the same as the capacitor pads of multi-junction qubit 102, this is merely a non-limiting example for ease of illustration. In fact, in various aspects, capacitor pads 118 and / or capacitor pads 120 may have the same and / or different sizes, shapes, spatial dimensions, and / or material compositions as each other and / or the capacitor pads of multi-junction qubit 102.

[0072] In various examples, as shown, multi-junction qubit 102 may be coupled to qubit 114 via direct capacitive coupling 122. Specifically, direct capacitive coupling 122 may be any suitable wire, cable, and / or circuit structure that may be spatially proximate to capacitor pad 112 of multi-junction qubit 102 and may be spatially proximate to capacitor pad 120 of qubit 114. Because direct capacitive coupling 122 may be spatially proximate to both capacitor pad 112 and capacitor pad 120, direct capacitive coupling 122 may be considered to form a capacitance between capacitor pad 112 and capacitor pad 120. In other words, direct capacitive coupling 122 may be considered to capacitively couple capacitor pad 112 to capacitor pad 120.

[0073] In various cases, direct capacitive coupling 122 can be manufactured via any suitable microfabrication and / or nanofabrication techniques. In various cases, direct capacitive coupling 122 can have any suitable size, shape, spatial dimensions, and / or material composition (eg, can be composed of any suitable superconducting material).

[0074] Although FIG. 1 depicts capacitor pad 112 as being capacitively coupled to capacitor pad 120 via direct capacitive coupling 122, this is merely a non-limiting example for ease of illustration and / or explanation. In various aspects, any other suitable capacitive coupling (e.g., an indirect capacitive coupling), whether fixed or flux-tunable, may be implemented in place of and / or in addition to direct capacitive coupling 122.

[0075] In various embodiments, as shown, there can be a qubit 124. In various aspects, the qubit 124 can include a Josephson junction 126, a capacitor pad 128, and / or a capacitor pad 130. In various cases, as shown, the Josephson junction 126 can be coupled to the capacitor pad 128 and the capacitor pad 130, such that the capacitor pad 128, the Josephson junction 126, and the capacitor pad 130 can be considered to be all connected in series with each other. Therefore, in various cases, the capacitor pad 128 and the capacitor pad 130 can be collectively considered to form a capacitance that shunts the Josephson junction 126. Therefore, in various aspects, the qubit 124 can be considered a single junction transporter.

[0076] Again, in various cases, any suitable microfabrication and / or nanofabrication techniques may be implemented to fabricate capacitor pad 128 , Josephson junction 126 , and / or capacitor pad 130 .

[0077] Although FIG. 1 depicts Josephson junction 126 as being the same as the Josephson junction of multi-junction quantum bit 102 and / or the Josephson junction of quantum bit 114, this is merely a non-limiting example for ease of illustration and / or explanation. In various aspects, Josephson junction 126 can have the same and / or different size, shape, spatial dimensions, and / or material composition as the Josephson junction of multi-junction quantum bit 102 and / or the Josephson junction of quantum bit 114 in various aspects.

[0078] Similarly, although FIG1 depicts capacitor pad 128 and capacitor pad 130 as being identical to each other, identical to the capacitor pad of multi-junction qubit 102, and / or identical to the capacitor pad of qubit 114, this is merely a non-limiting example for ease of illustration. In practice, in various cases, capacitor pad 128 and / or capacitor pad 130 may have the same and / or different sizes, shapes, spatial dimensions, and / or material compositions as each other, the capacitor pad of multi-junction qubit 102, and / or the capacitor pad of qubit 114.

[0079] In various examples, as shown, multi-junction qubit 102 may be coupled to qubit 124 via direct capacitive coupling 132. Specifically, direct capacitive coupling 132 may be any suitable wire, cable, and / or circuit structure that may be spatially proximate to capacitor pad 110 of multi-junction qubit 102 and may be spatially proximate to capacitor pad 128 of qubit 124. Because direct capacitive coupling 132 may be spatially proximate to both capacitor pad 110 and capacitor pad 128, direct capacitive coupling 132 may be considered to form a capacitance between capacitor pad 110 and capacitor pad 128. That is, direct capacitive coupling 132 may be considered to capacitively couple capacitor pad 110 to capacitor pad 128 (e.g., as a transmission capacitive interaction between capacitor pad 110 and capacitor pad 128).

[0080] As described above, in various aspects, direct capacitive coupling 132 can be manufactured via any suitable micro-fabrication and / or nano-fabrication techniques. In various cases, direct capacitive coupling 132 can have any suitable size, shape, spatial dimensions, and / or material composition (e.g., can be composed of any suitable superconducting material) as desired (e.g., can have the same and / or different size, shape, size, and / or composition as direct capacitive coupling 122).

[0081] Although FIG. 1 depicts capacitor pad 110 as being capacitively coupled to capacitor pad 128 via direct capacitive coupling 132, this is merely a non-limiting example for ease of illustration and / or explanation. In various aspects, any other suitable capacitive coupling (e.g., an indirect capacitive coupling), whether fixed or flux-tunable, may be implemented in place of and / or in addition to direct capacitive coupling 132.

[0082] In various embodiments, as shown, there can be a qubit 134. In various aspects, the qubit 134 can include a Josephson junction 136, a capacitor pad 138, and / or a capacitor pad 140. In various cases, as shown, the Josephson junction 136 can be coupled to the capacitor pad 138 and the capacitor pad 140, such that the capacitor pad 138, the Josephson junction 136, and the capacitor pad 140 can be considered to be all connected in series with each other. Therefore, in various cases, the capacitor pad 138 and the capacitor pad 140 can be collectively considered to form a capacitance that shunts the Josephson junction 136. Therefore, in various aspects, the qubit 134 can be considered a single junction transporter.

[0083] Again, in various cases, any suitable microfabrication and / or nanofabrication techniques may be implemented to fabricate capacitor pad 138 , Josephson junction 136 , and / or capacitor pad 140 .

[0084] Although FIG. 1 depicts Josephson junction 136 as being the same as the Josephson junction of multi-junction qubit 102, the Josephson junction of qubit 114, and / or the Josephson junction of qubit 124, this is merely a non-limiting example for ease of illustration and / or explanation. In various aspects, Josephson junction 136 can have the same and / or different size, shape, spatial dimensions, and / or material composition as the Josephson junction of multi-junction qubit 102, the Josephson junction of qubit 114, and / or the Josephson junction of qubit 124 in various aspects.

[0085] Likewise, although FIG. 1 depicts capacitor pad 138 and capacitor pad 140 as being the same as each other, the same as the capacitor pad of multi-junction qubit 102, the same as the capacitor pad of qubit 124, and / or the same as the capacitor pad of qubit 114, this is merely a non-limiting example for ease of illustration. In fact, in various instances, capacitor pad 138 and / or capacitor pad 140 may have the same and / or different sizes, shapes, spatial dimensions, and / or material compositions as each other, the capacitor pad of multi-junction qubit 102, the capacitor pad of qubit 114, and / or the capacitor pad of qubit 124.

[0086] In various cases, as shown, multi-junction qubit 102 may be coupled to qubit 134 via direct capacitive coupling 142. Specifically, direct capacitive coupling 142 may be any suitable wire, cable, and / or circuit structure that may be spatially proximate to capacitor pad 108 of multi-junction qubit 102 and may be spatially proximate to capacitor pad 140 of qubit 134. Because direct capacitive coupling 142 may be spatially proximate to both capacitor pad 108 and capacitor pad 140, direct capacitive coupling 142 may be considered to form a capacitance between capacitor pad 108 and capacitor pad 140. That is, direct capacitive coupling 142 may be considered to capacitively couple capacitor pad 108 to capacitor pad 140 (e.g., as transmitting a capacitive interaction between capacitor pad 108 and capacitor pad 140).

[0087] As described above, in various aspects, direct capacitive coupling 142 can be manufactured via any suitable micro-fabrication and / or nano-fabrication techniques. In various cases, direct capacitive coupling 142 can have any suitable size, shape, spatial dimensions, and / or material composition (e.g., can be composed of any suitable superconducting material) as desired (e.g., can have the same and / or different size, shape, size, and / or composition as direct capacitive coupling 122 and / or direct capacitive coupling 132).

[0088] Although FIG. 1 depicts capacitor pad 108 as being capacitively coupled to capacitor pad 140 via direct capacitive coupling 142, this is merely a non-limiting example for ease of illustration and / or explanation. In various aspects, any other suitable capacitive coupling (e.g., an indirect capacitive coupling), whether fixed or flux-tunable, may be implemented in place of and / or in addition to direct capacitive coupling 142.

[0089] In any case, as shown, the capacitor pad of multi-junction qubit 102 may be considered to be individually and / or independently coupled to three other qubits (e.g., 114, 124, and 134) such that no two of the three other qubits are coupled to the same capacitor pad as one another. More specifically, qubit 114 may be considered to be coupled to capacitor pad 112, and to neither capacitor pad 110 nor capacitor pad 108. Likewise, qubit 124 may be considered to be coupled to capacitor pad 110, and to neither capacitor pad 112 nor capacitor pad 108. Furthermore, qubit 134 may be considered to be coupled to capacitor pad 108, and to neither capacitor pad 110 nor capacitor pad 112. Thus, none of qubit 114, qubit 124, and qubit 134 may be considered to be coupled to the same capacitor pad as one another. In other words, qubit 114, qubit 124, and qubit 134 may all be considered to be coupled to different and / or respectively corresponding capacitor pads of multi-junction qubit 102. As a result, the level of stray coupling (e.g., bystander crosstalk) between qubit 114 and qubit 124, between qubit 114 and qubit 134, and / or between qubit 124 and qubit 134 may be reduced, mitigated, and / or otherwise improved.

[0090] Note that if multi-junction qubit 102 were instead a single-junction qubit, such reduced, mitigated, and / or improved stray coupling would not be possible. In fact, if multi-junction qubit 102 were instead a single-junction qubit (e.g., a single-junction transporter), it would have only two capacitor pads instead of three. In this case, at least two of qubit 114, qubit 124, and qubit 134 would have to be coupled to the same capacitor pad as one another, which would increase stray coupling.

[0091] Although FIG. 1 depicts multi-junction qubit 102 as a two-junction transporter having three capacitor pads, each capacitor pad coupled to a different adjacent transporter, this is merely a non-limiting example for ease of illustration and / or explanation. In various embodiments, multi-junction qubit 102 may have three or more capacitor pads to ensure that each adjacent qubit to which multi-junction qubit 102 is to be coupled may be assigned its own corresponding capacitor pad. For example, if it is desired to couple multi-junction qubit 102 to n adjacent qubits for any suitable positive integer n≥3, then multi-junction qubit 102 may be constructed / configured to have at least n capacitor pads (and may have any suitable number of Josephson junctions in conjunction with such n capacitor pads) such that all n adjacent qubits may be coupled to multi-junction qubit 102 without any two of those n adjacent qubits being coupled to the same capacitor pad as each other.

[0092] As described above, a double junction transporter can exhibit a bright excitation mode and a dark excitation mode. Therefore, because the multi-junction quantum bit 102 can be a double junction transporter in some cases, the multi-junction quantum bit 102 can exhibit a bright excitation mode and a dark excitation mode in this case. In some aspects, which of these two different excitation modes is implemented and / or activated can depend on the relative sizes between the Josephson junction 104 and the Josephson junction 106. For example, assume that the Josephson junction 104 and the Josephson junction 106 have the same and / or symmetric sizes (e.g., as measured within any suitable threshold error margin). In this case, the connection configuration shown in Figure 1 can enable quantum bit 114, quantum bit 124, and quantum bit 134 to all be connected to the dark excitation mode of the multi-junction quantum bit 102. As another example, it is assumed that the Josephson junction 104 and the Josephson junction 106 have different and / or asymmetric sizes (e.g., as measured within any suitable threshold error margin). For example, without loss of generality, Josephson junction 104 may be twice as large (e.g., twice as thick, twice as long, twice as wide) as Josephson junction 106. In this case, the connection configuration shown in FIG. 1 may cause qubit 114, qubit 124, and qubit 134 to all be connected to the bright excitation mode of multi-junction qubit 102. In this manner, the relative size difference between Josephson junction 104 and Josephson junction 106 may influence and / or otherwise control which excitation mode is implemented (e.g., symmetric sizes may result in a dark mode being implemented, while asymmetric sizes may result in a bright mode being implemented).

[0093] In any case, as shown in FIG. 1 , whenever it is desired to couple three or more adjacent transporters to a given qubit, stray coupling can be reduced when the given qubit is a multi-junction qubit having at least one unique capacitor pad for each of the three or more adjacent transporters.

[0094] 2 shows a circuit diagram 200 of an example non-limiting system that can facilitate mitigation of stray coupling via multi-junction qubits according to one or more embodiments described herein. In particular, FIG2 depicts a circuit diagram corresponding to the physical structure / architecture shown in FIG1 .

[0095] In various embodiments, as shown, the circuit diagram of the multi-junction qubit 102 can be considered to include a Josephson junction 104 shunted by a capacitor 204, a Josephson junction 106 shunted by a capacitor 206, and / or both a Josephson junction 104 and a Josephson junction 106 shunted by a capacitor 202. In various aspects, the capacitance 204 can be considered to be a capacitive interaction occurring between capacitor pads 108 and 110. Similarly, the capacitance 206 can be considered to be a capacitive interaction occurring between capacitor pads 110 and 112. Similarly, the capacitance 202 can be considered to be a capacitive interaction occurring between capacitor pads 108 and 112. In various examples, the values ​​of the capacitance 202, capacitance 204, and / or capacitance 206 (e.g., measured in farads) can depend on the size, shape, dimensions, and / or material composition of the capacitor pads 108, 110, and / or 112.

[0096] In various aspects, as shown, the circuit diagram of qubit 114 can be considered to include Josephson junction 116 shunted by capacitance 208. In various examples, capacitance 208 can be considered to be a capacitive interaction created between capacitor pad 118 and capacitor pad 120. In various cases, the value of capacitance 208 (e.g., measured in farads) can depend on the size, shape, dimensions, and / or material composition of capacitor pad 118 and / or capacitor pad 120.

[0097] In various examples, as shown, there can be capacitance 210 between multi-junction qubit 102 and qubit 114. In various cases, capacitance 210 can be an equivalent capacitive interaction between capacitor pad 112 and capacitor pad 120 due to direct capacitive coupling 122. More specifically, there can be a capacitive interaction of a first composition between capacitor pad 112 and direct capacitive coupling 122, and there can be a capacitive interaction of a second composition between capacitor pad 120 and direct capacitive coupling 122. In various cases, the two compositions of capacitive interactions can be considered to combine (e.g., according to the law of series combination capacitors) to produce capacitance 210. In various aspects, the value of capacitance 210 (e.g., measured in farads) can depend on the size, shape, dimensions, and / or material composition of capacitor pad 112, capacitor pad 120, and / or direct capacitive coupling 122.

[0098] In various aspects, as shown, the circuit diagram of qubit 124 can be considered to include a Josephson junction 126 shunted by a capacitor 212. In various examples, as above, capacitance 212 can be considered to be a capacitive interaction occurring between capacitor pad 128 and capacitor pad 130. Thus, in various cases, the value of capacitance 212 (e.g., measured in farads) can depend on the size, shape, dimensions, and / or material composition of capacitor pad 128 and / or capacitor pad 130.

[0099] In various examples, as also shown, there can be capacitance 214 between multi-junction qubit 102 and qubit 124. In various cases, capacitance 214 can be an equivalent capacitive interaction between capacitor pad 110 and capacitor pad 128 due to direct capacitive coupling 132. In particular, there can be a capacitive interaction of a first composition between capacitor pad 110 and direct capacitive coupling 132, and there can be a capacitive interaction of a second composition between capacitor pad 128 and direct capacitive coupling 132. In various cases, just as above, the two compositions of capacitive interactions can be considered to be combined (e.g., according to the law of combining capacitors in series) to produce capacitance 214. Again, in various aspects, the value of capacitance 214 (e.g., measured in farads) can depend on the size, shape, dimensions, and / or material composition of capacitor pad 110, capacitor pad 128, and / or direct capacitive coupling 132.

[0100] In various aspects, as further shown, the circuit diagram of qubit 134 can be considered to include a Josephson junction 136 shunted by a capacitance 216. In various examples, as described above, capacitance 216 can be considered to be a capacitive interaction occurring between capacitor pad 138 and capacitor pad 140. Thus, in various cases, the value of capacitance 216 (e.g., as measured in farads) can depend on the size, shape, dimensions, and / or material composition of capacitor pad 138 and / or capacitor pad 140.

[0101] In various examples, as also shown, there may be capacitance 218 between multi-junction qubit 102 and qubit 134. In various cases, capacitance 218 may be an equivalent capacitive interaction between capacitor pad 108 and capacitor pad 140 due to direct capacitive coupling 142. Specifically, there may be a capacitive interaction of a first composition between capacitor pad 108 and direct capacitive coupling 142, and there may be a capacitive interaction of a second composition between capacitor pad 140 and direct capacitive coupling 142. In various cases, just as above, the two compositions of capacitive interactions may be considered combined (e.g., according to the law of combining capacitors in series) to produce capacitance 218. Again, in various aspects, the value of capacitance 218 (e.g., measured in farads) may depend on the size, shape, dimensions, and / or material composition of capacitor pad 108, capacitor pad 140, and / or direct capacitive coupling 142.

[0102] Figure 3 shows a block diagram of an example non-limiting qubit lattice 300 that can help mitigate stray coupling via multi-junction qubits according to one or more embodiments described herein. In other words, Figure 3 shows how the structure / architecture depicted in Figure 1 can be scaled up to create a qubit lattice with a high-order coupling topology that does not suffer from excessive stray coupling.

[0103] In various embodiments, as shown, qubit lattice 300 may include multiple qubits: qubit 302, qubit 304, qubit 306, qubit 308, qubit 310, qubit 312, qubit 314, qubit 316, qubit 318, qubit 320, qubit 322, qubit 324, qubit 326, qubit 328, qubit 330, qubit 332, qubit 334, qubit 336, qubit 338, qubit 340, qubit 342, qubit 344, qubit 346 and / or qubit 348.

[0104] In various aspects, as shown, some qubits within qubit lattice 300 may be coupled to two or fewer adjacent qubits, while other qubits within qubit lattice 300 may be coupled to more than two adjacent qubits. For example, qubit 302, qubit 306, qubit 316, qubit 322, qubit 328, qubit 332, qubit 344, and / or qubit 348 may each be coupled to one adjacent qubit (e.g., via direct and / or indirect capacitive couplings, whether fixed or flux tunable). Additionally, qubit 308, qubit 312, qubit 318, qubit 324, qubit 326, qubit 334, qubit 338, and / or qubit 342 may each be coupled to two adjacent qubits. In addition, qubit 304, qubit 310, qubit 314, qubit 320, qubit 330, qubit 336, qubit 340, and / or qubit 346 may each be connected to three adjacent qubits. In various cases, as shown, any qubit connected to two or fewer adjacent objects within qubit lattice 300 may be a single junction qubit. However, in various aspects, as also shown, any qubit connected to more than two adjacent objects within qubit lattice 300 may be a multi-junction qubit. In fact, in the non-limiting example of FIG. 3, each qubit connected to three adjacent objects in qubit lattice 300 may be a double junction qubit, rather than a single junction qubit. Therefore, each of such double junction qubits may be connected to three adjacent objects in the manner depicted in FIG. 1. That is, each of such double junction qubits may be considered to have three capacitor pads, and the adjacent objects of each of such double junction qubits may be connected to different / separate / unique capacitor pads in these three capacitor pads, respectively.

[0105] For example, qubit 304 may be a two-junction transporter having three capacitor pads, wherein a first of such three capacitor pads may be coupled to qubit 302, wherein a second of such three capacitor pads may be coupled to qubit 306, and / or wherein a third of such three capacitor pads may be coupled to qubit 308. Thus, because none of qubit 302, qubit 306, and qubit 308 may be coupled to the same capacitor pad as one another, stray coupling and / or crosstalk between qubit 302, qubit 306, and qubit 308 may be considered to be mitigated and / or reduced.

[0106] As another example, qubit 310 may be a two-junction transporter having three capacitor pads, wherein a first of the three capacitor pads may be coupled to qubit 308, wherein a second of the three capacitor pads may be coupled to qubit 324, and / or wherein a third of the three capacitor pads may be coupled to qubit 312. Thus, because none of qubit 308, qubit 324, and qubit 312 may be coupled to the same capacitor pad as one another, stray coupling and / or crosstalk between qubit 308, qubit 324, and qubit 312 may be considered to be mitigated and / or reduced.

[0107] As yet another example, qubit 314 may be a two-junction transporter having three capacitor pads, wherein a first of the three capacitor pads may be coupled to qubit 312, wherein a second of the three capacitor pads may be coupled to qubit 316, and / or wherein a third of the three capacitor pads may be coupled to qubit 318. Thus, because none of qubit 312, qubit 316, and qubit 318 may be coupled to the same capacitor pad as one another, stray coupling and / or crosstalk between qubit 312, qubit 316, and qubit 318 may be considered to be mitigated and / or reduced.

[0108] As yet another example, qubit 320 may be a two-junction transporter having three capacitor pads, wherein a first of the three capacitor pads may be coupled to qubit 318, wherein a second of the three capacitor pads may be coupled to qubit 326, and / or wherein a third of the three capacitor pads may be coupled to qubit 322. Thus, because none of qubit 318, qubit 326, and qubit 322 may be coupled to the same capacitor pad as one another, stray coupling and / or crosstalk between qubit 318, qubit 326, and qubit 322 may be considered to be mitigated and / or reduced.

[0109] As yet another example, qubit 330 may be a two-junction transporter having three capacitor pads, wherein a first of the three capacitor pads may be coupled to qubit 328, wherein a second of the three capacitor pads may be coupled to qubit 332, and / or wherein a third of the three capacitor pads may be coupled to qubit 334. Thus, because none of qubit 328, qubit 332, and qubit 334 may be coupled to the same capacitor pad as one another, stray coupling and / or crosstalk between qubit 328, qubit 332, and qubit 334 may be considered to be mitigated and / or reduced.

[0110] As another example, qubit 336 may be a two-junction transporter having three capacitor pads, wherein a first of the three capacitor pads may be coupled to qubit 334, wherein a second of the three capacitor pads may be coupled to qubit 324, and / or wherein a third of the three capacitor pads may be coupled to qubit 338. Thus, because none of qubit 334, qubit 324, and qubit 338 may be coupled to the same capacitor pad as one another, stray coupling and / or crosstalk between qubit 334, qubit 324, and qubit 338 may be considered to be mitigated and / or reduced.

[0111] As yet another example, qubit 340 may be a two-junction transporter having three capacitor pads, wherein a first of the three capacitor pads may be coupled to qubit 338, wherein a second of the three capacitor pads may be coupled to qubit 344, and / or wherein a third of the three capacitor pads may be coupled to qubit 342. Thus, because none of qubit 338, qubit 344, and qubit 342 may be coupled to the same capacitor pad as one another, stray coupling and / or crosstalk between qubit 338, qubit 344, and qubit 342 may be considered to be mitigated and / or reduced.

[0112] As yet another example, qubit 346 may be a two-junction transporter having three capacitor pads, wherein a first of the three capacitor pads may be coupled to qubit 342, wherein a second of the three capacitor pads may be coupled to qubit 326, and / or wherein a third of the three capacitor pads may be coupled to qubit 348. Thus, because none of qubit 342, qubit 326, and qubit 348 may be coupled to the same capacitor pad as one another, stray coupling and / or crosstalk between qubit 342, qubit 326, and qubit 348 may be considered to be mitigated and / or reduced.

[0113] In this manner, qubit lattice 300 may exhibit a dense hexagonal tiling layout such that no two qubits within qubit lattice 300 are coupled to the same capacitor pad as one another. Thus, because no two qubits within qubit lattice 300 may be coupled to the same capacitor pad as one another (e.g., because all qubits in qubit lattice 300 may be coupled to different / separate / different capacitor pads), qubit lattice 300 may be considered to exhibit no enhanced and / or exacerbated stray coupling despite exhibiting a dense hexagonal topology. In contrast, such enhanced and / or exacerbated stray coupling would occur in qubit lattice 300 if each qubit within qubit lattice 300 that is coupled to three neighbors is a single junction transporter rather than a double junction transporter. Thus, by replacing each qubit within the qubit lattice that is coupled to more than two neighbors with a multi-junction qubit, stray coupling may be reduced.

[0114] Although FIG3 depicts qubit lattice 300 as including twenty-four qubits, for ease of illustration, this is merely a non-limiting example. In various cases, qubit lattice 300 may include any suitable number of qubits.

[0115] Although FIG. 3 depicts qubit lattice 300 as having a dense hexagonal tiling layout / topology, this is merely a non-limiting example for ease of illustration. In various aspects, qubit lattice 300 may exhibit any other suitable type of tiling topology / layout as desired. In fact, any suitable high-order connection topology may be obtained without excessive stray connections, as long as any qubit to which more than two neighbors are connected is a multi-junction qubit with enough connection elements rather than a single-junction transporter.

[0116] Thus far, the present disclosure has described various embodiments as primarily directed to implementing double-junction transport sub-qubits to mitigate stray coupling in an array / lattice of single-junction transport sub-qubits. However, for ease of illustration / explanation, this is merely a non-limiting example. In various aspects, the teachings described herein may be applied to and / or otherwise extrapolated to any suitable qubit within any suitable qubit lattice / array.

[0117] For example, in general, a multi-junction qubit can be considered to have multiple Josephson junctions arranged in series and / or in parallel with multiple coupling elements. In various aspects, the coupling element can be any suitable circuit structure to which adjacent qubits are operably coupled (e.g., any suitable physical piece of a multi-junction qubit). As primarily described above, a non-limiting example of such a coupling element can be a capacitor pad for a multi-junction qubit. This is because adjacent qubits can directly and / or indirectly interact capacitively with the capacitor pad of the multi-junction qubit in a fixed or flux-tunable manner. Therefore, the capacitor pad can be considered a non-limiting type of coupling element. However, another non-limiting example of such a coupling element can be an inductive loop for a multi-junction qubit. This is because a multi-junction qubit can be fabricated to have an inductive loop in addition to a capacitor pad, and also because adjacent qubits can directly and / or indirectly interact inductively with the inductive loop of the multi-junction qubit in a fixed or flux-tunable manner. Therefore, the inductive loop can also be considered a non-limiting type of coupling element. An embodiment related to such an inductive loop is described more with respect to FIGS. 4 to 5.

[0118] 4 shows a block diagram of an example non-limiting system 400 including both capacitive couplings and inductive couplings that can help mitigate stray coupling via a multi-junction qubit according to one or more embodiments described herein. In various implementations, Josephson junction 104, Josephson junction 106, capacitor pad 108, capacitor pad 110, capacitor pad 112, qubit 114, direct capacitive coupling 122, qubit 124, direct capacitive coupling 132, qubit 134, and / or direct capacitive coupling 142 can be as described above.

[0119] In various aspects, as shown, there can be an inductive loop 404 coupled in series with and / or between the capacitor pad 108, the Josephson junction 104, and the capacitor pad 110. In various cases, the inductive loop 404 can be any suitable superconducting coil and / or meander wire exhibiting any suitable inductance value (e.g., measured in Henrys). In various cases, the inductive loop 404 can be manufactured by any suitable microfabrication and / or nanofabrication technology (e.g., lithography, deposition, etching, dual angle evaporation) to have any suitable size, shape, dimension, and / or material composition. Likewise, in various examples, there can be an inductive loop 406 coupled in series with and / or between the capacitor pad 110, the Josephson junction 106, and the capacitor pad 112. In various cases, the inductive loop 406 can be any suitable superconducting coil and / or meander wire exhibiting any suitable inductance value (e.g., measured in Henrys). As described above, in various aspects, the inductive loop 406 can be manufactured by any suitable microfabrication and / or nanofabrication techniques to have any suitable size, shape, dimensions, and / or material composition.

[0120] 4 depicts inductive loop 404 and inductive loop 406 as being identical, this is merely a non-limiting example for ease of illustration. In various aspects, inductive loop 404 and / or inductive loop 406 may have the same and / or different sizes, shapes, spatial dimensions, and / or material compositions as one another.

[0121] In any case, capacitor pad 108 , Josephson junction 104 , inductive loop 404 , capacitor pad 110 , Josephson junction 106 , inductive loop 406 , and capacitor pad 112 may collectively be considered to form multi-junction qubit 402 .

[0122] In various embodiments, as shown, there may be a qubit 408. In various aspects, the qubit 408 may include a Josephson junction 410, an inductive loop 412, a capacitor pad 414, and / or a capacitor pad 416. In various cases, as shown, the Josephson junction 410 may be coupled to the capacitor pad 414, the inductive loop 412, and the capacitor pad 416, such that the capacitor pad 414, the Josephson junction 410, the inductive loop 412, and the capacitor pad 416 may be considered to be all in series with each other. Thus, in various cases, the capacitor pad 414 and the capacitor pad 416 may be collectively considered to form a capacitance that shunts the Josephson junction 410, while the inductive loop 412 may be considered to form an inductor in series with the Josephson junction 410.

[0123] In various aspects, any suitable microfabrication and / or nanofabrication techniques may be implemented to fabricate capacitor pad 414 , Josephson junction 410 , inductive loop 412 , and / or capacitor pad 416 .

[0124] Although FIG4 depicts Josephson junction 410 as being the same as the Josephson junction of multi-junction qubit 402, the Josephson junction of qubit 114, the Josephson junction of qubit 124, and / or the Josephson junction of qubit 134, this is merely a non-limiting example for ease of illustration and / or explanation. In various aspects, Josephson junction 410 can have the same and / or different size, shape, spatial dimensions, and / or material composition as the Josephson junction of multi-junction qubit 402, the Josephson junction of qubit 114, the Josephson junction of qubit 124, and / or the Josephson junction of qubit 134.

[0125] Likewise, while FIG4 depicts capacitor pad 414 and capacitor pad 416 as being identical to each other, identical to the capacitor pad of multi-junction qubit 402, identical to the capacitor pad of qubit 114, identical to the capacitor pad of qubit 124, and / or identical to the capacitor pad of qubit 134, this is merely a non-limiting example for ease of illustration. In fact, in various aspects, capacitor pad 414 and / or capacitor pad 416 may have the same and / or different sizes, shapes, spatial dimensions, and / or material compositions as each other, the capacitor pad of multi-junction qubit 402, the capacitor pad of qubit 114, the capacitor pad of qubit 124, and / or the capacitor pad of qubit 134.

[0126] Likewise, although FIG4 depicts the inductive loop 412 as being the same as the inductive loop 404 and / or the inductive loop 406, for ease of illustration, this is merely a non-limiting example. In various cases, the inductive loop 412 can have the same and / or different size, shape, spatial dimensions, and / or material composition as the inductive loop 404 and / or the inductive loop 406.

[0127] In various embodiments, as shown, multi-junction qubit 402 may be coupled to qubit 408 via direct inductive coupling 418. Specifically, direct inductive coupling 418 may be any suitable wire, cable, and / or circuit structure that may transmit an inductive interaction between inductive loop 404 of multi-junction qubit 402 and inductive loop 412 of qubit 408. Thus, direct inductive coupling 418 may be considered to inductively couple inductive loop 404 to inductive loop 412.

[0128] In various cases, direct inductive coupling 418 can be manufactured via any suitable microfabrication and / or nanofabrication techniques. In various cases, direct inductive coupling 418 can have any suitable size, shape, spatial dimensions, and / or material composition as desired (e.g., can be composed of any suitable superconducting material).

[0129] Although FIG4 depicts the inductive loop 404 as being inductively coupled to the inductive loop 412 via a direct inductive coupling 418, this is merely a non-limiting example for ease of illustration and / or explanation. In various aspects, any other suitable inductive coupling (e.g., an indirect inductive coupling), whether fixed or flux tunable, may be implemented in place of and / or in addition to the direct inductive coupling 418.

[0130] In various embodiments, as shown, there may be a qubit 420. In various aspects, qubit 420 may include a Josephson junction 422, an inductive loop 424, a capacitor pad 426, and / or a capacitor pad 428. In various cases, as shown, the Josephson junction 422 may be coupled to the capacitor pad 426, the inductive loop 424, and the capacitor pad 428, such that the capacitor pad 426, the Josephson junction 422, the inductive loop 424, and the capacitor pad 428 may be considered to be all in series with each other. Thus, in various cases, the capacitor pad 426 and the capacitor pad 428 may be collectively considered to form a capacitance that shunts the Josephson junction 422, while the inductive loop 424 may be considered to form an inductor in series with the Josephson junction 422.

[0131] As described above, in various cases, any suitable microfabrication and / or nanofabrication techniques may be implemented to fabricate capacitor pad 426 , Josephson junction 422 , inductive loop 424 , and / or capacitor pad 428 .

[0132] Although FIG4 depicts Josephson junction 422 as being the same as the Josephson junction of multi-junction qubit 402, the Josephson junction of qubit 114, the Josephson junction of qubit 124, the Josephson junction of qubit 134, and / or the Josephson junction of qubit 408, this is merely a non-limiting example for ease of illustration and / or explanation. In various aspects, Josephson junction 422 may have the same and / or different size, shape, spatial dimensions, and / or material composition as the Josephson junction of multi-junction qubit 402, the Josephson junction of qubit 114, the Josephson junction of qubit 124, the Josephson junction of qubit 134, and / or the Josephson junction of qubit 408 in various aspects.

[0133] Likewise, while FIG4 depicts capacitor pad 426 and capacitor pad 428 as being identical to each other, identical to the capacitor pad of multi-junction qubit 402, identical to the capacitor pad of qubit 114, identical to the capacitor pad of qubit 124, identical to the capacitor pad of qubit 134, and / or identical to the capacitor pad of qubit 408, this is merely a non-limiting example for ease of illustration. In practice, in various cases, capacitor pad 426 and / or capacitor pad 428 may have the same and / or different sizes, shapes, spatial dimensions, and / or material compositions than each other, the capacitor pad of multi-junction qubit 402, the capacitor pad of qubit 114, the capacitor pad of qubit 124, the capacitor pad of qubit 134, and / or the capacitor pad of qubit 408.

[0134] Likewise, although FIG4 depicts inductive loop 424 as being the same as inductive loop 404, inductive loop 406, and / or inductive loop 412, for ease of illustration, this is merely a non-limiting example. In various cases, inductive loop 424 may have the same and / or different size, shape, spatial dimensions, and / or material composition as inductive loop 404, inductive loop 406, and / or inductive loop 412.

[0135] In various embodiments, as shown, multi-junction qubit 402 may be coupled to qubit 420 via direct inductive coupling 430. Specifically, direct inductive coupling 430 may be any suitable wire, cable, and / or circuit structure that may transmit an inductive interaction between inductive loop 406 of multi-junction qubit 402 and inductive loop 424 of qubit 420. Thus, direct inductive coupling 430 may be considered to inductively couple inductive loop 406 to inductive loop 424.

[0136] As described above, in various cases, direct inductive coupling 430 can be manufactured via any suitable microfabrication and / or nanofabrication techniques. In various aspects, direct inductive coupling 430 can have any suitable size, shape, spatial dimensions, and / or material composition (e.g., can be made of any suitable superconducting material) as desired (e.g., can have a different size, shape, size, and / or composition than direct inductive coupling 418).

[0137] Although FIG4 depicts the inductive loop 406 as being inductively coupled to the inductive loop 424 via a direct inductive coupling 430, this is merely a non-limiting example for ease of illustration and / or explanation. In various aspects, any other suitable inductive coupling (e.g., an indirect inductive coupling), whether fixed or flux tunable, may be implemented in place of and / or in addition to the direct inductive coupling 430.

[0138] In any case, as shown, multi-junction qubit 402 can be considered to have five coupling elements (e.g., 108, 110, 112, 404, and 406) via which multi-junction qubit 402 can be coupled to five adjacent qubits (e.g., 114, 124, 134, 408, and 420). In other words, multi-junction qubit 402 can be considered to have one coupling element for each adjacent qubit to which it is coupled. In this way, no two adjacent qubits can be coupled to the same coupling element, which can help reduce stray coupling (e.g., which can help reduce bystander crosstalk).

[0139] For example, qubit 114 may be coupled to capacitor pad 112 and may not be coupled to any of capacitor pad 110, capacitor pad 108, inductive loop 404, and inductive loop 406. Furthermore, qubit 124 may be coupled to capacitor pad 110 and may not be coupled to any of capacitor pad 112, capacitor pad 108, inductive loop 404, and inductive loop 406. Furthermore, qubit 134 may be coupled to capacitor pad 108 and may not be coupled to any of capacitor pad 110, capacitor pad 112, inductive loop 404, and inductive loop 406. Furthermore, qubit 408 may be coupled to inductive loop 404 and may not be coupled to any of capacitor pad 112, capacitor pad 110, capacitor pad 108, and inductive loop 406. Furthermore, qubit 420 may be coupled to inductive loop 406 and may not be coupled to any of capacitor pad 112, capacitor pad 110, capacitor pad 108, and inductive loop 404. Thus, each of qubit 114, qubit 124, qubit 134, qubit 408, and qubit 420 may be considered to be coupled to its own corresponding / unique coupling element, where such coupling element may be a capacitor pad for multi-junction qubit 402 or an inductive loop for multi-junction qubit 402. In any case, the result may be less, reduced, and / or mitigated crosstalk between qubit 114, qubit 124, qubit 134, qubit 408, and / or qubit 420.

[0140] Although FIG. 4 shows multi-junction qubit 402 as being coupled to five neighbors (e.g., 114, 124, 134, 408, and 420) via three capacitor pads (e.g., 108, 110, and 112) and via two inductive loops (e.g., 404 and 406), this is merely a non-limiting example for ease of explanation and / or illustration. More generally, for any suitable positive integer w, it may be desirable to capacitively couple multi-junction qubit 402 to w neighbors, and for any suitable positive integer x, it may be further desirable to inductively couple multi-junction qubit 402 to x neighbors. In this case, multi-junction qubit 402 may be configured / constructed to have at least w capacitor pads and at least x inductive loops. Thus, this may help ensure that each of the w neighbors to which multi-junction qubit 402 will be capacitively coupled and each of the x neighbors to which multi-junction qubit 402 will be inductively coupled may have its own corresponding / unique coupling element. In other words, this may help ensure that no two adjacent objects may be coupled to the same coupling element as each other.

[0141] Although not explicitly shown in the figures, in various aspects, the architecture / structure shown in FIG. 4 may be scaled up to create any suitable higher-order connection topology / layout / tiling as desired.

[0142] FIG5 shows a circuit diagram 500 of an example non-limiting system including both capacitive couplings and inductive couplings that can help mitigate stray coupling via multi-junction qubits according to one or more embodiments described herein. In particular, FIG5 depicts a circuit diagram corresponding to the physical structure / architecture shown in FIG4. In various cases, Josephson junction 104, Josephson junction 106, inductive loop 404, inductive loop 406, capacitor 202, capacitor 204, capacitor 206, Josephson junction 116, capacitor 208, capacitor 210, Josephson junction 126, capacitor 212, capacitor 214, Josephson junction 136, capacitor 216, capacitor 218, Josephson junction 410, inductive loop 412, direct inductive coupling 418, Josephson junction 422, inductive loop 424, and direct inductive coupling 430 can be as described above.

[0143] In various embodiments, as shown, the circuit diagram of multi-junction qubit 402 can be considered to include a Josephson junction 104 shunted by capacitor 204, further include a Josephson junction 106 shunted by capacitor 206, and / or further include both a Josephson junction 104 and a Josephson junction 106 shunted by capacitor 202. As also shown, the circuit diagram of multi-junction qubit 402 can further include an inductive loop 404 in series with Josephson junction 104, and can even further include an inductive loop 406 in series with Josephson junction 106.

[0144] In various aspects, as shown, the circuit diagram for qubit 114, the circuit diagram for qubit 124, and the circuit diagram for qubit 134 may be as described above.

[0145] In various aspects, as further shown, the circuit diagram of qubit 408 can be considered to include a Josephson junction 410 in series with an inductive loop 412 and shunted by a capacitance 502. In various examples, capacitance 502 can be considered to be a capacitive interaction occurring between capacitor pad 414 and capacitor pad 416. Thus, in various cases, the value of capacitance 502 (e.g., as measured in farads) can depend on the size, shape, dimensions, and / or material composition of capacitor pad 414 and / or capacitor pad 416. As explained above, direct inductive coupling 418 can inductively couple inductive loop 404 to inductive loop 412.

[0146] In various cases, as also shown, the circuit diagram of qubit 420 can be considered to include a Josephson junction 422 in series with an inductive loop 424 and shunted by a capacitance 504. In various examples, capacitance 504 can be considered to be a capacitive interaction occurring between capacitor pad 426 and capacitor pad 428. Thus, in various aspects, the value of capacitance 504 (e.g., as measured in farads) can depend on the size, shape, dimensions, and / or material composition of capacitor pad 426 and / or capacitor pad 428. Again, as explained above, direct inductive coupling 430 can inductively couple inductive loop 406 to inductive loop 424.

[0147] 6-7 illustrate flow charts of example non-limiting methods 600 and 700 that may facilitate mitigating stray coupling via multi-junction qubits according to one or more embodiments described herein.

[0148] First, consider method 600 shown in Figure 6. In various embodiments, act 602 may include providing a first qubit (e.g., 102 and / or 402) having a plurality of Josephson junctions (e.g., 104 and 106) between a plurality of capacitor pads (e.g., 108, 110, and 112), respectively.

[0149] In various aspects, act 604 may include respectively coupling the plurality of second qubits (e.g., 114, 124, and 134) to different capacitor pads in the plurality of capacitor pads such that no two second qubits in the plurality of second qubits are coupled to the same capacitor pad in the plurality of capacitor pads (e.g., as described with respect to FIG. 1 and / or FIG. 4 ).

[0150] Although not explicitly shown in FIG. 6 , the plurality of induction loops (e.g., 404 and 406) may be respectively between the plurality of capacitor pads, and / or the method 600 may further include: connecting the plurality of third qubits (e.g., 408 and 420) to different induction loops in the plurality of induction loops, respectively (e.g., as shown in FIG. 4 ), such that no two of the plurality of third qubits may be connected to the same induction loop in the plurality of induction loops.

[0151] Although not explicitly shown in FIG. 6 , the first qubit may include a first Josephson junction (e.g., 104) between a first capacitor pad (e.g., 108) and a second capacitor pad (e.g., 110), and / or the first qubit may also include a second Josephson junction (e.g., 106) between the second capacitor pad and a third capacitor pad (e.g., 112). In various aspects, the plurality of second qubits may include a first transmission sub-qubit (e.g., 134) coupled to the first capacitor pad and not coupled to the second capacitor pad or the third capacitor, a second transmission sub-qubit (e.g., 124) coupled to the second capacitor pad and not coupled to the first capacitor pad or the third capacitor pad, and / or a third transmission sub-qubit (e.g., 114) coupled to the third capacitor pad and not coupled to the first capacitor pad or the second capacitor pad (e.g., as shown in FIG. 1 and / or FIG. 4 ).

[0152] Now, consider method 700 of Figure 7. In various embodiments, act 702 may include providing a qubit lattice (eg, 300).

[0153] In various aspects, act 704 may include coupling at least one qubit (e.g., 102 and / or 402) within the qubit lattice to three or more adjacent qubits (e.g., 114, 124, 134, 408, and / or 420) within the qubit lattice. In various cases, the at least one qubit may have three or more coupling elements (e.g., 108, 110, 112, 404, and / or 406) corresponding to the three or more adjacent qubits, respectively. Further, in various cases, no two of the three or more adjacent qubits may be coupled to the same coupling element of the three or more coupling elements (e.g., as shown in FIGS. 1 and 4). Further, in various aspects, the coupling elements may be capacitor pads and / or inductive loops.

[0154] Although not explicitly shown in FIG. 7 , the at least one qubit may be coupled to three adjacent qubits (e.g., 114, 124, and 134), the at least one qubit may have two Josephson junctions (e.g., 104 and 106) connected in series between three capacitor pads (e.g., 108, 110, and 112), and the three adjacent qubits may be coupled to different ones of the three capacitor pads, respectively.

[0155] Although not explicitly shown in FIG. 7 , the at least one qubit may be coupled to five adjacent qubits (e.g., 114, 124, 134, 408, and 420), the at least one qubit may have two Josephson junctions (e.g., 104 and 106) connected in series between three capacitor pads (e.g., 108, 110, and 112) and two induction loops (e.g., 404 and 406), and / or the five adjacent qubits may be coupled to different capacitor pads and induction loops among the three capacitor pads and the two induction loops, respectively.

[0156] Therefore, it can be considered that the various embodiments described herein utilize multi-junction qubits to mitigate stray coupling. As described above, the inventors recognize that the prior art may result in excessive stray coupling because such prior art requires two or more adjacent objects to be coupled to each other to the same coupling element (e.g., coupled to the same capacitor pad and / or the same inductive loop). Therefore, the inventors recognize that whenever it is desired to couple three or more adjacent objects to a given qubit, such excessive stray coupling can be improved by configuring / constructing the given qubit as a multi-junction qubit. After all, a multi-junction qubit can have more coupling elements than a single-junction qubit. Therefore, the implementation of a multi-junction qubit can help ensure that each of the three or more adjacent objects is coupled to its own corresponding unique coupling element, thereby reducing bystander crosstalk. Because the various embodiments described herein can solve the significant technical problem of stray coupling, such embodiments certainly constitute a specific and tangible technical solution to the technical problem.

[0157] Although the disclosure herein mainly describes various embodiments in relation to direct / indirect capacitive / inductive couplings, for purposes of explanation, this is merely a non-limiting example. In various cases, the teachings described herein can be implemented with any suitable quantum coupling (e.g., flux tunable coupling, mode selective coupling) as desired.

[0158] The disclosure herein describes non-limiting examples of various embodiments of the subject innovation. For ease of description and / or explanation, when discussing various embodiments of the subject innovation, the various parts disclosed herein utilize the term "each". This usage of the term "each" is a non-limiting example. In other words, when the disclosure herein provides a description of "each" applied to some specific objects and / or parts, it should be understood that this is a non-limiting example of various embodiments of the present invention, and it should be further understood that in various other embodiments of the present invention, this description can be applied to less than "each" in the specific object and / or part.

[0159] The flow chart and structure in the accompanying drawings illustrate the possible implementation architecture, function and operation of the system, method and / or computer program product according to various embodiments described herein.In this respect, each frame in the flow chart can represent a module, segment or part of an instruction, which includes one or more executable instructions for implementing a specified logical function.In some alternative embodiments, the function marked in the frame may not occur in the order marked in the figure.For example, the two frames shown in succession can actually be performed substantially simultaneously, or these frames can sometimes be performed in reverse order, depending on the function involved.It will also be noted that each frame of the flow chart diagram and the combination of the frames in the flow chart diagram can be implemented by a system based on dedicated hardware that performs a specified function or action or performs a combination of dedicated hardware and computer instructions.

[0160] In addition, the term "or" is intended to mean an inclusive "or" rather than an exclusive "or". That is, unless otherwise specified or clear from the context, "X employs A or B" is intended to mean any natural inclusive arrangement. That is, if X employs A; X employs B; or X employs both A and B, then "X employs A or B" is satisfied in any of the foregoing cases. In addition, the articles "one" and "an" used in this specification and the drawings should generally be interpreted as meaning "one or more" unless otherwise specified or clear from the context to point to the singular form. As used herein, the terms "example" and / or "exemplary" are used to indicate use as an example, instance, or illustration. For the avoidance of doubt, the subject matter disclosed herein is not limited to such examples. In addition, any aspect or design described herein as "example" and / or "exemplary" is not necessarily to be construed as preferred or advantageous over other aspects or designs, nor is it meant to exclude equivalent exemplary structures and techniques known to those of ordinary skill in the art.

[0161] What has been described above merely includes examples of systems and computer-implemented methods. Of course, for purposes of describing the present disclosure, it is not possible to describe every conceivable combination of components or computer-implemented methods, but one of ordinary skill in the art will recognize that many further combinations and permutations of the present disclosure are possible. In addition, to the extent that the terms "including," "having," "having," and the like are used in the detailed description, claims, appendices, and drawings, these terms are intended to be inclusive in a manner similar to the term "comprising" as "including" is interpreted when used as a transitional word in a claim.

[0162] The description of various embodiments has been presented for the purpose of illustration, but is not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is selected to best explain the principles of the embodiments, practical applications, or technical improvements over technologies found in the marketplace, or to enable those of ordinary skill in the art to understand the embodiments disclosed herein.

Claims

1. A device comprising: a first qubit having a plurality of Josephson junctions respectively between a plurality of capacitor pads; and A plurality of second qubits are respectively coupled to different capacitor pads among the plurality of capacitor pads.

2. The apparatus of the preceding claim, wherein no two of the plurality of second qubits are coupled to the same capacitor pad of the plurality of capacitor pads.

3. The device according to the preceding claim, further comprising: a plurality of inductive loops respectively between the plurality of capacitor pads; and A plurality of third quantum bits are respectively connected to different induction loops among the plurality of induction loops.

4. The apparatus of the preceding claim, wherein no two third qubits in the plurality of third qubits are coupled to the same inductive loop in the plurality of inductive loops.

5. The apparatus of any of the preceding claims, wherein the first qubit comprises a first Josephson junction between a first capacitor pad and a second capacitor pad, and wherein the first qubit further comprises a second Josephson junction between the second capacitor pad and a third capacitor pad.

6. The apparatus of claim 1 , wherein the plurality of second qubits comprises a first transmission sub-qubit coupled to the first capacitor pad and coupled to neither the second capacitor pad nor the third capacitor pad, a second transmission sub-qubit coupled to the second capacitor pad and coupled to neither the first capacitor pad nor the third capacitor pad, and a third transmission sub-qubit coupled to the third capacitor pad and coupled to neither the first capacitor pad nor the second capacitor pad.

7. The apparatus of any one of the preceding claims, wherein the plurality of second qubits are respectively coupled to different ones of the plurality of capacitor pads via flux-tunable couplings.

8. Apparatus according to any one of the preceding claims, wherein: Different Josephson junctions in the plurality of Josephson junctions have different sizes.

9. A method comprising: providing a first qubit having a plurality of Josephson junctions respectively between a plurality of capacitor pads; and A plurality of second qubits are respectively coupled to different capacitor pads among the plurality of capacitor pads.

10. The method of the preceding claim, wherein no two of the plurality of second qubits are coupled to the same capacitor pad of the plurality of capacitor pads.

11. The method according to the preceding claim, wherein: A plurality of inductive loops are respectively located between the plurality of capacitor pads, and the method further comprises: A plurality of third quantum bits are respectively connected to different induction loops among the plurality of induction loops.

12. The method of the preceding claim, wherein no two third qubits in the plurality of third qubits are coupled to the same inductive loop in the plurality of inductive loops.

13. The method of any one of the four preceding claims, wherein the first qubit comprises a first Josephson junction between a first capacitor pad and a second capacitor pad, and wherein the first qubit further comprises a second Josephson junction between the second capacitor pad and a third capacitor pad.

14. The method according to the preceding claim, wherein the plurality of second qubits include a first transmission sub-qubit coupled to the first capacitor pad and coupled to neither the second capacitor pad nor the third capacitor pad, a second transmission sub-qubit coupled to the second capacitor pad and coupled to neither the first capacitor pad nor the third capacitor pad, and a third transmission sub-qubit coupled to the third capacitor pad and coupled to neither the first capacitor pad nor the second capacitor pad.

15. The method according to any one of the six preceding claims, wherein the plurality of second qubits are respectively coupled to different capacitor pads of the plurality of capacitor pads via flux tunable couplings.

16. A method according to any one of the preceding seven claims, wherein: Different Josephson junctions in the plurality of Josephson junctions have different sizes.

17. A system comprising: qubit lattices; and At least one qubit within the qubit lattice, the at least one qubit coupled to three or more adjacent qubits within the qubit lattice, wherein the at least one qubit has three or more coupling elements corresponding to the three or more adjacent qubits, respectively, wherein no two of the three or more adjacent qubits are coupled to the same coupling element among the three or more coupling elements, and wherein the coupling element is a capacitor pad or an inductive loop.

18. The system of the preceding claim, wherein the at least one qubit is coupled to three adjacent qubits, wherein the at least one qubit has two Josephson junctions connected in series between three capacitor pads, and wherein the three adjacent qubits are respectively coupled to different ones of the three capacitor pads.

19. The system of any one of the two preceding claims, wherein the at least one qubit is coupled to five adjacent qubits, wherein the at least one qubit has two Josephson junctions connected in series between three capacitor pads and two induction loops, and wherein the five adjacent qubits are coupled to different ones of the three capacitor pads and the two induction loops, respectively.

20. A system according to any one of the three preceding claims, wherein: The qubit lattice exhibits a dense hexagonal tiling layout.

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