Field plate structure optimization method, device, equipment and medium
Through an automated field plate structure optimization method, based on the adjustment of device and structural parameters, the low efficiency and high cost problems caused by reliance on experience in existing technologies are solved, and efficient and low-cost field plate structure optimization is achieved.
Patent Information
- Application Number
- CN202411704439.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-26
- Publication Date
- 2025-10-17
- Estimated Expiration
- 2044-11-26
AI Technical Summary
In the prior art, the optimization of the field plate structure of power semiconductor devices relies on the experience of designers, resulting in low optimization efficiency and high cost, and requiring repeated iterative design.
By obtaining the initial field plate structure optimization model, the electrical performance evaluation parameters are adjusted and trained based on the device and structure parameters until the target range is met, and the field plate structure is automatically optimized.
Without relying on design experience, the efficiency of field plate structure optimization is improved, the optimization cost is reduced, and it is ensured that the optimized semiconductor device meets the requirements.
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Figure CN119558006B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present disclosure relates to the technical field of semiconductor technology, and in particular, to a field plate structure optimization method, device, equipment and medium. BACKGROUND
[0002] Power semiconductor devices are key components used in high-voltage and large-current applications. In recent years, power semiconductor devices have been widely used in the fields of energy conversion, automotive electronics and industrial control. Among them, the industry believes that the performance of power semiconductor devices in high-voltage and high-frequency applications still has room for improvement, which has prompted researchers to continuously explore various improvement measures, and the field plate structure is one of the important means to improve the performance of power semiconductor devices.
[0003] The field plate structure refers to a metal plate added above the drift region of the device, which can reduce the on-resistance of the device and improve the breakdown voltage and stability of the device by adjusting the electric field distribution and reducing the electric field peak. The optimization design of the field plate structure can effectively balance and improve the contradictory relationship between the breakdown voltage and the on-resistance of the power semiconductor device, thereby enhancing its stability and reliability under high-frequency and high-voltage conditions.
[0004] In related technologies, when designing a power semiconductor device, the field plate structure therein often needs to be optimized to achieve better results. Generally, a designer can optimize the field plate structure based on experience, and then simulate the structure parameters of the optimized field plate structure through simulation software to determine whether the optimized field plate structure meets the requirements. Although this scheme can optimize the field plate structure, it needs to be based on the experience of the simulation personnel, and when the optimized field plate structure meets the requirements, the designer needs to repeatedly iterate the design scheme of the field plate structure to optimize the field plate structure. The efficiency of optimizing the field plate structure is low, and a lot of manpower is consumed, resulting in a high cost of optimizing the field plate structure. SUMMARY
[0005] To solve the problems in the related art, the embodiments of the present disclosure provide a field plate structure optimization method, device, equipment and medium.
[0006] In a first aspect, the embodiments of the present disclosure provide a field plate structure optimization method, comprising:
[0007] obtaining an initial field plate structure optimization model;
[0008] obtaining an initial electrical performance evaluation parameter of the semiconductor device before adjustment based on the initial device parameters and the initial structure parameters, wherein the structure parameters include the length of each step in the field plate structure and the thickness of the oxide under the field plate in each step, and the device parameters include at least one of the doping concentration of the drift region and the length of the drift region;
[0009] adjust the initial structure parameters to obtain a plurality of groups of adjusted structure parameters;
[0010] based on each group of adjusted structure parameters and the initial device parameters, obtain an adjusted electrical performance evaluation parameter corresponding to each group of adjusted structure parameters;
[0011] if any one of the adjusted electrical performance evaluation parameters belongs to the target electrical performance evaluation parameter range, train the initial field plate structure optimization model by taking the initial structure parameters as input and the adjusted structure parameters corresponding to any one of the adjusted electrical performance evaluation parameters as output;
[0012] in response to the trained initial field plate structure optimization model converging, determine the trained initial field plate structure optimization model as a field plate structure optimization model corresponding to the initial device parameters;
[0013] obtain structure parameters of a field plate structure in a semiconductor device to be optimized and device parameters of the semiconductor device to be optimized;
[0014] if the device parameters match the initial device parameters, input the structure parameters into the field plate structure optimization model to obtain target structure parameters output by the field plate structure optimization model;
[0015] based on the target structure parameters, optimize the field plate structure in the semiconductor device to be optimized.
[0016] In an embodiment of the present disclosure, the method further comprises:
[0017] if none of the adjusted electrical performance evaluation parameters belongs to the target electrical performance evaluation parameter range, determine at least one group of to-be-adjusted structure parameters from the plurality of groups of adjusted structure parameters based on the adjusted electrical performance evaluation parameters and the target electrical performance evaluation parameter range;
[0018] based on the at least one group of to-be-adjusted structure parameters, the initial structure parameters, the adjusted electrical performance evaluation parameters corresponding to the at least one group of to-be-adjusted structure parameters, and the target electrical performance evaluation parameter range, obtain a structure parameter adjustment direction;
[0019] based on the structure parameter adjustment direction, adjust any one of the at least one group of to-be-adjusted structure parameters to obtain a plurality of groups of re-adjusted structure parameters;
[0020] based on each group of re-adjusted structure parameters and the initial device parameters, obtain a re-adjusted electrical performance evaluation parameter corresponding to each group of re-adjusted structure parameters;
[0021] If any of the readjusted electrical performance evaluation parameters belongs to the target electrical performance evaluation parameter range, the initial structure parameter is taken as input, the readjusted structure parameter corresponding to any of the readjusted electrical performance evaluation parameters is taken as output, and the initial field plate structure optimization model is trained.
[0022] In response to the convergence of the trained initial field plate structure optimization model, the trained initial field plate structure optimization model is determined as the field plate structure optimization model corresponding to the initial device parameter.
[0023] In an embodiment of the present disclosure, based on the adjusted electrical performance evaluation parameter and the target electrical performance evaluation parameter range, at least one set of to-be-adjusted structure parameters is determined from a plurality of sets of adjusted structure parameters, comprising:
[0024] The limit value corresponding to the target electrical performance evaluation parameter range and the adjusted electrical performance evaluation parameter of the adjusted structure parameter is determined, and the absolute difference between the limit value and the adjusted electrical performance evaluation parameter corresponding to the adjusted structure parameter is obtained.
[0025] The at least one set of adjusted structure parameters corresponding to the minimum absolute difference is determined as the at least one set of to-be-adjusted structure parameters.
[0026] In an embodiment of the present disclosure, the electrical performance evaluation parameter includes at least one of breakdown voltage, specific on-resistance, and quality factor.
[0027] In an embodiment of the present disclosure, the target electrical performance evaluation parameter range includes: the breakdown voltage is greater than the target breakdown voltage threshold BV0, the specific on-resistance is less than the target specific on-resistance Ron,sp0, and the quality factor is greater than the quality factor threshold FOM0.
[0028] Based on the at least one set of to-be-adjusted structure parameters, the initial structure parameter, the adjusted electrical performance evaluation parameter corresponding to the at least one set of to-be-adjusted structure parameters, and the target electrical performance evaluation parameter range, a structure parameter adjustment direction is obtained, comprising:
[0029] Based on A first fitness function value F(x)1 corresponding to each set of to-be-adjusted structure parameters is obtained, wherein BV1 is the breakdown voltage in the adjusted electrical performance evaluation parameter;
[0030] Based on A second fitness function value F(x)2 corresponding to each set of to-be-adjusted structure parameters is obtained, wherein Ron,sp1 is the specific on-resistance in the adjusted electrical performance evaluation parameter;
[0031] Based on A third fitness function value F(x)3 corresponding to each set of to-be-adjusted structure parameters is obtained, wherein FOM1 is the quality factor in the adjusted electrical performance evaluation parameter;
[0032] determining a target to-be-adjusted structure parameter corresponding to at least one of the first fitness function value F(x)1, the second fitness function value F(x)2, and the third fitness function value F(x)3 being minimum in the at least one group of to-be-adjusted structure parameters;
[0033] determining a structure parameter adjustment direction based on a difference between the target to-be-adjusted structure parameter and the initial structure parameter.
[0034] In a second aspect, an apparatus for optimizing a field plate structure is provided in the embodiments of the present disclosure, and the apparatus comprises:
[0035] The optimization model obtaining module is configured to obtain an initial field plate structure optimization model; based on initial device parameters and initial structure parameters, obtain an initial electrical performance evaluation parameter of the semiconductor device before adjustment, wherein the structure parameters comprise a length of each step in the field plate structure and a thickness of an oxide under the field plate in each step, and the device parameters comprise at least one of a doping concentration of a drift region and a length of the drift region; adjust the initial structure parameters to obtain a plurality of groups of adjusted structure parameters; based on each group of adjusted structure parameters and the initial device parameters, obtain an adjusted electrical performance evaluation parameter corresponding to each group of adjusted structure parameters; if any one of the adjusted electrical performance evaluation parameters belongs to a target electrical performance evaluation parameter range, train the initial field plate structure optimization model by taking the initial structure parameters as input and taking the adjusted structure parameters corresponding to any one of the adjusted electrical performance evaluation parameters as output; and in response to the trained initial field plate structure optimization model converging, determine the trained initial field plate structure optimization model as a field plate structure optimization model corresponding to the initial device parameters.
[0036] The device parameter obtaining module is configured to obtain structure parameters of a field plate structure in a to-be-optimized semiconductor device and device parameters of the semiconductor device, wherein the structure parameters comprise a length of each step in the field plate structure and a thickness of an oxide under the field plate in each step, and the device parameters comprise at least one of a doping concentration of a drift region and a length of the drift region.
[0037] The optimization parameter obtaining module is configured to, if the device parameters match the initial device parameters, take the structure parameters as input, input the field plate structure optimization model, and obtain target structure parameters output by the field plate structure optimization model.
[0038] The field plate structure optimization module is configured to optimize the field plate structure in the to-be-optimized semiconductor device based on the target structure parameters.
[0039] In an embodiment of the present disclosure, the optimization model obtaining module is further configured to:
[0040] If each group of adjusted electrical performance evaluation parameters does not belong to the range of target electrical performance evaluation parameters, at least one group of to-be-adjusted structure parameters is determined from the multiple groups of adjusted structure parameters based on the adjusted electrical performance evaluation parameters and the range of target electrical performance evaluation parameters.
[0041] The structure parameter adjustment direction is obtained based on the at least one group of to-be-adjusted structure parameters, the initial structure parameters, the adjusted electrical performance evaluation parameters corresponding to the at least one group of to-be-adjusted structure parameters, and the range of target electrical performance evaluation parameters.
[0042] Any group of to-be-adjusted structure parameters is adjusted based on the structure parameter adjustment direction to obtain multiple groups of re-adjusted structure parameters.
[0043] The re-adjusted electrical performance evaluation parameters corresponding to each group of re-adjusted structure parameters are obtained based on each group of re-adjusted structure parameters and the initial device parameters.
[0044] If any group of re-adjusted electrical performance evaluation parameters belongs to the range of target electrical performance evaluation parameters, the initial structure parameters are taken as input, the re-adjusted structure parameters corresponding to any group of re-adjusted electrical performance evaluation parameters are taken as output, and the initial field plate structure optimization model is trained.
[0045] In response to the convergence of the trained initial field plate structure optimization model, the trained initial field plate structure optimization model is determined as the field plate structure optimization model corresponding to the initial device parameters.
[0046] In an embodiment of the present disclosure, the optimization model obtaining module is specifically configured to:
[0047] The limit value closest to the adjusted electrical performance evaluation parameter corresponding to the adjustment structure parameter in the range of target electrical performance evaluation parameters is determined, and the absolute difference between the limit value and the adjusted electrical performance evaluation parameter corresponding to the adjustment structure parameter is obtained.
[0048] The at least one group of adjustment structure parameters with the minimum corresponding absolute difference are determined as the at least one group of to-be-adjusted structure parameters.
[0049] In an embodiment of the present disclosure, the electrical performance evaluation parameters include at least one of breakdown voltage, specific on-resistance, and quality factor.
[0050] In an embodiment of the present disclosure, the range of target electrical performance evaluation parameters includes: the breakdown voltage is greater than a target breakdown voltage threshold BV0, the specific on-resistance is less than a target specific on-resistance Ron,sp0, and the quality factor is greater than a quality factor threshold FOM n ;
[0051] The optimization model obtaining module is specifically configured to:
[0052] based on obtain a first fitness function value F(x)1 corresponding to each set of to-be-adjusted structure parameters, wherein BV1 is a breakdown voltage in the adjusted electrical performance evaluation parameter;
[0053] based on obtain a second fitness function value F(x)2 corresponding to each set of to-be-adjusted structure parameters, wherein Ron,sp1 is a specific on-resistance in the adjusted electrical performance evaluation parameter;
[0054] based on obtain a third fitness function value F(x)3 corresponding to each set of to-be-adjusted structure parameters, wherein FOM1 is a figure of merit in the adjusted electrical performance evaluation parameter;
[0055] determine, in at least one set of to-be-adjusted structure parameters, a target to-be-adjusted structure parameter corresponding to at least one of the first fitness function value F(x)1, the second fitness function value F(x)2, and the third fitness function value F(x)3 being the minimum;
[0056] based on a difference between the target to-be-adjusted structure parameter and the initial structure parameter, determine a structure parameter adjustment direction.
[0057] In a third aspect, an electronic device is provided, including a memory and a processor, wherein the memory is configured to store one or more computer instructions, and the one or more computer instructions are executed by the processor to implement the method according to any one of the first aspect.
[0058] In a fourth aspect, a computer readable storage medium is provided, and the computer readable storage medium stores computer instructions, and the computer instructions are executed by a processor to implement the method according to any one of the first aspect.
[0059] According to the technical scheme provided by the embodiment of the present disclosure, the initial field plate structure optimization model is obtained; based on the initial device parameters and the initial structure parameters, the initial electrical performance evaluation parameter of the semiconductor device before adjustment is obtained, wherein the structure parameters include the length of each step in the field plate structure and the thickness of the oxide under the field plate in each step, and the device parameters include at least one of the doping concentration of the drift region and the length of the drift region; the initial structure parameters are adjusted to obtain a plurality of sets of adjusted structure parameters; based on each set of adjusted structure parameters and the initial device parameters, the adjusted electrical performance evaluation parameter corresponding to each set of adjusted structure parameters is obtained; if any one of the adjusted electrical performance evaluation parameters belongs to the target electrical performance evaluation parameter range, the initial structure parameters are taken as input, the adjusted structure parameters corresponding to any one of the adjusted electrical performance evaluation parameters are taken as output, and the initial field plate structure optimization model is trained; in response to the convergence of the trained initial field plate structure optimization model, the trained initial field plate structure optimization model is determined as the field plate structure optimization model corresponding to the initial device parameters; the structure parameters of the field plate structure in the semiconductor device to be optimized and the device parameters of the semiconductor device to be optimized are obtained; if the device parameters match the initial device parameters, the structure parameters are taken as input, the field plate structure optimization model is input, and the target structure parameters output by the field plate structure optimization model are obtained; and the field plate structure in the semiconductor device to be optimized is optimized based on the target structure parameters. The scheme can optimize the field plate structure in the semiconductor device without relying on the experience of the designer, so as to ensure that the optimized semiconductor device can meet the requirements, improve the efficiency of optimizing the field plate structure, and reduce the cost of optimizing the field plate structure.
[0060] It should be understood that the foregoing general description and the following detailed description are only exemplary and explanatory, and cannot limit the present disclosure. BRIEF DESCRIPTION OF DRAWINGS
[0061] Other features, objects, and advantages of the present disclosure will become more apparent from the following detailed description of the non-limiting embodiments, taken in conjunction with the accompanying drawings. In the drawings:
[0062] Figure 1 A flowchart of a field plate structure optimization method according to an embodiment of the present disclosure is shown.
[0063] Figure 2 A schematic structural diagram of a field plate structure according to an embodiment of the present disclosure is shown.
[0064] Figure 3 A structural block diagram of a field plate structure optimization apparatus according to an embodiment of the present disclosure is shown.
[0065] Figure 4 A structural block diagram of an electronic device according to an embodiment of the present disclosure is shown.
[0066] Figure 5 A structural diagram of a computer system suitable for implementing the method according to the embodiments of the present disclosure is shown. DETAILED DESCRIPTION
[0067] Hereinafter, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings so as to be easily carried out by one of ordinary skill in the art. Also, portions irrelevant to the description of the exemplary embodiments are omitted in the accompanying drawings for the sake of clarity.
[0068] In the present disclosure, it should be understood that terms such as "include" or "have" are intended to indicate that there are features, numbers, steps, actions, components, parts or combinations thereof disclosed in the specification, and do not exclude the possibility that one or more other features, numbers, steps, actions, components, parts or combinations thereof exist or are added.
[0069] It should also be further noted that the embodiments in the present disclosure and the features in the embodiments can be combined with each other without conflict. The present disclosure will be described in detail below with reference to the accompanying drawings and in conjunction with the embodiments.
[0070] In the present disclosure, if it relates to an operation of acquiring user information or user data or an operation of showing user information or user data to others, the operation is an operation authorized, confirmed by the user, or actively selected by the user.
[0071] In the related art, when designing a power semiconductor device, the field plate structure therein often needs to be optimized to achieve better results. Generally, a designer can optimize the field plate structure based on experience, and then simulate the structural parameters of the optimized field plate structure through simulation software to determine whether the optimized field plate structure meets the requirements.
[0072] However, the applicant finds that the above scheme can optimize the field plate structure of the power semiconductor device, but it needs to be based on the experience of the simulation personnel, and when the optimized field plate structure meets the requirements, the designer needs to repeatedly iterate the design scheme of the power semiconductor device to optimize the power semiconductor device. The efficiency of optimizing the power semiconductor device is low, and a lot of manpower is consumed, resulting in a high cost of optimizing the power semiconductor device.
[0073] To solve the above problems, a field plate structure optimization method, device, equipment and medium are provided in the embodiments of the present disclosure.
[0074] According to the technical scheme provided by the embodiment of the present disclosure, the initial field plate structure optimization model is obtained; based on the initial device parameters and the initial structure parameters, the electrical performance evaluation parameter of the semiconductor device before adjustment is obtained, wherein the structure parameters include the length of each step in the field plate structure and the thickness of the oxide under the field plate in each step, and the device parameters include at least one of the doping concentration of the drift region and the length of the drift region; the initial structure parameters are adjusted to obtain a plurality of sets of adjusted structure parameters; based on each set of adjusted structure parameters and the initial device parameters, the adjusted electrical performance evaluation parameter corresponding to each set of adjusted structure parameters is obtained; if any one of the adjusted electrical performance evaluation parameters belongs to the target electrical performance evaluation parameter range, the initial structure parameters are taken as input, the adjusted structure parameters corresponding to any one of the adjusted electrical performance evaluation parameters are taken as output, and the initial field plate structure optimization model is trained; in response to the convergence of the trained initial field plate structure optimization model, the trained initial field plate structure optimization model is determined as the field plate structure optimization model corresponding to the initial device parameters; the structure parameters of the field plate structure in the semiconductor device to be optimized and the device parameters of the semiconductor device to be optimized are obtained; if the device parameters match the initial device parameters, the structure parameters are taken as input, the field plate structure optimization model is input, and the target structure parameters output by the field plate structure optimization model are obtained; and the field plate structure in the semiconductor device to be optimized is optimized based on the target structure parameters. The scheme can optimize the field plate structure in the semiconductor device without relying on the experience of the designer, so as to ensure that the optimized semiconductor device can meet the requirements, improve the efficiency of optimizing the field plate structure, and reduce the cost of optimizing the field plate structure.
[0075] Figure 1 A flowchart of a field plate structure optimization method according to an embodiment of the present disclosure is shown. As shown in Figure 1 The field plate structure optimization method includes the following steps S101-S109:
[0076] In step S101, an initial field plate structure optimization model is obtained;
[0077] In step S102, based on the initial device parameters and the initial structure parameters, the electrical performance evaluation parameter of the semiconductor device before adjustment is obtained;
[0078] Wherein the structure parameters include the length of each step in the field plate structure and the thickness of the oxide under the field plate in each step, and the device parameters include at least one of the doping concentration of the drift region and the length of the drift region;
[0079] In step S103, the initial structure parameters are adjusted to obtain a plurality of sets of adjusted structure parameters;
[0080] In step S104, based on each set of adjusted structure parameters and the initial device parameters, an adjusted electrical performance evaluation parameter corresponding to each set of adjusted structure parameters is obtained.
[0081] In step S105, if any one of the adjusted electrical performance evaluation parameters belongs to the target electrical performance evaluation parameter range, the initial structure parameters are taken as input, the adjusted structure parameters corresponding to any one of the adjusted electrical performance evaluation parameters are taken as output, and the initial field plate structure optimization model is trained.
[0082] In step S106, in response to the convergence of the trained initial field plate structure optimization model, the trained initial field plate structure optimization model is determined as the field plate structure optimization model corresponding to the initial device parameters.
[0083] In step S107, the structure parameters of the field plate structure in the semiconductor device to be optimized and the device parameters of the semiconductor device to be optimized are obtained.
[0084] In step S108, if the device parameters match the initial device parameters, the structure parameters are taken as input, and the field plate structure optimization model is input to obtain the target structure parameters output by the field plate structure optimization model.
[0085] In step S109, the field plate structure in the semiconductor device to be optimized is optimized based on the target structure parameters.
[0086] In an implementation manner of the present disclosure, the structure parameters of the field plate structure in the semiconductor device and the device parameters of the semiconductor device can be obtained based on the design data of the semiconductor device, or the structure parameters and the device parameters can be obtained by measuring the actual semiconductor device.
[0087] For example, Figure 2 A schematic structural diagram of a field plate structure according to an embodiment of the present disclosure is shown as follows. Figure 2 As shown in the figure, the field plate structure is located on the surface of the semiconductor device 200, and the field plate structure includes a field plate 201 in a stepped shape and an oxide 202 located below the field plate 201. The structure parameters include the length of each step in the field plate structure, i.e., the step length 211, the step length 221, and the step length 231. The structure parameters also include the thickness of the oxide 202 below the field plate 201 in each step, i.e., the thickness 212, the thickness 222, and the thickness 232.
[0088] In an implementation manner of the present disclosure, the drift region of the semiconductor device can be understood as a carrier concentration gradient region caused by a doping element in the semiconductor device.
[0089] In an implementation form of the present disclosure, the field plate structure optimization model can be a neural network (NN) model, a convolutional neural networks (CNN) model, or a long short-term memory (LSTM) model, etc.
[0090] In an implementation form of the present disclosure, based on the device parameters and the initial structure parameters, the obtaining of the evaluation parameter of the electrical performance of the semiconductor device before adjustment can be understood as performing simulation based on the device parameters and the initial structure parameters, and obtaining the evaluation parameter of the electrical performance of the semiconductor device before adjustment according to the simulation result; or can be understood as manufacturing a corresponding semiconductor device based on the device parameters and the initial structure parameters, and detecting the manufactured semiconductor device, and obtaining the evaluation parameter of the electrical performance of the semiconductor device before adjustment according to the actual detection result.
[0091] Similarly, based on each set of adjustment structure parameters and the device parameters, the obtaining of the evaluation parameter of the electrical performance of the semiconductor device after adjustment corresponding to each set of adjustment structure parameters can be understood as performing simulation based on the device parameters and the adjustment structure parameters, and obtaining the evaluation parameter of the electrical performance of the semiconductor device after adjustment according to the simulation result; or can be understood as manufacturing a corresponding semiconductor device based on the device parameters and the adjustment structure parameters, and detecting the manufactured semiconductor device, and obtaining the evaluation parameter of the electrical performance of the semiconductor device after adjustment according to the actual detection result.
[0092] In an implementation form of the present disclosure, the adjustment of the initial structure parameters to obtain a plurality of sets of adjustment structure parameters can be understood as randomly adjusting the initial structure parameters within a preset structure parameter value range; or can be understood as adjusting the initial structure parameters based on a pre-obtained algorithm.
[0093] In an implementation form of the present disclosure, the optimization of the field plate structure in the semiconductor device based on the target structure parameters can be understood as updating the structure parameters in the design data of the semiconductor device to the target structure parameters, or can be understood as modifying the actual semiconductor device based on the target structure parameters.
[0094] According to the technical scheme provided by the embodiment of the present disclosure, the initial field plate structure optimization model is obtained; based on the initial device parameters and the initial structure parameters, the initial electrical performance evaluation parameter of the semiconductor device before adjustment is obtained, wherein the structure parameters include the length of each step in the field plate structure and the thickness of the oxide under the field plate in each step, and the device parameters include at least one of the doping concentration of the drift region and the length of the drift region; the initial structure parameters are adjusted to obtain a plurality of sets of adjusted structure parameters; based on each set of adjusted structure parameters and the initial device parameters, an adjusted electrical performance evaluation parameter corresponding to each set of adjusted structure parameters is obtained; if any one set of adjusted electrical performance evaluation parameter belongs to the target electrical performance evaluation parameter range, the initial structure parameters are taken as input, the adjusted structure parameters corresponding to any one set of adjusted electrical performance evaluation parameter are taken as output, and the initial field plate structure optimization model is trained; in response to the convergence of the trained initial field plate structure optimization model, the trained initial field plate structure optimization model is determined as the field plate structure optimization model corresponding to the initial device parameters; the structure parameters of the field plate structure in the semiconductor device to be optimized and the device parameters of the semiconductor device to be optimized are obtained; if the device parameters match the initial device parameters, the structure parameters are taken as input, the field plate structure optimization model is input, and the target structure parameters output by the field plate structure optimization model are obtained; and the field plate structure in the semiconductor device to be optimized is optimized based on the target structure parameters. The scheme can optimize the field plate structure in the semiconductor device without relying on the experience of the designer, so as to ensure that the optimized semiconductor device can meet the requirements, improve the efficiency of optimizing the field plate structure, and reduce the cost of optimizing the field plate structure.
[0095] In an embodiment of the present disclosure, the method further comprises:
[0096] If each set of adjusted electrical performance evaluation parameter does not belong to the target electrical performance evaluation parameter range, at least one set of to-be-adjusted structure parameter is determined from the plurality of sets of adjusted structure parameters based on the adjusted electrical performance evaluation parameter and the target electrical performance evaluation parameter range.
[0097] Based on the at least one set of to-be-adjusted structure parameter, the initial structure parameter, the adjusted electrical performance evaluation parameter corresponding to the at least one set of to-be-adjusted structure parameter, and the target electrical performance evaluation parameter range, a structure parameter adjustment direction is obtained.
[0098] Based on the structure parameter adjustment direction, any one set of to-be-adjusted structure parameter is adjusted to obtain a plurality of sets of re-adjusted structure parameters.
[0099] Based on each set of re-adjusted structure parameter and the initial device parameter, a re-adjusted electrical performance evaluation parameter corresponding to each set of re-adjusted structure parameter is obtained.
[0100] If any one group of re-adjusted electrical performance evaluation parameters belongs to the target electrical performance evaluation parameter range, the initial structure parameter is taken as input, the re-adjusted structure parameter corresponding to any one group of re-adjusted electrical performance evaluation parameters is taken as output, and the initial field plate structure optimization model is trained.
[0101] In response to the convergence of the trained initial field plate structure optimization model, the trained initial field plate structure optimization model is determined as the field plate structure optimization model corresponding to the initial device parameter.
[0102] According to the technical scheme provided by the embodiments of the present disclosure, if the electrical performance evaluation parameter after each adjustment does not belong to the target electrical performance evaluation parameter range, at least one group of to-be-adjusted structure parameters is determined from the multiple groups of adjusted structure parameters based on the adjusted electrical performance evaluation parameter and the target electrical performance evaluation parameter range; the structure parameter adjustment direction is obtained based on the at least one group of to-be-adjusted structure parameters, the initial structure parameter, the adjusted electrical performance evaluation parameter corresponding to the at least one group of to-be-adjusted structure parameters, and the target electrical performance evaluation parameter range; any one group of to-be-adjusted structure parameters is adjusted based on the structure parameter adjustment direction to obtain multiple groups of re-adjusted structure parameters; the re-adjusted electrical performance evaluation parameter corresponding to each group of re-adjusted structure parameters is obtained based on each group of re-adjusted structure parameters and the initial device parameter; if any one group of re-adjusted electrical performance evaluation parameters belongs to the target electrical performance evaluation parameter range, the initial structure parameter is taken as input, the re-adjusted structure parameter corresponding to any one group of re-adjusted electrical performance evaluation parameters is taken as output, and the initial field plate structure optimization model is trained; in response to the convergence of the trained initial field plate structure optimization model, the trained initial field plate structure optimization model is determined as the field plate structure optimization model corresponding to the initial device parameter. The above scheme can re-adjust the to-be-adjusted structure parameters when the electrical performance evaluation parameter after each adjustment does not belong to the target electrical performance evaluation parameter range, so as to ensure that the re-adjusted structure parameter corresponding to the re-adjusted electrical performance evaluation parameter belonging to the target electrical performance evaluation parameter range can be obtained, thereby training the initial field plate structure optimization model based on the initial structure parameter and the re-adjusted structure parameter, thereby improving the efficiency of training the field plate structure optimization model and reducing the training cost.
[0103] In an embodiment of the present disclosure, determining at least one group of to-be-adjusted structure parameters from the multiple groups of adjusted structure parameters based on the adjusted electrical performance evaluation parameter and the target electrical performance evaluation parameter range comprises:
[0104] determining the limit value closest to the adjusted electrical performance evaluation parameter corresponding to the target electrical performance evaluation parameter range and the adjusted structure parameter, and obtaining the absolute difference between the limit value and the adjusted electrical performance evaluation parameter corresponding to the adjusted structure parameter;
[0105] At least one set of adjustment structure parameters corresponding to the minimum absolute difference is determined as the at least one set of structure parameters to be adjusted.
[0106] According to the technical scheme provided by the embodiment of the present disclosure, by determining the limit value closest to the adjusted electrical performance evaluation parameter corresponding to the adjustment structure parameter in the target electrical performance evaluation parameter range, and obtaining the absolute difference between the limit value and the adjusted electrical performance evaluation parameter corresponding to the adjustment structure parameter, at least one set of adjustment structure parameters corresponding to the minimum absolute difference is determined as the at least one set of structure parameters to be adjusted, which can improve the speed of obtaining the structure parameters corresponding to the electrical performance evaluation parameter belonging to the target electrical performance evaluation parameter range after adjusting any set of structure parameters to be adjusted based on the adjustment direction of the structure parameter, thereby accelerating the training speed and reducing the training cost.
[0107] In an embodiment of the present disclosure, the electrical performance evaluation parameter includes at least one of breakdown voltage, specific on-resistance, and quality factor.
[0108] In an embodiment of the present disclosure, the target electrical performance evaluation parameter range includes: the breakdown voltage is greater than the target breakdown voltage threshold BV0, the specific on-resistance is less than the target specific on-resistance Ron,sp n , and the quality factor is greater than the quality factor threshold FOM n .
[0109] The structure parameter adjustment direction is obtained based on the at least one set of structure parameters to be adjusted, the initial structure parameter, the adjusted electrical performance evaluation parameter corresponding to the at least one set of structure parameters to be adjusted, and the target electrical performance evaluation parameter range, including:
[0110] The first fitness function value F(x)1 corresponding to each set of structure parameters to be adjusted is obtained based on , wherein BV1 is the breakdown voltage in the adjusted electrical performance evaluation parameter.
[0111] The second fitness function value F(x)2 corresponding to each set of structure parameters to be adjusted is obtained based on , wherein Ron,sp1 is the specific on-resistance in the adjusted electrical performance evaluation parameter.
[0112] The third fitness function value F(x)3 corresponding to each set of structure parameters to be adjusted is obtained based on , wherein FOM1 is the quality factor in the adjusted electrical performance evaluation parameter.
[0113] determining a target to-be-adjusted structure parameter corresponding to at least one of the first fitness function value F(x)1, the second fitness function value F(x)2 and the third fitness function value F(x)3 being minimum in at least one group of to-be-adjusted structure parameters;
[0114] determining a structure parameter adjustment direction based on a difference between the target to-be-adjusted structure parameter and the initial structure parameter.
[0115] In an embodiment of the present disclosure, the determining of the structure parameter adjustment direction based on the difference between the target to-be-adjusted structure parameter and the initial structure parameter can be understood as: if the target to-be-adjusted structure parameter is greater than the initial structure parameter, then a direction of expanding the target to-be-adjusted structure parameter is determined as the structure parameter adjustment direction.
[0116] According to the technical scheme provided by the embodiments of the present disclosure, the accuracy of obtaining the structure parameter adjustment direction can be improved, and after adjusting any group of to-be-adjusted structure parameters based on the structure parameter adjustment direction, it can be ensured that the re-adjusted electrical performance evaluation parameter corresponding to the structure parameter belongs to the target electrical performance evaluation parameter range, thereby speeding up the obtaining of the structure parameter corresponding to the electrical performance evaluation parameter belonging to the target electrical performance evaluation parameter range, and helping to speed up the training speed and reduce the training cost.
[0117] Figure 3 A structural block diagram of a field plate structure optimization apparatus according to an embodiment of the present disclosure is shown. The apparatus can be implemented as part or all of an electronic device by software, hardware or a combination of both.
[0118] As shown in FIG. 3, the field plate structure optimization apparatus 300 includes: Figure 3
[0119] The optimization model obtaining module 301 is configured to obtain an initial field plate structure optimization model; obtain an initial electrical performance evaluation parameter of the semiconductor device before adjustment based on initial device parameters and initial structure parameters, wherein the structure parameters include the length of each step in the field plate structure and the thickness of the oxide under the field plate in each step, and the device parameters include at least one of the doping concentration of the drift region and the length of the drift region; adjust the initial structure parameters to obtain a plurality of sets of adjusted structure parameters; obtain an adjusted electrical performance evaluation parameter corresponding to each set of adjusted structure parameters based on each set of adjusted structure parameters and the initial device parameters; if any one of the adjusted electrical performance evaluation parameters belongs to a target electrical performance evaluation parameter range, train the initial field plate structure optimization model by taking the initial structure parameters as input and taking the adjusted structure parameters corresponding to any one of the adjusted electrical performance evaluation parameters as output; and determine the trained initial field plate structure optimization model as a field plate structure optimization model corresponding to the initial device parameters in response to the trained initial field plate structure optimization model converging.
[0120] The device parameter obtaining module 302 is configured to obtain structure parameters of the field plate structure in the semiconductor device to be optimized and device parameters of the semiconductor device, wherein the structure parameters include the length of each step in the field plate structure and the thickness of the oxide under the field plate in each step, and the device parameters include at least one of the doping concentration of the drift region and the length of the drift region.
[0121] The optimization parameter obtaining module 303 is configured to input the structure parameters into the field plate structure optimization model to obtain target structure parameters output by the field plate structure optimization model if the device parameters match the initial device parameters.
[0122] The field plate structure optimization module 304 is configured to optimize the field plate structure in the semiconductor device to be optimized based on the target structure parameters.
[0123] In an embodiment of the present disclosure, the optimization model obtaining module 301 is further configured to:
[0124] If none of the adjusted electrical performance evaluation parameters belongs to the target electrical performance evaluation parameter range, determine at least one set of structure parameters to be adjusted from the plurality of sets of adjusted structure parameters based on the adjusted electrical performance evaluation parameters and the target electrical performance evaluation parameter range.
[0125] Obtain a structure parameter adjustment direction based on the at least one set of structure parameters to be adjusted, the initial structure parameters, the adjusted electrical performance evaluation parameter corresponding to the at least one set of structure parameters to be adjusted, and the target electrical performance evaluation parameter range.
[0126] adjust any group of the to-be-adjusted structure parameters based on the adjustment direction of the structure parameters to obtain a plurality of groups of re-adjusted structure parameters;
[0127] based on each group of the re-adjusted structure parameters and the initial device parameters, obtain a re-adjusted electrical performance evaluation parameter corresponding to each group of the re-adjusted structure parameters;
[0128] if any group of the re-adjusted electrical performance evaluation parameter belongs to the target electrical performance evaluation parameter range, train the initial field plate structure optimization model by taking the initial structure parameters as input and taking the re-adjusted structure parameters corresponding to any group of the re-adjusted electrical performance evaluation parameter as output;
[0129] in response to the trained initial field plate structure optimization model converging, determine the trained initial field plate structure optimization model as a field plate structure optimization model corresponding to the initial device parameters.
[0130] In an embodiment of the present disclosure, the optimization model obtaining module 301 is specifically configured to:
[0131] determine a limit value closest to the adjusted electrical performance evaluation parameter corresponding to the adjustment structure parameter in the target electrical performance evaluation parameter range, and obtain an absolute difference between the limit value and the adjusted electrical performance evaluation parameter corresponding to the adjustment structure parameter;
[0132] determine at least one group of the adjustment structure parameters corresponding to the smallest absolute difference as at least one group of the to-be-adjusted structure parameters.
[0133] In an embodiment of the present disclosure, the electrical performance evaluation parameter includes at least one of breakdown voltage, specific on-resistance, and quality factor.
[0134] In an embodiment of the present disclosure, the target electrical performance evaluation parameter range includes: the breakdown voltage is greater than a target breakdown voltage threshold BV0, the specific on-resistance is less than a target specific on-resistance Ron,sp0, and the quality factor is greater than a quality factor threshold FOM0.
[0135] The optimization model obtaining module 301 is specifically configured to:
[0136] based on obtain a first fitness function value F(x)1 corresponding to each group of the to-be-adjusted structure parameters, wherein BV1 is the breakdown voltage in the adjusted electrical performance evaluation parameter;
[0137] based on obtain a second fitness function value F(x)2 corresponding to each group of the to-be-adjusted structure parameters, wherein Ron,sp1 is the specific on-resistance in the adjusted electrical performance evaluation parameter;
[0138] based on Obtaining a third adaptation function value F(x)3 corresponding to each set of structural parameters to be adjusted, wherein FOM1 is a quality factor in the electrical performance evaluation parameter after adjustment;
[0139] Determine, in at least one set of structural parameters to be adjusted, a target structural parameter to be adjusted having a minimum value among at least one of a first adaptation function value F(x)1, a second adaptation function value F(x)2, and a third adaptation function value F(x)3;
[0140] The adjustment direction of the structural parameters is determined based on the difference between the target structural parameters to be adjusted and the initial structural parameters.
[0141] According to the technical solution provided by the embodiment of the present disclosure, an initial field plate structure optimization model is obtained; based on the initial device parameters and the initial structural parameters, the electrical performance evaluation parameters of the initial semiconductor device before adjustment are obtained, wherein the structural parameters include the length of each step in the field plate structure and the thickness of the oxide under the field plate in each step, and the device parameters include at least one of the doping concentration of the drift region and the length of the drift region; the initial structural parameters are adjusted to obtain multiple groups of adjusted structural parameters; based on each group of adjusted structural parameters and the initial device parameters, the adjusted electrical performance evaluation parameters corresponding to each group of adjusted structural parameters are obtained; if any group of adjusted electrical performance evaluation parameters falls within the target electrical performance evaluation parameter range, the electrical performance evaluation parameters corresponding to the adjusted structural parameters are obtained. If the initial field plate structure optimization model is trained, the initial structural parameters are used as input, and the adjusted structural parameters corresponding to any set of adjusted electrical performance evaluation parameters are used as output. In response to the convergence of the trained initial field plate structure optimization model, the trained initial field plate structure optimization model is determined as the field plate structure optimization model corresponding to the initial device parameters. The structural parameters of the field plate structure in the semiconductor device to be optimized and the device parameters of the semiconductor device to be optimized are obtained. If the device parameters match the initial device parameters, the structural parameters are used as input and input into the field plate structure optimization model to obtain the target structural parameters output by the field plate structure optimization model. The field plate structure in the semiconductor device to be optimized is optimized based on the target structural parameters. This solution can optimize the field plate structure in the semiconductor device without relying on the experience of the designer to ensure that the optimized semiconductor device can meet the requirements, thereby improving the efficiency of optimizing the field plate structure and reducing the cost of optimizing the field plate structure.
[0142] The present disclosure also discloses an electronic device, Figure 4 A structural block diagram of an electronic device according to an embodiment of the present disclosure is shown.
[0143] like Figure 4As shown, the electronic device includes a memory and a processor, wherein the memory is configured to store one or more computer instructions, and the one or more computer instructions are executed by the processor to implement the method according to the embodiments of the present disclosure.
[0144] The method for optimizing a field plate structure provided in the embodiments of the present disclosure comprises:
[0145] An initial field plate structure optimization model is obtained.
[0146] Based on the initial device parameters and the initial structure parameters, an initial electrical performance evaluation parameter of the semiconductor device before adjustment is obtained, wherein the structure parameters include the length of each step in the field plate structure and the thickness of the oxide under the field plate in each step, and the device parameters include at least one of the doping concentration of the drift region and the length of the drift region.
[0147] The initial structure parameters are adjusted to obtain a plurality of sets of adjusted structure parameters.
[0148] Based on each set of adjusted structure parameters and the initial device parameters, an adjusted electrical performance evaluation parameter corresponding to each set of adjusted structure parameters is obtained.
[0149] If any one of the adjusted electrical performance evaluation parameters belongs to the target electrical performance evaluation parameter range, the initial structure parameters are taken as input, the adjusted structure parameters corresponding to any one of the adjusted electrical performance evaluation parameters are taken as output, and the initial field plate structure optimization model is trained.
[0150] In response to the convergence of the trained initial field plate structure optimization model, the trained initial field plate structure optimization model is determined as the field plate structure optimization model corresponding to the initial device parameters.
[0151] The structure parameters of the field plate structure in the semiconductor device to be optimized and the device parameters of the semiconductor device to be optimized are obtained.
[0152] If the device parameters match the initial device parameters, the structure parameters are taken as input, and the field plate structure optimization model is input to obtain the target structure parameters output by the field plate structure optimization model.
[0153] The field plate structure in the semiconductor device to be optimized is optimized based on the target structure parameters.
[0154] In an embodiment of the present disclosure, the method further comprises:
[0155] If none of the adjusted electrical performance evaluation parameters belongs to the target electrical performance evaluation parameter range, at least one set of structure parameters to be adjusted is determined from the plurality of sets of adjusted structure parameters based on the adjusted electrical performance evaluation parameters and the target electrical performance evaluation parameter range.
[0156] obtaining a structure parameter adjustment direction based on the at least one group of to-be-adjusted structure parameters, the initial structure parameters, the adjusted electrical performance evaluation parameters corresponding to the at least one group of to-be-adjusted structure parameters, and the target electrical performance evaluation parameter range;
[0157] adjusting any group of to-be-adjusted structure parameters based on the structure parameter adjustment direction to obtain a plurality of groups of re-adjusted structure parameters;
[0158] obtaining a re-adjusted electrical performance evaluation parameter corresponding to each group of re-adjusted structure parameters based on each group of re-adjusted structure parameters and the initial device parameters;
[0159] if any group of re-adjusted electrical performance evaluation parameters belongs to the target electrical performance evaluation parameter range, training the initial field plate structure optimization model by taking the initial structure parameters as input and taking the re-adjusted structure parameters corresponding to any group of re-adjusted electrical performance evaluation parameters as output;
[0160] in response to the trained initial field plate structure optimization model converging, determining the trained initial field plate structure optimization model as a field plate structure optimization model corresponding to the initial device parameters.
[0161] In an embodiment of the present disclosure, based on the adjusted electrical performance evaluation parameters and the target electrical performance evaluation parameter range, at least one group of to-be-adjusted structure parameters is determined from the plurality of groups of adjusted structure parameters, comprising:
[0162] determining a limit value closest to the adjusted electrical performance evaluation parameter corresponding to the adjustment structure parameter in the target electrical performance evaluation parameter range, and obtaining an absolute difference between the limit value and the adjusted electrical performance evaluation parameter corresponding to the adjustment structure parameter;
[0163] determining at least one group of adjustment structure parameters with the smallest corresponding absolute difference as the at least one group of to-be-adjusted structure parameters.
[0164] In an embodiment of the present disclosure, the electrical performance evaluation parameter includes at least one of breakdown voltage, specific on-resistance, and quality factor.
[0165] In an embodiment of the present disclosure, the target electrical performance evaluation parameter range includes: the breakdown voltage is greater than a target breakdown voltage threshold BV0, the specific on-resistance is less than a target specific on-resistance Ron,sp0, and the quality factor is greater than a quality factor threshold FOM n ;
[0166] obtaining a structure parameter adjustment direction based on the at least one group of to-be-adjusted structure parameters, the initial structure parameters, the adjusted electrical performance evaluation parameters corresponding to the at least one group of to-be-adjusted structure parameters, and the target electrical performance evaluation parameter range, comprising:
[0167] Based on Obtain the first fitness function value F(x)1 corresponding to each group of to-be-adjusted structure parameters, wherein BV1 is the breakdown voltage in the adjusted electrical performance evaluation parameter;
[0168] Based on Obtain the second fitness function value F(x)2 corresponding to each group of to-be-adjusted structure parameters, wherein Ron,sp1 is the specific on-resistance in the adjusted electrical performance evaluation parameter;
[0169] Based on Obtain the third fitness function value F(x)3 corresponding to each group of to-be-adjusted structure parameters, wherein FOM1 is the figure of merit in the adjusted electrical performance evaluation parameter;
[0170] Determine the target to-be-adjusted structure parameter in at least one group of to-be-adjusted structure parameters, which has at least one of the first fitness function value F(x)1, the second fitness function value F(x)2, and the third fitness function value F(x)3 being the minimum;
[0171] Based on the difference between the target to-be-adjusted structure parameter and the initial structure parameter, determine the structure parameter adjustment direction.
[0172] Figure 5 A structural diagram of a computer system suitable for implementing the method according to the embodiments of the present disclosure is shown.
[0173] As Figure 5 shown, the computer system includes a processing unit that can execute various methods in the above embodiments according to programs stored in a read-only memory (ROM) or loaded from a storage portion into a random access memory (RAM). Various programs and data required for the operation of the computer system are also stored in the RAM. The processing unit, the ROM, and the RAM are connected to each other through a bus. An input / output (I / O) interface is also connected to the bus.
[0174] The following components are connected to the I / O interface: an input portion including a keyboard, a mouse, and the like; an output portion including a cathode ray tube (CRT), a liquid crystal display (LCD), and the like, and a speaker, and the like; a storage portion including a hard disk, and the like; and a communication portion including a network interface card such as a LAN card, a modem, and the like. The communication portion performs a communication process via a network such as the Internet. A drive is also connected to the I / O interface as needed. A removable medium such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, and the like is mounted on the drive as needed, so that a computer program read therefrom is installed in the storage portion as needed. Among them, the processing unit can be implemented as a CPU, a GPU, a TPU, a FPGA, an NPU, and the like.
[0175] In particular, the method described above can be implemented as a computer software program according to embodiments of the present disclosure. For example, embodiments of the present disclosure include a computer program product comprising a computer program tangibly embodied on a machine-readable medium, the computer program containing program code for executing the methods described above. In such embodiments, the computer program can be downloaded and installed from a network via a communication part, and / or installed from a removable medium.
[0176] The flow and block diagrams in the drawings show the architectural, functional and operational views of possible implementations of systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flow and block diagrams can represent a module, a segment, or a portion of code, which contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions noted in the blocks can occur out of the order noted in the figures. For example, two blocks shown in succession can in fact be executed substantially concurrently, or the blocks can sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block in the block diagrams and / or flowchart illustrations, and combinations of blocks in the block diagrams and / or flowchart illustrations, can be implemented by special purpose hardware-based systems that perform the specified functions or operations, or combinations of special purpose hardware and computer instructions.
[0177] The units or modules described in the embodiments of the present disclosure can be implemented by means of software, or by means of programmable hardware. The described units or modules can also be provided in a processor, and the names of these units or modules do not constitute a limitation on the units or modules themselves in some cases.
[0178] As another aspect, the present disclosure also provides a computer readable storage medium, which can be a computer readable storage medium contained in the electronic device or computer system in the above embodiments; or can exist separately, and is not assembled into the device. The computer readable storage medium stores one or more programs, which are used by one or more processors to execute the methods described in the present disclosure.
[0179] The above description is merely that of the preferred embodiments of the present disclosure and a description of the technical principles of the present disclosure. It should be understood by those skilled in the art that the inventive scope involved in the present disclosure is not limited to the technical solutions formed by the specific combinations of the above technical features, and should also cover other technical solutions formed by the combinations of the above technical features or equivalent features without departing from the inventive concept. For example, the technical solutions formed by the mutual replacement of the above features and the technical features with similar functions disclosed in the present disclosure (but not limited to) without departing from the inventive concept.
Claims
1. A method for optimizing a field plate structure, characterized in that: include: Obtaining the initial field plate structure optimization model; Obtaining electrical performance evaluation parameters of the initial semiconductor device before adjustment based on initial device parameters and initial structural parameters, wherein the structural parameters include the length of each of a plurality of steps of the field plate structure and the thickness of an oxide located under the field plate in each of the plurality of steps of the field plate structure, and the device parameters include at least one of a doping concentration of the drift region and a length of the drift region; Adjusting the initial structural parameters to obtain multiple sets of adjusted structural parameters; Based on each set of adjustment structure parameters and the initial device parameters, obtaining adjusted electrical performance evaluation parameters corresponding to each set of adjustment structure parameters; If any set of adjusted electrical performance evaluation parameters falls within the target electrical performance evaluation parameter range, the initial structural parameters are used as input, and the adjusted structural parameters corresponding to the set of adjusted electrical performance evaluation parameters are used as output to train the initial field plate structure optimization model; In response to the convergence of the trained initial field plate structure optimization model, determining the trained initial field plate structure optimization model as the field plate structure optimization model corresponding to the initial device parameters; Acquiring structural parameters of a field plate structure including a plurality of steps in a semiconductor device to be optimized and device parameters of the semiconductor device to be optimized; If the device parameters match the initial device parameters, the structural parameters are used as inputs into the field plate structure optimization model to obtain target structural parameters output by the field plate structure optimization model; Optimizing the field plate structure in the semiconductor device to be optimized based on the target structural parameters; The method further comprises: If each set of adjusted electrical performance evaluation parameters does not fall within the target electrical performance evaluation parameter range, determining at least one set of structural parameters to be adjusted from the multiple sets of adjustment structural parameters based on the adjusted electrical performance evaluation parameters and the target electrical performance evaluation parameter range; Obtaining a structural parameter adjustment direction based on the at least one set of structural parameters to be adjusted, the initial structural parameters, the adjusted electrical performance evaluation parameters corresponding to the at least one set of structural parameters to be adjusted, and a target electrical performance evaluation parameter range; Adjusting any one of the sets of structural parameters to be adjusted based on the structural parameter adjustment direction to obtain multiple sets of readjusted structural parameters; Based on each set of readjusted structural parameters and the initial device parameters, obtaining readjusted electrical performance evaluation parameters corresponding to each set of readjusted structural parameters; If any set of readjusted electrical performance evaluation parameters falls within the target electrical performance evaluation parameter range, the initial structural parameters are used as input, and the readjusted structural parameters corresponding to the set of readjusted electrical performance evaluation parameters are used as output to train the initial field plate structure optimization model; In response to the convergence of the trained initial field plate structure optimization model, determining the trained initial field plate structure optimization model as the field plate structure optimization model corresponding to the initial device parameters; The step of obtaining electrical performance evaluation parameters of the initial semiconductor device before adjustment based on the initial device parameters and the initial structural parameters includes: Performing simulation based on the initial device parameters and the initial structural parameters, and obtaining electrical performance evaluation parameters of the initial semiconductor device before adjustment according to the simulation results; Alternatively, a corresponding semiconductor device is manufactured based on the initial device parameters and the initial structural parameters, and the manufactured semiconductor device is tested, and the electrical performance evaluation parameters of the initial semiconductor device before adjustment are obtained according to the actual test results.
2. The field plate structure optimization method according to claim 1, characterized in that: The determining, based on the adjusted electrical performance evaluation parameter and the target electrical performance evaluation parameter range, at least one set of structural parameters to be adjusted from the multiple sets of adjustment structural parameters comprises: Determining a limit value that is closest to the target electrical performance evaluation parameter range and the adjusted electrical performance evaluation parameter corresponding to the adjustment structure parameter, and obtaining an absolute difference between the limit value and the adjusted electrical performance evaluation parameter corresponding to the adjustment structure parameter; At least one set of adjustment structural parameters with the smallest corresponding absolute difference is determined as the at least one set of structural parameters to be adjusted.
3. The field plate structure optimization method according to claim 1, characterized in that: The electrical performance evaluation parameter includes at least one of breakdown voltage, specific on-resistance and quality factor.
4. The field plate structure optimization method according to claim 3, characterized in that: The target electrical performance evaluation parameter range includes: a breakdown voltage greater than a target breakdown voltage threshold BV0, a specific on-resistance less than a target specific on-resistance Ron,sp0, and a quality factor greater than a quality factor threshold FOM0; The obtaining of the structural parameter adjustment direction based on the at least one set of structural parameters to be adjusted, the initial structural parameters, the adjusted electrical performance evaluation parameters corresponding to the at least one set of structural parameters to be adjusted, and the target electrical performance evaluation parameter range includes: based on Obtaining a first adaptation function value F(x)1 corresponding to each set of structural parameters to be adjusted, wherein BV1 is the breakdown voltage in the electrical performance evaluation parameter after adjustment; based on Obtaining a second adaptation function value F(x)2 corresponding to each set of structural parameters to be adjusted, wherein Ron,sp1 is the specific on-resistance in the electrical performance evaluation parameter after adjustment; based on Obtaining a third adaptation function value F(x)3 corresponding to each set of structural parameters to be adjusted, wherein FOM1 is a quality factor in the electrical performance evaluation parameter after adjustment; Determine, in the at least one set of structural parameters to be adjusted, a target structural parameter to be adjusted having a minimum value among at least one of the first adaptation function value F(x)1, the second adaptation function value F(x)2, and the third adaptation function value F(x)3; The structural parameter adjustment direction is determined based on the difference between the target structural parameter to be adjusted and the initial structural parameter.
5. A field plate structure optimization device, characterized in that: include: An optimization model acquisition module is configured to acquire an initial field plate structure optimization model; acquire electrical performance evaluation parameters of an initial semiconductor device before adjustment based on initial device parameters and initial structural parameters, wherein the structural parameters include the length of each of a plurality of steps of the field plate structure and the thickness of an oxide located under the field plate in each of the plurality of steps of the field plate structure; and the device parameters include at least one of a doping concentration of a drift region and a length of the drift region; adjust the initial structural parameters to acquire multiple sets of adjusted structural parameters; and acquire adjusted electrical performance evaluation parameters corresponding to each set of adjusted structural parameters based on each set of adjusted structural parameters and the initial device parameters; If any set of adjusted electrical performance evaluation parameters falls within the target electrical performance evaluation parameter range, the initial structural parameters are used as input, and the adjusted structural parameters corresponding to the set of adjusted electrical performance evaluation parameters are used as output to train the initial field plate structure optimization model; In response to the convergence of the trained initial field plate structure optimization model, determining the trained initial field plate structure optimization model as the field plate structure optimization model corresponding to the initial device parameters; a device parameter acquisition module configured to acquire structural parameters of a field plate structure including a plurality of steps in a semiconductor device to be optimized and device parameters of the semiconductor device, wherein the structural parameters include the length of each step in the field plate structure and the thickness of an oxide under the field plate in each step, and the device parameters include at least one of a doping concentration of a drift region and a length of the drift region; an optimization parameter acquisition module configured to, if the device parameters match the initial device parameters, input the structural parameters as input into the field plate structure optimization model to obtain target structural parameters output by the field plate structure optimization model; a field plate structure optimization module, configured to optimize the field plate structure in the semiconductor device to be optimized based on the target structure parameters; The optimization model acquisition module is further configured to: If each set of adjusted electrical performance evaluation parameters does not fall within the target electrical performance evaluation parameter range, determining at least one set of structural parameters to be adjusted from the multiple sets of adjustment structural parameters based on the adjusted electrical performance evaluation parameters and the target electrical performance evaluation parameter range; Obtaining a structural parameter adjustment direction based on the at least one set of structural parameters to be adjusted, the initial structural parameters, the adjusted electrical performance evaluation parameters corresponding to the at least one set of structural parameters to be adjusted, and a target electrical performance evaluation parameter range; Adjusting any one of the sets of structural parameters to be adjusted based on the structural parameter adjustment direction to obtain multiple sets of readjusted structural parameters; Based on each set of readjusted structural parameters and the initial device parameters, obtaining readjusted electrical performance evaluation parameters corresponding to each set of readjusted structural parameters; If any set of readjusted electrical performance evaluation parameters falls within the target electrical performance evaluation parameter range, the initial structural parameters are used as input, and the readjusted structural parameters corresponding to the set of readjusted electrical performance evaluation parameters are used as output to train the initial field plate structure optimization model; In response to the convergence of the trained initial field plate structure optimization model, determining the trained initial field plate structure optimization model as the field plate structure optimization model corresponding to the initial device parameters; The step of obtaining electrical performance evaluation parameters of the initial semiconductor device before adjustment based on the initial device parameters and the initial structural parameters includes: Performing simulation based on the initial device parameters and the initial structural parameters, and obtaining electrical performance evaluation parameters of the initial semiconductor device before adjustment according to the simulation results; Alternatively, a corresponding semiconductor device is manufactured based on the initial device parameters and the initial structural parameters, and the manufactured semiconductor device is tested, and the electrical performance evaluation parameters of the initial semiconductor device before adjustment are obtained according to the actual test results.
6. The field plate structure optimization device according to claim 5, characterized in that: The optimization model acquisition module is specifically configured to: Determining a limit value that is closest to the target electrical performance evaluation parameter range and the adjusted electrical performance evaluation parameter corresponding to the adjustment structure parameter, and obtaining an absolute difference between the limit value and the adjusted electrical performance evaluation parameter corresponding to the adjustment structure parameter; At least one set of adjustment structural parameters with the smallest corresponding absolute difference is determined as the at least one set of structural parameters to be adjusted.
7. The field plate structure optimization device according to claim 5, characterized in that: The electrical performance evaluation parameter includes at least one of breakdown voltage, specific on-resistance and quality factor.
8. The field plate structure optimization device according to claim 7, characterized in that: The target electrical performance evaluation parameter range includes: a breakdown voltage greater than a target breakdown voltage threshold BV0, a specific on-resistance less than a target specific on-resistance Ron,sp0, and a quality factor greater than a quality factor threshold FOM0; The optimization model acquisition module is specifically configured to: based on Obtaining a first adaptation function value F(x)1 corresponding to each set of structural parameters to be adjusted, wherein BV1 is the breakdown voltage in the electrical performance evaluation parameter after adjustment; based on Obtaining a second adaptation function value F(x)2 corresponding to each set of structural parameters to be adjusted, wherein Ron,sp1 is the specific on-resistance in the electrical performance evaluation parameter after adjustment; based on Obtaining a third adaptation function value F(x)3 corresponding to each set of structural parameters to be adjusted, wherein FOM1 is a quality factor in the electrical performance evaluation parameter after adjustment; Determine, in the at least one set of structural parameters to be adjusted, a target structural parameter to be adjusted having a minimum value among at least one of the first adaptation function value F(x)1, the second adaptation function value F(x)2, and the third adaptation function value F(x)3; The structural parameter adjustment direction is determined based on the difference between the target structural parameter to be adjusted and the initial structural parameter.
9. An electronic device, characterized in that: The method comprises a memory and a processor; wherein the memory is used to store one or more computer instructions, wherein the one or more computer instructions are executed by the processor to implement the method steps according to any one of claims 1 to 4.
10. A computer-readable storage medium having computer instructions stored thereon, characterized in that: When the computer instructions are executed by a processor, the method steps according to any one of claims 1 to 4 are implemented.
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