Data verification method and device, equipment and medium

Abstract

The invention discloses a data verification method, device and equipment and a medium, and belongs to the technical field of digital verification, and the method comprises the steps: receiving to-be-verified data information; creating a target basis matrix, and performing short ring and trap set elimination optimization on the target basis matrix; encoding the data information to be verified through a fast encoding algorithm; and performing data verification on the encoded to-be-verified data information through the optimized target basis matrix. According to the basis matrix provided by the invention, the storage space of the check matrix can be reduced, the performance of the check matrix can be improved, and meanwhile, the digital channel can be quickly checked.

Description

Technical Field

[0001] The present application relates to the field of digital verification technology, and in particular to a data verification method, device, equipment and medium. Background Art

[0002] At present, the structured construction method constructs a check matrix with a certain structure through specific algebra, geometry and set theory. The distribution of non-zero elements in the check matrix constructed by this method has a specific rule. The hardware storage method of the check matrix is ​​simpler than that of the matrix constructed by the random construction method. However, its construction method is limited by the specific structure, resulting in inflexible selection of code length and code rate, and the communication effect is not ideal in channels with limited transmission.

[0003] As a typical structured codeword, the quasi-cyclic low-density parity-check code (QC-LDPC) code is mainly composed of an all-zero matrix, a unit matrix, and a cyclic permutation matrix of the unit matrix. The corresponding check matrix storage occupies less space than the codewords constructed by the random construction method and the general structured construction method. In the coding process, a simple shift register can be used to implement encoding and decoding, which is more friendly to hardware implementation; however, when storing QC-LDPC codes, it is usually necessary to store the position and shift value of the shift coefficients in the base matrix, and obtain the complete matrix through the corresponding expansion matrix. In addition, the encoding process of general QC-LDPC codes is also relatively complicated. When directly encoding, the H matrix corresponding to the generator matrix G is also used. In medium and long codewords, the generator matrix G has a large dimension and irregular distribution of non-zero elements, resulting in the need for additional storage space, which will bring greater encoding difficulty; when using special methods such as RU decomposition coding, the structure of the matrix will be restricted, increasing the difficulty of matrix construction. Summary of the invention

[0004] In order to overcome the above-mentioned technical defects, the purpose of the present application is to provide a data verification method, device, equipment and medium, the method comprising: receiving data information to be verified; creating a target basis matrix, and performing short loop and trap set elimination optimization on the target basis matrix; encoding the data information to be verified by a fast coding algorithm; performing data verification on the encoded data information to be verified by using the optimized target basis matrix; the data verification on the encoded data information to be verified by using the optimized target basis matrix comprises: judging whether the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​equal to a first preset value; in response to the product of the encoded data information to be verified and the transpose of the optimized target basis matrix being not equal to the first preset value, decoding the encoded data information to be verified by using the optimized target basis matrix until the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​equal to the first preset value or the number of iterations of the encoded data information to be verified in the optimized target basis matrix reaches a second preset value. The base matrix of the present application can reduce the storage space of the check matrix, improve the performance of the check matrix, and can also perform rapid check on the digital channel.

[0005] The specific technical solutions provided by the embodiments of this application are as follows: In a first aspect, the present application provides a data verification method, the method comprising: Receiving data information to be verified; Creating a target basis matrix, and performing short-loop and trap set elimination optimization on the target basis matrix; Encoding the data information to be verified by a fast encoding algorithm; Performing data verification on the encoded data information to be verified through the optimized target basis matrix; The step of performing data verification on the encoded data information to be verified by using the optimized target basis matrix includes: Determine whether the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​equal to a first preset value; In response to the fact that the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​not equal to a first preset value, the encoded data information to be verified is decoded by the optimized target basis matrix until the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​equal to the first preset value or the number of iterations of the encoded data information to be verified in the optimized target basis matrix reaches a second preset value.

[0006] In one embodiment, creating a target basis matrix includes: Create a second matrix by setting unit matrices at the dual diagonal positions of each column from the 1st column to the nth column of the matrix and randomly shifting n random rows in the 0th column of the matrix, where n is greater than 2; Performing a short ring check on the second matrix; Setting corresponding column shift values ​​of a matrix row by row through a Fibonacci sequence and a modulo operation, and creating a first matrix according to the corresponding column shift values ​​of the matrix; The first matrix is ​​combined with the second matrix after the short ring check to obtain a target basis matrix.

[0007] In one embodiment, before creating the second matrix by setting unit matrices at the dual diagonal positions of each column from the 1st column to the nth column of the matrix and randomly shifting n random rows in the 0th column of the matrix, the method includes: Setting the dimension of the second matrix and the dimension of the check matrix corresponding to the second matrix; Setting the dimension of the first matrix and the dimension of the check matrix corresponding to the first matrix; The dimension and code rate of the check matrix corresponding to the target base matrix are set.

[0008] In one embodiment, the step of creating a second matrix by setting unit matrices at dual diagonal positions of columns 1 to n of the matrix and randomly shifting n random rows in column 0 of the matrix includes: Initializing the second matrix to an all-0 matrix; Assigning unit matrices to the double diagonal positions from the 1st column to the nth column of the second matrix; A second matrix is ​​created by randomly shifting random n rows in the 0th column of the second matrix.

[0009] In one embodiment, performing a short ring check on the second matrix includes: Determine whether the number of short rings of the second matrix is ​​a third preset value and whether the minimum ring length is a fourth preset value; If so, the short ring check process for the second matrix is ​​terminated; if not, the shift value position and size of the second matrix are randomly adjusted until the number of short rings of the second matrix is ​​a third preset value and the minimum ring length is a fourth preset value.

[0010] In one embodiment, setting corresponding column shift values ​​of a matrix row by row through a Fibonacci sequence and a modulo operation, and creating a first matrix according to the corresponding column shift values ​​of the matrix, comprises: Initializing the first matrix to an all-0 matrix; Set the corresponding column shift value of the matrix row by row through the Fibonacci sequence and modulo operation; The step of setting the corresponding column shift values ​​of the matrix row by row through the Fibonacci sequence and the modulo operation includes: When the row index m is 0, get the number fibo after the x-th position of the Fibonacci sequence, the starting term s of the sequence, the column index n1 starting from 0, and the modulus value z; The column shift value of the matrix is ​​calculated by the formula: the column shift value of the matrix = fibo(s+n1)%z; When the row index m is 1, the number fibo after the x-th position of the Fibonacci sequence is obtained, the starting term s of the sequence is selected, the column index n1 starting from 0, and the modulus value z; The column shift value of the matrix is ​​calculated by the formula: the column shift value of the matrix = (fibo(m+n1+s)+m)%z; When the row index m is another even number, get the number fibo after the xth position of the Fibonacci sequence, the starting item s of the sequence, the column index n1 starting from 0, and the modulus value z; By formula: , calculate the column shift value of the matrix; When the row index m is another odd number, the number fibo after the x-th position of the Fibonacci sequence is obtained, the starting term s of the sequence is selected, the column index n1 starting from 0, and the modulus value z; where 0≤n1≤nm-1; By formula: , calculate the column shift value of the matrix; A first matrix is ​​created according to the column shift values ​​of the matrix.

[0011] In one embodiment, combining the first matrix with the second matrix after short-loop verification to obtain a target base matrix, and performing short-loop and trap set elimination optimization on the target base matrix includes: Traversing the number and position of short rings in the target basis matrix by columns; In response to the fact that the number of short loops in one column is the largest, the shift value of the common point in the column where the number of short loops is the largest is set to a fifth preset value; Obtaining a row weight constraint value and a row weight constraint error value of the first matrix; Determine whether the number of fifth preset values ​​of each row of the first matrix in the modified target base matrix satisfies both the row weight constraint value and the row weight constraint error value of the first matrix; If so, continue to set the shift value of the common point with the largest number of short rings in the next column of the first matrix of the target base matrix to the fifth preset value, until all columns of the first matrix in the target base matrix are traversed, and judge whether the row weight of the first matrix in the target base matrix simultaneously satisfies the row weight constraint value and the row weight constraint error value of the first matrix and whether the column weight of the first matrix in the target base matrix simultaneously satisfies the column weight constraint value and the column weight constraint error value of the first matrix; if not, traverse the number and position of short rings in the target base matrix again by column, and set the shift value of the common point with the largest number of short rings in the column to the fifth preset value.

[0012] In one embodiment, the judging whether the row weight of the first matrix in the target base matrix satisfies the row weight constraint value and the row weight constraint error value of the first matrix at the same time and whether the column weight of the first matrix in the target base matrix satisfies the column weight constraint value and the column weight constraint error value of the first matrix at the same time includes: Determine whether the first matrix row weight in the target base matrix satisfies the row weight constraint value and the row weight constraint error value of the first matrix at the same time and whether the first matrix column weight in the target base matrix satisfies the column weight constraint value and the column weight constraint error value of the first matrix at the same time; If yes, the short loop and trap set elimination optimization process for the target basis matrix is ​​terminated; if no, the short loop and trap set elimination optimization is performed again on the target basis matrix, and the number and position of short loops in the target basis matrix are traversed column by column.

[0013] In a second aspect, the present application further provides a data verification device, the device comprising: A receiving module, used for receiving data information to be verified; Create a module for creating a target basis matrix; An optimization module, used for performing short-loop and trap set elimination optimization on the target basis matrix; An encoding module, used for encoding the data information to be verified by a fast encoding algorithm; A verification module is used to verify the encoded data information to be verified through the optimized target basis matrix; The step of performing data verification on the encoded data information to be verified by using the optimized target basis matrix includes: Determine whether the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​equal to a first preset value; In response to the fact that the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​not equal to a first preset value, the encoded data information to be verified is decoded by the optimized target basis matrix until the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​equal to the first preset value or the number of iterations of the encoded data information to be verified in the optimized target basis matrix reaches a second preset value.

[0014] In a third aspect, a data verification device is also provided, comprising: one or more processors; A storage device for storing one or more programs; When the one or more programs are executed by the one or more processors, the one or more processors implement the data verification method as described in any one of the first aspects.

[0015] In a fourth aspect, the present application further provides a computer device, the device comprising: A memory, a processor, and a computer program stored in the memory, wherein the processor executes the computer program to implement the steps of the data verification method as described in any one of the first aspects.

[0016] In a fifth aspect, the present application further provides a computer program product, comprising a computer program, which, when executed by a processor, implements the steps of any of the data verification methods described in the first aspect.

[0017] In a sixth aspect, the present application further provides a computer storage medium, the medium comprising: A computer program is stored thereon, and when the computer program is executed by a processor, the steps of any data verification method described in the first aspect are implemented.

[0018] Compared with the prior art, the method of the technical solution provided in the embodiment of the present application includes: receiving data information to be verified; creating a target base matrix, and optimizing the target base matrix for short loop and trap set elimination; encoding the data information to be verified by a fast coding algorithm; performing data verification on the encoded data information to be verified by the optimized target base matrix; the data verification of the encoded data information to be verified by the optimized target base matrix includes: judging whether the product of the encoded data information to be verified and the transposition of the optimized target base matrix is ​​equal to a first preset value; in response to the product of the encoded data information to be verified and the transposition of the optimized target base matrix not being equal to the first preset value, decoding the encoded data information to be verified by the optimized target base matrix until the product of the encoded data information to be verified and the transposition of the optimized target base matrix is ​​equal to the first preset value or the number of iterations of the encoded data information to be verified in the optimized target base matrix reaches a second preset value. The base matrix of the present application can reduce the storage space of the check matrix, improve the performance of the check matrix, and can quickly verify the digital channel.

[0019] The technical solution provided in the embodiment of the present application divides the H basis matrix into two parts, namely, H1 (first matrix) and H2 (second matrix). When constructing, the H2 matrix has specific shift values ​​only in the first column, and in the remaining columns, it only exists in the form of a unit matrix at the double diagonals. When constructing the H1 matrix, the Fibonacci sequence is used. One of the important characteristics of the Fibonacci sequence is that the third term is equal to the sum of the first two terms. Therefore, in the storage of the shift values ​​of the matrix, only the first two shift values ​​of the Fibonacci sequence used need to be recorded, and the shift values ​​of other positions can be obtained through simple algebraic operations and modular operations, thereby simplifying the complexity of the matrix. In hardware implementation, when there are more "-1"s in the basis matrix, the matrix position index with the shift value can be stored; when there are more numerical values ​​of the shift value in the matrix, the matrix position index of "-1" can be stored. The combination of the two can significantly reduce the storage space of the matrix.

[0020] The technical solution provided in the embodiment of the present application can be encoded using the fast encoding method in the IEEE802.16e standard, and the encoding process of the information bit can be completed using only the H matrix, avoiding the generation and storage of the G matrix in the traditional encoding method; the method for constructing the H1 matrix in the present application mostly uses simple addition and subtraction and mixed operations of multiplication by 2 and division by 2 in the shift value calculation. In hardware design, it can be obtained through shift operations and addition and subtraction operations, and the implementation method is simple; in addition, different shift results can be obtained by taking different modulus operations, and the matrix diversity is rich, which can improve the construction efficiency of the base matrix.

[0021] The short loop optimization method for the H1 matrix proposed in the technical solution provided in the embodiment of the present application can improve the error correction capability of the LDPC codeword, and the error correction performance will not be limited by the specific format of the H1 and H2 matrices. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0023] Figure 1 A first flow chart of a data verification method provided in Embodiment 1 of the present application; Figure 2 A flowchart of a second matrix creation method provided in Embodiment 2 of the present application; Figure 3 A flowchart of a first matrix creation method provided in Embodiment 2 of the present application; Figure 4 A flowchart of the target basis matrix optimization method provided in Example 2 of the present application; Figure 5 A BER performance comparison chart of the same standard matrix provided in Example 2 of the present application; Figure 6 This is a comparison chart of FER performance of the same standard matrix provided in Example 2 of the present application; Figure 7 A comparison chart of the average number of iterations of the same standard matrix under high SNR provided in Example 2 of the present application; Figure 8 A structural diagram of a data verification device provided in Embodiment 3 of the present application; Fig. 9 The exemplary system provided for Embodiment 7 of the present application can be used to implement the various embodiments described in the present application. DETAILED DESCRIPTION

[0024] In order to make the purpose, technical solutions and advantages of this application clearer, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0025] It should be noted that, unless the context clearly requires otherwise, words such as “include”, “including” and similar words throughout the specification should be interpreted as including rather than exclusive or exhaustive; that is, the meaning is “including but not limited to”.

[0026] Furthermore, in the description of the present application, unless otherwise specified, “plurality” means two or more.

[0027] As a special type of linear block code with a sparse check matrix, Low-density parity check (LDPC) code has stood at the forefront of channel coding in the digital age due to its universal error correction characteristics and excellent performance close to the Shannon limit. It has attracted the attention and research of many researchers in the fields of wireless communications, integrated circuits, deep space communications, and digital watermarking.

[0028] At present, the construction methods of LDPC check matrix mainly include random construction method and structured construction method; the random construction method mainly obtains the required check matrix by computer search after restricting matrix parameters such as row weight, column weight and ring structure. The distribution position of the sparse "1" obtained by this method has no obvious regularity, and the storage of the matrix is ​​difficult. In addition, the generation matrix G corresponding to the check matrix H is required in the encoding process, and the G matrix needs to be stored additionally. The difficulty of accessing the matrix also increases, which is not conducive to its hardware implementation process.

[0029] Embodiment 1 The present application embodiment provides a data verification method, such as Figure 1 As shown, the method includes: Receiving data information to be verified; Creating a target basis matrix, and performing short-loop and trap set elimination optimization on the target basis matrix; Encoding the data information to be verified by a fast encoding algorithm; Performing data verification on the encoded data information to be verified through the optimized target basis matrix; The step of performing data verification on the encoded data information to be verified by using the optimized target basis matrix includes: Determine whether the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​equal to a first preset value; In response to the fact that the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​not equal to a first preset value, the encoded data information to be verified is decoded by the optimized target basis matrix until the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​equal to the first preset value or the number of iterations of the encoded data information to be verified in the optimized target basis matrix reaches a second preset value.

[0030] Specifically, the present application constructs a QC-LDPC matrix that is easy to encode, and reduces its storage space while ensuring the performance of the QC-LDPC check matrix, so that hardware implementation becomes a key technical issue at present; in order to optimize the storage space of the QC-LDPC matrix and ensure the performance of the check matrix, the present application proposes a construction method suitable for the QC-LDPC matrix, aiming to reduce the storage space required for the matrix while improving its performance; based on this method, the present application also provides a QC-LDPC matrix with a three-quarter code rate, and the decoding performance of the matrix is ​​better than that of the 802.16e standard matrix of the same specification.

[0031] Among them, the first preset value is 0, and the second preset value is 50 times.

[0032] The beneficial effects of the technical solution provided by the embodiment of the present application are: The base matrix of the present application can reduce the storage space of the check matrix, improve the performance of the check matrix, and can also perform rapid check on the digital channel.

[0033] The technical solution provided in the embodiment of the present application divides the H basis matrix into two parts, namely, H1 (first matrix) and H2 (second matrix). When constructing, the H2 matrix has specific shift values ​​only in the first column, and in the remaining columns, it only exists in the form of a unit matrix at the double diagonals. When constructing the H1 matrix, the Fibonacci sequence is used. One of the important characteristics of the Fibonacci sequence is that the third term is equal to the sum of the first two terms. Therefore, in the storage of the shift values ​​of the matrix, only the first two shift values ​​of the Fibonacci sequence used need to be recorded, and the shift values ​​of other positions can be obtained through simple algebraic operations and modular operations, thereby simplifying the complexity of the matrix. In hardware implementation, when there are more "-1"s in the basis matrix, the matrix position index with the shift value can be stored; when there are more numerical values ​​of the shift value in the matrix, the matrix position index of "-1" can be stored. The combination of the two can significantly reduce the storage space of the matrix.

[0034] Embodiment 2 The present application embodiment provides a data verification method, such as Figure 1 As shown, the method includes: Step S01, receiving data information to be verified.

[0035] Step S02: Create a target basis matrix, and perform short-loop and trap set elimination optimization on the target basis matrix.

[0036] Step S02 also includes: Step S021, creating a second matrix by setting unit matrices at the dual diagonal positions of each column from the 1st column to the nth column of the matrix and randomly shifting n random rows in the 0th column of the matrix, where n is greater than 2; Performing a short ring check on the second matrix; Setting corresponding column shift values ​​of a matrix row by row through a Fibonacci sequence and a modulo operation, and creating a first matrix according to the corresponding column shift values ​​of the matrix; The first matrix is ​​combined with the second matrix after the short ring check to obtain a target basis matrix.

[0037] Step S021 also includes: Step S0211, setting the dimension of the second matrix and the dimension of the check matrix corresponding to the second matrix; Setting the dimension of the first matrix and the dimension of the check matrix corresponding to the first matrix; The dimension and code rate of the check matrix corresponding to the target base matrix are set.

[0038] Specifically, the present application proposes a method for constructing a QC-LDPC check matrix, which aims to reduce the storage space of the check matrix, improve the performance of the check matrix, and perform fast encoding at the same time; the method is for the QC-LDPC check matrix, and the submatrix corresponding to the check matrix is ​​composed of an all-zero matrix, a unit matrix, and a circulant permutation matrix of the unit matrix; the check matrix H is replaced by a shift value matrix of the submatrix, with the number 0 replacing the unit matrix, the number -1 replacing the all-0 matrix, and other numbers representing the right shift value of the unit matrix; the construction of the check matrix H can be converted into the construction of the corresponding shift value base matrix; the base matrix is ​​further divided into two parts, H1 (first matrix) and H2 (second matrix), wherein the H2 matrix is ​​a square matrix whose rows and columns are both the number of check bits, and the dimension of the H1 matrix is ​​adjusted according to the code length and code rate.

[0039] Assume that the submatrix dimension of the check matrix is ​​p×p, the check bit is m, and the codeword length is n; then the matrix dimension of the base matrix H2 is m×m, and the dimension of its corresponding check matrix is ​​mp×mp; the dimension of the base matrix H1 is m×(nm), and the dimension of its corresponding check matrix is ​​mp×(nm)p, the dimension of the check matrix corresponding to the entire base matrix H is mp×np, and the code rate is (nm) / n.

[0040] Step S0212, as Figure 2 As shown, the second matrix is ​​initialized to be an all-0 matrix; Assigning unit matrices to the double diagonal positions from the 1st column to the nth column of the second matrix; A second matrix is ​​created by randomly shifting random n rows in the 0th column of the second matrix.

[0041] Specifically, firstly, the second matrix H2 is constructed, the dimension and submatrix size of the H2 matrix are determined, the H2 matrix is ​​initialized as an all-0 matrix, represented by "-1", starting with 0 as the index, and the double diagonal positions from the 1st column to the nth column are assigned to the unit matrix, represented by the number "0". The double diagonal construction method here avoids the generation of short rings, especially quadruple rings, in the matrix, which is beneficial to improving its performance.

[0042] Subsequently, based on this matrix, random n rows (n is greater than 2) in the 0th column of the H2 matrix are randomly shifted.

[0043] Step S0213, determining whether the number of short rings of the second matrix is ​​a third preset value and whether the minimum ring length is a fourth preset value; If so, the short ring check process for the second matrix is ​​terminated; if not, the shift value position and size of the second matrix are randomly adjusted until the number of short rings of the second matrix is ​​a third preset value and the minimum ring length is a fourth preset value.

[0044] Specifically, a short loop check is performed on the H2 matrix after adding the shift value. If there are many short loops in the H2 matrix part or the minimum loop length is small, the position and size of the shift value are randomly adjusted until the number of short loops in the H2 part is the least and the minimum loop length is the largest.

[0045] Among them, the third preset value is 0, and the fourth preset value is 6.

[0046] Here, the construction structure of the second matrix is ​​as follows:

[0047] Step S0214, as Figure 3 As shown, the first matrix is ​​initialized to be an all-0 matrix; Set the corresponding column shift value of the matrix row by row through the Fibonacci sequence and modulo operation; The step of setting the corresponding column shift values ​​of the matrix row by row through the Fibonacci sequence and the modulo operation includes: Assume that the xth term and subsequent values ​​of the Fibonacci sequence are the shift values ​​in row 0; When the row index m is 0, get the number fibo after the x-th position of the Fibonacci sequence, the starting term s of the sequence, the column index n1 starting from 0, and the modulus value z; The column shift value of the matrix is ​​calculated by the formula: the column shift value of the matrix = fibo(s+n1)%z; When the row index m is 1, the number fibo after the x-th position of the Fibonacci sequence is obtained, the starting term s of the sequence is selected, the column index n1 starting from 0, and the modulus value z; The column shift value of the matrix is ​​calculated by the formula: the column shift value of the matrix = (fibo(m+n1+s)+m)%z; When the row index m is another even number, get the number fibo after the xth position of the Fibonacci sequence, the starting item s of the sequence, the column index n1 starting from 0, and the modulus value z; By formula: , calculate the column shift value of the matrix; When the row index m is another odd number, the number fibo after the x-th position of the Fibonacci sequence is obtained, the starting term s of the sequence is selected, the column index n1 starting from 0, and the modulus value z; where 0≤n1≤nm-1; By formula: , calculate the column shift value of the matrix; A first matrix is ​​created according to the column shift values ​​of the matrix.

[0048] Specifically, after constructing the second matrix H2, the first matrix H1 is constructed. The dimension of the first matrix H1 can be obtained according to the code length and the code rate. Similar to the H2 matrix, the H1 matrix is ​​also initialized to an all-0 matrix, represented by "-1". The H1 matrix is ​​constructed by row, also starting with 0 as the index. The shift value of the specific column in the 0th row is assigned according to the number after a certain position X in the Fibonacci sequence, which is recorded as fibo(s); the shift value of the specific column in the 1st row is obtained by performing algebraic operations on the row and column position index of the value and selecting the value in the Fibonacci sequence in the corresponding position; the shift value of the specific column in the 2nd row is obtained by multiplying the Fibonacci sequence in the 0th row by 2 as a whole; the shift value of the specific column in the 3rd row is calculated in the same way as in the first row, and the corresponding value in the Fibonacci sequence is selected after calculating the row and column index; the shift value of the specific column in the 4th row is similar to the second row, and is obtained by multiplying the shift value of the corresponding column in the 0th row by 4, and so on.

[0049] Here, when the matrix dimension is large, the value of the corresponding position obtained according to the above operation will exceed the dimension of the submatrix, that is, the upper limit of the maximum shift value, so the modulo operation is added to the above operation; first, the modulo value z is set (z is smaller than the submatrix dimension), and when the calculation result exceeds the z value, the modulo z operation is performed.

[0050] Step S0215, combining the first matrix with the second matrix after the short-loop check to obtain a target basis matrix, and performing short-loop and trap set elimination optimization on the target basis matrix.

[0051] Specifically, the H1 matrix is ​​combined with the H2 matrix to obtain the complete basis matrix [H1, H2]; at this time, there is a shift value at each position of the basis matrix. Since there will be a certain ring structure in the matrix after the modulo operation, the short ring and trap set elimination is then performed on the complete basis matrix H. The elimination of short rings and trap sets follows the following rules: ① Using the column as the index, first traverse the short ring (such as four rings and six rings), count the points that appear most frequently in the short ring, and preferentially set the shift value at that place to "-1", that is, a matrix of all 0s. The point is The corresponding short loops can be completely eliminated; the number of six loops in the check matrix is ​​usually much larger than four loops, and the four loops are more harmful to the matrix performance, so the four loops are eliminated first; ② Considering the column weight and row weight of H1, the column weight and row weight of the H1 matrix are controlled at the same level during the short loop elimination process; first, using the column as the index, when eliminating short loops according to rule ①, ensure that there is a shift value set to "-1" in each column, and secondly, these "-1"s are distributed in different rows as much as possible to ensure that the number of "-1"s in each row of the matrix is ​​basically the same.

[0052] It can be understood that the H basis matrix is ​​divided into two parts, H1 and H2 basis matrices, when constructed. The H2 matrix has specific shift values ​​only in the first column when constructed, and exists in the form of unit matrix only at the double diagonal in the remaining columns; The H1 matrix uses the Fibonacci sequence when constructing it. One of the important features of the Fibonacci sequence is that the third term is equal to the sum of the first two terms. Therefore, in the storage of the shift value of the matrix, only the first two shift values ​​of the Fibonacci sequence used need to be recorded, and the shift values ​​of other positions can be obtained through simple algebraic operations and modular operations, which greatly saves the space required for storage. When there are many "-1"s in the base matrix, the matrix position index with the shift value can be stored; when there are many shift values ​​in the matrix, the matrix position index of "-1" can be stored; the combination of the two can significantly reduce the storage space of the matrix; in addition, the matrix shift value calculation mostly uses simple addition and subtraction and mixed operations of multiplication by 2 and division by 2. In hardware design, it can be obtained through shift operations and addition and subtraction operations, and the implementation method is simple; the matrix constructed by this method can be encoded using the fast encoding method in the IEEE802.16e standard, and the encoding process of the information bit is completed when only the H matrix is ​​used, avoiding the generation and storage of the G matrix in the traditional encoding method.

[0053] Step S02 also includes: Step S022, as Figure 4 As shown, the number and position of short rings in the target basis matrix are traversed column by column; In response to the fact that the number of short loops in one column is the largest, the shift value of the common point in the column where the number of short loops is the largest is set to a fifth preset value; Obtaining a row weight constraint value and a row weight constraint error value of the first matrix; Determine whether the number of fifth preset values ​​of each row of the first matrix in the modified target base matrix satisfies both the row weight constraint value and the row weight constraint error value of the first matrix; If so, continue to set the shift value of the common point with the largest number of short rings in the next column of the first matrix of the target base matrix to the fifth preset value, until all columns of the first matrix in the target base matrix are traversed, and judge whether the row weight of the first matrix in the target base matrix simultaneously satisfies the row weight constraint value and the row weight constraint error value of the first matrix and whether the column weight of the first matrix in the target base matrix simultaneously satisfies the column weight constraint value and the column weight constraint error value of the first matrix; if not, traverse the number and position of short rings in the target base matrix again by column, and set the shift value of the common point with the largest number of short rings in the column to the fifth preset value.

[0054] Step S023, determining whether the first matrix row weight in the target base matrix satisfies the row weight constraint value and the row weight constraint error value of the first matrix at the same time, and whether the first matrix column weight in the target base matrix satisfies the column weight constraint value and the column weight constraint error value of the first matrix at the same time; If yes, the short loop and trap set elimination optimization process for the target basis matrix is ​​terminated; if no, the short loop and trap set elimination optimization is performed again on the target basis matrix, and the number and position of short loops in the target basis matrix are traversed column by column.

[0055] Specifically, first determine the QC-LDPC base matrix dimensions m, n, and the circulant submatrix dimension p; According to the determined parameters m and n, the dimensions m, (nm) and m, m of the H1 matrix and H2 matrix are calculated; Determine the row weight and column weight constraints x and y of the first matrix H1, the error value d, the column weight cw of the 0th column of the second matrix H2 (where cw is greater than 2 and less than the value of the column weight), the number of short rings a, and the minimum ring length b; Initialize the H1 matrix and the H2 matrix, assigning all shift factors to "-1", indicating that the dimension is a p×p all-zero matrix Assign "0" to the double diagonal of the 1st to m-1th columns in the H2 matrix, indicating an identity matrix with a dimension of p×p; Randomly select cw rows from the first column of the H2 matrix according to the value of cw, and assign random values. The value range is 0 to p-1, and the random selection is performed directly; Perform short loop detection on the H2 part and record the corresponding short loop number and minimum loop length; If the number of short loops is the smallest and the minimum loop length is the largest, H2 is constructed. Otherwise, H2 is reconstructed until the constructed H2 meets the set requirements. Determine the starting term fibo(s) of the Fibonacci sequence selected by the H1 matrix, and use the sequence values ​​after this term as the shift values ​​in the 0th row. The corresponding shift values ​​are set to: fibo(n1+s)%z; set the shift value in the 1st row to (fibo(m+n1+s)+m)%z; set the shift values ​​of subsequent even-numbered rows to , set the subsequent odd rows to (fibo((m-1) / 2+n1+s)+(m-1) / 2)%z, where n1 is the column index starting from 0 and its value range is [0≤n1≤nm-1]; The constructed H1 and H2 matrices are combined in the form of [H1, H2] to construct a complete H matrix. Starting from the 0th column, the number of four-rings and six-rings in the H matrix and the positions of the points that make up the four-rings and six-rings are traversed column by column, and the shift value of the common points that appear most times in the four-rings and six-rings in each column is set to "-1" (the fifth preset value); After each column is modified, calculate whether the number of "-1" (fifth preset value) in each row of the modified H1 matrix satisfies the constraint x of the row weight of the H1 matrix and the corresponding error value d at the same time. If satisfied, continue to "set the shift value of the common point that appears most times in the short ring to -1" in the next column of the H matrix. If not satisfied, set the shift value of each column of the common point that appears most times in the fourth ring and the sixth ring to "-1", until all columns of the H1 matrix are traversed to ensure that each column has a "-1", and then continue to return to the 0th column to perform the second round of common point elimination; Finally, the row and column weights of the H1 matrix are constrained. If the row and column weights of the H1 matrix satisfy both the constraint values ​​and the corresponding error values, the matrix construction is terminated; otherwise, a new round of short loop elimination is performed. Among them, the row weight and column weight constraints of each row and column of the H1 matrix are not required to be completely consistent, they only need to satisfy the error value d; the LDPC code can be represented by its corresponding Tanner graph, and the definitions of four-loop and six-loop are related to the Tanner graph. For a variable node, starting from the variable node, after several steps of alternating transmission from the check node to the variable node and then returning to the starting variable node, the closed loop formed is called the "loop" in the LDPC code.

[0056] A quadruple loop is a closed loop of length 4 in the Tanner graph, that is, starting from a vertex, passing through 4 edges and 4 vertices, and returning to the starting vertex again; a hexaloop is a closed loop of length 6 in the Tanner graph, starting from a vertex, passing through 6 edges and 6 vertices, and returning to the starting vertex again.

[0057] It can be understood that the present application provides a check matrix constructed according to the above method, setting the matrix code rate to three quarters, the code length to 24, the submatrix dimension to 96×96, the dimension of the H2 base matrix to 6×6, and the dimension of the H1 base matrix to 6×18. The column weight of the 0th column of the H2 base matrix is ​​set to 3; the H2 matrix constructed by the method is as follows:

[0058] H2 matrix (base matrix dimension is 6×6, submatrix dimension is 96×96) Set the index starting at 0, select the Fibonacci sequence starting from the third term, and the size of the modulus value z is the same as the submatrix dimension, both of which are 96; the H1 matrix constructed according to the method is as follows:

[0059] H1 matrix (base matrix dimension is 6×6, submatrix dimension is 96×96, modulus value is 96) The H basis matrix composed of H1 and H2 is as follows:

[0060] H matrix (base matrix dimension is 6×24, sub-matrix dimension is 96×96, code rate is 3 / 4) There are a certain number of short cycles and trap sets in the initially constructed H matrix. The row weight constraint of H1 in the H matrix is ​​set to 12, the column weight constraint is set to 4, and the row weight error value is 1, that is, the row weight of 11, 12 or 13 meets the requirements, and the column weight error value is 0, that is, the column weight of the H1 part is strictly limited to 4.

[0061] The H matrix after optimization according to the method described is as follows:

[0062] Optimized H matrix (base matrix dimension is 6×24, sub-matrix dimension is 96×96, code rate is 3 / 4) The H2 part of the H matrix is ​​the same as the H2 in the three-quarter code rate matrix in IEEE802.16e, and the row and column weights of the H1 part of the H matrix are also similar to the matrix. In order to verify the performance of the matrix constructed by the method described in the present application, the performance of the two matrices is compared using the belief propagation BP (BeliefPropagation) algorithm under the additive white Gaussian noise AWGN (Additive White Gaussian Noise) channel, and the maximum number of iterations is set to 50 times, as shown in FIG. Figure 5 , 6 As shown in Figure 7, when the SNR is high, the BER, FER and average number of iterations of the matrix constructed by this method are better than the three-quarter code rate standard matrix in IEEE802.16e, which proves the feasibility of the scheme described in this application.

[0063] Step S03, encoding the data information to be verified by a fast encoding algorithm; Performing data verification on the encoded data information to be verified through the optimized target basis matrix; The step of performing data verification on the encoded data information to be verified by using the optimized target basis matrix includes: Determine whether the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​equal to a first preset value; In response to the fact that the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​not equal to a first preset value, the encoded data information to be verified is decoded by the optimized target basis matrix until the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​equal to the first preset value or the number of iterations of the encoded data information to be verified in the optimized target basis matrix reaches a second preset value.

[0064] Specifically, the information m to be encoded is quickly encoded through the fast encoding algorithm of the target base matrix LDPC code to obtain the encoded information c; the encoded information c may be interfered and errors may occur during the transmission process; at this time, the decoding process is carried out through the H matrix; the decoding method is probability decoding of belief propagation, and the specific method is that after the encoded information c is iterated for a certain number of times, the errors therein will be corrected; after a certain number of information iterations, if the transpose multiplication result of the corrected c and the check matrix H is 0, it means that the decoding is successful; otherwise, the next round of decoding iteration process is started until the final decoding result satisfies that the transpose multiplication result of c and the check matrix H is 0, or the set maximum number of iterations is reached.

[0065] Here, the fast encoding algorithm is a fast algorithm that uses a high-speed state machine to implement encoding.

[0066] That is, in order to reduce the space required for matrix storage and the coding complexity, the technical solution of the present application proposes a data verification method suitable for QC-LDPC coding. In the present application, the H basis matrix is ​​divided into two parts: the H1 and H2 basis matrices. In the construction of H2, except for the 0th column, the remaining columns adopt a double diagonal design, introducing a unit matrix, the construction method is simple, and the matrix storage space is small; the construction of the H1 matrix introduces a special number series, which is constructed by row, and the operation of the remaining row shift values ​​is completed by mathematical operations on odd and even rows. The operation process is relatively simple, which further reduces the storage space of the matrix. In addition, the points on the short ring are removed through the short ring optimization method, thereby improving the performance of the constructed H matrix.

[0067] The matrix constructed by the method proposed in this application can be encoded using the fast encoding method in the IEEE802.16e standard, and the encoding process of the information bit can be completed using only the H matrix, thereby avoiding the generation and storage of the G matrix in the traditional encoding method and reducing the complexity of the encoding.

[0068] In addition, the creating the first matrix further includes: Create the first matrix through the Lucas sequence; The step of creating a first matrix by using the Lucas sequence includes: Set the number of rows and columns of the first matrix; Mapping the values ​​of the Lucas sequence to positions in the first matrix; Mapping the value of the Lucas sequence to a position in the first matrix comprises: Fill the first matrix with consecutive entries of the Lucas sequence from left to right and from top to bottom; Fill the items of the Lucas sequence along the main diagonal (from upper left to lower right) or the secondary diagonal (from upper right to lower left) and map them to the positions in the first matrix. Fill the remaining positions of the first matrix with 0 or other specific values. Fill the first matrix from outside to inside or from inside to outside according to the spiral path; The first matrix is ​​filled with a pattern of values ​​that fill the Lucas sequence in either even positions or odd positions.

[0069] At the same time, the Fibonacci sequence used in the present application can be replaced with other similar sequences according to actual needs, such as the Lucas sequence, the Pell sequence and the Paval sequence, etc., which increases the diversity of creating the first matrix.

[0070] The data verification method provided in the embodiment of the present application may be further improved and optimized without departing from the technical solution of the present application, and these improvements and optimizations should also be regarded as within the scope of protection of the present application.

[0071] The beneficial effects of the technical solution provided by the embodiment of the present application are: The base matrix of the present application can reduce the storage space of the check matrix, improve the performance of the check matrix, and can also perform rapid check on the digital channel.

[0072] The technical solution provided in the embodiment of the present application can be encoded using the fast encoding method in the IEEE802.16e standard, and the encoding process of the information bit can be completed using only the H matrix, avoiding the generation and storage of the G matrix in the traditional encoding method; the method for constructing the H1 matrix in the present application mostly uses simple addition and subtraction and mixed operations of multiplication by 2 and division by 2 in the shift value calculation. In hardware design, it can be obtained through shift operations and addition and subtraction operations, and the implementation method is simple; in addition, different shift results can be obtained by taking different modulus operations, and the matrix diversity is rich, which can improve the construction efficiency of the base matrix.

[0073] The short loop optimization method for the H1 matrix proposed in the technical solution provided in the embodiment of the present application can improve the error correction capability of the LDPC codeword, and the error correction performance will not be limited by the specific format of the H1 and H2 matrices.

[0074] Embodiment 3 The present application provides a data verification device, such as Figure 8 As shown, the device includes: a receiving module, a creating module, an optimizing module, an encoding module, and a checking module.

[0075] In this embodiment, the receiving module is used to receive data information to be verified; Create a module for creating a target basis matrix; An optimization module, used for performing short-loop and trap set elimination optimization on the target basis matrix; An encoding module, used for encoding the data information to be verified by a fast encoding algorithm; A verification module is used to verify the encoded data information to be verified through the optimized target basis matrix; The step of performing data verification on the encoded data information to be verified by using the optimized target basis matrix includes: Determine whether the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​equal to a first preset value; In response to the fact that the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​not equal to a first preset value, the encoded data information to be verified is decoded by the optimized target basis matrix until the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​equal to the first preset value or the number of iterations of the encoded data information to be verified in the optimized target basis matrix reaches a second preset value.

[0076] In this embodiment, the creation module is used to create a second matrix by setting unit matrices at the dual diagonal positions of each column from the 1st column to the nth column of the matrix and randomly shifting n random rows in the 0th column of the matrix, where n is greater than 2; Performing a short ring check on the second matrix; Setting corresponding column shift values ​​of a matrix row by row through a Fibonacci sequence and a modulo operation, and creating a first matrix according to the corresponding column shift values ​​of the matrix; The first matrix is ​​combined with the second matrix after the short ring check to obtain a target basis matrix.

[0077] In one of the embodiments, a creation module is used to set the dimension of the second matrix and the dimension of the check matrix corresponding to the second matrix; Setting the dimension of the first matrix and the dimension of the check matrix corresponding to the first matrix; The dimension and code rate of the check matrix corresponding to the target base matrix are set.

[0078] In one embodiment, a module is created, for initializing the second matrix to an all-0 matrix; Assigning unit matrices to the double diagonal positions from the 1st column to the nth column of the second matrix; A second matrix is ​​created by randomly shifting random n rows in the 0th column of the second matrix, where n is greater than 2.

[0079] In one embodiment, a module is created to determine whether the number of short rings of the second matrix is ​​a third preset value and whether the minimum ring length is a fourth preset value; If so, the short ring check process for the second matrix is ​​terminated; if not, the shift value position and size of the second matrix are randomly adjusted until the number of short rings of the second matrix is ​​a third preset value and the minimum ring length is a fourth preset value.

[0080] In one embodiment, a module is created, for initializing the first matrix to be an all-0 matrix; Set the corresponding column shift value of the matrix row by row through the Fibonacci sequence and modulo operation; The step of setting the corresponding column shift values ​​of the matrix row by row through the Fibonacci sequence and the modulo operation includes: When the row index m is 0, get the number fibo after the x-th position of the Fibonacci sequence, the starting term s of the sequence, the column index n1 starting from 0, and the modulus value z; The column shift value of the matrix is ​​calculated by the formula: the column shift value of the matrix = fibo(s+n1)%z; When the row index m is 1, the number fibo after the x-th position of the Fibonacci sequence is obtained, the starting term s of the sequence is selected, the column index n1 starting from 0, and the modulus value z; The column shift value of the matrix is ​​calculated by the formula: the column shift value of the matrix = (fibo(m+n1+s)+m)%z; When the row index m is another even number, get the number fibo after the xth position of the Fibonacci sequence, the starting item s of the sequence, the column index n1 starting from 0, and the modulus value z; By formula: , calculate the column shift value of the matrix; When the row index m is another odd number, the number fibo after the x-th position of the Fibonacci sequence is obtained, the starting term s of the sequence is selected, the column index n1 starting from 0, and the modulus value z; where 0≤n1≤nm-1; By formula: , calculate the column shift value of the matrix; A first matrix is ​​created according to the column shift values ​​of the matrix.

[0081] In one of the embodiments, the optimization module is used to traverse the number and position of short rings in the target basis matrix by column; In response to the fact that the number of short loops in one column is the largest, the shift value of the common point in the column where the number of short loops is the largest is set to a fifth preset value; Obtaining a row weight constraint value and a row weight constraint error value of the first matrix; Determine whether the number of fifth preset values ​​of each row of the first matrix in the modified target base matrix satisfies both the row weight constraint value and the row weight constraint error value of the first matrix; If so, continue to set the shift value of the common point with the largest number of short rings in the next column of the first matrix of the target base matrix to the fifth preset value, until all columns of the first matrix in the target base matrix are traversed, and judge whether the row weight of the first matrix in the target base matrix simultaneously satisfies the row weight constraint value and the row weight constraint error value of the first matrix and whether the column weight of the first matrix in the target base matrix simultaneously satisfies the column weight constraint value and the column weight constraint error value of the first matrix; if not, traverse the number and position of short rings in the target base matrix again by column, and set the shift value of the common point with the largest number of short rings in the column to the fifth preset value.

[0082] In one embodiment, the optimization module is used to determine whether the first matrix row weight in the target base matrix satisfies the row weight constraint value and the row weight constraint error value of the first matrix at the same time and whether the first matrix column weight in the target base matrix satisfies the column weight constraint value and the column weight constraint error value of the first matrix at the same time; If yes, the short loop and trap set elimination optimization process for the target basis matrix is ​​terminated; if no, the short loop and trap set elimination optimization is performed again on the target basis matrix, and the number and position of short loops in the target basis matrix are traversed column by column.

[0083] Here, the QC-LDPC matrix construction method proposed in this application splits the H matrix into two parts, H1 and H2, the starting column of the H2 matrix is ​​a column with a column weight greater than 2, and the remaining columns are double diagonal lines in the form of a unit matrix structure; the starting row of the H1 matrix uses a special number sequence as the shift value of the matrix after a modular operation, and the remaining columns are obtained by dividing the starting row into odd and even columns and combining mathematical operations with modular operations; For the H2 matrix, the minimum loop length and the number of short loops in the matrix composed of the starting column and the remaining columns meet the target requirements; For the H1 matrix optimization process, loop through the columns and set the points that appear most or second most in each column in the short loop to "-1". At the same time, the row weight and column weight in the H1 matrix meet the set constraint value and error value respectively; For the H matrix, it is divided into two parts, H1 and H2, when it is stored. In H1, only the position where "-1" is located or the position with the actual shift value needs to be stored according to the actual number of "-1"; At the same time, the present application constructs a high-performance three-quarter code rate LDPC check matrix.

[0084] The beneficial effects of the technical solution provided by the embodiment of the present application are: The base matrix of the present application can reduce the storage space of the check matrix, improve the performance of the check matrix, and can also perform rapid check on the digital channel.

[0085] The technical solution provided in the embodiment of the present application divides the H basis matrix into two parts, namely, H1 (first matrix) and H2 (second matrix). When constructing, the H2 matrix has specific shift values ​​only in the first column, and in the remaining columns, it only exists in the form of a unit matrix at the double diagonals. When constructing the H1 matrix, the Fibonacci sequence is used. One of the important characteristics of the Fibonacci sequence is that the third term is equal to the sum of the first two terms. Therefore, in the storage of the shift values ​​of the matrix, only the first two shift values ​​of the Fibonacci sequence used need to be recorded, and the shift values ​​of other positions can be obtained through simple algebraic operations and modular operations, thereby simplifying the complexity of the matrix. In hardware implementation, when there are more "-1"s in the basis matrix, the matrix position index with the shift value can be stored; when there are more numerical values ​​of the shift value in the matrix, the matrix position index of "-1" can be stored. The combination of the two can significantly reduce the storage space of the matrix.

[0086] The short loop optimization method for the H1 matrix proposed in the technical solution provided in the embodiment of the present application can improve the error correction capability of the LDPC codeword, and the error correction performance will not be limited by the specific format of the H1 and H2 matrices.

[0087] Embodiment 4 The present invention also provides a data verification device, comprising: one or more processors; A storage device for storing one or more programs; When the one or more programs are executed by the one or more processors, the one or more processors perform the following data verification method: Receiving data information to be verified; Creating a target basis matrix, and performing short-loop and trap set elimination optimization on the target basis matrix; Encoding the data information to be verified by a fast encoding algorithm; Performing data verification on the encoded data information to be verified through the optimized target basis matrix; The step of performing data verification on the encoded data information to be verified by using the optimized target basis matrix includes: Determine whether the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​equal to a first preset value; In response to the fact that the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​not equal to a first preset value, the encoded data information to be verified is decoded by the optimized target basis matrix until the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​equal to the first preset value or the number of iterations of the encoded data information to be verified in the optimized target basis matrix reaches a second preset value.

[0088] The beneficial effects of the technical solution provided by the embodiment of the present application are: The base matrix of the present application can reduce the storage space of the check matrix, improve the performance of the check matrix, and can also perform rapid check on the digital channel.

[0089] The short loop optimization method for the H1 matrix proposed in the technical solution provided in the embodiment of the present application can improve the error correction capability of the LDPC codeword, and the error correction performance will not be limited by the specific format of the H1 and H2 matrices.

[0090] Embodiment 5 The present application provides a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the following data verification method can be executed: Receiving data information to be verified; Creating a target basis matrix, and performing short-loop and trap set elimination optimization on the target basis matrix; Encoding the data information to be verified by a fast encoding algorithm; Performing data verification on the encoded data information to be verified through the optimized target basis matrix; The step of performing data verification on the encoded data information to be verified by using the optimized target basis matrix includes: Determine whether the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​equal to a first preset value; In response to the fact that the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​not equal to a first preset value, the encoded data information to be verified is decoded by the optimized target basis matrix until the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​equal to the first preset value or the number of iterations of the encoded data information to be verified in the optimized target basis matrix reaches a second preset value.

[0091] The beneficial effects of the technical solution provided by the embodiment of the present application are: The base matrix of the present application can reduce the storage space of the check matrix, improve the performance of the check matrix, and can also perform rapid check on the digital channel.

[0092] The technical solution provided in the embodiment of the present application divides the H basis matrix into two parts, namely, H1 (first matrix) and H2 (second matrix). When constructing, the H2 matrix has specific shift values ​​only in the first column, and in the remaining columns, it only exists in the form of a unit matrix at the double diagonals. When constructing the H1 matrix, the Fibonacci sequence is used. One of the important characteristics of the Fibonacci sequence is that the third term is equal to the sum of the first two terms. Therefore, in the storage of the shift values ​​of the matrix, only the first two shift values ​​of the Fibonacci sequence used need to be recorded, and the shift values ​​of other positions can be obtained through simple algebraic operations and modular operations, thereby simplifying the complexity of the matrix. In hardware implementation, when there are more "-1"s in the basis matrix, the matrix position index with the shift value can be stored; when there are more numerical values ​​of the shift value in the matrix, the matrix position index of "-1" can be stored. The combination of the two can significantly reduce the storage space of the matrix.

[0093] Embodiment 6 The present application also provides a computer program product, including a computer program, which can implement the following data verification method when executed by a processor: Receiving data information to be verified; Creating a target basis matrix, and performing short-loop and trap set elimination optimization on the target basis matrix; Encoding the data information to be verified by a fast encoding algorithm; Performing data verification on the encoded data information to be verified through the optimized target basis matrix; The step of performing data verification on the encoded data information to be verified by using the optimized target basis matrix includes: Determine whether the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​equal to a first preset value; In response to the fact that the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​not equal to a first preset value, the encoded data information to be verified is decoded by the optimized target basis matrix until the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​equal to the first preset value or the number of iterations of the encoded data information to be verified in the optimized target basis matrix reaches a second preset value.

[0094] The beneficial effects of the technical solution provided by the embodiment of the present application are: The base matrix of the present application can reduce the storage space of the check matrix, improve the performance of the check matrix, and can also perform rapid check on the digital channel.

[0095] The technical solution provided in the embodiment of the present application can be encoded using the fast encoding method in the IEEE802.16e standard, and the encoding process of the information bit can be completed using only the H matrix, avoiding the generation and storage of the G matrix in the traditional encoding method; the method for constructing the H1 matrix in the present application mostly uses simple addition and subtraction and mixed operations of multiplication by 2 and division by 2 in the shift value calculation. In hardware design, it can be obtained through shift operations and addition and subtraction operations, and the implementation method is simple; in addition, different shift results can be obtained by taking different modulus operations, and the matrix diversity is rich, which can improve the construction efficiency of the base matrix.

[0096] The short loop optimization method for the H1 matrix proposed in the technical solution provided in the embodiment of the present application can improve the error correction capability of the LDPC codeword, and the error correction performance will not be limited by the specific format of the H1 and H2 matrices.

[0097] Embodiment 7 The present application provides a computer storage medium, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the following steps are implemented: Receiving data information to be verified; Creating a target basis matrix, and performing short-loop and trap set elimination optimization on the target basis matrix; Encoding the data information to be verified by a fast encoding algorithm; Performing data verification on the encoded data information to be verified through the optimized target basis matrix; The step of performing data verification on the encoded data information to be verified by using the optimized target basis matrix includes: Determine whether the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​equal to a first preset value; In response to the fact that the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​not equal to a first preset value, the encoded data information to be verified is decoded by the optimized target basis matrix until the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​equal to the first preset value or the number of iterations of the encoded data information to be verified in the optimized target basis matrix reaches a second preset value.

[0098] In one embodiment, creating a target basis matrix includes: Create a second matrix by setting unit matrices at the dual diagonal positions of each column from the 1st column to the nth column of the matrix and randomly shifting n random rows in the 0th column of the matrix, where n is greater than 2; Performing a short ring check on the second matrix; Setting corresponding column shift values ​​of a matrix row by row through a Fibonacci sequence and a modulo operation, and creating a first matrix according to the corresponding column shift values ​​of the matrix; The first matrix is ​​combined with the second matrix after the short ring check to obtain a target basis matrix.

[0099] In one embodiment, before creating the second matrix by setting unit matrices at the dual diagonal positions of each column from the 1st column to the nth column of the matrix and randomly shifting n random rows in the 0th column of the matrix, the method includes: Setting the dimension of the second matrix and the dimension of the check matrix corresponding to the second matrix; Setting the dimension of the first matrix and the dimension of the check matrix corresponding to the first matrix; The dimension and code rate of the check matrix corresponding to the target base matrix are set.

[0100] In one embodiment, the step of creating a second matrix by setting unit matrices at dual diagonal positions of columns 1 to n of the matrix and randomly shifting n random rows in column 0 of the matrix includes: Initializing the second matrix to an all-0 matrix; Assigning unit matrices to the double diagonal positions from the 1st column to the nth column of the second matrix; A second matrix is ​​created by randomly shifting random n rows in the 0th column of the second matrix.

[0101] In one embodiment, performing a short ring check on the second matrix includes: Determine whether the number of short rings of the second matrix is ​​a third preset value and whether the minimum ring length is a fourth preset value; If so, the short ring check process for the second matrix is ​​terminated; if not, the shift value position and size of the second matrix are randomly adjusted until the number of short rings of the second matrix is ​​a third preset value and the minimum ring length is a fourth preset value.

[0102] In one embodiment, setting corresponding column shift values ​​of a matrix row by row through a Fibonacci sequence and a modulo operation, and creating a first matrix according to the corresponding column shift values ​​of the matrix, comprises: Initializing the first matrix to an all-0 matrix; Set the corresponding column shift value of the matrix row by row through the Fibonacci sequence and modulo operation; The step of setting the corresponding column shift values ​​of the matrix row by row through the Fibonacci sequence and the modulo operation includes: When the row index m is 0, get the number fibo after the x-th position of the Fibonacci sequence, the starting term s of the sequence, the column index n1 starting from 0, and the modulus value z; The column shift value of the matrix is ​​calculated by the formula: the column shift value of the matrix = fibo(s+n1)%z; When the row index m is 1, the number fibo after the x-th position of the Fibonacci sequence is obtained, the starting term s of the sequence is selected, the column index n1 starting from 0, and the modulus value z; The column shift value of the matrix is ​​calculated by the formula: the column shift value of the matrix = (fibo(m+n1+s)+m)%z; When the row index m is another even number, get the number fibo after the xth position of the Fibonacci sequence, the starting item s of the sequence, the column index n1 starting from 0, and the modulus value z; By formula: , calculate the column shift value of the matrix; When the row index m is another odd number, the number fibo after the x-th position of the Fibonacci sequence is obtained, the starting term s of the sequence is selected, the column index n1 starting from 0, and the modulus value z; where 0≤n1≤nm-1; By formula: , calculate the column shift value of the matrix; A first matrix is ​​created according to the column shift values ​​of the matrix.

[0103] In one embodiment, combining the first matrix with the second matrix after short-loop verification to obtain a target base matrix, and performing short-loop and trap set elimination optimization on the target base matrix includes: Traversing the number and position of short rings in the target basis matrix by columns; In response to the fact that the number of short loops in one column is the largest, the shift value of the common point in the column where the number of short loops is the largest is set to a fifth preset value; Obtaining a row weight constraint value and a row weight constraint error value of the first matrix; Determine whether the number of fifth preset values ​​of each row of the first matrix in the modified target base matrix satisfies both the row weight constraint value and the row weight constraint error value of the first matrix; If so, continue to set the shift value of the common point with the largest number of short rings in the next column of the first matrix of the target base matrix to the fifth preset value, until all columns of the first matrix in the target base matrix are traversed, and judge whether the row weight of the first matrix in the target base matrix simultaneously satisfies the row weight constraint value and the row weight constraint error value of the first matrix and whether the column weight of the first matrix in the target base matrix simultaneously satisfies the column weight constraint value and the column weight constraint error value of the first matrix; if not, traverse the number and position of short rings in the target base matrix again by column, and set the shift value of the common point with the largest number of short rings in the column to the fifth preset value.

[0104] In one embodiment, the judging whether the row weight of the first matrix in the target base matrix satisfies the row weight constraint value and the row weight constraint error value of the first matrix at the same time and whether the column weight of the first matrix in the target base matrix satisfies the column weight constraint value and the column weight constraint error value of the first matrix at the same time includes: Determine whether the first matrix row weight in the target base matrix satisfies the row weight constraint value and the row weight constraint error value of the first matrix at the same time and whether the first matrix column weight in the target base matrix satisfies the column weight constraint value and the column weight constraint error value of the first matrix at the same time; If yes, the short loop and trap set elimination optimization process for the target basis matrix is ​​terminated; if no, the short loop and trap set elimination optimization is performed again on the target basis matrix, and the number and position of short loops in the target basis matrix are traversed column by column.

[0105] The base matrix of the present application can reduce the storage space of the check matrix, improve the performance of the check matrix, and can also perform rapid check on the digital channel.

[0106] Fig. 9 An exemplary system provided for Embodiment 7 of the present application that can be used to implement various embodiments described in the present application; like Fig. 9As shown, in some embodiments, the system can be used as any of the above-mentioned devices for data verification in each of the embodiments. In some embodiments, the system may include one or more computer-readable media (e.g., system memory or NVM / storage device) having results and one or more processors (e.g., (one or more) processors) coupled to the one or more computer-readable media and configured to execute the results to implement the module to perform the actions described in this application.

[0107] Those of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be implemented by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application may include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

[0108] The technical features of the above embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0109] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application.

Claims

1. A data verification method, characterized in that: The method comprises: Receiving data information to be verified; Creating a target basis matrix, and performing short-loop and trap set elimination optimization on the target basis matrix; Encoding the data information to be verified by a fast encoding algorithm; Performing data verification on the encoded data information to be verified through the optimized target basis matrix; The step of performing data verification on the encoded data information to be verified by using the optimized target basis matrix includes: Determine whether the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​equal to a first preset value; In response to the fact that the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​not equal to a first preset value, the encoded data information to be verified is decoded by the optimized target basis matrix until the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​equal to the first preset value or the number of iterations of the encoded data information to be verified in the optimized target basis matrix reaches a second preset value.

2. The data verification method according to claim 1, characterized in that: The step of creating a target basis matrix comprises: Create a second matrix by setting unit matrices at the dual diagonal positions of each column from the 1st column to the nth column of the matrix and randomly shifting n random rows in the 0th column of the matrix, where n is greater than 2; Performing a short ring check on the second matrix; Setting corresponding column shift values ​​of a matrix row by row through a Fibonacci sequence and a modulo operation, and creating a first matrix according to the corresponding column shift values ​​of the matrix; The first matrix is ​​combined with the second matrix after the short ring check to obtain a target basis matrix.

3. The data verification method according to claim 2, characterized in that: The step of creating a second matrix by setting unit matrices at the dual diagonal positions of each column from the 1st column to the nth column of the matrix and randomly shifting n random rows in the 0th column of the matrix comprises: Initializing the second matrix to an all-0 matrix; Assigning unit matrices to the double diagonal positions from the 1st column to the nth column of the second matrix; A second matrix is ​​created by randomly shifting random n rows in the 0th column of the second matrix.

4. The data verification method according to claim 3, characterized in that: The performing a short ring check on the second matrix includes: Determine whether the number of short rings of the second matrix is ​​a third preset value and whether the minimum ring length is a fourth preset value; If so, the short ring check process for the second matrix is ​​terminated; if not, the shift value position and size of the second matrix are randomly adjusted until the number of short rings of the second matrix is ​​a third preset value and the minimum ring length is a fourth preset value.

5. The data verification method according to claim 2, characterized in that: The step of setting corresponding column shift values ​​of a matrix row by row through the Fibonacci sequence and a modulo operation, and creating a first matrix according to the corresponding column shift values ​​of the matrix, comprises: Initializing the first matrix to an all-0 matrix; Set the corresponding column shift value of the matrix row by row through the Fibonacci sequence and modulo operation; The step of setting the corresponding column shift values ​​of the matrix row by row through the Fibonacci sequence and the modulo operation includes: When the row index m is 0, get the number fibo after the x-th position of the Fibonacci sequence, the starting term s of the sequence, the column index n1 starting from 0, and the modulus value z; The column shift value of the matrix is ​​calculated by the formula: the column shift value of the matrix = fibo(s+n1)%z; When the row index m is 1, the number fibo after the x-th position of the Fibonacci sequence is obtained, the starting term s of the sequence is selected, the column index n1 starting from 0, and the modulus value z; The column shift value of the matrix is ​​calculated by the formula: the column shift value of the matrix = (fibo(m+n1+s)+m)%z; When the row index m is another even number, get the number fibo after the xth position of the Fibonacci sequence, the starting item s of the sequence, the column index n1 starting from 0, and the modulus value z; By formula: , calculate the column shift value of the matrix; When the row index m is another odd number, the number fibo after the x-th position of the Fibonacci sequence is obtained, the starting term s of the sequence is selected, the column index n1 starting from 0, and the modulus value z; where 0≤n1≤nm-1; By formula: , calculate the column shift value of the matrix; A first matrix is ​​created according to the column shift values ​​of the matrix.

6. The data verification method according to claim 2, characterized in that: The performing short-loop and trap set elimination optimization on the target basis matrix comprises: Traversing the number and position of short rings in the target basis matrix by columns; In response to the fact that the number of short loops in one column is the largest, the shift value of the common point in the column where the number of short loops is the largest is set to a fifth preset value; Obtaining a row weight constraint value and a row weight constraint error value of the first matrix; Determine whether the number of fifth preset values ​​of each row of the first matrix in the modified target base matrix satisfies both the row weight constraint value and the row weight constraint error value of the first matrix; If so, continue to set the shift value of the common point with the largest number of short rings in the next column of the first matrix of the target base matrix to the fifth preset value, until all columns of the first matrix in the target base matrix are traversed, and judge whether the row weight of the first matrix in the target base matrix simultaneously satisfies the row weight constraint value and the row weight constraint error value of the first matrix and whether the column weight of the first matrix in the target base matrix simultaneously satisfies the column weight constraint value and the column weight constraint error value of the first matrix; if not, traverse the number and position of short rings in the target base matrix again by column, and set the shift value of the common point with the largest number of short rings in the column to the fifth preset value.

7. The data verification method according to claim 6, characterized in that: The judging whether the first matrix row weight in the target base matrix satisfies the row weight constraint value and the row weight constraint error value of the first matrix at the same time and whether the first matrix column weight in the target base matrix satisfies the column weight constraint value and the column weight constraint error value of the first matrix at the same time includes: Determine whether the first matrix row weight in the target base matrix satisfies the row weight constraint value and the row weight constraint error value of the first matrix at the same time and whether the first matrix column weight in the target base matrix satisfies the column weight constraint value and the column weight constraint error value of the first matrix at the same time; If yes, the short loop and trap set elimination optimization process for the target basis matrix is ​​terminated; if no, the short loop and trap set elimination optimization is performed again on the target basis matrix, and the number and position of short loops in the target basis matrix are traversed column by column.

8. A data verification device, characterized in that: The device comprises: A receiving module, used for receiving data information to be verified; Create a module for creating a target basis matrix; An optimization module, used for performing short-loop and trap set elimination optimization on the target basis matrix; An encoding module, used for encoding the data information to be verified by a fast encoding algorithm; A verification module is used to verify the encoded data information to be verified through the optimized target basis matrix; The step of performing data verification on the encoded data information to be verified by using the optimized target basis matrix includes: Determine whether the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​equal to a first preset value; In response to the fact that the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​not equal to a first preset value, the encoded data information to be verified is decoded by the optimized target basis matrix until the product of the encoded data information to be verified and the transpose of the optimized target basis matrix is ​​equal to the first preset value or the number of iterations of the encoded data information to be verified in the optimized target basis matrix reaches a second preset value.

9. A computer device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the data verification method according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the data verification method according to any one of claims 1 to 7 are implemented.

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