High power photodiode

Abstract

The invention relates to a high power photodiode. In some implementations, a photodiode includes a waveguide layer of a first semiconductor material. The photodiode may include a first ion implanted region in a first semiconductor material, the first ion implanted region being doped to assume a first conductivity type. The photodiode may include a mesa of a second semiconductor material on the waveguide layer. The first ion implantation region may be disposed rearward from a portion of an edge of the bottom surface of the mesa. The photodiode may include a second ion implanted region in a second semiconductor material, the second ion implanted region being doped to assume a second conductivity type. The second ion implanted region may extend downwardly from the top surface of the mesa along a portion of the sloped sidewall of the mesa to an edge of the bottom surface of the mesa.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This patent application claims priority to U.S. Provisional Patent Application No. 63 / 535,879, entitled “HIGH POWER PHOTODIODE,” filed on August 31, 2023. The disclosure of that prior application is considered a part of this patent application and is incorporated by reference into this patent application. Technical Field

[0003] The present disclosure relates generally to photodiodes and high power photodiodes. Background Art

[0004] Coherent optical communication utilizes amplitude and phase modulation of light and transmission across two polarizations to achieve high-speed and long-distance optical communication. In coherent optical communication, coherent modulation is used at the transmitting end, while coherent techniques are used for detection at the receiving end (e.g., using an optical heterodyne architecture). Summary of the invention

[0005] In some implementations, the photodiode includes a waveguide layer of a first semiconductor material. The photodiode may include a first ion implantation region in the first semiconductor material, the first ion implantation region being doped to exhibit a first conductivity type. The photodiode may include a mesa of a second semiconductor material on the waveguide layer. The mesa may have a bottom surface located above the first ion implantation region, a top surface opposite the bottom surface, and an inclined sidewall between the bottom surface and the top surface. The first ion implantation region may be set back from a portion of an edge of the bottom surface of the mesa. The waveguide layer may be optically coupled to an optical input portion of the inclined sidewall of the mesa. The photodiode may include a second ion implantation region in the second semiconductor material, the second ion implantation region being doped to exhibit a second conductivity type. The second ion implantation region may extend from the top surface of the mesa to the optical input portion of the inclined sidewall of the mesa.

[0006] In some implementations, the photodiode includes a waveguide layer of a first semiconductor material. The photodiode may include a first ion implantation region in the first semiconductor material, the first ion implantation region being doped to exhibit a first conductivity type. The photodiode may include a mesa of a second semiconductor material on the waveguide layer. The mesa may have a bottom surface located above the first ion implantation region, a top surface opposite the bottom surface, and an inclined sidewall between the bottom surface and the top surface. The first ion implantation region may be set back from a portion of an edge of the bottom surface of the mesa. The photodiode may include a second ion implantation region in the second semiconductor material, the second ion implantation region being doped to exhibit a second conductivity type. The second ion implantation region may extend from the top surface of the mesa downward along a portion of the inclined sidewall of the mesa to the edge of the bottom surface of the mesa.

[0007] In some implementations, a method includes forming a waveguide layer of a first semiconductor material on a substrate. The method may include applying a first photoresist layer on the waveguide layer, wherein the first photoresist layer exposes an exposed area of ​​the first semiconductor material. The method may include implanting a first dopant in the exposed area of ​​the first semiconductor material to form a first ion implantation area of ​​a first conductivity type. The method may include forming an oxide layer defining an opening on the waveguide layer. The method may include forming a mesa of a second semiconductor material on the waveguide layer in the opening defined in the oxide layer, wherein the mesa has a bottom surface located above the first ion implantation area, a top surface opposite to the bottom surface, and an inclined sidewall between the bottom surface and the top surface. The method may include applying a second photoresist layer on the oxide layer and the mesa, wherein the second photoresist layer defines an implantation window, the implantation window exposes the exposed area of ​​the second semiconductor material, and exposes the exposed area of ​​the oxide layer. The method may include implanting a second dopant in the exposed area of ​​the second semiconductor material and the exposed area of ​​the oxide layer to form a second ion implantation area of ​​a second conductivity type. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 is a cross-sectional view of an example photodiode;

[0009] Figure 2 is a cross-sectional view of an example photodiode;

[0010] Figure 3 is a diagram of an example system; and

[0011] Figure 4 is a flow chart of an example process for forming a high power photodiode. DETAILED DESCRIPTION

[0012] The following detailed description of example implementations refers to the accompanying drawings.The same reference numbers in different drawings may identify the same or similar elements.

[0013] Coherent optical communications can be used in high-speed and long-distance optical communication networks. Optical communication networks can use photodiodes (for example, in transceivers) to convert optical signals into electrical signals. In coherent optical communications, high optical power can be input to the photodiode. In microscale photodiodes, high optical power may lead to high light intensity and power saturation effects. In general, these effects can be alleviated by reducing the local light intensity, such as by using larger photodiodes to disperse the input light. As another example, the bias voltage of the photodiode can be increased to produce a higher electric field. However, the techniques used to alleviate power saturation may limit other characteristics of the photodiode, such as dark current and / or electrical bandwidth.

[0014] In addition, the manufacturing process of the photodiode may impose strict constraints on the options for introducing doping to form the conductive region of the photodiode. For example, the geometry of an epitaxially grown photodiode (e.g., using selective area growth) can make it difficult to control the implantation of doping into specific regions of the photodiode. For example, a photoresist defining an implantation window can be placed on a semiconductor region of the photodiode to control doping in the semiconductor region. However, the semiconductor region can have sloping sidewalls, which can affect the precise control of the location of the implantation window.

[0015] Some implementations described herein provide photodiodes that can be used for coherent optical communications involving high optical power. In some implementations, the photodiode may include a semiconductor table (e.g., a germanium table) having an inclined sidewall. The inclined sidewall may have an optical input portion into which the signal light is directed. The table may be located on a first ion implantation region of a first conductivity type, and a second ion implantation region of a second conductivity type may extend downward along the optical input portion of the inclined sidewall, very close to the first ion implantation region, thereby generating a high electric field suitable for high power applications on the optical input portion of the inclined sidewall, and achieving high bandwidth under all operating conditions. The first ion implantation region may be set back from the edge of the table to prevent contact between the first ion implantation region and the second ion implantation region.

[0016] The second ion implantation region can be produced by ion implantation using a photoresist. For example, after the semiconductor mesa is grown in the opening of the oxide layer, a photoresist can be applied that defines an implantation window that exposes at least a portion of the mesa (e.g., it includes the optical input portion of the sidewall of the mesa) and at least a portion of the oxide layer adjacent to the optical input portion of the sidewall. By extending the implantation window to encompass this portion of the oxide layer, the implantation window can expose the sidewall of the mesa, while the edge of the implantation window is on the flat surface of the oxide layer, rather than on the inclined sidewall of the mesa. In this way, the inclined sidewall of the mesa can be completely covered by the second ion implantation region in a consistent manner. The precise placement of the first ion implantation region and the complete coverage of the inclined sidewall of the mesa by the second ion implantation region allow the first ion implantation region and the second ion implantation region to be placed closely, thereby increasing the electric field of the optical input portion of the sidewall of the mesa.

[0017] Figure 1is a cross-sectional view of an example photodiode 100. The photodiode 100 may be a silicon photonic device. As shown, the photodiode 100 may include a substrate 102. The substrate 102 may be a semiconductor material such as silicon, gallium arsenide (GaAs), indium phosphide (InP), or another semiconductor material. The photodiode 100 may include an oxide layer 104 on the substrate 102. For example, the oxide layer 104 may be a buried oxide (BOX) layer formed in the substrate 102. Thus, the substrate of the photodiode 100 may include the substrate 102 (e.g., a semiconductor material layer) and the oxide layer 104. The photodiode 100 may include a waveguide layer 106 on the substrate 102. For example, the waveguide layer 106 may be located on the oxide layer 104. The oxide layer 104 may isolate the waveguide layer 106 from the substrate 102. For example, the photodiode 100 may use silicon on insulator (SOI) technology.

[0018] The waveguide layer 106 can be composed of a first semiconductor material (e.g., the same semiconductor material as the substrate 102). For example, the first semiconductor material can be silicon. The waveguide layer 106 can define an optical waveguide that is configured to guide the signal light in the propagation direction 150 (e.g., the optical waveguide can include less than the entire waveguide layer 106). The photodiode 100 can include a first ion implanted region 108 in the first semiconductor material. For example, the first ion implanted region 108 can be formed in the waveguide layer 106. The first ion implanted region 108 can include a first semiconductor material that is doped (e.g., by ion implantation, as described herein) to exhibit a first conductivity type (e.g., p-type conductivity). For example, the first ion implanted region 108 can include p-doped silicon.

[0019] The photodiode 100 may include a mesa 110 on the waveguide layer 106 (e.g., on the first ion implantation region 108). The mesa 110 may be made of a second semiconductor material. For example, the second semiconductor material may be germanium. In some implementations, the second semiconductor material may be the same material as the first semiconductor material. Alternatively, the second semiconductor material may be a different material from the first semiconductor material. The mesa 110 has a bottom surface 110a, a top surface 110b opposite the bottom surface 110a, and an inclined sidewall 110c between the bottom surface 110a and the top surface 110b. The bottom surface 110a of the mesa 110 may be above the first ion implantation region 108. The sidewall 110c may be linearly inclined or non-linearly inclined (e.g., curved). In addition, the sidewall 110c may be continuously inclined, may include one or more facets, and / or may be inclined according to one or more angles. In practice, the mesa 110 may not be as long as the sidewall 110c is inclined. Figure 1 For example, the top surface 110b may be Figure 1Thus, top surface 110b may be a substantially flat surface of mesa 110 parallel to bottom surface 110a, and sidewall 110c may be an angled or curved surface of mesa 110 relative to top surface 110b and bottom surface 110a.

[0020] The photodiode 100 may include a second ion implantation region 112 in a second semiconductor material. For example, the second ion implantation region 112 may be formed in the mesa 110. The second ion implantation region 112 may include a second semiconductor material that is doped (e.g., by ion implantation, as described herein) to exhibit a second conductivity type (e.g., n-type conductivity) that is different from the first conductivity type of the first ion implantation region 108. For example, the second ion implantation region 112 may include n-doped germanium. The mesa 110 may define an intrinsic region (e.g., an intentionally undoped or lightly doped region that serves as a depletion region) between the first ion implantation region 108 (e.g., a p-type region) and the second ion implantation region 112 (e.g., an n-type region). For example, the photodiode 100 may have a pin structure. In some implementations, the second ion implantation region 112 may be electrically connected to a metal contact layer (e.g., to allow current to flow from the photodiode 100 to the metal contact layer).

[0021] The waveguide layer 106 can be optically coupled to an optical input portion 111 of the sidewall 110c of the mesa 110. For example, the optical input portion 111 can be a region of the sidewall 110c into which the optical waveguide of the waveguide layer 106 emits light to enter the mesa 110. The optical input portion 111 of the sidewall 110c of the mesa 110 can include at least one region of the mesa 110 associated with the highest light intensity (e.g., a light intensity that reaches or exceeds a threshold). For example, the optical input portion 111 can include at least a region of the sidewall 110c that is coupled to the optical waveguide of the waveguide layer 106. In some implementations, the optical input portion 111 can be defined as one-quarter, one-third, one-half, etc. of the total perimeter of the sidewall 110c. In some implementations, the optical input portion 111 can face a direction opposite to the propagation direction 150 (e.g., the optical input portion 111 can be the front of the sidewall 110c). In some implementations (not shown), the direction in which the optical input portion 111 faces can be perpendicular to the direction of propagation toward the page.

[0022] The second ion implantation region 112 may extend from the top surface 110b to a portion of the sidewall 110c of the mesa 110. For example, the second ion implantation region 112 may include an overall periphery that is less than the sidewall 110c (e.g., the second ion implantation region 112 does not extend continuously around the sidewall 110c). In some implementations, the second ion implantation region 112 may extend from the top surface 110b to the optical input portion 111. For example, the second ion implantation region 112 may extend from the top surface 110b of the mesa 110 over the edge of the mesa 110 between the top surface 110b and the sidewall 110c, and extend downward along the optical input portion 111 of the sidewall 110c to completely cover the optical input portion 111 (e.g., at the optical input portion 111, the second ion implantation region 112 completely extends between the top surface 110b and the bottom surface 110a). For example, the second ion implantation region 112 may extend downward from the top surface 110b along the optical input portion 111 to an edge of the bottom surface 110a (eg, at a base of the mesa 110 where the sidewall 110c meets the bottom surface 110a).

[0023] In some implementations, the second ion implantation region 112 may extend to an additional portion of the sidewall 110c opposite the optical input portion 111 (e.g., the additional portion of the sidewall 110c may be a rear portion of the sidewall 110c). For example, the second ion implantation region 112 may extend from the optical input portion 111 across the top surface 110b of the mesa 110 to the additional portion of the sidewall 110c. The additional portion of the sidewall 110c may also be associated with high light intensity (e.g., when signal light is separated and input to opposite sides of the mesa 110). In some implementations, the second ion implantation region 112 does not extend to the side of the sidewall 110c (e.g., extends between the optical input portion 111 and the additional portion). In some implementations, the second ion implantation region 112 may span a portion of the optical input portion 111 and a portion of the side of the sidewall 110c adjacent to the optical input portion 111.

[0024] In order to accommodate the second ion implantation region 112 extending downwardly along the sidewall 110c, the footprint of the first ion implantation region 108 may be smaller than the footprint of the bottom surface 110a. For example, the first ion implantation region 108 may be set back from a portion of the edge of the bottom surface 110a (e.g., the edge to which the second ion implantation region 112 extends), such as Figure 1 The setback distance D is shown.

[0025] In some implementations, the end of the first ion implantation region 108 can extend to (or beyond) the portion of the edge of the bottom surface 110a, and the end of the first ion implantation region 108 can define a notch that allows the first ion implantation region 108 to be set back from the portion of the edge of the bottom surface 110a. For example, the size of the notch can be such that the first ion implantation region 108 avoids the second ion implantation region 112. In this way, the first ion implantation region 108 and the second ion implantation region 112 can be positioned close to each other, but not in contact. The close proximity of the first ion implantation region 108 and the second ion implantation region 112 can generate a strong electric field at the optical input portion 111 (e.g., where the signal light is input to the photodiode 100). Therefore, the photodiode 100 can perform well (e.g., without power saturation effects) in applications using high optical power (such as in coherent optical communications).

[0026] As mentioned above, Figure 1 Other examples can be found in the Figure 1 Different from what is described.

[0027] Figure 2 1 is a cross-sectional view of an example photodiode 100. As shown, the photodiode 100 may include an oxide layer 114. The oxide layer 114 may include a dielectric material, SiO2, Al2O3, etc. The oxide layer 114 may be located on the waveguide layer 106 (and other exposed areas not covered by the waveguide layer 106), and the oxide layer 114 may define an opening 116 around the mesa 110. For example, the oxide layer 114 may be deposited on the waveguide layer 106 (and other exposed areas not covered by the waveguide layer 106), and then the mesa 110 may be epitaxially grown in the opening 116. In some implementations, the oxide layer 114 may be formed as a result of wet oxidation of the first semiconductor material.

[0028] The photodiode 100 may include (e.g., during fabrication of the photodiode 100) a photoresist layer 118 on the oxide layer 114 and / or the mesa 110. The photoresist layer 118 may define an implantation window 120 (e.g., an opening) for implanting the second ion implantation region 112. The implantation window 120 may not be concentric with the mesa 110. For example, the photoresist layer 118 may cover a portion of the sidewall 110c and may expose the optical input portion 111 of the sidewall 110c. For example, the implantation window 120 may expose at least a portion of the top surface 110b of the mesa 110, expose at least a portion of the sidewall 110c (e.g., the optical input portion 111), and expose an ion implantation region 122 of the oxide layer 114 adjacent to the optical input portion 111. The ion implantation region 122 of the oxide layer 114 may be doped to exhibit a second conductivity type (e.g., n-type conductivity). For example, the second ion implantation region 112 may extend (eg, discontinuously) onto the oxide layer 114 (eg, and the oxide layer 114 protects the implant from doping the underlying waveguide layer 106 ).

[0029] By extending the implant window 120 to include at least a portion of the oxide layer 114, the implant window 120 can expose the sidewall 110c of the mesa 110, while the edge of the implant window 120 is on a flat surface of the photodiode 100, rather than on the sloped sidewall 110c. Therefore, on a flat surface, the position of the edge of the implant window 120 can be precisely controlled, thereby allowing the first ion implantation region 108 and the second ion implantation region 112 to be positioned very closely without the risk of overlapping. In addition, extending the implant window 120 to include at least a portion of the oxide layer 114 ensures that the optical input portion 111 is fully doped (e.g., all the way to the base of the mesa 110 at the edge of the bottom surface 110a).

[0030] As mentioned above, Figure 2 Other examples can be found in the Figure 2 Different from what is described.

[0031] Figure 3 is a diagram of an example system 300. As shown, the system 300 may include a photodiode 100. In some implementations, the system 300 may include a silicon photonic device. For example, the system 300 may be a silicon photonic platform. In some implementations, the system 300 may include an optical receiver (e.g., a silicon photonic high-speed receiver). In some implementations, the photodiode 100 may be configured to provide optical power monitoring and / or the photodiode 100 may be configured to convert an optical signal (e.g., received in an optical network) into an electrical signal.

[0032] As mentioned above, Figure 3 Other examples can be found in the Figure 3 Different from what is described.

[0033] Figure 4 is a flow chart of an example process 400 for forming a high power photodiode. In some implementations, Figure 4 One or more process blocks may be performed by various semiconductor manufacturing equipment.

[0034] like Figure 4 As shown, process 400 may include forming a waveguide layer of a first semiconductor material on a substrate (block 410). Figure 4 As further shown, process 400 may include applying a first photoresist layer on the waveguide layer (block 420). The first photoresist layer may expose exposed areas of the first semiconductor material. Figure 4 As further shown, process 400 may include implanting a first dopant into the exposed region of the first semiconductor material to form a first ion implanted region of the first conductivity type (block 430). Figure 4 As further shown, process 400 may include forming an oxide layer defining an opening on the waveguide layer (block 440 ).

[0035] like Figure 4 As further shown, process 400 may include forming a mesa of a second semiconductor material on the waveguide layer in the opening defined in the oxide layer (block 450). As described herein, the mesa has a bottom surface located above the first ion implantation region, a top surface opposite the bottom surface, and a sloped sidewall between the bottom surface and the top surface. Figure 4 As further shown, process 400 may include applying a second photoresist layer over the oxide layer and the mesa (block 460). As described herein, the second photoresist layer may define an implant window that exposes an exposed region of the second semiconductor material and exposes an exposed region of the oxide layer. The edge of the implant window defined by the second photoresist layer may be located on the top surface of the mesa and on the oxide layer (e.g., the edge of the implant is not located on the sloped sidewall of the mesa).

[0036] like Figure 4 As further shown, process 400 may include implanting a second dopant in the exposed area of ​​the second semiconductor material and the exposed area of ​​the oxide layer to form a second ion implantation region of the second conductivity type (block 470). As described herein, the second ion implantation region may extend downward from the top surface of the mesa along a portion of the inclined sidewall of the mesa to an edge of the bottom surface of the mesa. In addition, the first ion implantation region may be set back from a portion of the edge of the bottom surface of the mesa. As described herein, the second ion implantation region may extend onto the oxide layer.

[0037] although Figure 4 Example blocks of process 400 are shown, but in some implementations, Figure 4 Process 400 may include more blocks, fewer blocks, different blocks, or differently arranged blocks than shown. Additionally or alternatively, two or more blocks of process 400 may be performed in parallel.

[0038] In some implementations, the techniques and devices described herein can be used with diodes in high-power applications instead of photodiodes. For example, the techniques and devices described herein can be used in conjunction with optical amplifiers (e.g., semiconductor optical amplifiers), optical modulators, etc.

[0039] The above disclosure provides illustration and description, but is not intended to be exhaustive or to limit the implementation to the precise form disclosed. Modifications and variations may be made based on the above disclosure, or may be obtained from the practice of the implementation. In addition, any implementation described herein may be combined, unless the above disclosure explicitly provides reasons why one or more implementations cannot be combined.

[0040] Although specific combinations of features are listed in the claims and / or disclosed in the specification, these combinations are not intended to limit the disclosure of various implementations. In fact, many of these features can be combined in ways that are not specifically listed in the claims and / or not disclosed in the specification. Although each dependent claim listed below can directly depend on only one claim, the disclosure of various implementations includes each dependent claim combined with each other claim in the claim set. As used herein, a phrase referring to "at least one" in a list of items refers to any combination of these items, including single members. For example, "at least one of a, b, or c" is intended to cover a, b, c, ab, ac, bc, and abc, as well as any combination with multiple identical items.

[0041] When a component or one or more components are described or claimed (within a single claim or across multiple claims) as performing multiple operations or being configured to perform multiple operations, the language is intended to broadly cover a variety of architectures and environments. For example, unless otherwise expressly required (e.g., by use of "first component" and "second component" or other language in the claims that distinguishes components), the language is intended to cover a single component performing or being configured to perform all operations, a group of components collectively performing or being configured to perform all operations, a first component performing or being configured to perform a first operation and a second component performing or being configured to perform a second operation, or any combination of components performing or being configured to perform operations. For example, when a claim is of the form "one or more components are configured to: perform X; perform Y; and perform Z," the claim should be interpreted as "one or more components are configured to perform X; one or more (possibly different) components are configured to perform Y; and one or more (possibly different) components are configured to perform Z." No element, act, or instruction used herein should be interpreted as critical or essential unless expressly stated. In addition, as used in this article, the articles "a" and "an" are intended to include one or more items and can be used interchangeably with "one or more". In addition, as used in this article, the article "the" is intended to include one or more items quoted in combination with the article "the", and can be used interchangeably with "one or more". In addition, as used in this article, the term "set" is intended to include two or more items (e.g., a combination of related items, unrelated items, or related items and unrelated items), and can be used interchangeably with "one or more". If only one item is intended to be used, the phrase "only one" or similar language is used. In addition, as used in this article, the terms "has", "have", "having", etc. are intended to be open terms. In addition, unless otherwise expressly stated, the word "based on" means "at least partially based on". In addition, as used in this article, the term "or" is inclusive when used in a series, and can be used interchangeably with "and / or", unless otherwise expressly stated (e.g., if used in combination with "any one" or "only one"). Additionally, for ease of description, spatially relative terms (such as "below," "bottom," "above," "top," etc.) may be used herein to describe the relationship of one element or feature to another element or feature, as shown in the figures. Spatially relative terms are intended to encompass different orientations of the device, apparatus, and / or element in use or operation in addition to the orientation shown in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations), and the spatially relative descriptors used herein may be interpreted accordingly.

Claims

1. A photodiode, comprising: a waveguide layer of a first semiconductor material; a first ion implantation region in the first semiconductor material, the first ion implantation region being doped to exhibit a first conductivity type; a mesa of a second semiconductor material, the mesa being on the waveguide layer, wherein the mesa has a bottom surface, a top surface, and an inclined sidewall, the bottom surface is above the first ion implantation region, the top surface is opposite to the bottom surface, and the inclined sidewall is between the bottom surface and the top surface, wherein the first ion implantation region is disposed backward from a portion of an edge of the bottom surface of the mesa, and wherein the waveguide layer is optically coupled to an optical input portion of the sloped sidewall of the mesa; as well as a second ion implantation region in the second semiconductor material, the second ion implantation region being doped to exhibit a second conductivity type, The second ion implantation region extends from the top surface of the mesa to the optical input portion of the inclined sidewall of the mesa. 2 . The photodiode of claim 1 , wherein the second ion implantation region extends from the top surface of the mesa downwardly along the optical input portion of the inclined sidewall of the mesa to the edge of the bottom surface of the mesa.

3. The photodiode according to claim 1, further comprising: An oxide layer is on the waveguide layer, the oxide layer defining an opening, the opening surrounding the mesa. 4 . The photodiode of claim 3 , wherein the oxide layer includes an ion implantation region doped to exhibit the second conductivity type.

5. The photodiode according to claim 4, further comprising: A photoresist layer defines an implantation window, wherein the implantation window exposes the ion implantation region of the oxide layer. 6 . The photodiode of claim 1 , wherein the mesa defines an intrinsic region between the first ion implantation region and the second ion implantation region.

7. The photodiode according to claim 1, further comprising a substrate, wherein the substrate comprises a semiconductor material layer and an oxide layer, The waveguide layer is disposed on the substrate.

8. The photodiode of claim 1, wherein the first semiconductor material comprises silicon and the second semiconductor material comprises germanium.

9. A photodiode, comprising: a waveguide layer of a first semiconductor material; a first ion implantation region in the first semiconductor material, the first ion implantation region being doped to exhibit a first conductivity type; A mesa of a second semiconductor material, the mesa being on the waveguide layer wherein the mesa has a bottom surface, a top surface, and an inclined sidewall, the bottom surface is above the first ion implantation region, the top surface is opposite to the bottom surface, and the inclined sidewall is between the bottom surface and the top surface, and wherein the first ion implantation region is disposed backward from a portion of an edge of the bottom surface of the mesa; and a second ion implantation region in the second semiconductor material, the second ion implantation region being doped to exhibit a second conductivity type, The second ion implantation region extends downward from the top surface of the mesa along a portion of the inclined sidewall of the mesa to the edge of the bottom surface of the mesa.

10. The photodiode according to claim 9, further comprising: An oxide layer is on the waveguide layer, the oxide layer defining an opening, the opening surrounding the mesa. 11 . The photodiode of claim 10 , wherein the oxide layer includes an ion implanted region doped to exhibit the second conductivity type.

12. The photodiode according to claim 11, further comprising: A photoresist layer defines an implantation window, wherein the implantation window exposes the ion implantation region of the oxide layer. 13 . The photodiode of claim 12 , wherein an edge of the implantation window is on the top surface of the mesa and on the oxide layer.

14. The photodiode of claim 9, wherein the first semiconductor material comprises silicon and the second semiconductor material comprises germanium.

15. The photodiode of claim 9, wherein the waveguide layer is configured to guide light in a propagation direction, and The direction in which the portion of the inclined sidewall of the mesa faces is opposite to the propagation direction.

16. The photodiode of claim 9, wherein the waveguide layer is configured to guide light in a propagation direction, and The direction in which the portion of the inclined sidewall of the mesa faces is perpendicular to the propagation direction.

17. A method comprising: forming a waveguide layer of a first semiconductor material on a substrate; applying a first photoresist layer on the waveguide layer, wherein the first photoresist layer exposes an exposed area of ​​the first semiconductor material; implanting a first dopant into the exposed region of the first semiconductor material to form a first ion implantation region of a first conductivity type; forming an oxide layer on the waveguide layer, the oxide layer defining an opening; forming a mesa of a second semiconductor material on the waveguide layer in the opening defined in the oxide layer, wherein the mesa has a bottom surface, a top surface, and an inclined sidewall, the bottom surface is above the first ion implantation region, the top surface is opposite to the bottom surface, and the inclined sidewall is between the bottom surface and the top surface; applying a second photoresist layer on the oxide layer and on the mesas, wherein the second photoresist layer defines an implantation window, the implantation window exposing an exposed region of the second semiconductor material and exposing an exposed region of the oxide layer; as well as A second dopant is implanted into the exposed region of the second semiconductor material and the exposed region of the oxide layer to form a second ion implantation region of a second conductivity type.

18. The method according to claim 17, wherein the second ion implantation region extends downward from the top surface of the mesa along a portion of the inclined sidewall of the mesa to an edge of the bottom surface of the mesa, and The first ion implantation region is disposed backward from a portion of the edge of the bottom surface of the mesa. The method according to claim 17 , wherein the second ion implantation region extends onto the oxide layer.

20. The method of claim 17, wherein an edge of the implant window defined by the second photoresist layer is on the top surface of the mesa and on the oxide layer.

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