Processing method and device of resistive random access memory, electronic equipment and storage medium

Abstract

The invention relates to a resistive random access memory processing method and device, electronic equipment and a storage medium, and the method comprises the steps: judging whether a resistive random access memory processing demand exists or not; if the resistive random access memory processing requirement exists, performing forward Forming operation on the to-be-processed resistive random access memory to obtain a forward-processed resistive random access memory, and if the conductivity of the forward-processed resistive random access memory is greater than or equal to a first preset conductivity threshold value, repeatedly applying a first RESET pulse to the forward-processed resistive random access memory to obtain a second RESET pulse, and if the conductivity of the forward-processed resistive random access memory is greater than or equal to a second preset conductivity threshold value, repeatedly applying a second RESET pulse to the forward-processed resistive random access memory; obtaining a resistive random access memory after reverse processing until the conductivity of the resistive random access memory after forward processing is smaller than a first preset conductivity threshold value; and repeatedly applying a second RESET pulse to the resistive random access memory after the reverse processing until the conductivity of the resistive random access memory after the reverse processing is greater than a second preset conductivity threshold, thereby obtaining a target resistive random access memory. Therefore, the problem that the relaxation phenomenon easily occurs in the programmed target memory is solved, and the stability of the conductance state of the programmed resistive random access memory is enhanced.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a processing method, device, electronic device and storage medium of a resistive random access memory. Background Art

[0002] With the rapid development of AI's demand for hardware, Moore's Law is gradually coming to an end, and many problems such as the limitation of storage wall and von Neumann bottleneck make the economic construction of AI hardware platform more and more difficult. The proposal of storage-computing integrated architecture points out a key way to solve these problems, but at the same time it also puts forward new requirements for the integration of computing unit and storage unit in devices.

[0003] Resistive Random Access Memory (RRAM) is one of the new devices that can achieve this requirement. Many studies around the world have shown its feasibility and efficiency in artificial intelligence applications, and it has very attractive prospects. At the same time, due to its advantages such as non-volatility, low power consumption, high speed, good miniaturization characteristics, and multi-bit storage capacity, RRAM also has excellent potential for application in the memory field.

[0004] The programming method can set the target conductivity value of the RRAM, but due to the influence of the working mechanism of the RRAM, the RRAM that successfully completes the writing of the conductivity value is likely to cause a highly random conductivity value drift (also known as relaxation) due to factors such as the instability of the conductive filaments inside the device after the operation, the spontaneous migration of oxygen vacancies, and the capture and release of charges by defects. This phenomenon causes the conductivity values ​​of many devices in the RRAM array to quickly deviate from the written conductivity value within a short time scale (usually less than 1s), resulting in a significant decrease in the accuracy of the calculation results or errors in the stored information.

[0005] Related technologies enhance the stability of RRAM by changing the material composition or device structure. However, related technologies usually encounter challenges of complex mechanism analysis and multiple process controllability, and often involve compromise selection of multiple characteristics, and are very inefficient. In addition, there is a method of using optimized device programming to regulate the morphology of conductive filaments. However, since the operating voltage is very small, this method does not significantly change the heating morphology of the filaments, nor does it optimize the stability to a great extent. Moreover, it must be used every time it is programmed, which is not very practical. Summary of the invention

[0006] The present application provides a processing method, device, electronic device and storage medium of a resistive memory to solve the problem that a target memory after programming is prone to relaxation, resulting in reduced accuracy of calculation results or errors in stored information. By using a stronger voltage to improve the morphology of conductive filaments at one time, the stability of the conductivity state of the resistive memory after programming is enhanced, thereby ensuring the accuracy of the calculation results and the reliability of the stored information.

[0007] A first aspect of the present application provides a method for processing a resistive random access memory, comprising the following steps:

[0008] Determine whether there is a need for resistive memory processing;

[0009] If there is a requirement for processing the resistive random access memory, a forward forming operation is performed on the resistive random access memory to be processed to obtain a resistive random access memory after forward processing. If the conductance of the resistive random access memory after forward processing is greater than or equal to a first preset conductance threshold, a first RESET pulse is repeatedly applied to the resistive random access memory after forward processing until the conductance of the resistive random access memory after forward processing is less than the first preset conductance threshold, thereby obtaining a resistive random access memory after reverse processing; and

[0010] Repeatedly applying a second RESET pulse to the reverse-processed resistive memory until the conductance of the reverse-processed resistive memory is greater than a second preset conductance threshold, thereby obtaining a target resistive memory.

[0011] Optionally, in some embodiments, when repeatedly applying the first RESET pulse to the resistive memory after the forward processing, the voltage of the first RESET pulse currently applied to the resistive memory after the forward processing is greater than the voltage of the first RESET pulse last applied to the resistive memory after the forward processing.

[0012] Optionally, in some embodiments, a minimum voltage of the second RESET pulse applied to the resistive memory after the reverse process is greater than a maximum voltage of the first RESET pulse applied to the resistive memory after the forward process.

[0013] Optionally, in some embodiments, before applying a first RESET pulse to the resistive random access memory after the forward processing until the conductance of the resistive random access memory after the forward processing is less than the first preset conductance threshold, the method further includes:

[0014] Increasing the pulse voltage of the first RESET pulse, and reading the current conductance of the resistive random access memory after the forward processing, to determine whether the pulse voltage is less than a preset voltage threshold;

[0015] If the pulse voltage is less than the preset voltage threshold, determining whether the current conductance is less than a preset minimum conductance value;

[0016] If the current conductance is less than the preset minimum conductance value, the preset minimum conductance value is updated with the current conductance.

[0017] A second aspect of the present application provides a processing device for a resistive random access memory, including:

[0018] A judgment module, used to judge whether there is a need for resistive random access memory processing;

[0019] a processing module, configured to, when there is a need to process the resistive random access memory, perform a forward forming operation on the resistive random access memory to obtain a resistive random access memory after forward processing, and if the conductance of the resistive random access memory after forward processing is greater than or equal to a first preset conductance threshold, repeatedly apply a first RESET pulse to the resistive random access memory after forward processing until the conductance of the resistive random access memory after forward processing is less than the first preset conductance threshold, thereby obtaining a resistive random access memory after reverse processing; and

[0020] A generating module is used to repeatedly apply a second RESET pulse to the reverse processed resistive memory until the conductance of the reverse processed resistive memory is greater than a second preset conductance threshold, thereby obtaining a target resistive memory.

[0021] Optionally, in some embodiments, when repeatedly applying the first RESET pulse to the resistive memory after the forward processing, the voltage of the first RESET pulse currently applied to the resistive memory after the forward processing is greater than the voltage of the first RESET pulse last applied to the resistive memory after the forward processing.

[0022] Optionally, in some embodiments, a minimum voltage of the second RESET pulse applied to the resistive memory after the reverse process is greater than a maximum voltage of the first RESET pulse applied to the resistive memory after the forward process.

[0023] Optionally, in some embodiments, before applying a first RESET pulse to the resistive random access memory after the forward processing until the conductance of the resistive random access memory after the forward processing is less than the first preset conductance threshold, the processing module further includes:

[0024] A reading unit, used to increase the pulse voltage of the first RESET pulse, and read the current conductance of the resistive random access memory after the forward processing, to determine whether the pulse voltage is less than a preset voltage threshold;

[0025] a judgment unit, configured to judge whether the current conductance is less than a preset conductance minimum value when the pulse voltage is less than the preset voltage threshold;

[0026] An updating unit is used to update the preset minimum conductance value with the current conductance when the current conductance is less than the preset minimum conductance value.

[0027] The third aspect of the present application provides an electronic device, including: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the resistive random access memory processing method as described in the above embodiment.

[0028] A fourth aspect of the present application provides a computer-readable storage medium having a computer program stored thereon, the program being executed by a processor to implement the processing method of the resistive random access memory as described in the above embodiment.

[0029] Thus, by judging whether there is a need to process the resistive memory, if there is a need to process the resistive memory, a forward forming operation is performed on the resistive memory to be processed to obtain the resistive memory after the forward processing, and if the conductance of the resistive memory after the forward processing is greater than or equal to the first preset conductance threshold, the first RESET pulse is repeatedly applied to the resistive memory after the forward processing until the conductance of the resistive memory after the forward processing is less than the first preset conductance threshold, and the resistive memory after the reverse processing is obtained, and the second RESET pulse is repeatedly applied to the resistive memory after the reverse processing until the conductance of the resistive memory after the reverse processing is greater than the second preset conductance threshold, and the target resistive memory is obtained. Thus, the problem that the target memory after programming is prone to relaxation, resulting in a decrease in the accuracy of the calculation results or errors in the stored information is solved, and the morphology of the conductive filaments is improved once by using a stronger voltage, and the stability of the conductivity state of the resistive memory after programming is enhanced, thereby ensuring the accuracy of the calculation results and the reliability of the stored information.

[0030] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0032] Figure 1 A schematic diagram of a programming principle of a resistive random access memory in the related art;

[0033] Figure 2 A flowchart of a method for processing a resistive random access memory according to an embodiment of the present application;

[0034] Figure 3 is a schematic diagram of a resistive random access memory provided according to an embodiment of the present application, Figure 3 (a) is a schematic diagram of the structure of the resistive memory. Figure 3 (b) is a schematic diagram of the random drift phenomenon after the conductance value is successfully programmed;

[0035] Figure 4 The schematic diagram is a principle diagram of a method for processing a resistive random access memory according to an embodiment of the present application. Figure 4 (a) is a schematic diagram of the sub-process. Figure 4 (b) is a flowchart of the first step of the reverse forming operation. Figure 4 (c) is a flow chart of the second step of the reverse forming operation;

[0036] Figure 5 The figure is a schematic diagram comparing test results of a processing method for a resistive memory in a related art provided according to an embodiment of the present application and a processing method for a resistive memory in an embodiment of the present application. Figure 5 (a) is the change of the average conductivity of 16 conductivity states over time. Figure 5 (b) is the RD value of 16 conductance states at 10^3s, Figure 5 (c) shows the variation of the average RD of 16 conductance states over time;

[0037] Figure 6 A block diagram of a processing device for a resistive random access memory provided according to an embodiment of the present application;

[0038] Figure 7 It is a schematic diagram of the structure of an electronic device provided according to an embodiment of the present application. DETAILED DESCRIPTION

[0039] Embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present application, and should not be construed as limiting the present application.

[0040] The following describes the processing method, device, electronic device and storage medium of the resistive memory of the embodiment of the present application with reference to the accompanying drawings. In view of the problem that the target memory after programming mentioned in the above background technology is prone to relaxation phenomenon, resulting in reduced accuracy of calculation results or storage information errors, the present application provides a processing method for resistive memory, in which, by judging whether there is a resistive memory processing demand, if there is a resistive memory processing demand, a forward forming operation is performed on the resistive memory to be processed to obtain a resistive memory after forward processing, if the conductance of the resistive memory after forward processing is greater than or equal to the first preset conductance threshold, then repeatedly applying the first RESET pulse to the resistive memory after forward processing until the conductance of the resistive memory after forward processing is less than the first preset conductance threshold, to obtain a resistive memory after reverse processing, and repeatedly applying the second RESET pulse to the resistive memory after reverse processing until the conductance of the resistive memory after reverse processing is greater than the second preset conductance threshold, to obtain a target resistive memory. In this way, the problem of relaxation phenomenon easily occurring in the target memory after programming, which leads to decreased accuracy of calculation results or errors in stored information, is solved. By using a stronger voltage to improve the morphology of the conductive filaments at one time, the stability of the conductivity state of the resistive memory after programming is enhanced, thereby ensuring the accuracy of the calculation results and the reliability of the stored information.

[0041] Before introducing the processing method of the resistive random access memory according to the embodiment of the present application, the characteristics of the resistive random access memory are first introduced.

[0042] In computing applications, by applying an input voltage vector to a resistive memory array, an output current vector can be obtained, thereby realizing complex vector-matrix multiplication operations. In such applications, the resistive memory acts as both a storage unit and a computing unit, wherein the conductivity value of the resistive memory acts as a multiplier in the multiplication operation. In memory applications, different conductivity states (i.e., resistance states, where resistance and conductance are inversely related) of the resistive memory can be used to store different data information. Whether it is to obtain accurate calculation results or to achieve stable and reliable information storage, it is necessary to accurately program (i.e., write) the required conductivity value (resistance value) into the resistive memory, which is often composed of multiple write-verify cycles. Among them, "writing" is achieved by applying a voltage pulse of a certain amplitude and pulse width (which varies depending on the device and the programmed conductivity value) to each resistive memory cell to adjust the conductivity value of each cell to a target value. During the adjustment process, the device is judged by "verification" to determine whether it has reached the target conductivity value. "Verification" is actually a read operation of the resistive memory, comparing the read conductivity value with the target value. Different programming schemes are usually implemented by multiple write-verify cycles. In these cycles, the amplitude or pulse width of the write pulse will change according to different schemes. Currently, more accurate programming technology schemes are commonly used, such as Figure 1 shown.

[0043] Figure 1 The horizontal axis in the middle represents time, and the vertical axis represents the pulse voltage amplitude applied to both ends of the device when programming the resistive memory cell. The minimum pulse voltage applied is the read voltage (verification voltage), which is used to read the conductivity of the RRAM. Other positive pulses with larger amplitudes represent Set pulses, and negative voltage pulses represent Reset pulses. The Set operation increases the conductivity, and the Reset operation decreases the conductivity. One Set / Reset operation is a write operation.

[0044] After each write operation, a read pulse is applied to read the conductivity of the RRAM and compared with the target value. This process is called "verify". Since the voltage used for verification is small, it usually does not affect the conductivity of the device. If it is smaller than the target conductivity, a Set operation is performed. After Set, another read verification is performed. If it is still smaller than the target conductivity, a Set pulse with the same pulse width and a larger amplitude than the previous one is applied to perform an enhanced Set operation; if the read conductivity is larger than the target value, a Reset operation is required. The Reset operation is similar to the Set operation but the voltage is negative. Due to the characteristic of the pulse amplitude increasing step by step in the Set or Reset operation, this programming method is called the Incremental Step Program Pulse (ISPP) strategy. Each time the conductivity of the RRAM is verified, a Set or Reset write operation is performed to correct the conductivity, and then a verification is performed. In this way, the write-verify cycle is performed until the target value (or target range) is reached. If the difference is within a certain error range, it can be considered that the programming is successful; if the conductivity value is less than the target range, a Set is performed, otherwise a Reset is performed.

[0045] This write-verify programming method can well achieve the writing of the target conductivity value, but due to the influence of the working mechanism of the RRAM, the RRAM that successfully completes the writing of the conductivity value is likely to cause a strong random conductivity value drift (also known as relaxation) due to factors such as the instability of the conductive filaments inside the device after the operation, the spontaneous migration of oxygen vacancies, and the capture and release of charges by defects. This phenomenon causes the conductivity values ​​of many devices in the RRAM array to quickly deviate from the written conductivity value within a short time scale (usually less than 1s), resulting in a significant decrease in the accuracy of the calculation results or errors in the stored information. Studies have shown that the data retention capacity of the RRAM needs to meet the memory industry standard of 10 years of information preservation at 85°C, so the drift degree of the conductivity value within a short time scale becomes the main factor determining the difference between the stored value in the RRAM and the target written value. Experimental results show that the relaxation phenomenon is dependent on the morphology of the conductive filaments, free oxygen ions, etc., which provides a corresponding scientific theoretical basis for suppressing this phenomenon in the electrical operation control of the wire filament morphology.

[0046] In the actual implementation process, most resistive memory devices are not conductive after being manufactured, and do not have voltage-controlled resistive switching capabilities. Instead, they are similar to an insulator. A large Set voltage needs to be applied to them first to achieve soft breakdown of the resistive layer so that a conductive filament path can be formed therein. The operation of converting the resistive memory device from an insulating state to a conductive state by applying a large Set voltage is called the Forming operation. Since the Forming operation has a great influence on the morphology of the conductive filaments, it is also a feasible operation to control the morphology of the conductive filaments by optimizing the Forming operation scheme to suppress the relaxation effect.

[0047] Specifically, Figure 2 A schematic flow chart of a method for processing a resistive random access memory provided in an embodiment of the present application.

[0048] like Figure 2 As shown, the processing method of the resistive random access memory includes the following steps:

[0049] In step S101, it is determined whether there is a need for resistive random access memory processing.

[0050] It should be noted that the present application is carried out for resistive memory, wherein the typical device structure of resistive memory is as follows Figure 3As shown in (a), the processing method of the resistive random access memory of the embodiment of the present application is also applicable to a structure in which a transistor, a gate tube, a diode, etc. are connected in series with the resistive random access memory as a gate device (i.e., 1-Transistor-1-RRAM, 1T1R, 1-Selector-1-RRAM, 1S1R, 1-Diode-1-RRAM, 1D1R, etc.).

[0051] The present application embodiment is aimed at the random drift phenomenon of conductance that occurs spontaneously after the conductance value is successfully programmed (programmed to the target value) without applying any operation, that is, the relaxation phenomenon. Its typical situation is as follows Figure 3 As shown in (b), it exhibits the characteristics of short time course, large drift degree, and strong randomness. The different curves in the figure represent the changes in the conductance values ​​of several randomly selected devices. The conductance value at time 0 is the value of successful programming, and then the drift change of the conductance value is read out within a time scale of 1 second.

[0052] Because the relaxation phenomenon is too random, it is difficult to explore the law of a single device, so the degree of dispersion (RD) of the overall conductivity distribution composed of multiple devices is usually used to measure the degree of relaxation. The smaller the dispersion (RD), the smaller the dispersion and the higher the stability. The following formula is the calculation method of the RD index.

[0053]

[0054] Among them, t in the lower right corner of the indicator represents t seconds after programming, i represents the number of a device among multiple devices, Gmax and Gmin refer to the maximum and minimum values ​​of the range in which the device conductivity can vary, respectively, and N represents the total number of devices.

[0055] After receiving a resistive random access memory processing requirement, the embodiment of the present application can process the resistive random access memory to obtain a processing result, and analyze the dispersion degree of the processing result to prove the practical effect of the resistive random access memory processing method of the embodiment of the present application.

[0056] In step S102, if there is a need to process the resistive random access memory, a forward forming operation is performed on the resistive random access memory to be processed to obtain the resistive random access memory after the forward processing. If the conductance of the resistive random access memory after the forward processing is greater than or equal to a first preset conductance threshold, the first RESET pulse is repeatedly applied to the resistive random access memory after the forward processing until the conductance of the resistive random access memory after the forward processing is less than the first preset conductance threshold, thereby obtaining the resistive random access memory after the reverse processing.

[0057] The first preset conductance threshold may be preset by a user, obtained through a limited number of experiments, or obtained through a limited number of computer simulations, which is not specifically limited here.

[0058] In the case where there is a need to process a resistive memory, the embodiment of the present application can first perform a forward forming operation on the resistive memory to change the resistive memory from an insulating state to a conductive state, and then apply a series of resets to achieve reverse forming, such as Figure 4 As shown in (b), the process of the reverse forming operation is mainly divided into two steps. The first step is to reduce the conductivity of the device to below the first preset conductivity threshold (ie, Gtarget1), so as to change the resistive memory from a low conductivity state (LCS) to an extremely low conductivity state (NCS).

[0059] Optionally, in some embodiments, when repeatedly applying the first RESET pulse to the resistive memory after forward processing, the voltage of the first RESET pulse currently applied to the resistive memory after forward processing is greater than the voltage of the first RESET pulse last applied to the resistive memory after forward processing.

[0060] Specifically, the embodiment of the present application applies a first RESET pulse to the resistive memory after forward processing, and determines whether the conductance of the resistive memory after the forward processing is less than a first preset conductance threshold value. If the conductance of the resistive memory is not less than the first preset conductance threshold value, a new RESET pulse with the same pulse width and a larger amplitude than the previous one is applied, and the new RESET pulse is used as the first RESET pulse until the conductance of the resistive memory after the forward processing is less than the first preset conductance threshold value.

[0061] In step S103, a second RESET pulse is repeatedly applied to the reverse-processed resistive memory until the conductance of the reverse-processed resistive memory is greater than a second preset conductance threshold, thereby obtaining a target resistive memory.

[0062] The second preset conductance threshold (Gtarget2) may be preset by a user, obtained through a limited number of experiments, or obtained through a limited number of computer simulations, and is not specifically limited here. The minimum voltage of the second RESET pulse applied to the resistive random access memory after the reverse process is greater than the maximum voltage of the first RESET pulse applied to the resistive random access memory after the forward process.

[0063] Those skilled in the art can understand that after the resistive memory reaches an extremely low conductance state, a reset operation is performed and the conductance value changes from decreasing to increasing.

[0064] Specifically, Figure 4As shown in (c), after the resistive memory is changed from a low conductance state (LCS) to an extremely low conductance state (NCS), the second step of the reverse forming operation is performed, and the reset operation is continued to apply a second RESET pulse to the resistive memory after the reverse processing. It should be noted that the amplitude of the second RESET pulse will continue to increase on the basis of the amplitude of the first RESET pulse. At this time, the conductance value of the resistive memory will increase, and it is determined whether the conductance value of the resistive memory is greater than the second preset conductance threshold. If the conductance value of the resistive memory is not greater than the second preset conductance threshold, a new RESET pulse with the same pulse width and a larger amplitude than the previous one is applied, and the new RESET pulse is used as the second RESET pulse until the conductance value of the resistive memory is greater than the second preset conductance threshold. Once the conductance exceeds the second preset conductance threshold, the program will stop to prevent the device from breaking down, and then continue to operate the next device.

[0065] It should be noted that the negative voltage forming operation method added in the embodiment of the present application after the conventional forward voltage forming operation causes the device conductivity to first drop to a minimum value and then rise. Negative reset voltages applied in various forms, such as DC voltage, fixed voltage pulses, step-increased voltage pulses, step-increased pulse width pulses, or mixed solutions of the above, are also included in the scope of protection of the embodiments of the present application. In addition, the embodiments of the present application also include array-level situations in which each device shares the delay overhead, such as serial operation, parallel operation, and array block operation.

[0066] Optionally, in some embodiments, before applying a first RESET pulse to the resistive random access memory after forward processing until the conductance of the resistive random access memory after forward processing is less than a first preset conductance threshold, it also includes: increasing the pulse voltage of the first RESET pulse, and reading the current conductance of the resistive random access memory after forward processing, and determining whether the pulse voltage is less than a preset voltage threshold; if the pulse voltage is less than the preset voltage threshold, determining whether the current conductance is less than a preset minimum conductance value; if the current conductance is less than the preset minimum conductance value, updating the preset minimum conductance value with the current conductance.

[0067] The preset voltage threshold and the preset minimum conductance value may be preset by a user, obtained through a limited number of experiments, or obtained through a limited number of computer simulations, which are not specifically limited here.

[0068] like Figure 4 As shown in (a), during the reverse forming operation, a sub-process is involved, the purpose of which is to perform a reset operation and detect the device conductivity. The reset applied in the sub-process can be a DC, a step voltage, a step pulse width, or a fixed pulse. Figure 4 The step voltage is shown in .

[0069] Specifically, the pulse voltage of the RESET pulse is increased, and the current conductance of the resistive random access memory is read to determine whether the pulse voltage is greater than a preset voltage threshold. If the pulse voltage is not greater than the preset voltage threshold, then determine whether the current conductance is less than a preset minimum conductance value. If the current conductance is less than the preset minimum conductance value, then update the preset minimum conductance value with the current conductance. If the pulse voltage is greater than the preset voltage threshold or the current conductance is greater than or equal to the preset minimum conductance value, then end the sub-process.

[0070] The embodiment of the present application adds a check stop scheme during the application of a negative voltage pulse to prevent the device from being broken down by the reverse voltage. It should be noted that other similar methods such as reducing the step voltage, reducing the step pulse width, etc. that require a check stop scheme are also included in the scope of protection of the embodiment of the present application.

[0071] Figure 5 The results of the processing method of the resistive random access memory in the related art and the processing method of the resistive random access memory in the embodiment of the present application are compared, that is, the array-level various index test results with and without reverse forming. The experiment proves that the use of the reverse forming operation scheme has obvious improvements in the average conductivity and relative deviation (RD) indicators, and the relaxation effect is smaller.

[0072] Therefore, the negative voltage Forming added after the forward voltage Forming operation in the embodiment of the present application can strengthen the originally fragile bottom conductive filaments in the resistive layer at one time, reduce the excess free oxygen ions in the functional layer, and reduce the overall degree of subsequent drift of the resistive memory after the conductivity (or resistance) value programming is completed, thereby alleviating the random drift (relaxation phenomenon) of the resistive memory after the conductivity value programming is completed, and improving the accuracy of the calculation results of the resistive memory in computing applications and the reliability of data storage in multi-bit storage applications.

[0073] In summary, the embodiments of the present application optimize the morphology of the conductive filaments of the memristor and alleviate the random drift phenomenon after the conductivity value of the resistive memory is written by adding a negative voltage forming operation after the conventional forward voltage forming operation; and prevent the device from being broken down by the reverse voltage by adding a check stop method during the reverse voltage application process.

[0074] According to the processing method of the resistive memory proposed in the embodiment of the present application, by judging whether there is a need for resistive memory processing, if there is a need for resistive memory processing, a forward forming operation is performed on the resistive memory to be processed to obtain a resistive memory after forward processing, if the conductance of the resistive memory after forward processing is greater than or equal to the first preset conductance threshold, then the first RESET pulse is repeatedly applied to the resistive memory after forward processing until the conductance of the resistive memory after forward processing is less than the first preset conductance threshold, and a resistive memory after reverse processing is obtained, and the second RESET pulse is repeatedly applied to the resistive memory after reverse processing until the conductance of the resistive memory after reverse processing is greater than the second preset conductance threshold, and a target resistive memory is obtained. Thus, the problem that the target memory after programming is prone to relaxation, resulting in a decrease in the accuracy of the calculation results or errors in the stored information is solved, and the morphology of the conductive filaments is improved once by using a stronger voltage, and the stability of the conductance state of the resistive memory after programming is enhanced, thereby ensuring the accuracy of the calculation results and the reliability of the stored information.

[0075] Next, a processing device for a resistive random access memory according to an embodiment of the present application will be described with reference to the accompanying drawings.

[0076] Figure 6 It is a block diagram of a processing device of a resistive random access memory according to an embodiment of the present application.

[0077] like Figure 6 As shown, the processing device 10 of the resistive random access memory includes: a judgment module 100 , a processing module 200 and a generation module 300 .

[0078] The determination module 100 is used to determine whether there is a need for resistive random access memory processing.

[0079] The processing module 200 is used to perform a forward forming operation on the resistive random access memory to be processed to obtain a resistive random access memory after forward processing when there is a need to process the resistive random access memory. If the conductance of the resistive random access memory after the forward processing is greater than or equal to a first preset conductance threshold, the first RESET pulse is repeatedly applied to the resistive random access memory after the forward processing until the conductance of the resistive random access memory after the forward processing is less than the first preset conductance threshold, thereby obtaining a resistive random access memory after reverse processing.

[0080] The generating module 300 is used to repeatedly apply a second RESET pulse to the resistive memory after the reverse processing until the conductance of the resistive memory after the reverse processing is greater than a second preset conductance threshold, thereby obtaining a target resistive memory.

[0081] Optionally, in some embodiments, when repeatedly applying the first RESET pulse to the resistive memory after forward processing, the voltage of the first RESET pulse currently applied to the resistive memory after forward processing is greater than the voltage of the first RESET pulse last applied to the resistive memory after forward processing.

[0082] Optionally, in some embodiments, the minimum voltage of the second RESET pulse applied to the resistive memory after the reverse process is greater than the maximum voltage of the first RESET pulse applied to the resistive memory after the forward process.

[0083] Optionally, in some embodiments, before applying a first RESET pulse to the resistive random access memory after forward processing until the conductance of the resistive random access memory after forward processing is less than a first preset conductance threshold, the processing module 300 further includes: a reading unit, a judging unit and an updating unit.

[0084] The reading unit is used to increase the pulse voltage of the first RESET pulse, and read the current conductance of the resistive random access memory after the forward processing, to determine whether the pulse voltage is less than a preset voltage threshold.

[0085] The judging unit is used to judge whether the current conductance is less than a preset conductance minimum value when the pulse voltage is less than a preset voltage threshold.

[0086] The updating unit is used to update the preset minimum conductance value with the current conductance when the current conductance is less than the preset minimum conductance value.

[0087] It should be noted that the above explanation of the embodiment of the processing method of the resistive random access memory is also applicable to the processing device of the resistive random access memory of this embodiment, and will not be repeated here.

[0088] According to the processing device of the resistive memory proposed in the embodiment of the present application, by judging whether there is a need for resistive memory processing, if there is a need for resistive memory processing, a forward forming operation is performed on the resistive memory to be processed to obtain a resistive memory after forward processing, if the conductance of the resistive memory after forward processing is greater than or equal to the first preset conductance threshold, then the first RESET pulse is repeatedly applied to the resistive memory after forward processing until the conductance of the resistive memory after forward processing is less than the first preset conductance threshold, to obtain a resistive memory after reverse processing, and the second RESET pulse is repeatedly applied to the resistive memory after reverse processing until the conductance of the resistive memory after reverse processing is greater than the second preset conductance threshold, to obtain a target resistive memory. Thus, the problem that the target memory after programming is prone to relaxation, resulting in a decrease in the accuracy of the calculation results or errors in the stored information is solved, and the morphology of the conductive filaments is improved once by using a stronger voltage, and the stability of the conductance state of the resistive memory after programming is enhanced, thereby ensuring the accuracy of the calculation results and the reliability of the stored information.

[0089] Figure 7 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. The electronic device may include:

[0090] A memory 701 , a processor 702 , and a computer program stored in the memory 701 and executable on the processor 702 .

[0091] When the processor 702 executes the program, the processing method of the resistive random access memory provided in the above embodiment is implemented.

[0092] Furthermore, the electronic device further comprises:

[0093] The communication interface 703 is used for communication between the memory 701 and the processor 702 .

[0094] The memory 701 is used to store computer programs that can be executed on the processor 702 .

[0095] Memory 701 may include high-speed

[0096] RAM (Random Access Memory) memory may also include non-volatile memory, such as at least one disk memory.

[0097] If the memory 701, the processor 702 and the communication interface 703 are implemented independently, the communication interface 703, the memory 701 and the processor 702 can be connected to each other through a bus and communicate with each other. The bus can be an ISA (Industry Standard Architecture) bus, a PCI (Peripheral Component Interconnect) bus or an EISA (Extended Industry Standard Architecture) bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 7 Only one thick line is used in the diagram, but this does not mean that there is only one bus or only one type of bus.

[0098] Optionally, in a specific implementation, if the memory 701, the processor 702 and the communication interface 703 are integrated on a chip, the memory 701, the processor 702 and the communication interface 703 can communicate with each other through an internal interface.

[0099] The processor 702 may be a CPU (Central Processing Unit), or an ASIC (Application Specific Integrated Circuit), or one or more integrated circuits configured to implement the embodiments of the present application.

[0100] An embodiment of the present application further provides a computer-readable storage medium having a computer program stored thereon, which implements the above-mentioned resistive random access memory processing method when the program is executed by a processor.

[0101] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms are not necessarily directed to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or N embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.

[0102] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of this application, "N" means at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0103] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, fragment or portion of code comprising one or more executable instructions for implementing the steps of a custom logical function or process, and the scope of the preferred embodiments of the present application includes alternative implementations in which functions may not be performed in the order shown or discussed, including performing functions in a substantially simultaneous manner or in reverse order depending on the functions involved, which should be understood by technicians in the technical field to which the embodiments of the present application belong.

[0104] It should be understood that the various parts of the present application can be implemented by hardware, software, firmware or a combination thereof. In the above-mentioned embodiment, the N steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented by hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array, a field programmable gate array, etc.

[0105] A person skilled in the art may understand that all or part of the steps in the method for implementing the above-mentioned embodiment may be completed by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, which, when executed, includes one or a combination of the steps of the method embodiment.

[0106] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present application.

Claims

1. A method for processing a resistive random access memory, characterized in that: The following steps are involved: Determine whether there is a need for resistive memory processing; If there is a requirement for processing the resistive random access memory, a forward forming operation is performed on the resistive random access memory to be processed to obtain a resistive random access memory after forward processing. If the conductance of the resistive random access memory after forward processing is greater than or equal to a first preset conductance threshold, a first RESET pulse is repeatedly applied to the resistive random access memory after forward processing until the conductance of the resistive random access memory after forward processing is less than the first preset conductance threshold, thereby obtaining a resistive random access memory after reverse processing. as well as Repeatedly applying a second RESET pulse to the reverse-processed resistive memory until the conductance of the reverse-processed resistive memory is greater than a second preset conductance threshold, thereby obtaining a target resistive memory.

2. The method according to claim 1, characterized in that When the first RESET pulse is repeatedly applied to the forward processed resistive memory, a voltage of the first RESET pulse currently applied to the forward processed resistive memory is greater than a voltage of the first RESET pulse last applied to the forward processed resistive memory.

3. The method according to claim 1, characterized in that The minimum voltage of the second RESET pulse applied to the resistive memory after the reverse process is greater than the maximum voltage of the first RESET pulse applied to the resistive memory after the forward process.

4. The method according to claim 1, characterized in that: Before applying a first RESET pulse to the resistive random access memory after the forward processing until the conductance of the resistive random access memory after the forward processing is less than the first preset conductance threshold, the method further includes: Increasing the pulse voltage of the first RESET pulse, and reading the current conductance of the resistive random access memory after the forward processing, to determine whether the pulse voltage is less than a preset voltage threshold; If the pulse voltage is less than the preset voltage threshold, determining whether the current conductance is less than a preset minimum conductance value; If the current conductance is less than a preset minimum conductance value, the preset minimum conductance value is updated with the current conductance.

5. A processing device for resistive random access memory, characterized in that: include: A judgment module, used to judge whether there is a need for resistive random access memory processing; A processing module, for performing a forward forming operation on the resistive random access memory to be processed to obtain a resistive random access memory after forward processing when there is a demand for processing the resistive random access memory, and if the conductance of the resistive random access memory after forward processing is greater than or equal to a first preset conductance threshold, repeatedly applying a first RESET pulse to the resistive random access memory after forward processing until the conductance of the resistive random access memory after forward processing is less than the first preset conductance threshold, thereby obtaining a resistive random access memory after reverse processing; as well as A generating module is used to repeatedly apply a second RESET pulse to the reverse processed resistive memory until the conductance of the reverse processed resistive memory is greater than a second preset conductance threshold, thereby obtaining a target resistive memory.

6. The device according to claim 5, characterized in that When the first RESET pulse is repeatedly applied to the forward processed resistive memory, a voltage of the first RESET pulse currently applied to the forward processed resistive memory is greater than a voltage of the first RESET pulse last applied to the forward processed resistive memory.

7. The device according to claim 5, characterized in that The minimum voltage of the second RESET pulse applied to the resistive memory after the reverse process is greater than the maximum voltage of the first RESET pulse applied to the resistive memory after the forward process.

8. The device according to claim 5, characterized in that Before applying a first RESET pulse to the resistive random access memory after the forward processing until the conductance of the resistive random access memory after the forward processing is less than the first preset conductance threshold, the processing module further includes: A reading unit, used to increase the pulse voltage of the first RESET pulse, and read the current conductance of the resistive random access memory after the forward processing, to determine whether the pulse voltage is less than a preset voltage threshold; a judgment unit, configured to judge whether the current conductance is less than a preset conductance minimum value when the pulse voltage is less than the preset voltage threshold; An updating unit is used to update the preset minimum conductance value with the current conductance when the current conductance is less than the preset minimum conductance value.

9. An electronic device, characterized in that: include: A memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the resistive random access memory processing method according to any one of claims 1 to 4.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: The program is executed by a processor to implement the processing method of the resistive random access memory according to any one of claims 1 to 4.

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