Current detection device and method

What is AI technical title?
AI technical title is built by Patsnap AI team. It summarizes the technical point description of the patent document.
By introducing a technology of dynamically adjusting the sampling resistance and gain in the current detection device, the problem of low current detection accuracy in the prior art is solved, and accurate detection and efficient measurement of different current ranges are achieved.

CN119574963BActive Publication Date: 2025-05-23NANJING RUIHONGSHENG POWER TECH CO LTD

View PDF 2 Cites 0 Cited by

Patent Information

Application Number: CN202510119867.7
Authority / Receiving Office: CN · China
Patent Type: Patents(China)
Current Assignee / Owner
Filing Date: 2025-01-25
Publication Date: 2025-05-23
Estimated Expiration: 2045-01-25

AI Technical Summary

Technical Problem

The existing current detection device has low accuracy when detecting different current ranges, and the sampling resistance value does not match the current value of the circuit to be measured, resulting in low detection efficiency and reduced accuracy.

Method used

The current detection device including a current sampling unit, a sampling resistor matching unit, a signal conditioning unit and a main control unit is adopted. Through multiple interactions between the main control unit and the operation control circuit, the value range and gain of the sampling resistor are dynamically adjusted to ensure that the sampling resistor matches the current value of the circuit to be measured.

Benefits of technology

Accurate detection of different current ranges is achieved, the accuracy and efficiency of current measurement is improved, the critical value problem of gear switching is avoided, and the coverage of the current measurement range is ensured.

✦ Generated by Eureka AI based on patent content.

Smart Images

Figure CN119574963B_ABST

Patent Text Reader

Abstract

The present invention discloses a current detection device and method, belonging to the technical field of current detection. The device comprises a current sampling unit, a sampling resistor matching unit, a signal conditioning unit and a main control unit. The present invention can achieve multiple interactions between the main control unit and an operation control circuit. The interactions include: the main control unit adjusts the value range of the sampling resistor according to the calculated current value, the operation control circuit controls the connection mode of multiple sampling resistors in a sampling resistor group according to the value range of the sampling resistor, the operation control circuit sends the real-time resistance value of the sampling resistor group to the main control unit, and obtains an accurate final current test value after multiple measurements of the circuit to be tested.

Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The invention relates to a current detection device and method, belonging to the technical field of current detection. Background Art

[0002] In the power grid system, there is usually a situation where the current amplitude range spans a large range, such as the span of the core grounding current is from a few milliamperes to tens of amperes, and the current span in the high-voltage transformer line is from tens of amperes to thousands of amperes. How to cover and comprehensively detect the current in different ranges is a difficult problem that needs to be solved urgently. At present, the common method is to use a multi-speed current detection circuit to detect the current size of different circuits. The multi-speed current detection circuit usually needs to estimate the current range of the circuit to be tested, and then use the gear selection switch to send the corresponding gear selection signal to the main control chip. The main control chip then connects or disconnects the corresponding sampling resistor according to the gear selection signal, and then obtains the sampling voltage. The main control chip then calculates the current value of the circuit to be tested based on this voltage. However, on the one hand, the uncertainty of the current value of the circuit to be tested will cause the multi-speed current detection circuit that currently only provides a few fixed resistance gears to produce a situation where the sampling resistance value does not match the current value of the circuit to be tested. Although the method of manually welding and replacing the resistor can solve the above problem, this method is inefficient and multiple welding is prone to damage to the PCB board. On the other hand, since the current value is estimated to be within a range, and the range may be located at different gear switching critical values of the multi-gear current detection circuit, the gear selection switch selects gears back and forth, thereby reducing the accuracy of current detection. Summary of the invention

[0003] The object of the present invention is to provide a current detection device and method to solve the problem of low current detection accuracy in the prior art.

[0004] To achieve the above objectives, the present invention is implemented by adopting the following technical solutions:

[0005] In a first aspect, the present invention provides a current detection device, including a current sampling unit, a sampling resistor matching unit, a signal conditioning unit and a main control unit;

[0006] The current sampling unit is used to collect the current signal of the circuit to be tested and transmit it to the sampling resistor group;

[0007] The sampling resistor matching unit includes a sampling resistor group and an operation control circuit. The sampling resistor group is used to convert a current signal into a voltage signal. The operation control circuit is used to control the connection mode of multiple sampling resistors in the sampling resistor group according to the sampling resistor value range issued by the main control unit, so as to adjust the resistance value of the sampling resistor group and send the real-time resistance value of the sampling resistor group to the main control unit.

[0008] The signal conditioning unit includes a gain controllable amplifier circuit and a signal filtering circuit. The gain controllable amplifier circuit is used to amplify the voltage signal according to the gain sent by the main control unit. The signal filtering circuit is used to filter out high-frequency interference signals in the amplified voltage signal and then transmit the voltage signal to the main control unit.

[0009] The main control unit is used to convert the received voltage signal into a digital voltage signal, calculate the current value according to the digital voltage signal and the resistance value of the sampling resistor group, adjust the gain and the sampling resistor value range according to the current value and send them down; after multiple interactions between the main control unit and the operation control circuit, the main control unit uses the calculated current value as the final current test value of the circuit to be tested.

[0010] Furthermore, the sampling resistor matching unit further includes an overvoltage protection circuit, the input end of the overvoltage protection circuit is connected to the sampling resistor group, the output end of the overvoltage protection circuit is connected to the gain controllable amplifier circuit, and the overvoltage protection circuit is used to protect the ports of each device in the current detection device when the current signal suddenly increases;

[0011] The overvoltage protection circuit includes a transient suppression diode D1, a resistor R4, a resistor R5, a capacitor C1 and a capacitor C2, two ends of the transient suppression diode D1 are respectively connected to the positive output end of the current sampling unit and the negative output end of the current sampling unit, one end of the transient suppression diode D1 connected to the positive output end of the current sampling unit is also connected to the resistor R4, the other end of the resistor R4 is connected to the positive voltage output port OUT+ of the sampling resistor matching unit after being connected to one end of the capacitor C1, one end of the transient suppression diode D1 connected to the negative output end of the current sampling unit is also connected to the resistor R5, the other end of the resistor R5 is connected to the negative voltage output port OUT- of the sampling resistor matching unit after being connected to one end of the capacitor C2, and the other ends of the capacitor C1 and the capacitor C2 are both connected to the analog ground;

[0012] The main control unit is MCU1.

[0013] Furthermore, the current sampling unit is a current transformer, a Hall sensor or a magnetoresistive sensor;

[0014] The gain controllable amplifier circuit is an amplifier with a gain controllable function;

[0015] The signal filtering circuit is a filtering capacitor.

[0016] Furthermore, the operation control circuit includes an MCU2 and an analog switch U1, and the MCU2 controls the connection mode of multiple sampling resistors in a sampling resistor group through the analog switch U1; the sampling resistor group includes a sampling resistor R1, a sampling resistor R2 and a sampling resistor R3;

[0017] MCU2 is provided with a first logic signal output terminal AS1, a second logic signal output terminal AS2, a third logic signal output terminal AS3, a fourth logic signal output terminal AS4 and an enable signal output terminal AS-EN. Both MCU1 and MCU2 are provided with a full-duplex universal synchronous / asynchronous serial transceiver module, and the connection between MCU1 and MCU2 is realized through the full-duplex universal synchronous / asynchronous serial transceiver module;

[0018] The analog switch U1 is provided with a ground port GND, a positive power port VDD, a negative power port VSS, an enable port EN#, a first logic control input port IN1, a second logic control input port IN2, a third logic control input port IN3, a fourth logic control input port IN4, a first drain port DT1, a second drain port DT2, a third drain port DT3, a fourth drain port DT4, a first source port S1A, a second source port S1B, a third source port S2A, a fourth source port S2B, a fifth source port S3A, a sixth source port S3B, a seventh source port S4A, an eighth source port S4B, the ground port GND is grounded, the positive power port VDD is connected to a positive voltage, and the negative power port VSS is connected to a negative voltage;

[0019] The positive output end of the current sampling unit is connected to one end of the sampling resistor R1, one end of the transient suppression diode D1, one end of the resistor R4, and the first drain port DT1 after being connected to the positive input end IN+ of the sampling resistor matching unit. The negative output end of the current sampling unit is connected to one end of the sampling resistor R2, one end of the resistor R5, the other end of the transient suppression diode D1, the fifth source port S3A, and the seventh source port S4A after being connected to the negative input end IN- of the sampling resistor matching unit. The other end of the sampling resistor R1 is connected to the fourth drain port DT4, and the other end of the sampling resistor R2 is connected to the third source port S2A, The sixth source port S3B is connected, one end of the sampling resistor R3 is connected to the third drain port DT3, the other end of the sampling resistor R3 is connected to the second drain port DT2, the first source port S1A and the eighth source port S4B, the enable port EN is connected to the enable signal output terminal AS-EN, the first logic control input port IN1 is connected to the first logic signal output terminal AS1, the second logic control input port IN2 is connected to the second logic signal output terminal AS2, the third logic control input port IN3 is connected to the third logic signal output terminal AS3, and the fourth logic control input port IN4 is connected to the fourth logic signal output terminal AS4.

[0020] Further, the gain controllable amplifier circuit is an operational amplifier chip U2, the operational amplifier chip U2 includes a first operational amplifier U2A and a second operational amplifier U2B, and the signal conditioning unit includes a first operational amplifier U2A, a second operational amplifier U2B, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a capacitor C3, a capacitor C4, a capacitor C5 and a capacitor C6;

[0021] The operational amplifier chip U2 is provided with an instrumentation amplifier non-inverting input port +INA, an instrumentation amplifier inverting input port -INA, an instrumentation amplifier output port OUTA, an operational amplifier non-inverting input port +INB, an operational amplifier inverting input port -INB, an operational amplifier output port OUTB, an instrumentation amplifier reference port REF, a positive power supply electrode +VS, a negative power supply electrode -VS, a first gain setting port A0, a second gain setting port A1, a third gain setting port A2, a chip selection port CS, a shutdown port SDN, and an idle port NC;

[0022] The instrumentation amplifier same-direction input port +INA of the first operational amplifier U2A is connected to the other end of the resistor R4 and then connected to one end of the capacitor C1. The instrumentation amplifier reverse input port -INA of the first operational amplifier U2A is connected to the other end of the resistor R5 and then connected to one end of the capacitor C2. The instrumentation amplifier output port OUTA of the first operational amplifier U2A is connected to one end of the resistor R9. The other end of the resistor R9 is connected to the resistor R8 and one end of the capacitor C4. The other end of the resistor R8 is connected to one end of the capacitor C3 and then connected to the operational amplifier same-direction input port +INB of the second operational amplifier U2B. The other end of the capacitor C3 and one end of the resistor R6 are grounded together. The other end of the resistor R6 is connected to the resistor R7 and then connected to the operational amplifier reverse input port -INB of the second operational amplifier U2B. The operational amplifier of the second operational amplifier U2B The amplifier output port OUTB is connected to the other end of the resistor R7 and the capacitor C4 and then connected to the analog-to-digital converter port ADC-OUT in MCU1. The positive pole of the power supply +VS is connected to one end of the capacitor C6 and then connected to the shutdown port SDN and the positive voltage. The negative pole of the power supply -VS is connected to one end of the capacitor C5 and then connected to the negative voltage. The other end of the capacitor C6 is connected to the other end of the capacitor C5 and then grounded. The instrumentation amplifier reference port REF and the idle port NC are not connected to other devices. The chip selection port CS is connected to the chip selection signal output port A-CS of MCU1. The first gain setting port A0 is connected to the first gain signal output port A-A0 of MCU1. The second gain setting port A1 is connected to the second gain signal output port A-A1 of MCU1. The third gain setting port A2 is connected to the third gain signal output port A-A2 of MCU1.

[0023] In a second aspect, the present invention provides a current detection method based on the current detection device of the first aspect, comprising:

[0024] S1, collecting the current signal of the circuit to be tested in real time through the current detection unit and transmitting it;

[0025] S2. After receiving the voltage signal, if it is the first time to detect the current of the circuit under test after power-on, MCU1 performs the following operations: converting the received voltage signal into a digital voltage signal, calculating the current value according to the digital voltage signal and the resistance value of the sampling resistor group, adjusting the sampling resistor value range according to the current value and sending it down, adjusting the gain to the minimum gain and sending it down; if it is not the first time to detect the current of the circuit under test after power-on, then entering step S4;

[0026] S3, MCU2 receives the sampling resistor value range sent by MCU1, and adjusts the connection mode of the sampling resistor group to the connection mode corresponding to the minimum resistance value according to the received sampling resistor value range, and enters step S4;

[0027] S4, the sampling resistor matching unit receives the current signal transmitted by the current detection unit, converts the current signal into a voltage signal according to the resistance value of the current sampling resistor group, and outputs the voltage signal to the signal conditioning unit. At the same time, MCU2 sends the resistance value of the current sampling resistor group to MCU1, and enters step S5;

[0028] S5, the signal conditioning unit amplifies the voltage signal according to the gain sent by MCU1, filters the amplified voltage signal, transmits the filtered voltage signal to MCU1, and enters step S6;

[0029] S6, MCU1 converts the received voltage signal into a digital voltage signal, calculates the current value according to the digital voltage signal and the resistance value of the sampling resistor group, and if the calculated current value is 0, proceeds to step S7; if the calculated current value is not 0, saves the calculated current value, adjusts the gain according to the calculated current value, and calculates the value range of the sampling resistor according to the calculated current value, and sends the value range of the sampling resistor to MCU2, and proceeds to step S8;

[0030] S7, MCU1 adjusts the gain in order from the minimum gain to the maximum gain and sends it down, calculates the value range of the sampling resistor according to the calculated current value and sends it down, MCU2 gradually adjusts the connection mode of the sampling resistors in the sampling resistor group according to the principle of increasing the resistance value from small to large, and then measures the current value of the circuit to be tested through steps S1 to S6 until the calculated current value is not 0, and then enters step S8;

[0031] S8. MCU1 sends the calculated value range of the sampling resistor. MCU2 obtains the connection mode of the sampling resistors in the sampling resistor group according to the received value range of the sampling resistor. If the connection mode is unique, the connection mode of the sampling resistor is directly adjusted. If the connection mode is not unique, the probability of each connection mode being selected obeys a uniform distribution. After selecting the connection mode, MCU2 adjusts the connection mode of the sampling resistor. Then MCU1 uses the latest calculated current value as the final current test value of the circuit to be tested.

[0032] Furthermore, the current value is calculated according to the digital voltage signal and the resistance value of the sampling resistor group by the following formula:

[0033] ;

[0034] in, is the current value, is the voltage value corresponding to the digital voltage signal, and R is the resistance value of the sampling resistor group;

[0035] The value range of the sampling resistor is calculated according to the calculated current value, using the following formula:

[0036] ;

[0037] ;

[0038] in, is the maximum value of the sampling resistor, It is the maximum value of the input voltage of the analog-to-digital conversion port in the preset MCU1. is the minimum value of the sampling resistor, It is the preset minimum value of the analog-to-digital conversion port input voltage in MCU1. is the gain set by MCU1.

[0039] Furthermore, if the number of the sampling resistors is 3, there are 14 ways to connect the sampling resistors, and the expressions for the resistance values of the sampling resistor group in various connection ways are:

[0040] R 1 =R R1 ;

[0041] R 2 =R R2 ;

[0042] R 3 =R R3 ;

[0043] R 4 =R R1 +R R2 ;

[0044] R 5 =R R1 +R R3 ;

[0045] R 6 =R R2 +R R3 ;

[0046] R 7 =R R1 +R R2 +R R3 ;

[0047] R 8 =(R R1 *R R2 ) / (R R1 +R R2 );

[0048] R 9 =(R R1 *R R3 ) / (R R1 +R R3 );

[0049] R 10 =(R R2 *R R3 ) / (R R2 +R R3 );

[0050] R 11 =(R R1 *R R2 ) / (R R1 +R R2 )+R R3 ;

[0051] R 12 =(R R2 *R R3 ) / (R R2 +R R3 )+R R1 ;

[0052] R 13 =R R1 *(R R2 +R R3 ) / (R R1 +R R2 +R R3 );

[0053] R 14 =(R R1 *R R2 *R R3) / (R R1 *R R2 +R R1 *R R3 +R R2 *R R3 );

[0054] Among them, R R1 is the resistance of the sampling resistor R1, R R2 is the resistance of the sampling resistor R2, R R3 is the resistance of the sampling resistor R3, R 1 is the resistance value of the sampling resistor group when only the sampling resistor R1 is connected, R 2 is the resistance value of the sampling resistor group when only the sampling resistor R2 is connected, R 3 is the resistance value of the sampling resistor group when only the sampling resistor R3 is connected, R 4 It is the resistance value of the sampling resistor group when only the sampling resistor R1 and the sampling resistor R2 are connected in series. 5 is the resistance value of the sampling resistor group when only the sampling resistor R1 and the sampling resistor R3 are connected in series. 6 is the resistance value of the sampling resistor group when only the sampling resistor R2 and the sampling resistor R3 are connected in series. 7 is the resistance value of the sampling resistor group when three sampling resistors are connected in series, R 8 It is the resistance value of the sampling resistor group when only the sampling resistor R1 and the sampling resistor R2 are connected in parallel. 9 It is the resistance value of the sampling resistor group when only the sampling resistor R1 and the sampling resistor R3 are connected in parallel. 10 It is the resistance value of the sampling resistor group when only the sampling resistor R2 and the sampling resistor R3 are connected in parallel. 11 It is the resistance value of the sampling resistor group when three sampling resistors are connected and the sampling resistors R1 and R2 are connected in parallel and then the sampling resistor R3 is connected in series. 12 It is the resistance value of the sampling resistor group when three sampling resistors are connected and the sampling resistors R2 and R3 are connected in parallel and then connected in series with the sampling resistor R1. 13 It is the resistance value of the sampling resistor group when three sampling resistors are connected and the sampling resistors R2 and R3 are connected in series and then the sampling resistor R1 is connected in parallel. 14 It is the resistance value of the sampling resistor group when three sampling resistors are connected in parallel.

[0055] Compared with the prior art, the beneficial effects achieved by the present invention are:

[0056] A current detection device and method provided by the present invention can be implemented through multiple interactions between a main control unit and an operation control circuit, wherein the interactions include: the main control unit adjusts the value range of a sampling resistor according to a calculated current value, the operation control circuit controls the connection mode of multiple sampling resistors in a sampling resistor group according to the value range of the sampling resistor, the operation control circuit sends the real-time resistance value of the sampling resistor group to the main control unit, and obtains an accurate final current test value after multiple measurements of the circuit to be tested.

[0057] When actually measuring the current value of the circuit to be tested, the current sampling unit is first used to detect the current signal of the circuit to be tested. Then, the current signal is converted into a voltage signal through the sampling resistor with the minimum resistance value, and then when the gain of the gain-controllable amplifier circuit is minimum, the voltage signal is amplified and filtered by the signal conditioning unit, and transmitted to MCU1 for analog-to-digital conversion. After that, MCU1 converts the voltage signal into a corresponding digital current signal, and sends a pulse width modulation (PWM) signal to the gain-controllable amplifier circuit according to the interval in which its current value is located to adjust the gain of the amplifier. At the same time, MCU1 obtains the optimal resistance value of the sampling resistor according to the current value. Then, MCU1 sends the sampling resistor resistance value selection instruction to MCU2 in the sampling resistor matching unit. MCU2 obtains the corresponding sampling resistor connection mode according to the value of the above-mentioned sampling resistor, and then controls the on and off of the analog switch by sending a PWM pulse signal to the analog switch U1, thereby adjusting the resistance value of the sampling resistor to a relatively optimal value, and MCU2 sends the sampling resistor resistance value information to MCU1. Finally, after multiple interactions between MCU1 and MCU2, the precise current value of the circuit to be measured can be measured. By using the present invention, the precise current value of the circuit to be measured can be obtained in actual measurement without estimating the current range in advance, and the adaptive adjustment of the sampling resistor resistance can avoid the problem of the gear switching critical value. At the same time, the present invention can expand the resistance range of the sampling resistor through a series-parallel combination of multiple sampling resistors, ensure that the sampling resistor resistance matches the current value of the circuit to be measured, and use a gain-controllable amplifier circuit to adaptively amplify the voltage signal. The above method effectively improves the accuracy of current measurement, and enables the current measurement range to be covered from microamperes to amperes. BRIEF DESCRIPTION OF THE DRAWINGS

[0058] Figure 1 is a schematic diagram of a current detection device provided by an embodiment of the present invention;

[0059] Figure 2 is a schematic diagram of a sampling resistor matching unit provided in an embodiment of the present invention;

[0060] Figure 3 is a schematic diagram of the circuit structure of a sampling resistor matching unit provided in an embodiment of the present invention;

[0061] Figure 4 Schematic diagram of the initial connection mode between the sampling resistor group and the analog switch provided by an embodiment of the present invention;

[0062] Figure 5 is a schematic diagram of the circuit structure of a signal conditioning unit provided in an embodiment of the present invention;

[0063] Figure 6 is a schematic diagram of the connection relationship between MCU1 and MCU2 provided in an embodiment of the present invention;

[0064] Figure 7 is a flow chart of detecting a circuit to be tested during a testing phase provided by an embodiment of the present invention;

[0065] Figure 8 This is a flow chart of a current detection method provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0066] The present invention will be further described below in conjunction with the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solutions of the present invention and are not intended to limit the protection scope of the present invention.

[0067] Example 1

[0068] like Figure 1 As shown, the present invention provides a current detection device, including a current sampling unit, a sampling resistor matching unit, a signal conditioning unit and a main control unit;

[0069] The current sampling unit is used to collect the current signal of the circuit to be tested and transmit it to the sampling resistor group;

[0070] The sampling resistor matching unit includes a sampling resistor group and an operation control circuit. The sampling resistor group is used to convert a current signal into a voltage signal. The operation control circuit is used to control the connection mode of multiple sampling resistors in the sampling resistor group according to the sampling resistor value range issued by the main control unit, so as to adjust the resistance value of the sampling resistor group and send the real-time resistance value of the sampling resistor group to the main control unit.

[0071] The signal conditioning unit includes a gain controllable amplifier circuit and a signal filtering circuit. The gain controllable amplifier circuit is used to amplify the voltage signal according to the gain sent by the main control unit. The signal filtering circuit is used to filter out high-frequency interference signals in the amplified voltage signal and then transmit the voltage signal to the main control unit.

[0072] The main control unit is used to convert the received voltage signal into a digital voltage signal, calculate the current value according to the digital voltage signal and the resistance value of the sampling resistor group, adjust the gain and the sampling resistor value range according to the current value and send it down; after multiple interactions between the main control unit and the operation control circuit, the main control unit uses the calculated current value as the final current test value of the circuit to be tested.

[0073] The present invention can achieve multiple interactions between a main control unit and an operation control circuit, wherein the interactions include: the main control unit adjusts the value range of the sampling resistor according to the calculated current value, the operation control circuit controls the connection mode of multiple sampling resistors in a sampling resistor group according to the value range of the sampling resistor, the operation control circuit sends the real-time resistance value of the sampling resistor group to the main control unit, and obtains an accurate final current test value after multiple measurements of the circuit to be tested.

[0074] Example 2

[0075] like Figure 1 As shown, the present invention provides a current detection device, including a current sampling unit, a sampling resistor matching unit, a signal conditioning unit and a main control unit.

[0076] The explanations of the English abbreviations appearing in this embodiment are as follows:

[0077] MCU: The full name in English is Microcontroller Unit, and the Chinese name is micro control unit;

[0078] USART: The full name of USART is Universal Synchronous / Asynchronous Receiver / Transmitter, and its Chinese name is full-duplex universal synchronous / asynchronous serial transceiver module.

[0079] GND: The full name in English is Ground, and the Chinese name is ground port;

[0080] VDD: The full name in English is Voltage Drain Drain, and the Chinese name is positive power port;

[0081] VSS: The full name of VSS is Voltage Source and Sink, and its Chinese name is negative power port.

[0082] EN#: The full name in English is Enable, and the Chinese name is Enable Port;

[0083] IN: The full name of the English name is Logic Control Input, and the Chinese name is logic control input port;

[0084] DT: The full name of English is Drain Terminal, and the Chinese name is drain terminal;

[0085] S: The full name in English is Source Terminal, and the Chinese name is source port;

[0086] +INA: The full name of English is Instrumentation Amplifier Positive Input, and the Chinese name is instrumentation amplifier positive input port;

[0087] -INA: The full name of English is Instrumentation Amplifier Negative Input, and the Chinese name is instrumentation amplifier negative input port;

[0088] OUTA: The full name of OUTA is Instrumentation Amplifier Output.

[0089] +INB: The full name of English is Operational Amplifier Positive Input, and the Chinese name is Operational Amplifier Positive Input Port;

[0090] -INB: The full name of the English name is Operational Amplifier Negative Input, and the Chinese name is the operational amplifier negative input port;

[0091] OUTB: The full name of English is Operational Amplifier Outputt, and the Chinese name is operational amplifier output port;

[0092] REF: The full name of English is Instrumentation Amplifier Reference, and the Chinese name is instrumentation amplifier reference port;

[0093] +VS: The full name of the English name is Positive Power Supply, and the Chinese name is the positive pole of the power supply;

[0094] -VS: The full name of the English name is Negative Power Supply, and the Chinese name is the negative pole of the power supply;

[0095] A: The full name in English is Gain Setting, and the Chinese name is Gain Setting Port;

[0096] CS: The full name of English is Chip Select, and the Chinese name is chip selection port;

[0097] SDN: The full name in English is Shutdown, and the Chinese name is Shutdown Port;

[0098] NC: The full name of English is No Connect, and the Chinese name is Idle Port;

[0099] ADC: The full name of English is Analog to Digital Converter, and the Chinese name is analog-to-digital converter;

[0100] GPIO: The full English name is General Purpose Input Output, and the Chinese name is general function input and output port.

[0101] The current sampling unit is composed of components that can detect current signals, such as current transformers, Hall sensors, magnetoresistive sensors, etc., and is used to obtain the current signal of the circuit to be tested. The current sampling unit is connected to the sampling resistor group in the sampling resistor matching unit. Figure 2 As shown, the sampling resistor matching unit includes a sampling resistor group, an operation control circuit and an overvoltage protection circuit, which can convert the measured current signal into a voltage signal, adjust the resistance value of the sampling resistor group, and provide overvoltage protection. The sampling resistor group includes three sampling resistors, and the connection mode of the three sampling resistors is controlled by the operation control circuit. The operation control circuit is composed of an analog switch U1 and an MCU2, which can adjust the connection mode of the sampling resistors in the sampling resistor group according to the resistance range of the sampling resistors received from MCU1 (MCU1 in the main control unit), thereby changing the access resistance value of the sampling resistors. The overvoltage protection circuit can protect the device from being damaged when the sampling voltage suddenly increases due to the input current. The sampling resistor group in the sampling resistor matching unit is connected to the current sensor, the operation control circuit and the overvoltage protection circuit, the operation control circuit is connected to the MCU1 of the main control unit, and the overvoltage protection circuit is connected to the gain controllable amplifier circuit in the signal conditioning unit. The signal conditioning unit includes a gain controllable amplifier circuit and a signal filtering circuit, the gain controllable amplifier circuit can amplify the voltage signal obtained after the sampling resistor, and the signal filtering circuit can filter out the high-frequency component in the obtained voltage signal. The output end of the gain controllable amplifier circuit in the signal conditioning unit is connected to the input end of the signal filtering circuit, the enable end and the gain setting end are connected to the MCU1 in the main control unit, and the output end of the signal filtering circuit is also connected to the MCU1 in the main control unit. The MCU1 in the main control unit has a built-in analog-to-digital conversion circuit that can convert the voltage signal processed by the front circuit into a corresponding digital signal. In addition, MCU1 can calculate the measured current value based on the digital voltage signal, and then control the gain of the gain controllable amplifier circuit through the GPIO port after analyzing the current value.

[0102] In addition, during the test phase, MCU1 can calculate the resistance selection range of the sampling resistor according to the preset analog-to-digital conversion port input voltage range (which can be selected according to different standards), the measured current value and the amplifier gain information through formulas (1) and (2). For example, in this embodiment, the voltage range of 10mV to 3.3V that can be collected by the port with analog-to-digital conversion function of MCU1 is used as the set analog-to-digital conversion port input voltage range. Assuming that the measured current value is 100mA, MCU1 sets the amplifier gain to 1 times. According to formulas (1) and (2), the resistance selection range of the sampling resistor can be calculated to be 0.1 ohms to 33 ohms. MCU1 will also synchronously send the resistance range of the sampling resistor to MCU2 in the operation control circuit. MCU2 obtains all the alternative connection methods of the sampling resistor that meet the requirements according to the instruction containing the resistance range of the sampling resistor. MCU1 will record the measured current value corresponding to each alternative connection method, and further calculate the relative error between the current value measured by each alternative connection method and the actual current value through formula (1) and formula (2). Finally, MCU1 will select the connection method with the smallest relative error and send the corresponding sampling resistor value to MCU2. In the actual measurement stage, MCU1 determines the resistance value of the sampling resistor based on the current value and the gain information of the amplifier, and sends the instruction containing the resistance range of the sampling resistor to MCU2. MCU2 obtains the corresponding connection method based on the resistance range of the sampling resistor. If the connection method is unique, the connection method of the sampling resistor is directly adjusted. If the connection method is not unique, the probability of each connection method being selected follows a uniform distribution. Finally, after selecting the connection method, MCU2 adjusts the connection method of the sampling resistor in the sampling resistor group, and MCU1 can obtain the accurate current value of the circuit to be measured.

[0103] The value range of the sampling resistor is calculated by the following formula:

[0104] (1);

[0105] (2);

[0106] in, is the maximum value of the sampling resistor, It is the maximum value of the input voltage of the analog-to-digital conversion port in the preset MCU1. is the minimum value of the sampling resistor, It is the preset minimum value of the analog-to-digital conversion port input voltage in MCU1. is the gain set by MCU1, is the current value.

[0107] The current value is calculated by the following formula:

[0108] (3);

[0109] in, is the current value, is the voltage value corresponding to the digital voltage signal, and R is the resistance value of the sampling resistor group.

[0110] The relative error between the measured current value and the actual current value is calculated by the following formula:

[0111] (4);

[0112] Where RE is the relative error between the measured current value and the actual current value, is the current value, is the actual current value.

[0113] like Figure 3 As shown, the overvoltage protection circuit includes a transient suppression diode D1, a resistor R4, a resistor R5, a capacitor C1 and a capacitor C2, the two ends of the transient suppression diode D1 are respectively connected to the positive output end of the current sampling unit and the negative output end of the current sampling unit, one end of the transient suppression diode D1 connected to the positive output end of the current sampling unit is also connected to the resistor R4, the other end of the resistor R4 is connected to the positive voltage output port OUT+ of the sampling resistor matching unit after connecting to one end of the capacitor C1, the one end of the transient suppression diode D1 connected to the negative output end of the current sampling unit is also connected to the resistor R5, the other end of the resistor R5 is connected to the negative voltage output port OUT- of the sampling resistor matching unit after connecting to one end of the capacitor C2, and the other ends of the capacitor C1 and the capacitor C2 are both connected to the analog ground. In this embodiment, the transient suppression diode D1 is a SMBJ3.3CA bidirectional transient suppression diode, and SMBJ3.3CA is the model of the transient suppression diode.

[0114] like Figure 3 As shown, the operation control circuit includes MCU2 and analog switch U1, and MCU2 controls the connection mode of multiple sampling resistors in the sampling resistor group through the analog switch; the sampling resistor group includes sampling resistor R1, sampling resistor R2 and sampling resistor R3. In this embodiment, the analog switch U1 is an AS1634BCPZ-REEL7 single-pole double-throw four-channel analog switch, and AS1634BCPZ-REEL7 is the model of the analog switch.

[0115] like Figure 3As shown, MCU2 is provided with a first logic signal output terminal AS1, a second logic signal output terminal AS2, a third logic signal output terminal AS3, a fourth logic signal output terminal AS4 and an enable signal output terminal AS-EN, the main control unit is MCU1, and MCU1 and MCU2 are both provided with a full-duplex universal synchronous / asynchronous serial transceiver module, and the connection between MCU1 and MCU2 is realized through the full-duplex universal synchronous / asynchronous serial transceiver module.

[0116] like Figure 3 As shown, the analog switch U1 is provided with a ground port GND, a positive power port VDD, a negative power port VSS, an enable port EN, a first logic control input port IN1, a second logic control input port IN2, a third logic control input port IN3, a fourth logic control input port IN4, a first drain port DT1, a second drain port DT2, a third drain port DT3, a fourth drain port DT4, a first source port S1A, a second source port S1B, a third source port S2A, a fourth source port S2B, a fifth source port S3A, a sixth source port S3B, a seventh source port S4A, and an eighth source port S4B, the ground port GND is grounded, the positive power port VDD is connected to a positive voltage, and the negative power port VSS is connected to a negative voltage.

[0117] like Figure 3 As shown, the positive output end of the current sampling unit is connected to one end of the sampling resistor R1, one end of the transient suppression diode D1, one end of the resistor R4, and the first drain port DT1 after being connected to the positive input end IN+ of the sampling resistor matching unit. The negative output end of the current sampling unit is connected to one end of the sampling resistor R2, one end of the resistor R5, the other end of the transient suppression diode D1, the fifth source port S3A, and the seventh source port S4A after being connected to the negative input end IN- of the sampling resistor matching unit. The other end of the sampling resistor R1 is connected to the fourth drain port DT4, and the other end of the sampling resistor R2 is connected to the third source port S2 A, the sixth source port S3B are connected, one end of the sampling resistor R3 is connected to the third drain port DT3, the other end of the sampling resistor R3 is connected to the second drain port DT2, the first source port S1A and the eighth source port S4B, the enable port EN is connected to the enable signal output terminal AS-EN, the first logic control input port IN1 is connected to the first logic signal output terminal AS1, the second logic control input port IN2 is connected to the second logic signal output terminal AS2, the third logic control input port IN3 is connected to the third logic signal output terminal AS3, and the fourth logic control input port IN4 is connected to the fourth logic signal output terminal AS4.

[0118] MCU2 is connected to MCU1 of the main control unit through a full-duplex universal synchronous / asynchronous serial transceiver module (UniversalSynchronous / Asynchronous Receiver / Transmitter, USART).

[0119] When the current of the circuit to be tested is detected for the first time after power is turned on, since the current of the circuit to be tested is unknown, in order to avoid damage to the subsequent circuit port due to excessive input voltage, in this embodiment, the initial state of the sampling resistor group is adjusted to the minimum resistance of the sampling resistor through the analog switch U1, that is, the sampling resistor R1, the sampling resistor R2 and the sampling resistor R3 are connected in parallel. Figure 4 The figure shows the initial connection method of the sampling resistor group and each port in the analog switch U1.

[0120] When the MCU1 of the main control unit detects the current, it adjusts the amplifier gain, and calculates the resistance selection range of the sampling resistor through formula (1) and formula (2), and sends the sampling resistor value range information to MCU2 through the USART serial port. MCU2 first determines the connection mode of the sampling resistors R1, R2 and R3 in the sampling resistor group according to the sampling resistor value range, and then outputs high and low levels to the first logic control input port IN1 of the analog switch U1 through the first logic signal output terminal AS1, outputs high and low levels to the second logic control input port IN2 of the analog switch U1 through the second logic signal output terminal AS2, outputs high and low levels to the third logic control input port IN3 of the analog switch U1 through the third logic signal output terminal AS3, and outputs high and low levels to the fourth logic control input port IN4 of the analog switch U1 through the fourth logic signal output terminal AS4, so as to control the connection and disconnection of the sampling resistors R1, R2 and R3.

[0121] In this embodiment, the resistance of the sampling resistor group has 14 different values, which can be calculated by formula (5) to formula (18) respectively.

[0122] R 1 =R R1 (5);

[0123] R 2 =R R2 (6);

[0124] R 3 =R R3 (7)

[0125] R 4 =R R1 +R R2 (8);

[0126] R5 =R R1 +R R3 (9);

[0127] R 6 =R R2 +R R3 (10);

[0128] R 7 =R R1 +R R2 +R R3 (11);

[0129] R 8 =(R R1 *R R2 ) / (R R1 +R R2 )(12);

[0130] R 9 =(R R1 *R R3 ) / (R R1 +R R3 )(13);

[0131] R 10 =(R R2 *R R3 ) / (R R2 +R R3 )(14);

[0132] R 11 =(R R1 *R R2 ) / (R R1 +R R2 )+R R3 (15);

[0133] R 12 =(R R2 *R R3 ) / (R R2 +R R3 )+R R1 (16);

[0134] R 13 =R R1 *(R R2 +R R3 ) / (R R1 +R R2 +R R3 )(17);

[0135] R 14 =(R R1 *R R2 *RR3 ) / (R R1 *R R2 +R R1 *R R3 +R R2 *R R3 )(18);

[0136] Among them, R R1 is the resistance of the sampling resistor R1, R R2 is the resistance of the sampling resistor R2, R R3 is the resistance of the sampling resistor R3, R 1 is the resistance value of the sampling resistor group when only the sampling resistor R1 is connected, R 2 is the resistance value of the sampling resistor group when only the sampling resistor R2 is connected, R 3 is the resistance value of the sampling resistor group when only the sampling resistor R3 is connected, R 4 It is the resistance value of the sampling resistor group when only the sampling resistor R1 and the sampling resistor R2 are connected in series. 5 is the resistance value of the sampling resistor group when only the sampling resistor R1 and the sampling resistor R3 are connected in series. 6 is the resistance value of the sampling resistor group when only the sampling resistor R2 and the sampling resistor R3 are connected in series. 7 is the resistance value of the sampling resistor group when three sampling resistors are connected in series, R 8 It is the resistance value of the sampling resistor group when only the sampling resistor R1 and the sampling resistor R2 are connected in parallel. 9 It is the resistance value of the sampling resistor group when only the sampling resistor R1 and the sampling resistor R3 are connected in parallel. 10 It is the resistance value of the sampling resistor group when only the sampling resistor R2 and the sampling resistor R3 are connected in parallel. 11 It is the resistance value of the sampling resistor group when three sampling resistors are connected and the sampling resistors R1 and R2 are connected in parallel and then the sampling resistor R3 is connected in series. 12 It is the resistance value of the sampling resistor group when three sampling resistors are connected and the sampling resistors R2 and R3 are connected in parallel and then connected in series with the sampling resistor R1. 13 It is the resistance value of the sampling resistor group when three sampling resistors are connected and the sampling resistors R2 and R3 are connected in series and then the sampling resistor R1 is connected in parallel. 14 It is the resistance value of the sampling resistor group when three sampling resistors are connected in parallel.

[0137] In this embodiment, the current sampling unit uses a split current transformer CT1. The split current transformer CT1 uses a BNWPKL-35W split outdoor waterproof current transformer. The sampling resistor matching unit is the same as the above-mentioned example.

[0138] like Figure 5As shown, the gain controllable amplifier circuit is an operational amplifier chip U2, the operational amplifier chip U2 includes a first operational amplifier U2A and a second operational amplifier U2B, and the signal conditioning unit includes the first operational amplifier U2A, the second operational amplifier U2B, resistor R6, resistor R7, resistor R8, resistor R9, capacitor C3, capacitor C4, capacitor C5 and capacitor C6.

[0139] like Figure 5 As shown, the operational amplifier chip U2 is provided with an instrumentation amplifier non-inverting input port +INA, an instrumentation amplifier inverting input port -INA, an instrumentation amplifier output port OUTA, an operational amplifier non-inverting input port +INB, an operational amplifier inverting input port -INB, an operational amplifier output port OUTB, an instrumentation amplifier reference port REF, a positive power supply +VS, a negative power supply -VS, a first gain setting port A0, a second gain setting port A1, a third gain setting port A2, a chip selection port CS, a shutdown port SDN, and an idle port NC.

[0140] like Figure 5 As shown, the instrumentation amplifier same-direction input port +INA of the first operational amplifier U2A is connected to the other end of the resistor R4 and then connected to one end of the capacitor C1, the instrumentation amplifier inverse input port -INA of the first operational amplifier U2A is connected to the other end of the resistor R5 and then connected to one end of the capacitor C2, the instrumentation amplifier output port OUTA of the first operational amplifier U2A is connected to one end of the resistor R9, the other end of the resistor R9 is connected to the resistor R8 and one end of the capacitor C4, the other end of the resistor R8 is connected to one end of the capacitor C3 and then connected to the operational amplifier same-direction input port +INB of the second operational amplifier U2B, the other end of the capacitor C3 is connected to one end of the resistor R6 The two ends are grounded together, the other end of the resistor R6 is connected to the resistor R7 and then connected to the operational amplifier inverting input port -INB of the second operational amplifier U2B, the operational amplifier output port OUTB of the second operational amplifier U2B is connected to the resistor R7 and the other end of the capacitor C4 and then connected to the analog-to-digital converter port ADC-OUT in MCU1, the positive pole of the power supply +VS is connected to one end of the capacitor C6 and then connected to the shutdown port SDN and the positive voltage, the negative pole of the power supply -VS is connected to one end of the capacitor C5 and then connected to the negative voltage, the other end of the capacitor C6 is connected to the other end of the capacitor C5 and then grounded, and the instrumentation amplifier reference port REF and the idle port NC are not connected to other devices.

[0141] like Figure 5As shown, the chip selection port CS is connected to the chip selection signal output port A-CS of MCU1, the first gain setting port A0 is connected to the first gain signal output port A-A0 of MCU1, the second gain setting port A1 is connected to the second gain signal output port A-A1 of MCU1, and the third gain setting port A2 is connected to the third gain signal output port A-A2 of MCU1. Through the above connection relationship, MCU1 can control the gain of the first operational amplifier U2A and the second operational amplifier U2B, and then perform corresponding amplification for current signals of different values.

[0142] In addition, if Figure 6 As shown, the USART serial port of MCU1 is also connected to the USART serial port of MCU2. MCU1 can send the currently obtained sampling resistor value range information to MCU2 through the USART serial port, and MCU2 can send the current resistance value of the sampling resistor group to MCU1 through the USART serial port.

[0143] Example 3

[0144] like Figure 8 As shown, the present invention provides a current detection method.

[0145] This method first conducts a test phase before actual measurement. Figure 7 As shown, including:

[0146] Step 1, using a current-detectable element (current sampling unit) to measure the current signal of the circuit to be tested in real time, and at the same time using an ammeter to measure the current of the circuit to be tested to obtain the actual current value, and then proceeding to step 2;

[0147] Step 2, MCU1 determines whether it is the first time to detect the current of the circuit to be tested. If so, MCU1 adjusts the gain in the gain controllable amplifier circuit to the minimum gain value, and sends the first adjusted sampling resistance value to MCU2, and then enters step 3; if not, enters step 4;

[0148] Step 3, MCU2 receives the sampling resistor resistance range from MCU1, adjusts the sampling resistor group to a connection mode corresponding to the minimum resistance value according to the sampling resistor resistance range, and then proceeds to step 4;

[0149] Step 4, the sampling resistor matching unit receives the current signal detected by the current sampling unit, converts the current signal into a corresponding voltage signal according to the resistance value of the current sampling resistor group, and outputs it to the signal conditioning unit. At the same time, MCU2 sends the resistance value information of the current sampling resistor group to MCU1, and then enters step 5;

[0150] Step 5, the signal conditioning unit amplifies the input voltage signal according to the currently adjusted gain, and outputs it to the port with analog-to-digital conversion function of MCU1 after filtering, and then enters step 6;

[0151] Step 6: MCU1 performs analog-to-digital conversion on the analog voltage signal to obtain the corresponding digital voltage signal, and then obtains the value of the digital current signal of the circuit under test (i.e., the current value) according to formula (3), and then determines the range of the current value. If the current signal is 0, proceed to step 7; if the current signal is not 0, save the current value of the circuit under test, adjust the gain of the gain-controllable amplifier circuit according to the current value, and calculate the resistance range of the sampling resistor, and then send the instruction containing the resistance range of the sampling resistor to MCU2, and finally proceed to step 8;

[0152] Step 7, MCU1 sends a control instruction to adjust the gain of the signal conditioning unit in ascending order, and at the same time, MCU1 sends an instruction including the resistance range of the sampling resistor to be adjusted to MCU2, and MCU2 preferentially adjusts the connection mode of the sampling resistors in the sampling resistor group in ascending order, and then measures the current of the circuit to be tested through steps 1 to 6 until the current value is not 0, and then proceeds to step 8;

[0153] Step 8, MCU2 selects all sampling resistor connection methods that meet the requirements according to the instruction containing the sampling resistor resistance range sent by MCU1, and arranges them in order from small to large sampling resistor resistance values. For connection methods with equal sampling resistor resistance values, they are arranged in no particular order, and then proceeds to step 9;

[0154] Step 9, MCU2 controls the analog switch U1 to adjust the connection mode of the sampling resistors in the sampling resistor group one by one according to the sequence. After each adjustment, MCU2 sends the resistance value of the current sampling resistor group to MCU1. While receiving the resistance value of the current sampling resistor group, MCU1 records the current value corresponding to the resistance value of each sampling resistor group. Then, MCU1 calculates the relative error corresponding to the resistance value of each sampling resistor group according to the actual current value and the resistance value of each sampling resistor group and its corresponding current value through formula (4). Finally, the resistance value of the sampling resistor group with the smallest relative error is selected to obtain the accurate current value of the circuit to be tested, and it is saved inside MCU1 at the same time.

[0155] In the actual measurement stage, Figure 8 As shown, the present invention provides a current detection method, comprising:

[0156] S1, collecting the current signal of the circuit to be tested in real time through the current detection unit and transmitting it;

[0157] S2. After receiving the voltage signal, if it is the first time to detect the current of the circuit under test after power-on, MCU1 performs the following operations: converting the received voltage signal into a digital voltage signal, calculating the current value according to the digital voltage signal and the resistance value of the sampling resistor group, adjusting the sampling resistor value range according to the current value and sending it down, adjusting the gain to the minimum gain and sending it down; if it is not the first time to detect the current of the circuit under test after power-on, then entering step S4;

[0158] S3, MCU2 receives the sampling resistor value range sent by MCU1, and adjusts the connection mode of the sampling resistor group to the connection mode corresponding to the minimum resistance value according to the received sampling resistor value range, and enters step S4;

[0159] S4, the sampling resistor matching unit receives the current signal transmitted by the current detection unit, converts the current signal into a voltage signal according to the resistance value of the current sampling resistor group, and outputs the voltage signal to the signal conditioning unit. At the same time, MCU2 sends the resistance value of the current sampling resistor group to MCU1, and enters step S5;

[0160] S5, the signal conditioning unit amplifies the voltage signal according to the gain sent by MCU1, filters the amplified voltage signal, transmits the filtered voltage signal to MCU1, and enters step S6;

[0161] S6, MCU1 converts the received voltage signal into a digital voltage signal, calculates the current value according to the digital voltage signal and the resistance value of the sampling resistor group, and if the calculated current value is 0, proceeds to step S7; if the calculated current value is not 0, saves the calculated current value, adjusts the gain according to the calculated current value, and calculates the value range of the sampling resistor according to the calculated current value, and sends the value range of the sampling resistor to MCU2, and proceeds to step S8;

[0162] S7, MCU1 adjusts the gain in order from the minimum gain to the maximum gain and sends it down, calculates the value range of the sampling resistor according to the calculated current value and sends it down, MCU2 gradually adjusts the connection mode of the sampling resistors in the sampling resistor group according to the principle of increasing the resistance value from small to large, and then measures the current value of the circuit to be tested through steps S1 to S6 until the calculated current value is not 0, and then enters step S8;

[0163] S8. MCU1 sends the calculated value range of the sampling resistor. MCU2 obtains the connection mode of the sampling resistors in the sampling resistor group according to the received value range of the sampling resistor. If the connection mode is unique, the connection mode of the sampling resistor is directly adjusted. If the connection mode is not unique, the probability of each connection mode being selected obeys a uniform distribution. After selecting the connection mode, MCU2 adjusts the connection mode of the sampling resistor. Then MCU1 uses the latest calculated current value as the final current test value of the circuit to be tested.

[0164] Specifically, when the measuring device is just installed or the current of the circuit to be measured is measured for the first time after the transformer is restarted, the current signal is first obtained through the current sampling unit connected to the circuit to be measured. Since the current is measured for the first time at this time, in order to avoid damage to the device due to excessive current, the MCU2 adjusts the connection mode of the sampling resistor group to the state with the smallest resistance value of the sampling resistor group. In this embodiment, the sampling resistor R1, the sampling resistor R2 and the sampling resistor R3 are connected in parallel. At this time, the resistance value of the sampling resistor group is R 14 . Then, MCU2 sends the resistance value of the sampling resistor group to MCU1. After that, the voltage signal corresponding to the current of the circuit to be measured is obtained through the sampling resistor and transmitted to the gain-controllable amplifier circuit, which amplifies the voltage in the received voltage signal. Similarly, in order to prevent the voltage value after voltage amplification from exceeding the voltage range that the MCU1 port can withstand, MCU1 will generate a PWM pulse signal to the gain-controllable amplifier circuit before the current measurement starts, and set its initial gain to 1. The amplified voltage signal is transmitted to the port with analog-to-digital conversion function in MCU1 after filtering out the high-frequency signal through the signal filtering circuit.

[0165] After internal analog-to-digital conversion, MCU1 obtains a digital signal corresponding to the input voltage signal, and obtains the current value of the current circuit to be measured based on this digital signal and the resistance value of the sampling resistor group, and calculates the current value through formula (3). After obtaining the current value, in order to improve the accuracy of current measurement, MCU1 will select the gain of the gain-controllable amplifier circuit according to the current value, and generate three specific PWM pulse signals, which are transmitted to the gain-controllable amplifier circuit through ports A-A0, A-A1 and A-A2 respectively, and the gain of the gain-controllable amplifier circuit is adjusted to a suitable gain. Then, MCU1 calculates the value range of the sampling resistor according to the current value, and synchronously sends the value range of the sampling resistor to MCU2 through the USART serial port. After receiving the information sent by MCU1, MCU2 obtains the connection method of the sampling resistor according to the above information, and then sends PWM pulse signals to IN1, IN2, IN3 and IN4 on the analog switch U1 through ports AS1, AS2, AS3 and AS4 respectively, and adjusts the sampling resistor group according to the selected method. After multiple interactions between MCU1 and MCU2, MCU1 can obtain the accurate current value of the circuit to be tested.

[0166] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the technical principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A current detection device, characterized in that: It includes a current sampling unit, a sampling resistor matching unit, a signal conditioning unit and a main control unit; The current sampling unit is used to collect the current signal of the circuit to be tested and transmit it to the sampling resistor group; The sampling resistor matching unit includes a sampling resistor group and an operation control circuit. The sampling resistor group is used to convert a current signal into a voltage signal. The operation control circuit is used to control the connection mode of multiple sampling resistors in the sampling resistor group according to the sampling resistor value range issued by the main control unit, so as to adjust the resistance value of the sampling resistor group and send the real-time resistance value of the sampling resistor group to the main control unit. The signal conditioning unit includes a gain controllable amplifier circuit and a signal filtering circuit. The gain controllable amplifier circuit is used to amplify the voltage signal according to the gain sent by the main control unit. The signal filtering circuit is used to filter out high-frequency interference signals in the amplified voltage signal and then transmit the voltage signal to the main control unit. The main control unit is used to convert the received voltage signal into a digital voltage signal, calculate the current value according to the digital voltage signal and the resistance value of the sampling resistor group, adjust the gain and the sampling resistor value range according to the current value and send them down; after multiple interactions between the main control unit and the operation control circuit, the main control unit uses the calculated current value as the final current test value of the circuit to be tested; The multiple interactions include: S2. After receiving the voltage signal, if it is the first time to detect the current of the circuit under test after power-on, MCU1 performs the following operations: converting the received voltage signal into a digital voltage signal, calculating the current value according to the digital voltage signal and the resistance value of the sampling resistor group, adjusting the sampling resistor value range according to the current value and sending it down, adjusting the gain to the minimum gain and sending it down; if it is not the first time to detect the current of the circuit under test after power-on, then entering step S4; S3, MCU2 receives the sampling resistor value range sent by MCU1, and adjusts the connection mode of the sampling resistor group to the connection mode corresponding to the minimum resistance value according to the received sampling resistor value range, and enters step S4; S4, the sampling resistor matching unit receives the current signal transmitted by the current detection unit, converts the current signal into a voltage signal according to the resistance value of the current sampling resistor group, and outputs the voltage signal to the signal conditioning unit. At the same time, MCU2 sends the resistance value of the current sampling resistor group to MCU1, and enters step S5; S5, the signal conditioning unit amplifies the voltage signal according to the gain sent by MCU1, filters the amplified voltage signal, transmits the filtered voltage signal to MCU1, and enters step S6; S6, MCU1 converts the received voltage signal into a digital voltage signal, calculates the current value according to the digital voltage signal and the resistance value of the sampling resistor group, and if the calculated current value is 0, proceeds to step S7; if the calculated current value is not 0, saves the calculated current value, adjusts the gain according to the calculated current value, and calculates the value range of the sampling resistor according to the calculated current value, and sends the value range of the sampling resistor to MCU2, and proceeds to step S8; S7, MCU1 adjusts the gain in order from the minimum gain to the maximum gain and sends it down, calculates the value range of the sampling resistor according to the calculated current value and sends it down, MCU2 gradually adjusts the connection mode of the sampling resistors in the sampling resistor group according to the principle of increasing the resistance value from small to large, and then measures the current value of the circuit to be tested through steps S1 to S6 until the calculated current value is not 0, and then enters step S8; S8. MCU1 sends the calculated value range of the sampling resistor. MCU2 obtains the connection mode of the sampling resistors in the sampling resistor group according to the received value range of the sampling resistor. If the connection mode is unique, the connection mode of the sampling resistor is directly adjusted. If the connection mode is not unique, the probability of each connection mode being selected obeys a uniform distribution. After selecting the connection mode, MCU2 adjusts the connection mode of the sampling resistor. Then MCU1 uses the latest calculated current value as the final current test value of the circuit to be tested.

2. The current detection device according to claim 1, characterized in that: The sampling resistor matching unit further includes an overvoltage protection circuit, the input end of the overvoltage protection circuit is connected to the sampling resistor group, the output end of the overvoltage protection circuit is connected to the gain controllable amplifier circuit, and the overvoltage protection circuit is used to protect the ports of each device in the current detection device when the current signal suddenly increases; The overvoltage protection circuit includes a transient suppression diode D1, a resistor R4, a resistor R5, a capacitor C1 and a capacitor C2, two ends of the transient suppression diode D1 are respectively connected to the positive output end of the current sampling unit and the negative output end of the current sampling unit, one end of the transient suppression diode D1 connected to the positive output end of the current sampling unit is also connected to the resistor R4, the other end of the resistor R4 is connected to the positive voltage output port OUT+ of the sampling resistor matching unit after being connected to one end of the capacitor C1, one end of the transient suppression diode D1 connected to the negative output end of the current sampling unit is also connected to the resistor R5, the other end of the resistor R5 is connected to the negative voltage output port OUT- of the sampling resistor matching unit after being connected to one end of the capacitor C2, and the other ends of the capacitor C1 and the capacitor C2 are both connected to the analog ground; The main control unit is MCU1.

3. The current detection device according to claim 2, characterized in that: The current sampling unit is a current transformer, a Hall sensor or a magnetoresistive sensor; The gain controllable amplifier circuit is an amplifier with a gain controllable function; The signal filtering circuit is a filtering capacitor.

4. The current detection device according to claim 2, characterized in that: The operation control circuit includes an MCU2 and an analog switch U1, and the MCU2 controls the connection mode of multiple sampling resistors in a sampling resistor group through the analog switch U1; the sampling resistor group includes a sampling resistor R1, a sampling resistor R2 and a sampling resistor R3; MCU2 is provided with a first logic signal output terminal AS1, a second logic signal output terminal AS2, a third logic signal output terminal AS3, a fourth logic signal output terminal AS4 and an enable signal output terminal AS-EN. Both MCU1 and MCU2 are provided with a full-duplex universal synchronous / asynchronous serial transceiver module, and the connection between MCU1 and MCU2 is realized through the full-duplex universal synchronous / asynchronous serial transceiver module; The analog switch U1 is provided with a ground port GND, a positive power port VDD, a negative power port VSS, an enable port EN#, a first logic control input port IN1, a second logic control input port IN2, a third logic control input port IN3, a fourth logic control input port IN4, a first drain port DT1, a second drain port DT2, a third drain port DT3, a fourth drain port DT4, a first source port S1A, a second source port S1B, a third source port S2A, a fourth source port S2B, a fifth source port S3A, a sixth source port S3B, a seventh source port S4A, an eighth source port S4B, the ground port GND is grounded, the positive power port VDD is connected to a positive voltage, and the negative power port VSS is connected to a negative voltage; The positive output end of the current sampling unit is connected to one end of the sampling resistor R1, one end of the transient suppression diode D1, one end of the resistor R4, and the first drain port DT1 after being connected to the positive input end IN+ of the sampling resistor matching unit. The negative output end of the current sampling unit is connected to one end of the sampling resistor R2, one end of the resistor R5, the other end of the transient suppression diode D1, the fifth source port S3A, and the seventh source port S4A after being connected to the negative input end IN- of the sampling resistor matching unit. The other end of the sampling resistor R1 is connected to the fourth drain port DT4, and the other end of the sampling resistor R2 is connected to the third source port S2A, The sixth source port S3B is connected, one end of the sampling resistor R3 is connected to the third drain port DT3, the other end of the sampling resistor R3 is connected to the second drain port DT2, the first source port S1A and the eighth source port S4B, the enable port EN is connected to the enable signal output terminal AS-EN, the first logic control input port IN1 is connected to the first logic signal output terminal AS1, the second logic control input port IN2 is connected to the second logic signal output terminal AS2, the third logic control input port IN3 is connected to the third logic signal output terminal AS3, and the fourth logic control input port IN4 is connected to the fourth logic signal output terminal AS4.

5. The current detection device according to claim 2, characterized in that: The gain controllable amplifier circuit is an operational amplifier chip U2, the operational amplifier chip U2 includes a first operational amplifier U2A and a second operational amplifier U2B, and the signal conditioning unit includes a first operational amplifier U2A, a second operational amplifier U2B, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a capacitor C3, a capacitor C4, a capacitor C5 and a capacitor C6; The operational amplifier chip U2 is provided with an instrumentation amplifier non-inverting input port +INA, an instrumentation amplifier inverting input port -INA, an instrumentation amplifier output port OUTA, an operational amplifier non-inverting input port +INB, an operational amplifier inverting input port -INB, an operational amplifier output port OUTB, an instrumentation amplifier reference port REF, a positive power supply electrode +VS, a negative power supply electrode -VS, a first gain setting port A0, a second gain setting port A1, a third gain setting port A2, a chip selection port CS, a shutdown port SDN, and an idle port NC; The instrumentation amplifier same-direction input port +INA of the first operational amplifier U2A is connected to the other end of the resistor R4 and then connected to one end of the capacitor C1. The instrumentation amplifier reverse input port -INA of the first operational amplifier U2A is connected to the other end of the resistor R5 and then connected to one end of the capacitor C2. The instrumentation amplifier output port OUTA of the first operational amplifier U2A is connected to one end of the resistor R9. The other end of the resistor R9 is connected to the resistor R8 and one end of the capacitor C4. The other end of the resistor R8 is connected to one end of the capacitor C3 and then connected to the operational amplifier same-direction input port +INB of the second operational amplifier U2B. The other end of the capacitor C3 and one end of the resistor R6 are grounded together. The other end of the resistor R6 is connected to the resistor R7 and then connected to the operational amplifier reverse input port -INB of the second operational amplifier U2B. The operational amplifier of the second operational amplifier U2B The amplifier output port OUTB is connected to the other end of the resistor R7 and the capacitor C4 and then connected to the analog-to-digital converter port ADC-OUT in MCU1. The positive pole of the power supply +VS is connected to one end of the capacitor C6 and then connected to the shutdown port SDN and the positive voltage. The negative pole of the power supply -VS is connected to one end of the capacitor C5 and then connected to the negative voltage. The other end of the capacitor C6 is connected to the other end of the capacitor C5 and then grounded. The instrumentation amplifier reference port REF and the idle port NC are not connected to other devices. The chip selection port CS is connected to the chip selection signal output port A-CS of MCU1. The first gain setting port A0 is connected to the first gain signal output port A-A0 of MCU1. The second gain setting port A1 is connected to the second gain signal output port A-A1 of MCU1. The third gain setting port A2 is connected to the third gain signal output port A-A2 of MCU1.

6. A current detection method based on the current detection device according to any one of claims 2 to 5, characterized in that: include: S1, collecting the current signal of the circuit to be tested in real time through the current detection unit and transmitting it; S2. After receiving the voltage signal, if it is the first time to detect the current of the circuit under test after power-on, MCU1 performs the following operations: converting the received voltage signal into a digital voltage signal, calculating the current value according to the digital voltage signal and the resistance value of the sampling resistor group, adjusting the sampling resistor value range according to the current value and sending it down, adjusting the gain to the minimum gain and sending it down; if it is not the first time to detect the current of the circuit under test after power-on, then entering step S4; S3, MCU2 receives the sampling resistor value range sent by MCU1, and adjusts the connection mode of the sampling resistor group to the connection mode corresponding to the minimum resistance value according to the received sampling resistor value range, and enters step S4; S4, the sampling resistor matching unit receives the current signal transmitted by the current detection unit, converts the current signal into a voltage signal according to the resistance value of the current sampling resistor group, and outputs the voltage signal to the signal conditioning unit. At the same time, MCU2 sends the resistance value of the current sampling resistor group to MCU1, and enters step S5; S5, the signal conditioning unit amplifies the voltage signal according to the gain sent by MCU1, filters the amplified voltage signal, transmits the filtered voltage signal to MCU1, and enters step S6; S6, MCU1 converts the received voltage signal into a digital voltage signal, calculates the current value according to the digital voltage signal and the resistance value of the sampling resistor group, and if the calculated current value is 0, proceeds to step S7; if the calculated current value is not 0, saves the calculated current value, adjusts the gain according to the calculated current value, and calculates the value range of the sampling resistor according to the calculated current value, and sends the value range of the sampling resistor to MCU2, and proceeds to step S8; S7, MCU1 adjusts the gain in order from the minimum gain to the maximum gain and sends it down, calculates the value range of the sampling resistor according to the calculated current value and sends it down, MCU2 gradually adjusts the connection mode of the sampling resistors in the sampling resistor group according to the principle of increasing the resistance value from small to large, and then measures the current value of the circuit to be tested through steps S1 to S6 until the calculated current value is not 0, and then enters step S8; S8. MCU1 sends the calculated value range of the sampling resistor. MCU2 obtains the connection mode of the sampling resistors in the sampling resistor group according to the received value range of the sampling resistor. If the connection mode is unique, the connection mode of the sampling resistor is directly adjusted. If the connection mode is not unique, the probability of each connection mode being selected obeys a uniform distribution. After selecting the connection mode, MCU2 adjusts the connection mode of the sampling resistor. Then MCU1 uses the latest calculated current value as the final current test value of the circuit to be tested.

7. The current detection method according to claim 6, characterized in that: The current value is calculated according to the digital voltage signal and the resistance value of the sampling resistor group, using the following formula: ； in, is the current value, is the voltage value corresponding to the digital voltage signal, R is the resistance of the sampling resistor group; The value range of the sampling resistor is calculated according to the calculated current value, using the following formula: ；； in, is the maximum value of the sampling resistor, It is the maximum value of the input voltage of the analog-to-digital conversion port in the preset MCU1. is the minimum value of the sampling resistor, It is the preset minimum value of the analog-to-digital conversion port input voltage in MCU1. is the gain set by MCU1.

8. The current detection method according to claim 6, characterized in that: If the number of the sampling resistors is 3, there are 14 ways to connect the sampling resistors. The expressions for the resistance values of the sampling resistor group in various connection ways are: R 1= R R1 ； R 2= R R2 ； R 3= R R3 ； R 4= R R1 + R R2 ； R 5= R R1 + R R3 ； R 6= R R2 + R R3 ； R 7= R R1 + R R2 + R R3 ； R 8=（ R R1 * R R2 ） / （ R R1 + R R2 ）； R 9=（ R R1 * R R3 ） / （ R R1 + R R3 ）； R 10 =（ R R2 * R R3 ） / （ R R2 + R R3 ）； R 11 =（ R R1 * R R2 ） / （ R R1 + R R2 ）+ R R3 ； R 12 =（ R R2 * R R3 ） / （ R R2 + R R3 ）+ R R1 ； R 13 = R R1 *（ R R2 + R R3 ） / （ R R1 + R R2 + R R3 ）； R 14 =（ R R1 * R R2 * R R3 ） / （ R R1 * R R2 + R R1 * R R3 + R R2 * R R3 ）； in, R R1 is the resistance of the sampling resistor R1, R R2 is the resistance of the sampling resistor R2, R R3 is the resistance of the sampling resistor R3, R 1 is the resistance value of the sampling resistor group when only the sampling resistor R1 is connected. R 2 is the resistance value of the sampling resistor group when only the sampling resistor R2 is connected. R 3 is the resistance value of the sampling resistor group when only the sampling resistor R3 is connected. R 4 is the resistance value of the sampling resistor group when only the sampling resistor R1 and the sampling resistor R2 are connected in series. R 5 is the resistance value of the sampling resistor group when only the sampling resistor R1 and the sampling resistor R3 are connected in series. R 6 is the resistance value of the sampling resistor group when only the sampling resistor R2 and the sampling resistor R3 are connected in series. R 7 is the resistance value of the sampling resistor group when three sampling resistors are connected in series. R 8 is the resistance value of the sampling resistor group when only the sampling resistor R1 and the sampling resistor R2 are connected in parallel. R 9 is the resistance value of the sampling resistor group when only the sampling resistor R1 and the sampling resistor R3 are connected in parallel. R 10 It is the resistance value of the sampling resistor group when only the sampling resistor R2 and the sampling resistor R3 are connected in parallel. R 11 It is the resistance value of the sampling resistor group when three sampling resistors are connected and the sampling resistors R1 and R2 are connected in parallel and then the sampling resistor R3 is connected in series. R 12 It is the resistance value of the sampling resistor group when three sampling resistors are connected and the sampling resistors R2 and R3 are connected in parallel and then connected in series with the sampling resistor R1. R 13 It is the resistance value of the sampling resistor group when three sampling resistors are connected and the sampling resistors R2 and R3 are connected in series and then the sampling resistor R1 is connected in parallel. R 14 It is the resistance value of the sampling resistor group when three sampling resistors are connected in parallel.

Citation Information

Patent Citations

Method for improving BMS discharge current sampling precision
CN113514688A
Wide-range impulse current measuring method and device
CN119165237A

Patent Information

AI Technical Summary

Abstract

Description

Patent Citations

Method for improving BMS discharge current sampling precision

Wide-range impulse current measuring method and device