A high-voltage current transformer error tracing device

Abstract

This invention relates to the field of measurement technology. The invention discloses a high-voltage current transformer error tracing device, comprising: a step-up transformer, a high-voltage current booster, and the secondary winding K2 terminal of a standard current transformer connected to the primary winding L1 terminal of the standard current transformer; the secondary winding K1 terminal and the primary winding L1 terminal of the standard current transformer connected to a transformer calibration module; the primary winding P1 terminal of the tested current transformer connected in series with the primary winding L2 terminal of the standard current transformer, the primary winding P2 terminal of the tested current transformer connected to the high-voltage current booster, the secondary winding S2 terminal of the tested current transformer grounded, and the secondary winding S1 and S2 terminals of the tested current transformer connected to the transformer calibration module. In this application, the voltage between the secondary and primary windings of the standard current transformer is zero, achieving the purpose of eliminating leakage current in the standard current transformer and ensuring the accuracy of current transformer tracing.

Description

Technical Field

[0001] This invention relates to the field of measurement technology, and in particular to an error tracing device for high-voltage current transformers. Background Technology

[0002] Traditional current transformer error verification is basically carried out under low voltage conditions, while current transformers operate under high voltage conditions. The detection method cannot reflect the true error of the current transformer under actual operating conditions. In order to verify the error of the current transformer under actual operating conditions, the national verification procedure JJG 1165-2019 "Three-phase combined current transformers" stipulates that the current transformer verification requires the application of the rated operating voltage. That is, during the verification, the standard current transformer and the current transformer under test must operate at the rated voltage to simulate the actual operating conditions.

[0003] The structure of a current transformer dictates the existence of parasitic capacitance and leakage reactance between its primary and secondary windings. The applied high voltage generates leakage current between the primary and secondary sides of the current transformer. Suppressing this leakage current presents two main challenges: First, the leakage current is typically in the microampere range, exhibiting nonlinear characteristics and easily affected by electromagnetic fields and noise interference, making accurate measurement and suppression difficult. Second, according to verification procedures, the measurement error introduced by the leakage current should not exceed 1 / 10 of the limit. Taking a 0.01S class standard current transformer as an example, its leakage current should be less than 1μA. Existing technologies struggle to detect and suppress weak leakage currents, and the cost and difficulty of suppression increase dramatically with higher voltage and accuracy levels, indicating a technological bottleneck in leakage current suppression. Due to the technical challenges in suppressing leakage current in current transformers, the traceability of high-voltage current transformers is currently still based on the verification under low voltage according to JJG313-2010 "Current Transformers for Measurement". This cannot guarantee the accuracy of current transformers under high voltage, which contradicts the requirements of JJG 1165-2019 "Three-phase Combined Transformers". In order to solve the traceability problem of current transformers under high voltage, researching error traceability methods for high-voltage current transformers is of great significance to changing the above situation. Summary of the Invention

[0004] In view of this, the present invention provides a high-voltage current transformer error tracing device.

[0005] Specifically, the following technical solutions are included:

[0006] This application provides a high-voltage current transformer error tracing device, comprising:

[0007] Boost converter, high-voltage current booster, standard current transformer TA0, current transformer under test TA x Current transformer verification module;

[0008] The secondary winding K2 terminal of the booster, the high-voltage current booster, and the standard current transformer TA0 are all connected to the primary winding L1 terminal of the standard current transformer TA0.

[0009] The secondary winding K1 terminal and the primary winding L1 terminal of the standard current transformer TA0 are connected to the transformer verification module.

[0010] The tested current transformer TA x The primary winding P1 terminal of the test current transformer is connected in series with the primary winding L2 terminal of the standard current transformer TA0. x The primary winding P2 terminal is connected to the high-voltage current booster, and the tested current transformer TA x The secondary winding S2 terminal is grounded, and the tested current transformer TA x The secondary winding S1 terminal, the tested current transformer TA x The secondary winding S2 terminal is connected to the current transformer verification module.

[0011] Preferably, the current transformer verification module includes a high-voltage submodule and a low-voltage submodule;

[0012] The high-voltage submodule is connected to the secondary winding K1 terminal of the standard current transformer TA0, the secondary winding K2 terminal of the standard current transformer TA0, and the primary winding L1 terminal of the standard current transformer TA0.

[0013] The low-voltage submodule and the tested current transformer TA x The secondary winding S1 terminal, the tested current transformer TA x The secondary winding S2 terminal is connected;

[0014] The high-voltage submodule and the low-voltage submodule are connected via optical fiber communication.

[0015] Preferably, the high-voltage submodule includes an analog-to-digital converter (A / D1), a microprocessor (CPU1), a communication module (EOC1), and a DC power supply.

[0016] The DC power supply is at a high voltage potential and is connected to the primary winding L1 terminal of the analog-to-digital converter A / D1, the microprocessor CPU1, the communication module EOC1, and the standard current transformer TA0, respectively.

[0017] The analog-to-digital converter A / D1 is connected to the secondary winding K2 terminal of the standard current transformer TA0 and the primary winding L1 terminal of the standard current transformer TA0.

[0018] The analog-to-digital converter A / D1 and the microprocessor CPU1 are connected in communication.

[0019] The communication module EOC1 and the low-voltage submodule are connected via optical fiber communication.

[0020] Preferably, the V of the DC power supply + The terminals are respectively connected to the analog-to-digital converter A / D1, the microprocessor CPU1, and the communication module EOC1. CC end;

[0021] The GND terminal of the DC power supply is connected to the GND terminal of the analog-to-digital converter A / D1, the microprocessor CPU1, the communication module EOC1, and the primary winding L1 terminal of the standard current transformer TA0.

[0022] The V of the analog-to-digital converter A / D1 IN The terminal of the analog-to-digital converter A / D1 is connected to the secondary winding K1 terminal of the standard current transformer TA0, and the COM terminal of the analog-to-digital converter A / D1 is connected to the secondary winding K2 terminal of the standard current transformer TA0.

[0023] Preferably, the high-voltage submodule includes a first synchronous clock module;

[0024] The V of the DC power supply + The V terminal is connected to the first synchronous clock module. CC end;

[0025] The GND terminal of the DC power supply is connected to the GND terminal of the first synchronous clock module.

[0026] The first synchronous clock module and the microprocessor CPU1 are connected in communication.

[0027] Preferably, the low-voltage submodule includes an analog-to-digital converter (A / D) 2, a microprocessor (CPU) 2, a communication module (EOC) 2, a display module, and a power supply;

[0028] The analog-to-digital converter A / D2 and the tested current transformer TA x The secondary winding S1 terminal, the tested current transformer TA x The secondary winding S2 terminal is connected;

[0029] The microprocessor CPU2 is communicatively connected to the analog-to-digital converter A / D2, the communication module EOC2, and the display module, respectively.

[0030] The communication module EOC2 and the high-voltage submodule are connected in communication.

[0031] The V+ terminal of the power supply is connected to the VCC terminal of the analog-to-digital converter A / D2, the microprocessor CPU2, and the communication module EOC2, respectively, and the GND terminal of the power supply is connected to the GND terminal of the analog-to-digital converter A / D2, the microprocessor CPU2, and the communication module EOC2.

[0032] Preferably, the low-voltage submodule further includes a second synchronization clock module;

[0033] The V+ terminal of the power supply is connected to the VCC terminal of the second synchronous clock module, and the GND terminal of the power supply is connected to the GND terminal of the second synchronous clock module.

[0034] The second synchronous clock module is communicatively connected to the microprocessor CPU2.

[0035] Preferably, the high-voltage submodule includes a communication module EOC1, and the low-voltage submodule includes a communication module EOC2, wherein the communication module EOC1 and the communication module EOC2 are connected by an optical fiber.

[0036] Preferably, a first resistor is provided between the secondary winding K1 terminal and the secondary winding K2 terminal of the standard current transformer TA0.

[0037] The tested current transformer TA x The secondary winding S1 terminal and the tested current transformer TA x A second resistor is provided between the S2 terminal of the secondary winding.

[0038] The beneficial effects of the technical solution provided by this invention include at least the following:

[0039] This application connects the secondary winding K2 terminal of the standard current transformer TA0 to the primary winding L1 terminal of the standard current transformer TA0, making the secondary and primary windings of the standard current transformer TA0 have the same potential, that is, the voltage between the secondary and primary windings of the standard current transformer TA0 is zero, thereby eliminating the leakage current of the standard current transformer. This allows the traceability of the high-voltage current transformer to be verified under high voltage, ensuring the accuracy of the current transformer traceability. Attached Figure Description

[0040] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0041] Figure 1This is a schematic diagram illustrating the leakage current generated by a current transformer under high voltage conditions in traditional tracing methods.

[0042] Figure 2 This is a schematic diagram illustrating the error tracing principle of a high-voltage current transformer according to an embodiment of the present invention.

[0043] The accompanying drawings have illustrated specific embodiments of the invention, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the invention in any way, but rather to illustrate the concept of the invention to those skilled in the art through reference to particular embodiments. Detailed Implementation

[0044] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0045] Before providing a further detailed description of the embodiments of the present invention, the directional terms used in the embodiments of the present invention, such as "upper part," "lower part," and "side part," are used to refer to... Figure 1 The orientation shown is a reference and does not limit the scope of protection of this invention.

[0046] To make the technical solutions and advantages of the present invention clearer, the embodiments of the present invention will be described in further detail below with reference to the accompanying drawings.

[0047] Current current transformer traceability circuits, such as Figure 1 As shown, when the standard current transformer TA0 and the tested current transformer TA x When operating under rated voltage to simulate actual operating conditions, an operating voltage U is applied between the primary and secondary windings. e Leakage current I will be generated at this time. X The leakage current superimposed on the secondary current I2 of the current transformer introduces additional errors into the high-voltage current measurement, leading to inaccurate high-voltage current measurements and affecting the accuracy of current transformer traceability. A key problem addressed by this invention is eliminating the leakage current I2 of the standard current transformer TA0 under high-voltage conditions. X . Figure 1 In the diagram, I1 represents the primary current of the current transformer, and Z represents the current load box.

[0048] This application provides a high-voltage current transformer error tracing device, the schematic diagram of which is shown below. Figure 2 As shown, it includes a step-up transformer, a high-voltage current booster, a standard current transformer TA0, and a current transformer under test TA. xThe transformer verification module is as follows: The secondary winding K2 terminal of the step-up transformer, high-voltage current booster, and standard current transformer TA0 are all connected to the primary winding L1 terminal of standard current transformer TA0; the secondary winding K1 terminal and the primary winding L1 terminal of standard current transformer TA0 are connected to the transformer verification module; the tested current transformer TA... x The primary winding P1 terminal of the tested current transformer is connected in series with the primary winding L2 terminal of the standard current transformer TA0. x The primary winding P2 terminal is connected to the high-voltage current booster, and the tested current transformer TA... x The secondary winding S2 terminal is grounded, and the tested current transformer TA x The secondary winding S1 terminal and the tested current transformer TA x The S2 terminal of the secondary winding is connected to the current transformer verification module.

[0049] This application connects the secondary winding K2 terminal of the standard current transformer TA0 to the primary winding L1 terminal of the standard current transformer TA0, making the secondary and primary windings of the standard current transformer TA0 have the same potential, that is, the voltage between the secondary and primary windings of the standard current transformer TA0 is zero, thereby eliminating the leakage current of the standard current transformer. This allows the traceability of the high-voltage current transformer to be verified under high voltage, ensuring the accuracy of the current transformer traceability.

[0050] The circuit in the current transformer verification module connected to the standard current transformer TA0 is under high voltage, and the circuit connected to the current transformer under test TA0 is under high voltage. x The connected circuit is under low voltage.

[0051] Preferably, the current transformer verification module includes a high-voltage submodule and a low-voltage submodule; the high-voltage submodule is connected to the secondary winding K1 terminal, the secondary winding K2 terminal, and the primary winding L1 terminal of the standard current transformer TA0; the low-voltage submodule is connected to the current transformer under test TA0. x The secondary winding S1 terminal and the tested current transformer TA x The secondary winding S2 terminal is connected; the high-voltage submodule and the low-voltage submodule are connected via optical fiber communication. The potential in the high-voltage submodule is high, and the potential in the low-voltage submodule is low, realizing the connection between the standard current transformer TA0 and the tested current transformer TA. x It operates under rated voltage to simulate actual operating conditions.

[0052] Preferably, the high-voltage submodule includes an analog-to-digital converter (A / D1), a microprocessor (CPU1), a communication module (EOC1), and a DC power supply. The DC power supply is at a high-voltage potential and is connected to the primary winding L1 terminal of the A / D1, CPU1, EOC1, and the standard current transformer TA0. The A / D1 is connected to the secondary winding K2 terminal and the primary winding L1 terminal of the standard current transformer TA0. The A / D1 and CPU1 are connected via communication. The EOC1 and the low-voltage submodule are connected via optical fiber communication. Specifically, the analog-to-digital converter (A / D1) and the microprocessor (CPU1) are connected via a data bus. The microprocessor (CPU1) and the communication module (EOC1) are connected via a data line. The A / D1 samples the secondary current of the standard current transformer TA0. The obtained sampling data of the secondary current of the standard current transformer TA0 is transmitted to the microprocessor (CPU1) via the data bus, then to the communication module (EOC1) via the data line, and finally to the low-voltage submodule via optical fiber. This data is then compared with the data of the tested current transformer TA0 obtained by the low-voltage submodule. x The secondary current sampling data were compared. Data communication between the high-voltage and low-voltage submodules was resolved through optical fiber physical isolation.

[0053] The high-voltage potential is designed as the reference potential for the high-voltage submodule measurement circuit. The DC power supply is in a high-voltage state, solving the isolation problem between the high-voltage and zero-potential power supplies. Since the energy extraction scheme for the high-voltage potential power supply is outside the scope of this application, it will not be described here.

[0054] Preferably, the V of the DC power supply + The terminals are respectively connected to the analog-to-digital converter A / D1, the microprocessor CPU1, and the communication module EOC1 via V. CC The GND terminal of the DC power supply is connected to the GND terminal of the analog-to-digital converter A / D1, the microprocessor CPU1, the communication module EOC1, and the primary winding L1 terminal of the standard current transformer TA0; the V... IN The terminal of the analog-to-digital converter A / D1 is connected to the secondary winding terminal K1 of the standard current transformer TA0, and the terminal of the analog-to-digital converter A / D1 is connected to the secondary winding terminal K2 of the standard current transformer TA0.

[0055] Preferably, the high-voltage submodule includes a first synchronous clock module; the DC power supply V + V, connected to the first synchronous clock module CCThe DC power supply's GND terminal is connected to the GND terminal of the first synchronous clock module; the first synchronous clock module is communicatively connected to the microprocessor CPU1. The first synchronous clock module uses BeiDou satellite timing and sends sampling signals and sampling times to the analog-to-digital converter A / D1 via the microprocessor CPU1 to achieve sampling of the high-voltage submodule's current sampling circuit.

[0056] Preferably, the low-voltage submodule includes an analog-to-digital converter (A / D) 2, a microprocessor (CPU) 2, a communication module (EOC) 2, a display module, and a power supply; the A / D converter 2 and the tested current transformer (TA) x The secondary winding S1 terminal and the tested current transformer TA x The secondary winding S2 terminal is connected; the microprocessor CPU2 is connected to the analog-to-digital converter A / D2, the communication module EOC2, and the display module respectively; the communication module EOC2 is connected to the high-voltage submodule; the power supply V + The terminals are respectively connected to the VCC terminals of analog-to-digital converter A / D2, microprocessor CPU2, and communication module EOC2. The GND terminal of the power supply is connected to the GND terminals of analog-to-digital converter A / D2, microprocessor CPU2, and communication module EOC2. The power supply is 220V to ensure the voltage of the tested current transformer TA. x The testing requirements.

[0057] Furthermore, in this embodiment, the power supply in the low-voltage submodule is connected to 220V AC power, and outputs DC voltage through an internal rectifier circuit, with the GND terminal of the power supply grounded.

[0058] Furthermore, in this embodiment, the DC power supply in the high-voltage submodule is a battery, and the GND terminal of the DC power supply is connected to the output terminal of the boost converter. That is, the reference voltage of the DC power supply is the output voltage of the boost converter, and the V of the DC power supply... + The output voltage is the sum of the output voltage of the boost converter and the voltage of the DC power supply itself.

[0059] like Figure 2 As shown, the low-voltage submodule also includes a second synchronous clock module; the V+ terminal of the power supply is connected to the VCC terminal of the second synchronous clock module, and the GND terminal of the power supply is connected to the GND terminal of the second synchronous clock module; the second synchronous clock module is communicatively connected to the microprocessor CPU2. The second synchronous clock module uses BeiDou satellite timing and sends sampling signals and sampling times to the analog-to-digital converter A / D2 via the microprocessor CPU2 to realize the sampling of the current sampling circuit of the low-voltage submodule.

[0060] Furthermore, both the first and second synchronization clock modules use BeiDou satellite timing, enabling synchronous sampling between the two synchronization clock modules.

[0061] Preferably, the high-voltage submodule includes a communication module EOC1, and the low-voltage submodule includes a communication module EOC2. Communication modules EOC1 and EOC2 are connected via optical fiber. The first and second synchronization clock modules simultaneously receive timing signals from the BeiDou satellite, sending synchronization sampling signals and sampling times to analog-to-digital converters A / D1 and A / D2 to achieve synchronous sampling. The sampling current data is then marked with a time stamp. The sampling data from A / D1 is transmitted to the microprocessor CPU2, which is in a zero-potential state, via microprocessor CPU2, communication module EOC1, optical fiber, and communication module EOC2. The optical fiber addresses the isolation issue between high-voltage and zero-potential data transmission.

[0062] Specifically, the secondary current sampling data of the standard current transformer TA0 obtained by the analog-to-digital converter A / D1 is transmitted to the microprocessor CPU2 via optical fiber. The microprocessor CPU2 compares the secondary current sampling data of the standard current transformer TA0 obtained by synchronous sampling with that of the tested current transformer TA. x Secondary current sampling data is used to calculate the current transformer current transformer (TA) of the tested current transformer based on Discrete Fourier Transform (DFT). x The error is calculated, and the ratio difference and phase difference are displayed on the display module. Specifically, the time-stamped analog-to-digital converter A / D1 samples the current data, which is transmitted to the microprocessor CPU2 via optical fiber. The microprocessor CPU2 directly compares the current data sampled by the analog-to-digital converter A / D1 and A / D2 simultaneously, calculates the ratio difference and phase difference using Discrete Fourier Transform (DFT), and displays them on the display module.

[0063] Preferably, a first resistor R1 is provided between the secondary winding K1 terminal and the secondary winding K2 terminal of the standard current transformer TA0. The first resistor R1 is connected to the secondary winding K1 terminal and the secondary winding K2 terminal of the standard current transformer TA0 and is connected in parallel with the secondary winding of the standard current transformer TA0.

[0064] Preferably, the tested current transformer TA x The secondary winding S1 terminal and the tested current transformer TA x A second resistor R2 is provided between the secondary winding S2 terminals of the current transformer under test (TAx) and the secondary winding S2 terminals of the current transformer under test (TAx). The second resistor R2 is connected to the secondary winding S1 terminal of the current transformer under test (TAx) and the secondary winding S2 terminal of the current transformer under test (TAx). x The secondary windings are connected in parallel.

[0065] Communication modules EOC1 and EOC2 are photoelectric conversion communication modules.

[0066] This application, based on the principle of high-voltage leakage current generation, employs an equipotential method between the primary and secondary windings of a standard current transformer TA0 to achieve zero potential difference between them, thus eliminating leakage current. In this setup, the standard current transformer TA0 requires no modifications for leakage current suppression; simply using the equipotential method for the primary and secondary windings of a traditional standard current transformer TA0 is sufficient for error tracing under high voltage, effectively saving on the cost of shielding and insulation modifications to the standard current transformer TA0. This device is highly adaptable, unaffected by increases in the rated voltage and accuracy class of the standard current transformer TA0, and can be applied to the value tracing of current transformers of 0.05S class and above under high voltage. It boasts advantages such as simplicity, economy, scientific rigor, practicality, high operability, and low cost.

[0067] As a specific embodiment, it specifically includes:

[0068] Step 1: Connect the K2 terminal of the secondary winding of the standard current transformer TA0 to the L1 terminal of the primary winding to make the primary and secondary windings of the standard current transformer TA0 have the same potential. The potential difference between the primary and secondary windings of the standard current transformer is zero, thereby eliminating leakage current. The analog-to-digital converter A / D1 then samples the secondary current of the standard current transformer at a high potential.

[0069] Step 2: Test current transformer TA x Primary winding P1 and standard current transformer TA x The primary winding L2 is connected in series, and the tested current transformer TA x With the secondary winding S2 grounded, the analog-to-digital converter A / D2 achieves the current transformer TA under test at zero potential. x Secondary current sampling;

[0070] Step 3: The DC power supply is at a high voltage potential, and its GND terminal is connected to the L1 terminal of the primary winding of the current transformer. + V terminates the analog-to-digital converter A / D1, microprocessor CPU1, communication module EOC1, and the first synchronous clock module. CC end;

[0071] The power supply input is AC 220V, and its DC output is V. + The terminal is connected to the VCC terminal of the analog-to-digital converter A / D2, the microprocessor CPU2, the communication module EOC2, and the second synchronous clock module, respectively, and its GND terminal is connected to the GND terminal of the analog-to-digital converter A / D2, the microprocessor CPU2, the communication module EOC2, and the second synchronous clock module.

[0072] Step 4: Connect one end of the optical fiber to communication module EOC1 and the other end to communication module EOC2. Solve the problem of high voltage and zero potential data communication through physical isolation of the optical fiber.

[0073] Step 5: The first and second synchronous clock modules use BeiDou satellite timing to send synchronous sampling signals and sampling times to analog-to-digital converters A / D1 and A / D2, thereby achieving synchronous sampling of the two current sampling circuits in the high-voltage submodule and the low-voltage submodule.

[0074] Step 6: The analog-to-digital converter (A / D1) samples the current data, which is then transmitted to the microprocessor CPU2 via optical fiber. The microprocessor CPU2 compares the secondary current sampling data of the standard current transformer TA0 obtained through synchronous sampling with that of the tested current transformer TA. x Secondary current sampling data is used to calculate the current transformer current transformer (TA) of the tested current transformer based on Discrete Fourier Transform (DFT). x The error is calculated and the ratio difference and phase difference are displayed on the display module.

[0075] In this invention, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance. The term "a plurality" refers to two or more unless otherwise expressly defined.

[0076] Other embodiments of the invention will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. The invention is intended to cover any variations, uses, or adaptations of the invention that follow the general principles of the invention and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only.

[0077] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A high-voltage current transformer error tracing device, characterized in that, include: Boost converter, high-voltage current booster, standard current transformer TA0, current transformer under test TA x Current transformer verification module; The secondary winding K2 terminal of the booster, the high-voltage current booster, and the standard current transformer TA0 are all connected to the primary winding L1 terminal of the standard current transformer TA0. The secondary winding K1 terminal and the primary winding L1 terminal of the standard current transformer TA0 are connected to the transformer verification module. The tested current transformer TA x The primary winding P1 terminal of the test current transformer is connected in series with the primary winding L2 terminal of the standard current transformer TA0. x The primary winding P2 terminal is connected to the high-voltage current booster, and the tested current transformer TA x The secondary winding S2 terminal is grounded, and the tested current transformer TA x The secondary winding S1 terminal, the tested current transformer TA x The secondary winding S2 terminal is connected to the current transformer verification module.

2. The high-voltage current transformer error tracing device according to claim 1, characterized in that, The current transformer verification module includes a high-voltage submodule and a low-voltage submodule; The high-voltage submodule is connected to the secondary winding K1 terminal of the standard current transformer TA0, the secondary winding K2 terminal of the standard current transformer TA0, and the primary winding L1 terminal of the standard current transformer TA0. The low-voltage submodule and the tested current transformer TA x The secondary winding S1 terminal, the tested current transformer TA x The secondary winding S2 terminal is connected; The high-voltage submodule and the low-voltage submodule are connected via optical fiber communication.

3. The high-voltage current transformer error tracing device according to claim 2, characterized in that, The high-voltage submodule includes an analog-to-digital converter (A / D1), a microprocessor (CPU1), a communication module (EOC1), and a DC power supply. The DC power supply is at a high voltage potential and is connected to the primary winding L1 terminal of the analog-to-digital converter A / D1, the microprocessor CPU1, the communication module EOC1, and the standard current transformer TA0, respectively. The analog-to-digital converter A / D1 is connected to the secondary winding K2 terminal of the standard current transformer TA0 and the primary winding L1 terminal of the standard current transformer TA0. The analog-to-digital converter A / D1 and the microprocessor CPU1 are connected in communication. The communication module EOC1 and the low-voltage submodule are connected via optical fiber communication.

4. The high-voltage current transformer error tracing device according to claim 3, characterized in that, The V of the DC power supply + The terminals are respectively connected to the analog-to-digital converter A / D1, the microprocessor CPU1, and the communication module EOC1. CC end; The GND terminal of the DC power supply is connected to the GND terminal of the analog-to-digital converter A / D1, the microprocessor CPU1, the communication module EOC1, and the primary winding L1 terminal of the standard current transformer TA0. The V of the analog-to-digital converter A / D1 IN The terminal of the analog-to-digital converter A / D1 is connected to the secondary winding K1 terminal of the standard current transformer TA0, and the COM terminal of the analog-to-digital converter A / D1 is connected to the secondary winding K2 terminal of the standard current transformer TA0.

5. The high-voltage current transformer error tracing device according to claim 3, characterized in that, The high-voltage submodule includes a first synchronous clock module; The V of the DC power supply + The V terminal is connected to the first synchronous clock module. CC end; The GND terminal of the DC power supply is connected to the GND terminal of the first synchronous clock module. The first synchronous clock module and the microprocessor CPU1 are connected in communication.

6. The high-voltage current transformer error tracing device according to claim 2, characterized in that, The low-voltage submodule includes an analog-to-digital converter (A / D) 2, a microprocessor (CPU) 2, a communication module (EOC) 2, a display module, and a power supply; The analog-to-digital converter A / D2 and the tested current transformer TA x The secondary winding S1 terminal, the tested current transformer TA x The secondary winding S2 terminal is connected; The microprocessor CPU2 is communicatively connected to the analog-to-digital converter A / D2, the communication module EOC2, and the display module, respectively. The communication module EOC2 and the high-voltage submodule are connected in communication. The V+ terminal of the power supply is connected to the VCC terminal of the analog-to-digital converter A / D2, the microprocessor CPU2, and the communication module EOC2, respectively, and the GND terminal of the power supply is connected to the GND terminal of the analog-to-digital converter A / D2, the microprocessor CPU2, and the communication module EOC2.

7. The high-voltage current transformer error tracing device according to claim 6, characterized in that, The low-voltage submodule also includes a second synchronization clock module; The V+ terminal of the power supply is connected to the VCC terminal of the second synchronous clock module, and the GND terminal of the power supply is connected to the GND terminal of the second synchronous clock module. The second synchronous clock module is communicatively connected to the microprocessor CPU2.

8. The high-voltage current transformer error tracing device according to claim 2, characterized in that, The high-voltage submodule includes a first synchronous clock module, and the low-voltage submodule further includes a second synchronous clock module; The first synchronization clock module and the second synchronization clock module use BeiDou satellite timing.

9. A high-voltage current transformer error tracing device according to claim 2, characterized in that, The high-voltage submodule includes a communication module EOC1, and the low-voltage submodule includes a communication module EOC2. The communication modules EOC1 and EOC2 are connected by optical fiber.

10. A high-voltage current transformer error tracing device according to claim 1, characterized in that, A first resistor is provided between the secondary winding K1 terminal and the secondary winding K2 terminal of the standard current transformer TA0. The tested current transformer TA x The secondary winding S1 terminal and the tested current transformer TA x A second resistor is provided between the S2 terminal of the secondary winding.

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