Method and system for accessing data parameters of three self-inertial measurement units
By performing a dual checksum loop overlay storage algorithm during the access process of the various parameters of the three self-inertia groups, the problem of errors in the various parameters of the various parameters is solved, and the data is high accuracy and reliability are achieved, ensuring system performance and task success rate.
Patent Information
- Application Number
- CN202411655862.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-19
- Publication Date
- 2025-03-07
AI Technical Summary
The errors in the various parameter data generated by the three self-inertia groups during the self-calibration process will seriously reduce the performance of the inertia group and even cause task failure. The prior art is difficult to ensure the safety and reliability of the access process of various parameters.
By performing double checks during the access process of various parameters, generating and comparing algebraic sum and CRC checksum, a loop overlay storage algorithm is designed, and the latest various parameters data is read first to ensure the accuracy and reliability of the data.
It effectively avoids the provision of incorrect parameter information, ensures the accuracy and reliability of the data, and ensures the performance and task success rate of the three self-inertia groups.
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of data access, and in particular to a method and system for accessing parameters of a three-inertia group. Background Art
[0002] The three-inertial guidance system has the functions of self-detection, self-aiming, and self-calibration, which meets the requirements of weapon systems that do not require disassembly or maintenance, and has become the mainstream of missile weapon systems. At present, the three-inertial guidance system has been widely used in aerospace, aviation, weapons, and other ground-to-ground missile weapon systems and positioning and orientation devices.
[0003] Each time the three-inertial group is self-calibrated, new parameters will be generated for compensation of system errors. Data errors will seriously reduce the performance of the inertial group and even cause mission failure, so the safety and reliability of the parameters are very high. In order to achieve the safety and reliability of the access process of the parameters, the present invention performs double verification on the data during the access process of the parameters, and compares the two groups of algebraic sums generated before and after with the CRC checksum to ensure the accuracy of the data; an overwriting storage algorithm is designed. After storing 6 groups of parameters, the subsequent acquired data sequentially overwrites the stored historical data, so as to achieve priority reading of the latest stored parameters and meet the working requirements of the weapon system. Summary of the invention
[0004] In order to solve the above problems existing in the prior art, the present invention provides a method for accessing parameters of a three-inertia group.
[0005] The present invention is achieved through the following technical solutions:
[0006] A method for accessing parameters of a three-inertia group, characterized by comprising the following steps:
[0007] S1, obtaining various parameter data of each group of three self-inertia groups, and converting the parameter values into 16 bits to obtain 16-bit unsigned data 1 of the parameter values;
[0008] S2, adding the 16-bit unsigned data 1, calculating the algebraic sum of the 16-bit unsigned data 1, and taking the lower 32 bits of the algebraic sum as the algebraic check value 1 of the parameter value;
[0009] S3, combining the algebraic sum and the 16-bit unsigned data 1 into an array 1, and calculating a CRC checksum 1 of the array 1;
[0010] S4, combining the 16-bit unsigned data 1, the algebraic check value 1, and the CRC checksum 1 into an array 2, and storing the array 2 in a memory in a cyclic covering manner; wherein the cyclic covering manner is:
[0011] Each group of the array 2 is sequentially stored in the fixed address 1 of the first page to the sixth page set in the memory, and the array 2 is subsequently sequentially stored in the fixed address 1 overwritten;
[0012] The address information of the array 2 is stored in three fixed addresses 2 of the 7th page set in the memory respectively, and the address information of the array 2 is subsequently stored in the fixed addresses 2;
[0013] S4.1, before storing data, first read the address information stored in page 7, and use X to represent the value obtained by summing the address information and 1;
[0014] S4.2, determine whether X is greater than 6;
[0015] If it is less than or equal to 6, the array 2 is stored in the Xth page, and its address information is stored in the 7th page;
[0016] If it is greater than 6, A is used to represent the difference between X and 6, the current array 2 is stored in page A, and its address information is stored in page 7;
[0017] S5, read the address information stored corresponding to the three fixed addresses 2 and perform consistency judgment; if the consistency judgment is passed, the address information stored in the fixed address 2 is valid, and then read the corresponding array 2 according to the address information stored in the fixed address 2; if the consistency judgment is not passed, end the program;
[0018] S6, decomposing the read array 2 into 16-bit unsigned data 2, algebraic check value 2, and CRC checksum 2, repeating the S2-S3 process for the 16-bit unsigned data 2 to generate algebraic check value 3 and CRC checksum 3;
[0019] S7, compare the algebraic check value 3 and the CRC checksum 3 with the algebraic check value 2 and the CRC checksum 2 respectively; if the comparison results are the same, the read array 2 is valid, and the 16-bit unsigned data 2 is pushed to the host computer; if the comparison results are not the same, the reading is invalid, and C is used to represent the difference of the currently read address information minus 1;
[0020] S8, determine whether C is greater than 0. If it is greater than 0, read the parameter data of the address information C and repeat the above S5-S7 process; if it is equal to 0, end the program.
[0021] Furthermore, the present invention also provides a system for implementing a method for accessing various parameters of a three-inertia group, comprising a processor, a flash memory 1 and a flash memory 2, wherein the flash memory 1 is used to store all programs, the flash memory 2 is used to store all data, and the processor executes the program to implement the method for accessing various parameters of a three-inertia group.
[0022] Beneficial effects of the present invention:
[0023] 1. The present invention performs double verification on the parameters during the storage and access process, and compares the two sets of double verification values generated before and after the storage and access process to avoid providing erroneous parameter information to the host computer system, thereby ensuring the accuracy and reliability of the data.
[0024] 2. The present invention backs up and stores three groups of address information for storing data. When reading data, the three groups of addresses are subjected to consistency judgment. Through the consistency judgment, the address information effectively reads parameters, thereby ensuring data reliability from the entry of reading data.
[0025] 3. The present invention designs an overlay storage algorithm to store the latest 6 groups of parameter information into the memory, and gives priority to reading the latest stored group of parameter information, and reads the first 5 groups of parameter information stored in sequence as needed, so that the latest acquired parameter information is read first. DETAILED DESCRIPTION
[0026] The present invention is described in detail below in conjunction with specific implementation modes.
[0027] A method for accessing parameters of three self-inertia groups comprises the following steps:
[0028] S1, obtaining various parameters of each set of three self-inertia groups, converting the parameter values into 16 bits, and obtaining 16-bit unsigned data of the parameter values;
[0029] Since the various parameters contain 43 items in total, including 33 64-bit floating-point numbers, 1 64-bit unsigned number, 5 32-bit unsigned numbers, and 4 16-bit unsigned numbers, the various parameters need to be converted to 16 bits.
[0030] S2, adding the 16-bit unsigned data to calculate the algebraic sum of the 16-bit unsigned data, and taking the lower 32 bits of the algebraic sum as an algebraic check value 1 as a first check value;
[0031] S3, combining the algebraic sum and the 16-bit unsigned data into an array 1, and calculating a CRC checksum 1 of the array 1 as a second checksum value;
[0032] S4, combining the 16-bit unsigned data 1, the algebraic check value 1, and the CRC checksum 1 into an array 2;
[0033] Before data storage, the memory is set accordingly, and the continuous addresses from the first page to the front of the sixth page of the 16th storage module are set as fixed address 1 for storing various parameters, and the continuous first three addresses of the seventh page are set as fixed address 2 for storing address information;
[0034] S4.,1, first read the address information stored in page 7, and use X to represent the value obtained by summing the address information and 1;
[0035] S4.2, determine whether X is greater than 6;
[0036] If it is less than or equal to 6, store the current array 1 in the fixed address 1 of the Xth page, and overwrite the data stored in the fixed address 1; store its address information in the fixed address 2 of the 7th page, and overwrite the data stored in the address 2.
[0037] If it is greater than 6, A is used to represent the difference of X minus 6, and the current array 1 is stored in the fixed address 1 of the Ath page, and the data stored in the fixed address 1 is overwritten; its address information is stored in the fixed address 2 of the 7th page, and the data stored in the fixed address 2 is overwritten;
[0038] S5, read the address information stored corresponding to the three fixed addresses 2 and perform consistency judgment; if the consistency judgment is passed, the address information stored in the fixed address 2 is valid, and then read the corresponding array 2 according to the address information stored in the fixed address 2; if the consistency judgment is not passed, end the program;
[0039] S6, decomposing the read array 2 into 16-bit unsigned data 2, algebraic check value 2, and CRC checksum 2, repeating the S2-S3 process for the 16-bit unsigned data 2 to generate algebraic check value 3 and CRC checksum 3;
[0040] S7, compare the algebraic check value 3 and the CRC checksum 3 with the algebraic check value 2 and the CRC checksum 2 respectively; if the comparison results are the same, the read array 2 is valid, and the 16-bit unsigned data 2 is pushed to the host computer; if the comparison results are not the same, the reading is invalid, and C is used to represent the difference of the currently read address information minus 1;
[0041] S8, determine whether C is greater than 0. If it is greater than 0, read the parameter data of the address information C and repeat the above S5-S7 process; if it is equal to 0, end the program.
[0042] A storage and access system for parameters of three self-inertia groups comprises a processor and a flash memory 1 and a flash memory 2. The flash memory 1 stores a program. The processor executes the program stored in the flash memory 1 to implement the following steps recorded in the present invention: obtaining parameters of each group of three self-inertia groups and generating a double check value; storing the parameter information and the double check value together, storing three copies of address information as backup, reading the three stored address information and performing consistency judgment, reading the parameter information according to the valid address information, generating a new double check value and comparing it with the above double check value, and pushing the parameter information to a host computer through the comparison; if the comparison results are different, reading the parameter information corresponding to the previous group of address information, repeating the above reading process until the address information is empty, and terminating the program.
[0043] The above contents are further detailed descriptions of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions or substitutions can be made without departing from the concept of the present invention, which should be regarded as falling within the protection scope of the present invention.
Claims
1. A method for accessing the parameters of a three-inertia group, characterized in that The steps include: S1, obtaining various parameter data of each group of three self-inertia groups, and converting the parameter values into 16 bits to obtain 16-bit unsigned data 1 of the parameter values; S2, adding the 16-bit unsigned data 1, calculating the algebraic sum of the 16-bit unsigned data 1, and taking the lower 32 bits of the algebraic sum as the algebraic check value 1 of the parameter value; S3, combining the algebraic sum and the 16-bit unsigned data 1 into an array 1, and calculating a CRC checksum 1 of the array 1; S4, combining the 16-bit unsigned data 1, the algebraic check value 1, and the CRC checksum 1 into an array 2, and storing the array 2 in a memory in a cyclic covering manner; wherein the cyclic covering manner is: Each group of the array 2 is sequentially stored in the fixed address 1 of the first page to the sixth page set in the memory, and the array 2 is subsequently sequentially stored in the fixed address 1 overwritten; The address information of the array 2 is stored in three fixed addresses 2 of the 7th page set in the memory respectively, and the address information of the array 2 is subsequently stored in the fixed addresses 2; S4.1, before storing data, first read the address information stored in page 7, and use X to represent the value obtained by summing the address information and 1; S4.2, determine whether X is greater than 6; If it is less than or equal to 6, the array 2 is stored in the Xth page, and its address information is stored in the 7th page; If it is greater than 6, A is used to represent the difference between X and 6, the current array 2 is stored in page A, and its address information is stored in page 7; S5, read the address information stored corresponding to the three fixed addresses 2 and perform consistency judgment; if the consistency judgment is passed, the address information stored in the fixed address 2 is valid, and then read the corresponding array 2 according to the address information stored in the fixed address 2; if the consistency judgment is not passed, end the program; S6, decomposing the read array 2 into 16-bit unsigned data 2, algebraic check value 2, and CRC checksum 2, repeating the S2-S3 process for the 16-bit unsigned data 2 to generate algebraic check value 3 and CRC checksum 3; S7, compare the algebraic check value 3 and the CRC checksum 3 with the algebraic check value 2 and the CRC checksum 2 respectively; if the comparison results are the same, the read array 2 is valid, and the 16-bit unsigned data 2 is pushed to the host computer; if the comparison results are not the same, the reading is invalid, and C is used to represent the difference of the currently read address information minus 1; S8, determine whether C is greater than 0. If it is greater than 0, read the parameter data of the address information C and repeat the above S5-S7 process; if it is equal to 0, end the program.
2. A system for implementing the method of claim 1, comprising a processor, a flash memory 1 and a flash memory 2, wherein: The flash memory 1 is used to store all programs, the flash memory 2 is used to store all data, and the processor executes the programs to implement the method described in claim 1 .