Parameter transfer method, device, electronic device and storage medium

Abstract

The present invention discloses a parameter passing method, device, electronic device and storage medium, belonging to the field of computer technology. It includes: obtaining a first parameter for heterogeneous function transmission, the operation architecture of the heterogeneous function is different from the native processor architecture; translating the heterogeneous function into a native function with the same operation architecture as the native processor architecture; based on the first parameter and the parameter passing rule of the native processor architecture, passing a second parameter to the native function, so that the native function runs based on the second parameter. The parameter passing rule adapted to the native processor architecture can be adopted to pass the second parameter required for operation to the native function. Since the second parameter is passed using the parameter passing rule of the native processor architecture, the native function can correctly receive the required parameter, so that the parameter can be correctly passed when the heterogeneous function is running, which helps to improve the stability of the program and system when the heterogeneous function is running.

Description

Technical Field

[0001] The present invention belongs to the field of computer technology, and in particular relates to a parameter transfer method, device, electronic equipment and storage medium. Background Art

[0002] With the continuous development of IT technology, a variety of processor architectures have been designed to cope with different usage scenarios. When developing programs, the programs can usually only be adapted to specific processor structures. Programs developed for specific processor architectures often cannot run on devices with other processor architectures.

[0003] In the related art, in order to enable the processor architecture to run programs containing heterogeneous functions, one method is to install a virtual system adapted to the target program on the local machine, and then run the target program through the virtual system. Another method is to convert the heterogeneous functions in the target program into executable functions for running.

[0004] However, no matter which of the above methods is used, the target program can only pass parameters to the loaded and called functions using the parameter passing method required by heterogeneous functions. Due to differences in processor architecture, these parameters often go wrong during the passing process, resulting in the program and system being unable to run normally and stably. Summary of the invention

[0005] The purpose of the embodiments of the present invention is to provide a parameter transfer method, device, electronic device and storage medium, which can solve the problem in the prior art that heterogeneous function parameter transfer is prone to errors, resulting in the inability of programs and systems to run normally and stably.

[0006] In a first aspect, an embodiment of the present invention provides a parameter transfer method, the method comprising:

[0007] Obtaining a first parameter passed to a heterogeneous function, wherein the heterogeneous function operates on a different architecture than a native processor architecture;

[0008] Translating the heterogeneous function into a native function whose running architecture is the same as the native processor architecture;

[0009] Based on the first parameter and a parameter passing rule of the native processor architecture, a second parameter is passed to the native function so that the native function runs based on the second parameter.

[0010] Optionally, passing the second parameter to the native function comprises:

[0011] Determine a parameter storage address corresponding to the parameter type of the first parameter from the parameter passing rule of the local processor architecture;

[0012] The second parameter is written into the storage space corresponding to the parameter storage address.

[0013] Optionally, the passing a second parameter to the native function based on the first parameter and a parameter passing rule of the native processor architecture comprises:

[0014] Determine a pointer storage address corresponding to the parameter type of the first parameter from the parameter passing rule of the local processor architecture;

[0015] The memory address of the second parameter is written into the storage space corresponding to the pointer storage address.

[0016] Optionally, before passing the second parameter to the native function, the method further includes:

[0017] The first parameter is converted based on the local machine word length to obtain the second parameter.

[0018] Optionally, converting the first parameter based on the local machine word length to obtain the second parameter includes:

[0019] When the local machine word length is greater than the running machine word length of the heterogeneous function, based on the parameter type of the first parameter, performing binary bit expansion on the first parameter to obtain the second parameter;

[0020] When the native machine word length is smaller than the running machine word length of the heterogeneous function, binary bit truncation is performed on the first parameter based on the parameter type to obtain the second parameter.

[0021] Optionally, the performing binary bit expansion on the first parameter based on the parameter type of the first parameter to obtain the second parameter includes:

[0022] When the first parameter is a signed number, based on the parameter type of the first parameter, performing binary bit expansion on the first parameter to obtain the second parameter;

[0023] When the first parameter is an unsigned number, the first parameter is determined to be the second parameter.

[0024] Optionally, converting the first parameter based on the local machine word length to obtain the second parameter includes:

[0025] In the case where the first parameter is of a composite type, converting each first sub-parameter in the first parameter based on the local machine word length to obtain the second parameter consisting of a plurality of second sub-parameters;

[0026] The passing the second parameter to the native function comprises:

[0027] Determining a parameter passing rule corresponding to the composite type based on an application binary interface of the native processor architecture;

[0028] Based on the parameter passing rule corresponding to the composite type, the second parameter consisting of the multiple second sub-parameters is passed to the native function.

[0029] Optionally, the method further comprises:

[0030] Determine the function entry address of the function to be loaded of the target program;

[0031] In the case where the function entry address does not match the preset entry address, determining that the function to be loaded is a heterogeneous function;

[0032] When the function entry address matches the preset entry address, the function to be loaded is called.

[0033] In a second aspect, an embodiment of the present invention provides a parameter transfer device, the device comprising:

[0034] An acquisition module, configured to acquire a first parameter passed to a heterogeneous function, wherein the operation architecture of the heterogeneous function is different from the local processor architecture;

[0035] A translation module, used for translating the heterogeneous function into a native function whose running architecture is the same as that of the native processor;

[0036] The parameter passing module is used to pass a second parameter to the native function based on the first parameter and the parameter passing rule of the native processor architecture, so that the native function runs based on the second parameter.

[0037] Optionally, the parameter transmission module includes:

[0038] A parameter storage address submodule, used to determine a parameter storage address corresponding to the parameter type of the first parameter from the parameter transfer rule of the local processor architecture;

[0039] The first storage submodule is configured to write the second parameter into a storage space corresponding to the parameter storage address.

[0040] Optionally, the parameter transmission module includes:

[0041] A pointer storage address submodule, used to determine a pointer storage address corresponding to the parameter type of the first parameter from the parameter transfer rule of the local processor architecture;

[0042] A second storage submodule is used to write the memory address of the second parameter into the storage space corresponding to the pointer storage address.

[0043] Optionally, the device further comprises a parameter conversion module, configured to convert the first parameter based on the local machine word length to obtain the second parameter.

[0044] Optionally, the parameter conversion module includes:

[0045] A first conversion submodule is used for performing binary bit expansion on the first parameter based on the parameter type of the first parameter to obtain the second parameter when the local machine word length is greater than the running machine word length of the heterogeneous function;

[0046] The second conversion submodule is used to perform binary bit truncation on the first parameter based on the parameter type to obtain the second parameter when the local machine word length is smaller than the running machine word length of the heterogeneous function.

[0047] Optionally, the first conversion submodule includes:

[0048] a signed conversion unit, configured to, when the first parameter is a signed number, perform binary bit expansion on the first parameter based on a parameter type of the first parameter to obtain the second parameter;

[0049] An unsigned conversion unit is used to determine that the first parameter is the second parameter when the first parameter is an unsigned number.

[0050] Optionally, the parameter conversion module is further configured to, when the first parameter is of a composite type, convert each first sub-parameter in the first parameter based on the local machine word length to obtain the second parameter composed of a plurality of second sub-parameters;

[0051] The parameter transmission module comprises:

[0052] A rule determination submodule, used for determining a parameter transfer rule corresponding to the composite type based on an application binary interface of the native processor architecture;

[0053] The composite type transfer submodule is used to transfer the second parameter consisting of the multiple second sub-parameters to the native function based on the parameter transfer rule corresponding to the composite type.

[0054] Optionally, the device further comprises:

[0055] An entry address module is used to determine the function entry address of the function to be loaded in the target program;

[0056] A first matching module, configured to determine that the function to be loaded is a heterogeneous function when the function entry address does not match the preset entry address;

[0057] The second matching module is used to call the function to be loaded when the function entry address matches the preset entry address.

[0058] In a third aspect, an embodiment of the present invention provides an electronic device, which includes a processor and a memory, wherein the memory stores programs or instructions that can be run on the processor, and the program or instructions implement the above-mentioned parameter transfer method when executed by the processor.

[0059] In a fourth aspect, an embodiment of the present invention provides a readable storage medium, on which a program or instruction is stored, and the program or instruction implements the above-mentioned parameter transfer method when executed by a processor.

[0060] In an embodiment of the present invention, a parameter passing method is provided, including obtaining a first parameter passed for a heterogeneous function, the operating architecture of the heterogeneous function being different from the native processor architecture; translating the heterogeneous function into a native function having the same operating architecture as the native processor architecture; and passing a second parameter to the native function based on the first parameter and the parameter passing rule of the native processor architecture, so that the native function runs based on the second parameter. When a target program containing a heterogeneous function is running, the heterogeneous function can be translated into a native function, and according to the first parameter required by the heterogeneous function, the parameter passing rule adapted to the native processor architecture is adopted to pass the second parameter required for running to the native function. Since the second parameter is passed using the parameter passing rule of the native processor architecture, the native function can correctly receive the required parameter, so that the parameter can be correctly passed when the heterogeneous function is running, which helps to improve the stability of the program and the system when the heterogeneous function is running. BRIEF DESCRIPTION OF THE DRAWINGS

[0061] Figure 1 is a flow chart of the steps of a parameter transfer method provided by an embodiment of the present invention;

[0062] Figure 2 is a flowchart of another parameter transfer method provided by an embodiment of the present invention;

[0063] Figure 3 It is a parameter analysis transfer processing logic diagram provided by an embodiment of the present invention;

[0064] Figure 4 It is a function processing logic diagram provided by an embodiment of the present invention;

[0065] Figure 5 is a block diagram of a parameter transfer device provided by an embodiment of the present invention;

[0066] Figure 6 An electronic device provided by an embodiment of the present invention;

[0067] Figure 7It is a schematic diagram of the hardware structure of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0068] The parameter transfer method provided by the embodiment of the present invention is described in detail below through specific embodiments and application scenarios in conjunction with the accompanying drawings.

[0069] Reference Figure 1 , Figure 1 A flow chart of the steps of a parameter transfer method provided by an embodiment of the present invention is shown as follows: Figure 1 As shown, the specific steps include:

[0070] Step 101: Obtain a first parameter passed to a heterogeneous function, where the running architecture of the heterogeneous function is different from the native processor architecture.

[0071] In the embodiment of the present invention, a heterogeneous function refers to a function whose operation architecture is different from the local processor architecture and may be called during the operation of the target program, that is, a function that cannot be directly run on the local processor. The heterogeneous function may include functions defined in the target program or functions in the system function library that the target program needs to call, which is not specifically limited in the embodiment of the present invention. The target program may be a program applicable to the local processor architecture or a program not applicable to the local processor architecture.

[0072] For example, the local processor is an ARM architecture, and the target program's operating architecture is X86. The target program needs to load and use functions in the X86 platform's function library during operation. When the target program is run on the local machine, the functions in the X86 platform's function library to be loaded by the target program can be used as heterogeneous functions. In addition, by performing architecture transplantation on the program whose operating architecture is X86, a program whose operating architecture is ARM architecture can be obtained. Since there may be incomplete transplantation during the transplantation process, the transplanted program may still need to load functions in the X86 architecture function library when running in the ARM architecture. In this case, when the local processor is an ARM architecture, the transplanted program can also be used as the target program, and the functions in the X86 platform function library to be loaded by the target program during operation are heterogeneous functions.

[0073] In order to implement the required program functions through heterogeneous functions, the target program needs to pass the first parameter required for the operation of the heterogeneous function to the heterogeneous function to be loaded. In an embodiment of the present invention, the first parameter passed by the target program to the heterogeneous function to be loaded can be obtained. Specifically, when the target program needs to call a heterogeneous function, it will write the first parameter into the corresponding memory address or register address according to the parameter passing specification of the heterogeneous function, and then the corresponding first parameter can be obtained from the corresponding memory address or register address for the heterogeneous function to be loaded by the target program. In addition, since the local architecture is different from the operating architecture required by the heterogeneous function, in order to avoid the potential safety hazards caused by the direct writing of the first parameter in the local architecture, the parameter writing instruction of the target program for the heterogeneous function can also be directly captured, and the first parameter can be directly obtained by parsing the above parameter writing instruction, thereby avoiding the actual writing of the first parameter in the local hardware, which helps to improve the stability of the local operation.

[0074] Step 102: translating the heterogeneous function into a native function whose running architecture is the same as the native processor architecture.

[0075] In the embodiment of the present invention, since the running architecture of the heterogeneous function to be loaded by the target program is different from the native processor architecture, the heterogeneous function cannot be directly called and run on the native machine, so the heterogeneous function can be translated into a native function whose running architecture is the same as the native processor architecture, wherein the running architecture of the native function is the same as the native processor architecture, that is, the native function can be directly called and run on the native processor. It should be noted that the native function obtained by translating the heterogeneous function can be a function with the same or similar functions.

[0076] In the embodiment of the present invention, the above translation process can be performed by means of a translator, a function correspondence table, etc. Specifically, when a heterogeneous function corresponding to the target program is identified, the native system can call the translator to translate the heterogeneous function into a corresponding native function through the translator; or the function correspondence table containing the correspondence between the heterogeneous function and the native function can be queried to translate the heterogeneous function into the corresponding native function. The embodiment of the present invention does not specifically limit the specific translation process.

[0077] Step 103: Based on the first parameter and the parameter passing rule of the native processor architecture, pass a second parameter to the native function, so that the native function runs based on the second parameter.

[0078] In a computer system, in order to run and call a function and realize the normal function of the function, it is necessary to adopt the parameter passing rules corresponding to the processor architecture of the current computer system to pass the parameters required for the function to run. In an embodiment of the present invention, in order for the system to correctly call and run the native function corresponding to the heterogeneous function, the parameter passing rules applicable to the native processor architecture can be adopted to pass the second parameter to the native function. Among them, since there are differences in the parameter passing method between the heterogeneous function and the native function, but the required parameters are the same, for example, the processor architectures corresponding to the heterogeneous function and the native function are different, but the number of processor bits is the same, then there are differences in the parameter passing method between the heterogeneous function and the native function, but the required parameters may be the same in form. Therefore, in this example of the present invention, the second parameter can be obtained by modifying the first parameter of the heterogeneous function, and the second parameter can also be the same as the first parameter.

[0079] Specifically, the second parameter of the corresponding native function can be determined according to the first parameter of the heterogeneous function, and then the transfer method of the second parameter can be determined according to the parameter transfer rule of the native processor architecture, and the second parameter can be transferred based on the corresponding transfer method.

[0080] In one embodiment, a corresponding parameter conversion rule may be configured for the first parameter of the heterogeneous function with different parameter passing orders, and after obtaining the first parameter of the heterogeneous function, the corresponding parameter conversion rule may be queried according to the parameter passing order of the first parameter, and the first parameter may be converted based on the parameter conversion rule to obtain the second parameter corresponding to the first parameter. In another embodiment, a corresponding parameter conversion rule may be configured for the parameter storage address of the heterogeneous function, and after obtaining the first parameter of the heterogeneous function, the corresponding parameter conversion rule may be queried according to the parameter storage address of the first parameter, and the first parameter may be converted based on the parameter conversion rule to obtain the second parameter corresponding to the first parameter, which is not specifically limited in the embodiment of the present invention.

[0081] For example, if the first parameter required by a heterogeneous function is of integer (int) type, the method of passing the parameter is to store the parameter in register A, and the parameter required by the native function corresponding to the heterogeneous function is of double-precision floating-point type, and the method of passing the parameter is to store the parameter in register B, then the first parameter corresponding to the heterogeneous function can be converted to a double-precision floating-point number to obtain the second parameter, and then the second parameter can be stored in register B to complete the transfer of the second parameter to the native function corresponding to the heterogeneous function.

[0082] It should be noted that, in the embodiment of the present invention, the first parameter represents the parameter required by the heterogeneous function, and the second parameter represents the parameter required by the native function. In some cases, there are formal differences between the parameters required by the heterogeneous function and the corresponding native function, so the first parameter and the second parameter may be different. In other cases, the parameters required by the heterogeneous function and the corresponding native function are the same in form, so the first parameter and the second parameter may be the same.

[0083] Optionally, the parameter transfer rule may also include the parameter transfer sequence of the native function, so that the corresponding second parameters can be transferred in sequence according to the parameter transfer sequence corresponding to the native function, so that the native function can receive the second parameters according to the parameter transfer sequence, so that the native function can correctly process each second parameter.

[0084] In addition, the parameter transfer rule may further include the corresponding relationship between the parameter transfer order, parameter type and parameter storage address. The parameter transfer order corresponding to the second parameter may be determined according to the above parameter transfer order, and the parameter storage address corresponding to the second parameter may be determined according to the parameter transfer order and parameter type of the second parameter. Then, the second parameter may be stored in the corresponding parameter storage address to implement the transfer process of the second parameter to the native function. The parameter storage address may include but is not limited to a register address, a stack address, etc., which is not specifically limited in the embodiment of the present invention.

[0085] After completing the parameter transfer to the native function, the native function can be called and run, so that the native function can correctly obtain the second parameter during the operation process, so as to replace the heterogeneous function with the native function to run on the native machine, and ensure that the target program runs normally and stably on the heterogeneous platform. In summary, a parameter transfer method provided by an embodiment of the present invention includes obtaining a first parameter for the heterogeneous function, the operation architecture of the heterogeneous function is different from the native processor architecture; translating the heterogeneous function into a native function with the same operation architecture as the native processor architecture; based on the first parameter and the parameter transfer rule of the native processor architecture, passing the second parameter to the native function, so that the native function runs based on the second parameter. When the target program containing the heterogeneous function is running, the heterogeneous function can be translated into a native function, and according to the first parameter required by the heterogeneous function, the parameter transfer rule adapted to the native processor architecture is adopted to pass the second parameter required for the operation to the native function. Since the second parameter is passed using the parameter transfer rule of the native processor architecture, the native function can correctly receive the required parameter, so that the parameter can be correctly passed when the heterogeneous function is running, which helps to improve the stability of the program and the system when the heterogeneous function is running.

[0086] Reference Figure 2 , Figure 2FIG. 4 shows a flow chart of another parameter transfer method provided by an embodiment of the present invention. Figure 2 As shown, the specific steps include:

[0087] Step 201, determining the function entry address of the to-be-loaded function of the target program.

[0088] In an embodiment of the present invention, an architecture analysis can be performed on the functions to be loaded in the target program, and the heterogeneous functions that need to be translated can be determined from the functions to be loaded. The functions to be loaded in the target program can be determined, and then the operation architecture of each function to be loaded can be determined according to the function entry address of the function to be loaded. Among them, the function entry address of the function to be loaded refers to the address where the function starts to execute in the memory, and can also refer to the address where the machine instruction corresponding to the function is stored in the memory.

[0089] Step 202: When the function entry address does not match the preset entry address, determine that the function to be loaded is a heterogeneous function.

[0090] The function entry address corresponding to the function to be loaded of the target program can be obtained, and the function entry address can be matched with the preset entry address. If the function entry address of the function to be loaded matches the preset entry address, it means that the running architecture of the function to be loaded is the native processor architecture, and it can be determined that the function to be loaded is a native function; if the function entry address of the function to be loaded does not match the preset entry address, it means that the running architecture of the function to be loaded is a non-native processor architecture, and it can be determined that the function to be loaded is a heterogeneous function.

[0091] Step 203: Obtain a first parameter passed to a heterogeneous function, where the running architecture of the heterogeneous function is different from the native processor architecture.

[0092] In order to implement the required program functions through heterogeneous functions, the target program needs to pass the first parameter required for the operation of the heterogeneous function to the heterogeneous function to be loaded. In an embodiment of the present invention, the first parameter passed by the target program to the heterogeneous function can be obtained. Exemplarily, when the target program needs to call a heterogeneous function, it will write the first parameter into the corresponding memory address or register address according to the parameter passing specification of the heterogeneous function, and then it can obtain the corresponding first parameter from the corresponding memory address or register address according to the parameter passing specification of the heterogeneous function. The technician can also use other methods to obtain the first parameter that the target program needs to pass when using the heterogeneous function, which is not specifically limited in the embodiment of the present invention.

[0093] Step 204: translate the heterogeneous function into a native function whose running architecture is the same as the native processor architecture.

[0094] In an embodiment of the present invention, a translator may be used to translate heterogeneous functions. The translator may divide the target program into multiple translation blocks. The target program may be divided into multiple parts through the translation blocks to perform serial or parallel translation tasks. A translation block may include one or more functions, which is not specifically limited in the embodiment of the present invention.

[0095] Step 205: convert the first parameter based on the local machine word length to obtain the second parameter.

[0096] Since different architectures may adopt different word lengths when passing parameters, in order to correctly pass the parameters to the native function, the first parameter may be converted according to the native machine word length to obtain the second parameter. For example, if the first parameter is 32 bits and the native machine word length is 64 bits, the 32-bit first parameter may be converted to 64 bits to obtain the above-mentioned second parameter; if the first parameter is 64 bits and the native machine word length is 32 bits, the 64-bit first parameter may be converted to 32 bits to obtain the above-mentioned second parameter.

[0097] It should be noted that since the functions running at the processor level are all binary functions and binary parameters need to be passed to them, the above-mentioned first parameter and second parameter are both binary numbers, and the number of bits of the parameter represents the length of its binary number.

[0098] Optionally, step 205 may include:

[0099] Sub-step 2051, when the local machine word length is greater than the running machine word length of the heterogeneous function, based on the parameter type of the first parameter, the first parameter is binary-bit expanded to obtain the second parameter.

[0100] When converting the first parameter, the size relationship between the local machine word length and the running machine word length of the heterogeneous function can be determined first. If the local machine word length is greater than the running machine word length of the heterogeneous function, it means that the number of bits of the first parameter is insufficient, and the first parameter can be binary expanded to obtain the second parameter. The running machine word length of the heterogeneous function can be obtained by querying the function information table that records the running machine word lengths corresponding to each function, or by determining the processor architecture corresponding to the function library where the heterogeneous function is located, or by determining the actual word length of the first parameter, which is not specifically limited in the embodiment of the present invention.

[0101] In the embodiment of the present invention, different methods may be used to perform binary bit expansion for first parameters of different parameter types to ensure that the second parameter obtained by binary bit expansion has the same size as the first parameter. The parameter type may include but is not limited to a fixed-point type, a floating-point type, etc., and the fixed-point type may include a fixed-point decimal, an integer type, etc.

[0102] Optionally, sub-step 2051 further includes:

[0103] Sub-step 20511: When the first parameter is a signed number, based on the parameter type of the first parameter, perform binary bit expansion on the first parameter to obtain the second parameter.

[0104] In the embodiment of the present invention, different processing methods can be used for signed numbers and unsigned numbers. For signed numbers, binary bit expansion can be performed directly to obtain the second parameter.

[0105] Specifically, for the first parameter of the signed fixed-point type, its sign bit can be binary extended to obtain the second parameter. Exemplarily, assuming that a heterogeneous function needs to be called on the native processor architecture, the first parameter required to be passed by the heterogeneous function is an 8-bit signed fixed-point number 10110111, and after translating the heterogeneous function to obtain the native function, the first parameter needs to be converted before calling the native function, and its sign bit can be extended to a high bit to obtain a 16-bit signed fixed-point number 1111111110110111 suitable for the native function.

[0106] For the first parameter of a signed floating-point type, when binary bit extension is performed, padding and extension can be performed in the exponent part and the mantissa part. For example, a bias can be added to the exponent part, and the mantissa part can be extended with 0 in the low bit to keep the value unchanged. This binary bit extension method ensures that the precision and range of the signed floating-point value are maintained.

[0107] Sub-step 20512: When the first parameter is an unsigned number, determine that the first parameter is the second parameter.

[0108] Since registers, stacks, etc. have a clearing mechanism when no data is written, or registers, stacks, etc. have an automatic zero-filling mechanism, when the local machine word length is larger than the running machine word length of the heterogeneous function, and the first parameter is an unsigned number, the first parameter can be directly written into the low-order part of the corresponding parameter storage address, so that the high-order can remain zero and will not affect the correct reading of the parameter. Therefore, the first parameter can be directly used as the second parameter to reduce the numerical conversion operations during the execution of the target program and improve the program running efficiency.

[0109] It should be noted that, under normal circumstances, when a parameter of a smaller word length is stored in a storage space of a larger word length, the unfilled bits in the storage space of the larger word length will be automatically set to 0, thereby ensuring that the parameters are stored correctly. For storage spaces that cannot be automatically set to 0, the remaining bits can be set to 0 after the second parameter is stored.

[0110] By performing binary bit expansion on the first parameter based on the parameter type of the first parameter to obtain the second parameter when the first parameter is a signed number, and determining the first parameter to be the second parameter when the first parameter is an unsigned number, the most efficient way to obtain the second parameter can be selected regardless of whether the number is signed or not, which helps to improve the efficiency of determining the second parameter, thereby improving the running efficiency of the target program on heterogeneous platforms.

[0111] It should be noted that, when the first parameter is an unsigned number, the first parameter can be directly determined as the second parameter; however, some registers and stacks may not have an automatic zero-filling mechanism, or may not be cleared in time. Based on the parameter type of the first parameter, the first parameter can also be binary-extended to obtain the second parameter, and the expanded second parameter can be written. The embodiment of the present invention is not limited to this, and technical personnel can flexibly adjust it according to actual business needs.

[0112] Sub-step 2052, when the native machine word length is smaller than the running machine word length of the heterogeneous function, based on the parameter type, binary truncation is performed on the first parameter to obtain the second parameter.

[0113] When converting the first parameter, the size relationship between the local machine word length and the running machine word length of the heterogeneous function can be determined first. If the local machine word length is smaller than the running machine word length of the heterogeneous function, it means that the number of bits of the first parameter is too many, and the first parameter can be binary truncated to obtain the second parameter. The running machine word length of the heterogeneous function can be obtained by querying the function information table that records the running machine word lengths corresponding to each function, or by determining the processor architecture corresponding to the function library where the heterogeneous function is located, or by determining the actual word length of the first parameter, which is not specifically limited in the embodiment of the present invention.

[0114] Optionally, in order to improve the stability of system operation, when the local machine word length is less than the running machine word length of the heterogeneous function, the deviation degree generated after the first parameter is truncated can also be determined, and it can be determined whether the first parameter can be truncated to obtain the second parameter according to the deviation degree. Specifically, the number of bits that is the same as the local machine word length can be truncated from the high bit of the first parameter to obtain the parameter to be compared, and the ratio between the parameter to be compared and the first parameter can be calculated to obtain the deviation degree generated after the first parameter is truncated. When the absolute difference between the deviation degree and 1 is greater than or equal to the first threshold value (for example, 0.01), it can be determined that the impact of truncating the first parameter is small, and the first parameter can be truncated by binary bits to obtain the corresponding second parameter. Otherwise, it can be determined that the impact of truncating the first parameter is large, and the target program can be interrupted or an error reminder can be issued. It is also possible to directly calculate the absolute difference between the parameter to be compared and the first parameter to obtain the deviation degree generated after the first parameter is truncated. When the deviation degree is greater than or equal to the second threshold value (for example, 0.005), it can be determined that the impact of truncating the first parameter is small, otherwise it can be determined that the impact of truncating the first parameter is large.

[0115] By performing binary bit expansion on the first parameter based on the parameter type of the first parameter to obtain the second parameter when the native machine word length is larger than the running machine word length of the heterogeneous function, and performing binary bit truncation on the first parameter based on the parameter type to obtain the second parameter when the native machine word length is smaller than the running machine word length of the heterogeneous function, the first parameter can be correctly transmitted on the heterogeneous architecture without losing accuracy, the accuracy of subsequent native function execution can be improved, and it helps to improve the running stability of the target program and the system.

[0116] Optionally, step 205 may further include:

[0117] Sub-step 2053, when the first parameter is of a composite type, convert each first sub-parameter in the first parameter based on the local machine word length to obtain the second parameter composed of multiple second sub-parameters.

[0118] In an embodiment of the present invention, if the first parameter is a composite type, the first parameter may include multiple first sub-parameters, each of which may be converted to obtain a second sub-parameter corresponding to each first sub-parameter, and these second sub-parameters may constitute the second parameter. The composite type may include data types that may include multiple members, such as a structure type (struct) and a union type (union).

[0119] Each first sub-parameter in the first parameter can be converted based on the local machine word length, so as to obtain the second sub-parameter corresponding to each first sub-parameter.

[0120] Step 206: Based on the first parameter and the parameter passing rule of the native processor architecture, pass a second parameter to the native function, so that the native function runs based on the second parameter.

[0121] In an embodiment of the present invention, since the operating architectures of heterogeneous functions and native functions are different, the two may adopt different parameter passing rules. In order to enable the translated native function to run correctly, the second parameter can be passed to the translated native function according to the parameter passing rule of the native processor architecture, so that the native function can correctly obtain the second parameter, thereby improving the stability of the heterogeneous function translation operation.

[0122] Optionally, step 206 may include:

[0123] Sub-step 2061: determining a parameter storage address corresponding to the parameter type of the first parameter from the parameter passing rule of the local processor architecture.

[0124] In the embodiment of the present invention, parameters of different parameter types may use different parameter storage addresses for parameter transfer, therefore, the parameter type corresponding to the first parameter may be determined first, and then the parameter storage address corresponding to the parameter type may be determined from the parameter transfer rule of the local processor architecture. The parameter storage address may include but is not limited to at least one of a register address, a stack address, etc.

[0125] It should be noted that the parameter type corresponding to the first parameter can be determined by parsing the target program before running the target program, thereby improving the efficiency of subsequent running of the target program.

[0126] Sub-step 2062: writing the second parameter into the storage space corresponding to the parameter storage address.

[0127] In the embodiment of the present invention, the second parameter may be written into the storage space corresponding to the parameter storage address, thereby completing the transfer of the second parameter and enabling the native function to run correctly based on the second parameter.

[0128] By determining the parameter storage address corresponding to the parameter type of the first parameter from the parameter passing rules of the native processor architecture and writing the second parameter into the storage space corresponding to the parameter storage address, direct passing of the second parameter can be achieved, which helps to improve the operating efficiency of subsequent native functions.

[0129] Optionally, step 206 may further include:

[0130] Sub-step 2063: determining a pointer storage address corresponding to the parameter type of the first parameter from the parameter passing rule of the local processor architecture.

[0131] In the embodiment of the present invention, parameters of different parameter types may use different pointer storage addresses for parameter transfer, therefore, the parameter type corresponding to the first parameter may be determined first, and then the pointer storage address corresponding to the parameter type may be determined from the parameter transfer rule of the local processor architecture. The pointer storage address may include but is not limited to at least one of a register address, a stack address, etc.

[0132] Sub-step 2064, writing the memory address of the second parameter into the storage space corresponding to the pointer storage address.

[0133] When the second parameter is obtained, the second parameter has been stored in the memory. In order to improve the efficiency of parameter passing and avoid copying the second parameter again when passing the second parameter, the memory address of the second parameter in the memory can be directly obtained, and then the memory address can be written into the pointer storage address corresponding to the parameter type of the second parameter.

[0134] The native function can obtain the actual storage address of the second parameter through the storage space corresponding to the pointer storage address and read the address to obtain the second parameter, which helps to improve the efficiency of parameter transfer.

[0135] Optionally, when the first parameter is of a composite type, step 206 may further include:

[0136] Sub-step 2065, based on the application binary interface of the native processor architecture, determine the parameter passing rule corresponding to the composite type.

[0137] In an embodiment of the present invention, the parameter passing rules corresponding to the above-mentioned composite type can be determined according to the Application Binary Interface (ABI) of the native processor architecture. The ABI of the operating system of different architectures specifies the parameter passing rules of composite types that can be used by the program, and the parameter passing rules can define how to pass the parameters of the composite type in a function call, such as passing by value or passing by pointer, and how to store these parameters in memory.

[0138] The above parameter transfer rules may include but are not limited to at least one of a transfer mechanism, a memory location, a register location, etc., so that the correct transfer of the composite type parameters can be achieved through the parameter transfer rules corresponding to the composite type.

[0139] It should be noted that the parameter transmission rule of the composite type may include the transmission strategy corresponding to the second parameter of the composite type as a whole data, or may include the transmission strategy corresponding to each second sub-parameter in the second parameter of the composite type, and the embodiment of the present invention does not make specific limitations.

[0140] Sub-step 2066: based on the parameter passing rule corresponding to the composite type, pass the second parameter consisting of the multiple second sub-parameters to the native function.

[0141] In the embodiment of the present invention, the second parameter consisting of multiple second sub-parameters may be passed to the native function based on the acquired parameter passing rule.

[0142] For example, if the second parameter Point is a structure (struct), which includes two second sub-parameters x and y of int type, the structure of the second parameter is as follows:

[0143] struct Point {int x;int y;}

[0144] The parameter passing specification of the second parameter obtained through the application binary interface of the native processor architecture indicates that the first member of the structure is passed using the first available integer register (for example, the RDI register), and the second member is passed using the next register (for example, the RSI register). When the second parameter Point is actually passed, the second sub-parameter x can be stored in the RDI register, and the second sub-parameter y can be stored in the RSI register.

[0145] In the case where the first parameter is of a composite type, each first sub-parameter in the first parameter can be converted based on the native machine word length to obtain a second parameter consisting of multiple second sub-parameters, and based on the application binary interface of the native processor architecture, a parameter passing rule corresponding to the composite type can be determined, and based on the parameter passing rule, the second parameter consisting of the multiple second sub-parameters is passed to the native function, thereby achieving correct parameter passing for the composite type first parameter of the heterogeneous function, so that the heterogeneous function containing the composite type parameter can run normally on the native processor architecture, further improving the operation compatibility of the heterogeneous function.

[0146] Reference Figure 3 , Figure 3 A parameter analysis and transfer processing logic diagram provided by an embodiment of the present invention is shown. Figure 3As shown, after the native function corresponding to the heterogeneous function enters the parameter analysis and transfer process, it can be determined whether the first parameter corresponding to the heterogeneous function is a composite type. If the judgment result is yes, it is transferred according to the parameter transfer rule determined by the application binary interface of the native processor architecture. If the judgment result is no, it can be further determined whether the first parameter is a floating point type. If the judgment result is yes, it is further determined whether the first parameter is signed. If the judgment result is yes, it means that the first parameter is a signed floating point number. The first parameter can be binary bit expanded to obtain a second parameter so that the second parameter is equal to the first parameter value. Then, according to the parameter transfer rule of the native processor mechanism, the second parameter is stored in the corresponding floating point register or stack. If the signed judgment result of the above-mentioned first parameter is no, it means that the first parameter is an unsigned floating point number. The first parameter can be directly stored in the corresponding floating point register or stack according to the parameter transfer rule of the native processor mechanism, and all the remaining bits in the floating point register or stack are set to 0. Alternatively, the first parameter can be binary bit expanded with 0 to obtain the second parameter, and the second parameter is stored in the corresponding floating point register or stack. If the result of the above judgment on whether the first parameter is of floating-point type is no, it means that the first parameter is a fixed-point number. Similarly, it can be judged whether the fixed-point number is signed. If the judgment result is yes, it means that the first parameter is a signed fixed-point number. The first parameter can be binary-bit expanded to obtain the second parameter so that the second parameter is equal to the first parameter. Then, according to the parameter passing rule of the local processor mechanism, the second parameter is stored in the corresponding fixed-point register or stack. If the result of the above judgment on the signedness of the first parameter is no, it means that the first parameter is an unsigned fixed-point number. According to the parameter passing rule of the local processor mechanism, the first parameter can be directly stored in the corresponding fixed-point register or stack, and the remaining bits in the fixed-point register or stack can be set to 0.

[0147] Step 207: When the function entry address matches the preset entry address, the function to be loaded is called.

[0148] In the embodiment of the present invention, if the function entry address of the to-be-called function matches the preset entry address, it means that the to-be-called function is already a native function and can be directly run and called, thereby improving the execution efficiency of the target program.

[0149] Furthermore, during the running of the target program, the function to be called is determined to be a heterogeneous function and translated, and a native function corresponding to the heterogeneous function is obtained. The native function corresponding to the heterogeneous function can be used to replace the heterogeneous function, so that when the target program needs to call the heterogeneous function again during subsequent running, the native function corresponding to the heterogeneous function is directly called, and the native system directly runs the native function, thereby further improving the running efficiency of the target program.

[0150] Reference Figure 4 , Figure 4 A function processing logic diagram provided by an embodiment of the present invention is shown. Figure 4 As shown, a heterogeneous library may be loaded first, in which the program code and related data required to implement the present solution are stored. Then, the target program parameter type definition description is loaded, wherein the parameter type definition description may include, but is not limited to, information such as the memory size occupied by the parameter type, the presence or absence of a symbol, etc. Then, function parameter type analysis is performed based on the parameter type definition description, and the above analysis may include parameter type classification, such as dividing the parameter type into a composite type and a non-composite type, and may also include other required analysis contents, which are not specifically limited in the embodiments of the present invention. Then, the Main function of the target program is run, and the function to be loaded in the Main function running process is identified to determine whether the function to be loaded is a native function. If the judgment result is yes, that is, it is determined that the function to be loaded is a native function, the native function is directly called. If the judgment result is no, that is, it is determined that the function to be loaded is a heterogeneous function, the translation process is entered to translate the heterogeneous function to obtain the native function corresponding to the heterogeneous function. After the translation, continue to enter the next translation block to determine whether the function to be loaded in the next translation block is a native function. If the judgment result is no, continue to translate the heterogeneous function in the next translation block and translate it into a native function. After all the translation blocks of this round of translation are completed, it can be determined whether the function to be loaded in the translation block is a native function, that is, the parameter analysis and transfer of the translated native function is performed. The specific process of parameter analysis and transfer can be referred to above Figure 3 The process will not be described in detail in the embodiment of the present invention. After the parameter analysis and transfer are completed, the native function corresponding to the heterogeneous function can be directly called and then continued to be executed.

[0151] In summary, a parameter passing method provided by an embodiment of the present invention includes: obtaining a first parameter for passing a heterogeneous function, the operating architecture of the heterogeneous function is different from the native processor architecture; translating the heterogeneous function into a native function whose operating architecture is the same as the native processor architecture; and passing a second parameter to the native function based on the first parameter and the parameter passing rule of the native processor architecture, so that the native function runs based on the second parameter. When a target program containing a heterogeneous function is running, the heterogeneous function can be translated into a native function, and according to the first parameter required by the heterogeneous function, the parameter passing rule adapted to the native processor architecture is adopted to pass the second parameter required for running to the native function. Since the second parameter is passed using the parameter passing rule of the native processor architecture, the native function can correctly receive the required parameter, so that the parameter can be correctly passed when running the heterogeneous function, which helps to improve the stability of the program and the system when running the heterogeneous function.

[0152] The parameter transfer method provided in the embodiment of the present invention can be executed by a parameter transfer device. In the embodiment of the present invention, the parameter transfer device executing the parameter transfer method is taken as an example to illustrate the parameter transfer device provided in the embodiment of the present invention.

[0153] Reference Figure 5 , Figure 5 is a block diagram of a parameter transfer device provided by an embodiment of the present invention, such as Figure 5 As shown, the parameter transfer device 500 includes:

[0154] An acquisition module 501 is used to acquire a first parameter passed to a heterogeneous function, where the operation architecture of the heterogeneous function is different from the local processor architecture;

[0155] A translation module 502, configured to translate the heterogeneous function into a native function whose running architecture is the same as the native processor architecture;

[0156] The parameter passing module 503 is used to pass a second parameter to the native function based on the first parameter and the parameter passing rule of the native processor architecture, so that the native function runs based on the second parameter.

[0157] Optionally, the parameter transmission module includes:

[0158] A parameter storage address submodule, used to determine a parameter storage address corresponding to the parameter type of the first parameter from the parameter transfer rule of the local processor architecture;

[0159] The first storage submodule is configured to write the second parameter into a storage space corresponding to the parameter storage address.

[0160] Optionally, the parameter transmission module includes:

[0161] A pointer storage address submodule, used to determine a pointer storage address corresponding to the parameter type of the first parameter from the parameter transfer rule of the local processor architecture;

[0162] A second storage submodule is used to write the memory address of the second parameter into the storage space corresponding to the pointer storage address.

[0163] Optionally, the device further comprises a parameter conversion module, configured to convert the first parameter based on the local machine word length to obtain the second parameter.

[0164] Optionally, the parameter conversion module includes:

[0165] A first conversion submodule is used for performing binary bit expansion on the first parameter based on the parameter type of the first parameter to obtain the second parameter when the local machine word length is greater than the running machine word length of the heterogeneous function;

[0166] The second conversion submodule is used to perform binary bit truncation on the first parameter based on the parameter type to obtain the second parameter when the local machine word length is smaller than the running machine word length of the heterogeneous function.

[0167] Optionally, the first conversion submodule includes:

[0168] a signed conversion unit, configured to, when the first parameter is a signed number, perform binary bit expansion on the first parameter based on a parameter type of the first parameter to obtain the second parameter;

[0169] An unsigned conversion unit is used to determine that the first parameter is the second parameter when the first parameter is an unsigned number.

[0170] Optionally, the parameter conversion module is further configured to, when the first parameter is of a composite type, convert each first sub-parameter in the first parameter based on the local machine word length to obtain the second parameter composed of a plurality of second sub-parameters;

[0171] The parameter transmission module comprises:

[0172] A rule determination submodule, used for determining a parameter transfer rule corresponding to the composite type based on an application binary interface of the native processor architecture;

[0173] The composite type transfer submodule is used to transfer the second parameter consisting of the multiple second sub-parameters to the native function based on the parameter transfer rule corresponding to the composite type.

[0174] Optionally, the device further comprises:

[0175] An entry address module is used to determine the function entry address of the function to be loaded in the target program;

[0176] A first matching module, configured to determine that the function to be loaded is a heterogeneous function when the function entry address does not match the preset entry address;

[0177] The second matching module is used to call the function to be loaded when the function entry address matches the preset entry address.

[0178] In summary, a parameter passing device provided by an embodiment of the present invention includes: an acquisition module for acquiring a first parameter to be passed for a heterogeneous function, the operating architecture of the heterogeneous function being different from the native processor architecture; a translation module for translating the heterogeneous function into a native function having the same operating architecture as the native processor architecture; and a parameter passing module for passing a second parameter to the native function based on the first parameter and the parameter passing rule of the native processor architecture, so that the native function runs based on the second parameter. When a target program containing a heterogeneous function is running, the heterogeneous function can be translated into a native function, and according to the first parameter required by the heterogeneous function, the parameter passing rule adapted to the native processor architecture is adopted to pass the second parameter required for running to the native function. Since the second parameter is passed using the parameter passing rule of the native processor architecture, the native function can correctly receive the required parameter, so that the parameter can be correctly passed when the heterogeneous function is running, which helps to improve the stability of the program and the system when the heterogeneous function is running.

[0179] The parameter transfer device provided by the embodiment of the present invention can realize Figures 1 to 4 To avoid repetition, the various processes implemented by the method embodiment are not described here.

[0180] Alternatively, if Figure 6 As shown, an embodiment of the present invention further provides an electronic device M00, including a processor M01 and a memory M02, wherein the memory M02 stores programs or instructions that can be executed on the processor M01, and when the program or instructions are executed by the processor M01, the various steps of the above-mentioned parameter transfer method embodiment are implemented, and the same technical effect can be achieved. To avoid repetition, they are not described here.

[0181] It should be noted that the electronic devices in the embodiments of the present invention include the mobile electronic devices and non-mobile electronic devices mentioned above.

[0182] Figure 7 The present invention is a schematic diagram of the hardware structure of an electronic device.

[0183] The electronic device 1000 includes but is not limited to: a radio frequency unit 1001, a network module 1002, an audio output unit 1003, an input unit 1004, a sensor 1005, a display unit 1006, a user input unit 1007, an interface unit 1008, a memory 1009, and a processor 1010 and other components.

[0184] Those skilled in the art will appreciate that the electronic device 1000 may also include a power source (such as a battery) for supplying power to various components, and the power source may be logically connected to the processor 1010 through a power management system, thereby implementing functions such as managing charging, discharging, and power consumption management through the power management system. Figure 7The electronic device structure shown in the figure does not constitute a limitation on the electronic device. The electronic device may include more or fewer components than shown in the figure, or combine certain components, or arrange the components differently, which will not be described in detail here.

[0185] Among them, processor 1010 is used to obtain a first parameter passed for a heterogeneous function, where the operating architecture of the heterogeneous function is different from the native processor architecture; translate the heterogeneous function into a native function whose operating architecture is the same as the native processor architecture; and pass a second parameter to the native function based on the first parameter and the parameter passing rule of the native processor architecture, so that the native function runs based on the second parameter.

[0186] In summary, the present invention can translate heterogeneous functions into native functions when a target program containing heterogeneous functions is running, and based on the first parameter required by the heterogeneous function, adopt the parameter passing rule adapted to the native processor architecture to pass the second parameter required for the operation to the native function. Since the second parameter is passed using the parameter passing rule of the native processor architecture, the native function can correctly receive the required parameters, thereby being able to correctly pass parameters when running the heterogeneous function, which helps to improve the stability of the program and the system when running the heterogeneous function.

[0187] It should be understood that in the embodiment of the present invention, the input unit 1004 may include a graphics processing unit (GPU) 10041 and a microphone 10042, and the graphics processor 10041 processes the image data of the static picture or video obtained by the image capture device (such as a camera) in the video capture mode or the image capture mode. The display unit 1006 may include a display panel 10061, and the display panel 10061 may be configured in the form of a liquid crystal display, an organic light emitting diode, etc. The user input unit 1007 includes a touch panel 10071 and at least one of other input devices 10072. The touch panel 10071 is also called a touch screen. The touch panel 10071 may include two parts: a touch detection device and a touch controller. Other input devices 10072 may include, but are not limited to, a physical keyboard, function keys (such as a volume control key, a switch key, etc.), a trackball, a mouse, and a joystick, which will not be repeated here.

[0188] The memory 1009 can be used to store software programs and various data. The memory 1009 may mainly include a first storage area for storing programs or instructions and a second storage area for storing data, wherein the first storage area may store an operating system, an application program or instructions required for at least one function (such as a sound playback function, an image playback function, etc.), etc. In addition, the memory 1009 may include a volatile memory or a non-volatile memory, or the memory x09 may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), a static random access memory (SRAM), a dynamic random access memory (DRAM), a synchronous dynamic random access memory (SDRAM), a double data rate synchronous dynamic random access memory (DDRSDRAM), an enhanced synchronous dynamic random access memory (ESDRAM), a synchronous link dynamic random access memory (SLDRAM) and a direct memory bus random access memory (DRRAM). The memory 1009 in the embodiment of the present invention includes but is not limited to these and any other suitable types of memory.

[0189] The processor 1010 may include one or more processing units; optionally, the processor 1010 integrates an application processor and a modem processor, wherein the application processor mainly processes operations related to an operating system, a user interface, and application programs, and the modem processor mainly processes wireless communication signals, such as a baseband processor. It is understandable that the modem processor may not be integrated into the processor 1010.

[0190] An embodiment of the present invention also provides a readable storage medium, on which a program or instruction is stored. When the program or instruction is executed by a processor, the various processes of the above-mentioned parameter transfer method embodiment are implemented and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0191] The processor is the processor in the electronic device described in the above embodiment. The readable storage medium includes a computer readable storage medium, such as a computer read-only memory ROM, a random access memory RAM, a magnetic disk or an optical disk.

[0192] An embodiment of the present invention further provides a chip, which includes a processor and a communication interface, wherein the communication interface is coupled to the processor, and the processor is used to run programs or instructions to implement the various processes of the above-mentioned parameter transfer method embodiment, and can achieve the same technical effect. To avoid repetition, it will not be repeated here.

[0193] It should be understood that the chip mentioned in the embodiment of the present invention may also be called a system-level chip, a system chip, a chip system or a system-on-chip chip, etc.

[0194] An embodiment of the present invention provides a computer program product, which is stored in a storage medium. The program product is executed by at least one processor to implement the various processes of the above-mentioned parameter transfer method embodiment and can achieve the same technical effect. To avoid repetition, it will not be repeated here.

Claims

1. A parameter transfer method, characterized in that: Applied to a first central processing unit, the method comprises: During the running of the target program, obtaining a first parameter passed to a first binary function, wherein the first binary function can be directly run on a second central processing unit, the instruction set architecture of the second central processing unit is different from that of the first central processing unit, and the first parameter is a binary number; translating the first binary function into a second binary function, wherein the second binary function can be directly executed on the first central processing unit; Based on the first parameter and the parameter passing rule of the first CPU architecture, passing a second parameter to a second binary function, the second parameter being a binary number, so that the second binary function runs on the first CPU based on the second parameter; Before passing the second parameter to the second binary function, the first parameter is converted based on the machine word length of the first central processing unit to obtain the second parameter.

2. The parameter transfer method according to claim 1, characterized in that: The step of passing a second parameter to the second binary function based on the first parameter and the parameter passing rule of the first central processing unit architecture includes: Determine a parameter storage address corresponding to the parameter type of the first parameter from the parameter transfer rule of the first central processing unit architecture; The second parameter is written into the storage space corresponding to the parameter storage address.

3. The parameter transfer method according to claim 1, characterized in that: The step of passing a second parameter to the second binary function based on the first parameter and the parameter passing rule of the first central processing unit architecture includes: Determine a pointer storage address corresponding to the parameter type of the first parameter from the parameter passing rule of the first central processing unit architecture; The memory address of the second parameter is written into the storage space corresponding to the pointer storage address.

4. The parameter transfer method according to claim 1, characterized in that: The converting the first parameter based on the machine word length of the first central processing unit to obtain the second parameter includes: When the machine word length of the first central processing unit is greater than the running machine word length of the first binary function, based on the parameter type of the first parameter, performing binary bit expansion on the first parameter to obtain the second parameter; In the case where the machine word length of the first central processing unit is smaller than the running machine word length of the first binary function, the first parameter is binary truncated based on the parameter type to obtain the second parameter.

5. The parameter transfer method according to claim 4, characterized in that: The step of performing binary bit expansion on the first parameter based on the parameter type of the first parameter to obtain the second parameter includes: When the first parameter is a signed number, based on the parameter type of the first parameter, performing binary bit expansion on the first parameter to obtain the second parameter; When the first parameter is an unsigned number, the first parameter is determined to be the second parameter.

6. The parameter transfer method according to claim 1, characterized in that: The converting the first parameter based on the machine word length of the first central processing unit to obtain the second parameter includes: In the case where the first parameter is of a composite type, converting each first sub-parameter in the first parameter based on the machine word length of the first central processing unit to obtain the second parameter composed of a plurality of second sub-parameters; The passing of the second parameter to the second binary function comprises: Determining a parameter transfer rule corresponding to the composite type based on an application binary interface of the first central processing unit architecture; Based on the parameter passing rule corresponding to the composite type, the second parameter consisting of the multiple second sub-parameters is passed to the second binary function.

7. The parameter transfer method according to any one of claims 1 to 6, characterized in that: The method further comprises: Determine the function entry address of the function to be loaded of the target program; In a case where the function entry address does not match the preset entry address, determining that the function to be loaded is a first binary function; When the function entry address matches the preset entry address, the function to be loaded is called.

8. A parameter transfer device, characterized in that: Arranged in the first central processor, the device comprises: an acquisition module, configured to acquire a first parameter passed for a first binary function, wherein the first binary function can be directly run on a second central processing unit, the instruction set architecture of the second central processing unit is different from that of the first central processing unit, and the first parameter is a binary number; a translation module, configured to translate the first binary function into a second binary function, wherein the second binary function can be directly executed on the first central processing unit; a parameter transmission module, configured to transmit a second parameter to the second binary function based on the first parameter and the parameter transmission rule of the first central processing unit architecture, wherein the second parameter is a binary number, so that the second binary function can be executed on the first central processing unit based on the second parameter; Before passing the second parameter to the second binary function, the first parameter is converted based on the machine word length of the first central processing unit to obtain the second parameter.

9. An electronic device, characterized in that: The electronic device includes a processor and a memory, wherein the memory stores a program or instruction that can be run on the processor, and when the program or instruction is executed by the processor, the parameter transfer method according to any one of claims 1 to 7 is implemented.

10. A readable storage medium, characterized in that: The readable storage medium stores a program or instruction, and when the program or instruction is executed by a processor, the parameter transfer method described in any one of claims 1 to 7 is implemented.

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