Page missing abnormity processing method and device and electronic equipment

Abstract

The embodiment of the invention discloses a processing method and device for a missing page exception and electronic equipment. The method comprises the steps of determining a virtual memory space (VMA) to which a first virtual address corresponding to a page missing abnormity belongs in response to the triggered page missing abnormity; mapping the first virtual address to a physical page; judging whether a pre-mapping chain table contains the VMA or not; if a pre-mapping chain table does not contain the VMA, storing pre-mapping virtual address information of the VMA into the pre-mapping chain table; and waking up a pre-mapping processing thread, wherein the pre-mapping processing thread is used for mapping a second virtual address corresponding to the pre-mapping virtual address information stored in the pre-mapping chain table to the physical page. According to the page-missing exception processing method and device and the electronic equipment, the number of times of triggering the page-missing exception can be effectively reduced, resource waste of a processor is reduced, great influence on the current process can be avoided, and normal operation of the current process is guaranteed.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a method, device, and electronic device for processing a page fault exception. Background Art

[0002] Page fault is a memory processing mechanism. When the processor accesses physical memory through a virtual address, if it finds that the virtual address is not mapped to physical memory, or the physical memory mapped by the virtual address does not have access rights, or the data to be accessed is not stored in the memory, etc., a page fault will be triggered. Page fault can also be called page miss, page search miss, page fault interrupt, page fault, etc.

[0003] Every time a page fault exception is triggered, the processor's memory management unit will generate an interrupt signal to notify the kernel to process it. A large number of page fault exceptions will cause processor resource consumption and seriously affect the normal operation of the processor. Therefore, how to reduce the number of page fault exceptions has become a technical problem that needs to be solved urgently. Summary of the invention

[0004] The embodiments of the present application disclose a method, device and electronic device for processing page fault exceptions, which can effectively reduce the number of times page fault exceptions are triggered, reduce processor resource waste, and avoid a significant impact on the current process, thereby ensuring the normal operation of the current process.

[0005] The present application embodiment discloses a method for processing a page fault exception, the method comprising:

[0006] In response to the triggered page fault exception, determining a virtual memory space VMA to which a first virtual address corresponding to the page fault exception belongs;

[0007] Mapping the first virtual address to a physical page;

[0008] Determine whether the pre-mapped linked list contains the VMA;

[0009] If the pre-mapped linked list does not include the VMA, storing the pre-mapped virtual address information of the VMA in the pre-mapped linked list; the pre-mapped virtual address range corresponding to the pre-mapped virtual address information of the VMA does not include the first virtual address;

[0010] A pre-mapping processing thread is awakened, where the pre-mapping processing thread is used to map a second virtual address corresponding to the pre-mapping virtual address information stored in the pre-mapping linked list to a physical page.

[0011] In this embodiment, for a page fault exception triggered by accessing physical memory through a first virtual address, the first virtual address can be mapped to a physical page to resolve the triggered page fault exception, the VMA that needs to be pre-mapped can be managed through a pre-mapping linked list, and when the VMA to which the first virtual address belongs does not exist in the pre-mapping linked list, the VMA is added to the pre-mapping linked list, which can ensure the accuracy of the information stored in the pre-mapping linked list, and the second virtual address corresponding to the pre-mapped virtual address information stored in the pre-mapping linked list can be pre-mapped through a pre-mapping processing thread, and the second virtual address corresponding to the pre-mapped virtual address information stored in the pre-mapping linked list can be mapped to a physical page in advance, without waiting until a page fault exception is triggered by accessing physical memory through the second virtual address, and then mapping, when the physical memory is subsequently accessed through the second virtual address, at least a page fault exception will not be triggered because the second virtual memory is not mapped to the physical memory, which can effectively reduce the number of page fault exceptions triggered and reduce the waste of processor resources. Moreover, the use of an asynchronous pre-mapping processing thread to pre-map virtual addresses can avoid the pre-mapping process from having a significant impact on the current process and ensure the normal operation of the current process.

[0012] As an implementation manner, after determining whether the pre-mapping linked list includes the VMA, the method further includes:

[0013] If the pre-mapping linked list includes the VMA, the first virtual address is removed from the pre-mapped virtual address range corresponding to the pre-mapped virtual address information of the VMA stored in the pre-mapping linked list.

[0014] In this embodiment, when the VMA to which the first virtual address belongs already exists in the pre-mapping linked list, the first virtual address is removed from the pre-mapped virtual address range corresponding to the pre-mapped virtual address information of the VMA stored in the pre-mapping linked list. This can avoid the pre-mapping processing thread from repeatedly mapping the first virtual address, thereby improving the accuracy of memory allocation.

[0015] As an implementation manner, if the pre-mapped linked list does not include the VMA, storing the pre-mapped virtual address range corresponding to the pre-mapped virtual address information of the VMA into the pre-mapped linked list includes:

[0016] If the pre-mapping linked list does not include the VMA, the pre-mapping virtual address information of the VMA and the pre-mapping virtual address information of one or more VMAs after the VMA are stored in the pre-mapping linked list.

[0017] In this implementation, the pre-mapped virtual address information corresponding to each of the multiple VMAs can be stored in a pre-mapped linked list, so that multiple VMAs can be pre-mapped in batches, which can significantly reduce the triggered page fault exceptions and improve the performance of processes and user programs.

[0018] As an implementation manner, the waking up the pre-mapping processing thread includes:

[0019] When the wake-up condition is met, the pre-mapping processing thread is woken up;

[0020] The wake-up condition includes one or more of the following:

[0021] Complete the update of the pre-mapped virtual address information stored in the pre-mapped linked list; or,

[0022] The time from the current moment to the time for mapping the first virtual address to the physical page reaches the target time; or,

[0023] A usage rate of a processor that processes the page fault exception is less than a usage rate threshold.

[0024] In this embodiment, the processor can wake up the pre-mapping processing thread when the wake-up conditions are met, and pre-map the second virtual address corresponding to the pre-mapped virtual address information stored in the pre-mapping linked list through the pre-mapping processing thread. The operation of the pre-mapping processing thread can be flexibly controlled, reducing the impact of pre-mapping of virtual addresses through the pre-mapping processing thread on the process, thereby ensuring the normal operation of the process.

[0025] As an implementation manner, after determining whether the pre-mapping linked list includes the VMA, the method further includes:

[0026] If the pre-mapped linked list does not include the VMA, then the operation identifier corresponding to the VMA is stored in the pre-mapped linked list, where the operation identifier is used to indicate the access page type and / or memory access operation corresponding to the page fault exception; or,

[0027] If the pre-mapping linked list contains the VMA, but the operation identifier corresponding to the VMA stored in the pre-mapping linked list does not match the access page type and / or memory access operation corresponding to the page fault exception, then the operation identifier corresponding to the VMA in the pre-mapping linked list is updated to an operation identifier that matches the access page type and / or memory access operation corresponding to the page fault exception.

[0028] In this embodiment, the pre-mapping linked list can store the pre-mapped virtual address information and operation identifier corresponding to the VMA, so that the pre-mapping processing thread can pre-map the second virtual address in the pre-mapping linked list more accurately based on the operation identifier, thereby improving the flexibility and accuracy of virtual address pre-mapping.

[0029] As an implementation manner, when the operation identifier corresponding to the VMA stored in the pre-mapping linked list indicates that the access page type corresponding to the page fault exception is an anonymous page, and the memory access operation corresponding to the page fault exception is a read access operation, the pre-mapping processing thread is further used to map the second virtual address corresponding to the pre-mapped virtual address information stored in the pre-mapping linked list to a physical zero page;

[0030] The second virtual address includes all virtual addresses within the pre-mapped virtual address range corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list.

[0031] In this embodiment, when the access page type corresponding to the page fault exception is an anonymous page, and the memory access operation corresponding to the page fault exception is a read access operation, all virtual addresses corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list can be mapped to the physical zero page through the pre-mapping processing thread. Pre-mapping all virtual address mappings corresponding to the pre-mapped virtual address information stored in the pre-mapping linked list can effectively reduce the number of page fault exceptions triggered, avoid the processor being frequently interrupted by interrupt signals, and improve the performance of the processor.

[0032] In addition, all virtual addresses corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list can be mapped to the physical zero page in advance, which can effectively reduce the number of page fault exceptions triggered and reduce the occupied physical memory.

[0033] As an implementation manner, when the operation identifier corresponding to the VMA stored in the pre-mapping linked list indicates that the memory access operation corresponding to the page fault exception is a write access operation, the pre-mapping processing thread is further used to map the second virtual address corresponding to the pre-mapped virtual address information stored in the pre-mapping linked list to different physical pages respectively;

[0034] The second virtual address includes a target number of virtual addresses within a pre-mapped virtual address range corresponding to the pre-mapped virtual address information stored in the pre-mapped linked table.

[0035] In this embodiment, when the memory access operation corresponding to the page fault exception is a write access operation, the target number of virtual addresses corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list are mapped to different physical pages in advance through the pre-mapping processing thread. When the subsequent process uses the virtual address to perform a write access operation on the physical memory, the page fault exception will no longer be triggered. Therefore, the number of page fault exceptions triggered can be reduced, and the situation where too much memory is occupied due to too many pre-mapped physical pages can be avoided, thereby improving the rationality of memory allocation.

[0036] As an implementation manner, when the operation identifier corresponding to the VMA stored in the pre-mapping linked list indicates that the memory access operation corresponding to the page fault exception is a write access operation, the second virtual address is a virtual address that is not mapped to a physical address, or is a virtual address whose mapped physical page does not have a write access attribute;

[0037] The different physical pages are physical pages with write access attributes.

[0038] In this embodiment, for page fault exceptions triggered by write access operations, regardless of whether the second virtual address corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list has been mapped to a physical page before, it can be mapped in advance, thereby reducing the number of page fault exceptions triggered in different situations and expanding the applicable scenarios and scope.

[0039] As an implementation mode, when the electronic device is started, a pre-mapping linked list is created, and a pre-mapping processing thread is created.

[0040] In this embodiment, when the electronic device is started, a pre-mapping linked list and a pre-mapping processing thread can be created to facilitate the subsequent use of the pre-mapping linked list to manage the VMA that needs to be pre-mapped, and to pre-map the virtual address through the pre-mapping processing thread, thereby effectively reducing the number of page fault exceptions triggered.

[0041] The embodiment of the present application discloses a device for processing a page fault exception, the device comprising:

[0042] A VMA determination module, configured to determine, in response to a triggered page fault exception, a virtual memory space VMA to which a first virtual address corresponding to the page fault exception belongs;

[0043] A mapping module, used for mapping the first virtual address to a physical page;

[0044] A judging module, used for judging whether the pre-mapped linked list contains the VMA;

[0045] a storage module, configured to store the pre-mapped virtual address information of the VMA into the pre-mapped linked list if the pre-mapped linked list does not include the VMA; the pre-mapped virtual address range corresponding to the pre-mapped virtual address information of the VMA does not include the first virtual address;

[0046] The wake-up module is used to wake up the pre-mapping processing thread, and the pre-mapping processing thread is used to map the second virtual address corresponding to the pre-mapping virtual address information stored in the pre-mapping linked list to a physical page.

[0047] An embodiment of the present application discloses an electronic device, including a memory and a processor, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, the processor implements the method described in any of the above embodiments.

[0048] An embodiment of the present application discloses a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the method described in any of the above embodiments is implemented.

[0049] An embodiment of the present application discloses a computer program product, including a computer program, and when the computer program is executed by a processor, the method described in any of the above embodiments is implemented. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0051] Figure 1 This is an application scenario diagram of a method for processing a page fault exception in an embodiment;

[0052] Figure 2 A system architecture diagram of a method for handling page fault exceptions in one embodiment;

[0053] Figure 3 is a flowchart of a method for processing a page fault exception in one embodiment;

[0054] Figure 4 is a flowchart of a method for processing a page fault exception in another embodiment;

[0055] Figure 5 is a flowchart of a method for processing a page fault exception in another embodiment;

[0056] Figure 6 is a flowchart of a method for processing a page fault exception in another embodiment;

[0057] Figure 7 is a flowchart of a method for processing a page fault exception in another embodiment;

[0058] Figure 8 is a flowchart of a method for processing a page fault exception in another embodiment;

[0059] Fig. 9 is a flowchart of a method for processing a page fault exception in another embodiment;

[0060] Fig.10 is a block diagram of a device for processing a page fault exception in one embodiment;

[0061] Fig.11 FIG. 4 is a structural block diagram of an electronic device in an embodiment. DETAILED DESCRIPTION

[0062] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0063] It should be noted that the terms "including" and "having" and any variations thereof in the embodiments of the present application and the accompanying drawings are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device including a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products or devices.

[0064] It is understood that the terms "first", "second", etc. used in this application may be used in this article to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish a first element from another element. For example, without departing from the scope of this application, a first virtual address may be referred to as a second virtual address, and similarly, a second virtual address may be referred to as a first virtual address. Both the first virtual address and the second virtual address are virtual addresses, but they do not represent the same virtual address. The term "plurality" used in this application refers to two or more. The term "and / or" used in this application refers to one of the schemes, or any combination of multiple schemes.

[0065] The following are some explanations and descriptions of some terms that may be involved in this application:

[0066] Page fault exception: Page fault is a memory processing mechanism. When the processor accesses physical memory through a virtual address, if it finds that the virtual address is not mapped to physical memory, or the physical memory mapped by the virtual address does not have access rights, or the data to be accessed is not stored in the memory, etc., a page fault exception will be triggered. It should be noted that the page fault exception is not necessarily an error, but a normal memory processing mechanism.

[0067] Virtual address: virtual address is an abstract address provided by the operating system in modern computer systems. It enables each application to have its own virtual address space, and the virtual address space is independent, and the virtual address spaces of different processes do not interfere with each other. At present, processors in electronic devices, such as CPU (Central Processing Unit), etc., all access physical memory through virtual addresses. By converting virtual addresses to real physical addresses, the physical addresses can be read, written, and other access operations. The operating system shields the mapping relationship between virtual addresses and physical addresses, making the operation of applications safer.

[0068] Virtual memory space: virtual memory area, referred to as VMA, can be used to represent a linear interval. Each VMA can correspond to a continuous virtual address range. Each VMA can have specific properties, such as the starting virtual address, space size, access rights (such as read, write, execute, etc.). VMAs owned by different processes do not overlap with each other.

[0069] Physical address: physical address, also called real address or binary address, refers to the memory address of a specific storage unit in the main memory that can be accessed by the data bus, that is, the actual address of the memory unit. The physical address and the virtual address can be mapped through the page table. When the processor accesses the virtual address, it can obtain the physical address corresponding to the accessed virtual address through the page table, and then operate on the physical address.

[0070] Physical page: It is the basic unit for allocating and managing physical memory in the form of pages. Physical page is the basic unit for the processor to map virtual memory to physical memory through MMU (Memory Management Unit).

[0071] Anonymous page: Anonymous page is a special type of memory page, such as the pages used by the process's heap and stack. Anonymous pages are not associated with disk files. By using anonymous pages, the process can more conveniently perform memory management and dynamic data storage.

[0072] File page: refers to the memory page associated with the disk file, such as the code segment of the process, the mapping page of the file, etc. When reading a file from the disk, the memory will allocate a buffer to cache the file content.

[0073] Read access operation: refers to the operation of reading data from the target address accessed. When the processor accesses a virtual address for a read access operation, it can map the virtual address to a physical address and read the required data from the memory at the physical address.

[0074] Write access operation: refers to the operation of writing and storing data to the accessed target address. When the processor accesses a virtual address for a write access operation, it can map the virtual address to a physical address, write data to the memory at the physical address, and store it.

[0075] Page table entry: A page table is a data structure in the operating system, which is mainly used to manage the mapping relationship between virtual memory and physical memory. A page table entry is the basic unit of memory management. A page entry is an entry in a page table that records the mapping relationship between virtual addresses and physical addresses.

[0076] Physical zero page: During the initialization of the operating system, a page of memory is allocated. The memory of this page is filled with 0 during initialization. This page can be called a physical zero page. The entire operating system can have only one physical zero page, and the data of the physical zero page will not change dynamically during the use of the physical zero page.

[0077] Asynchronous thread: When a thread is executing a task, other threads or processes do not need to wait for the thread to complete the task.

[0078] Linked list: It is a non-continuous and non-sequential storage structure on a physical storage unit. A linked list can be composed of a series of nodes. Each node can include a data field and a pointer field. The data field is used to store data elements, and the pointer field is used to store the storage address pointing to the next node.

[0079] When a processor (such as a CPU) accesses physical memory through a virtual address, if it is found that the virtual address is not mapped to physical memory, or the physical memory mapped by the virtual address does not have access rights, or the data to be accessed is not stored in the memory, a page fault exception will be triggered. Handling page fault exceptions is part of the kernel's work. If the kernel determines that the processor's access is valid, the kernel will try to load the data related to the access from the hard backup to the memory. If the kernel determines that the processor's access is not allowed (that is, invalid), it will usually terminate the related process. Page fault exceptions are a normal memory processing mechanism and are not necessarily an error.

[0080] Each time a page fault exception is triggered, the memory management unit of the processor will generate an interrupt signal to notify the kernel to process. A large number of page fault exceptions will cause processor resource consumption and seriously affect the normal operation of the processor.

[0081] The embodiments of the present application disclose a method, device, electronic device and storage medium for processing page fault exceptions, which can effectively reduce the number of times page fault exceptions are triggered, reduce processor resource waste, and avoid a significant impact on the current process, thereby ensuring the normal operation of the current process.

[0082] Figure 1 FIG. 1 is an application scenario diagram of a method for handling a page fault exception in an embodiment. Figure 1 As shown, the page fault exception processing method can be applied to electronic device 100, which may include but is not limited to servers, PCs (Personal Computers), laptops, tablet computers, mobile phones, wearable devices (such as smart glasses, smart watches, etc.), etc.

[0083] Figure 2 FIG. 1 is a system architecture diagram of a method for handling page fault exceptions in one embodiment. Figure 2 As shown, when a process uses a certain virtual address to access memory, the CPU can generate a memory access request corresponding to the virtual address, and the MMU will process the memory access request issued by the CPU, convert the virtual address into a physical address, and implement access to the physical memory. In some scenarios, the MMU will trigger a page fault exception in the process of converting the virtual address to the physical address. When a page fault exception is triggered, physical memory can be allocated to the virtual address. When allocating physical memory, the interaction between the memory and the hard disk may be involved, such as loading the target page in the hard disk into the physical memory or replacing some pages of the physical memory with the hard disk.

[0084] In some embodiments, when the MMU searches for the physical address corresponding to a virtual address, it may first search in the TLB (translation lookaside buffer) whether there is a physical address corresponding to the virtual address. If the physical address corresponding to the virtual address is not found in the TLB, the MMU may search in the page table for the physical address corresponding to the virtual address.

[0085] In some embodiments, a process running on the CPU accesses physical memory through a first virtual address, and the CPU may generate a memory access request carrying the first virtual address, and send the memory access request to the MMU, which will search for the physical address corresponding to the first virtual address and determine whether to trigger a page fault exception. For example, if the MMU cannot find the physical address corresponding to the first virtual address, a page fault exception will be triggered, or if the MMU finds the physical address corresponding to the first virtual address, but the physical memory corresponding to the physical address has no access permission, etc., a page fault exception will be triggered.

[0086] If a page fault exception is triggered, the MMU will send an interrupt signal to the CPU, and the CPU will handle the page fault exception. In response to the triggered page fault exception, the CPU can determine the VMA to which the first virtual address belongs, and map the first virtual address to a physical page. The CPU can determine whether the pre-mapping linked list contains the VMA to which the first virtual address belongs. If the pre-mapping linked list does not contain the VMA to which the first virtual address belongs, the pre-mapped virtual address information of the VMA to which the first virtual address belongs can be stored in the pre-mapping linked list. The CPU can wake up and run the pre-mapping processing thread, and through the pre-mapping processing thread, map the second virtual address corresponding to the pre-mapped virtual address information stored in the pre-mapping linked list to the physical page.

[0087] The CPU maps the virtual address in the VMA to which the first virtual address belongs to the physical page in advance through the pre-mapping processing thread, without waiting until the process uses the virtual address to access the physical memory and triggers a page fault exception before mapping. When the subsequent process uses the pre-mapped virtual address to access the physical memory, at least the page fault exception will not be triggered because the virtual address is not mapped to the physical memory, which can effectively reduce the number of times the page fault exception is triggered, reduce the number of times the CPU is interrupted by interrupt signals, reduce the waste of CPU resources and improve process performance. Moreover, the use of an asynchronous pre-mapping processing thread to pre-map the second virtual address can avoid the pre-mapping process from having a greater impact on the process, ensuring the normal operation of the process.

[0088] like Figure 3 As shown, in one embodiment, a method for processing a page fault exception is provided, which can be applied to the above electronic device. The method may include the following steps:

[0089] Step 310 , in response to a triggered page fault exception, determining a VMA to which a first virtual address corresponding to the page fault exception belongs.

[0090] The process can use the first virtual address to access the physical memory, the processor can issue a memory access request carrying the first virtual address, and the MMU can receive the memory access request and search for the physical address corresponding to the first virtual address. If the MMU finds the physical address corresponding to the first virtual address, and the physical address has a permission problem (that is, the physical page corresponding to the physical address has the corresponding read permission), the MMU can send the physical address to the physical memory, thereby achieving access to the physical memory.

[0091] When the MMU fails to find the physical address corresponding to the first virtual address (for example, the first virtual address has no corresponding page table entry or the page table entry corresponding to the first virtual address is empty, etc.), or although the physical address corresponding to the first virtual address is found but the physical page corresponding to the physical address does not have the corresponding read and write permissions, a page fault exception will be triggered, and an interrupt signal corresponding to the page fault exception will be sent to the processor. The processor can handle the page fault exception according to the interrupt signal.

[0092] In some embodiments, the situations that trigger the page fault exception may include but are not limited to the following situations:

[0093] Case 1: Because the local variables of a function in the program are large or the function call level is deep, the current stack of the program is insufficient, and a stack overflow occurs. This may cause the virtual address accessed by the process to exceed the virtual address range allocated to it, thereby triggering a page fault exception.

[0094] Case 2: The virtual address accessed by the process has no actual allocated physical memory, which will trigger a page fault exception. For example, the process can allocate memory by calling methods such as malloc / mmap. The operating system only allocates virtual memory corresponding to the process and does not map the allocated virtual memory to physical memory. When the process first accesses the virtual address in the virtual memory, a page fault exception will be triggered.

[0095] Case 3: When a process accesses data stored in the memory and finds that the data has not been loaded into the memory, a page fault exception may be triggered. The data to be accessed may be loaded into the memory through the triggered page fault exception.

[0096] Case 4: When a process generates a child process through functions such as fork, the child process and the parent process share the allocated physical memory, but the child process only has read permission. When one of the child processes attempts to write to the physical page, a page fault exception is triggered.

[0097] Optionally, for the above-mentioned scenarios that trigger page fault exceptions, the electronic device can execute the page fault exception processing method provided in the embodiment of the present application for all the page fault exceptions triggered by the scenarios, and implement pre-mapping of virtual addresses to reduce the number of page fault exceptions triggered. Optionally, the page fault exception processing method provided in the embodiment of the present application can be executed only for some of the scenarios that trigger page fault exceptions, for example, only for the scenario where the virtual address is not allocated with geographic memory, the scenario where the mapped physical page does not have read and write permissions, etc., but it is not limited to this.

[0098] In some embodiments, when the processor receives an interrupt signal sent by the MMU, the processor may respond to the interrupt signal and process a page fault exception corresponding to the interrupt signal. The processor may obtain a first virtual address corresponding to the page fault exception, which is the virtual address that triggers the page fault exception.

[0099] In an embodiment of the present application, the processor may also determine the VMA to which the first virtual address corresponding to the page fault exception belongs, and pre-map at least part of the virtual addresses in the VMA. The VMA to which the first virtual address belongs may refer to the VMA containing the first virtual address.

[0100] As an implementation method, a process can be assigned a VMA. When a page fault exception is triggered, the processor can search for the VMA corresponding to the process as the VMA to which the first virtual address belongs. This method of determining the VMA to which the first virtual address belongs is simpler and faster.

[0101] As another implementation, a process may be assigned multiple VMAs. When a page fault exception is triggered, the processor may compare the first virtual address with the virtual address ranges of each VMA corresponding to the process, thereby determining the VMA to which the first virtual address belongs.

[0102] Furthermore, each VMA can be represented by a structure (such as struct vm_area_struct, etc.), which can include information such as the starting virtual address and the ending virtual address corresponding to the VMA. The first virtual address can be compared with the starting virtual address and the ending virtual address corresponding to the VMA to determine whether the first virtual address is greater than the starting virtual address corresponding to the VMA, and to determine whether the first virtual address is less than the ending virtual address corresponding to the VMA. If the first virtual address is greater than the starting virtual address corresponding to the VMA and less than the starting virtual address corresponding to the VMA, it can be determined that the first virtual address belongs to the VMA. By using this method of determining the VMA to which the first virtual address belongs, the VMA to which the first virtual address belongs can be determined more accurately.

[0103] Step 320: Map the first virtual address to a physical page.

[0104] The processor may map the first virtual address that triggers the page fault exception to a physical page to resolve the triggered page fault exception. Furthermore, mapping the first virtual address to the physical page may be an operation synchronized with the process. The process waits for the processor to map the first virtual address to the physical page before successfully accessing the physical memory through the first virtual address, thereby processing the page fault exception in a timely manner to ensure timeliness.

[0105] In some embodiments, the first virtual address may be a virtual address that is not mapped to a physical address, or the first virtual address may be a virtual address whose mapped physical page does not have the required read and write permissions (for example, the process performs a write access operation through the first virtual address, but the physical page mapped by the first virtual address is a read-only page, etc.).

[0106] If the first virtual address is a virtual address that is not mapped to a physical address, the processor may map the first virtual address to a physical page. Optionally, if the first virtual address is a virtual address that is not mapped to a physical address and the process uses the first virtual address for a read access operation, the first virtual address may be mapped to a physical zero page. Optionally, if the first virtual address is a virtual address that is not mapped to a physical address and the process uses the first virtual address for a write access operation, physical memory may be allocated to the first virtual address and the first virtual address may be mapped to the allocated physical page with write permission.

[0107] Optionally, if the first virtual address is a virtual address for which the mapped physical page does not have the required read permission, the physical memory corresponding to the first virtual address may be reallocated to map the first virtual address to the allocated physical page with write permission.

[0108] Step 330 , determining whether the pre-mapped linked list includes the VMA, if not, executing step 340 , and if so, executing step 350 .

[0109] In some embodiments, a pre-mapped linked list can be created in advance, which can be used to store pre-mapped virtual address information, which can be used to indicate a pre-mapped virtual address range that needs to be pre-mapped, and which can be used to determine each virtual address that needs to be pre-mapped.

[0110] Optionally, the pre-mapping linked list may be created when the electronic device is started, and further, the pre-mapping linked list may be created when the operating system of the electronic device is started. Optionally, the pre-mapping linked list may also be created when the processor receives an interrupt signal of a triggered page fault exception for the first time after the operating system of the electronic device is started, and the embodiments of the present application are not limited to this.

[0111] As an implementation method, the pre-mapped linked list may have a one-to-one correspondence with the process. When the processor starts a process, a pre-mapped linked list corresponding to the process may be created. The pre-mapped linked list may also store a process descriptor of the corresponding process. The process descriptor may be used to describe the process corresponding to the pre-mapped linked list. For example, the process descriptor may include but is not limited to one or more of a process identifier, a process status, and scheduling information (referring to information recording the scheduling priority and / or scheduling history of the process).

[0112] As another implementation, a pre-mapped linked list may be created for the entire operating system, and the pre-mapped linked list may be used to store pre-mapped virtual address information of each VMA of each process in the operating system.

[0113] The pre-mapped linked list may store pre-mapped virtual address information of one or more VMAs, each pre-mapped virtual address information may correspond to a pre-mapped virtual address range, and optionally, each pre-mapped virtual address range may correspond to a VMA. Optionally, the pre-mapped virtual address information of each VMA may include a pre-mapped starting virtual address and a pre-mapped ending virtual address, and the pre-mapped starting virtual address and the pre-mapped ending virtual address may represent a pre-mapped virtual address range, indicating that each virtual address between the pre-mapped starting virtual address and the pre-mapped ending virtual address needs to be pre-mapped. Optionally, the pre-mapped virtual address information of each VMA may also include each virtual address contained in the corresponding pre-mapped virtual address range.

[0114] In some embodiments, the pre-mapped linked list may store pre-mapped virtual address information corresponding to a plurality of VMAs, and the pre-mapped virtual address information of each VMA may be stored in a node of a linked list, or the pre-mapped virtual address information of a plurality of VMAs may be stored in a node of a linked list. Optionally, the pre-mapped linked list may include a hash linked list, etc., which may provide faster data storage efficiency and retrieval efficiency.

[0115] After mapping the first virtual address to the physical page, the processor may determine whether the pre-mapped linked list contains the VMA to which the first virtual address belongs. As an implementation method, the first virtual address may be compared with the pre-mapped virtual address information currently stored in the pre-mapped linked list to determine whether the first virtual address is within the pre-mapped virtual address range corresponding to the pre-mapped virtual address information currently stored in the pre-mapped linked list. If the first virtual address is within the pre-mapped virtual address range corresponding to the pre-mapped virtual address information currently stored in the pre-mapped linked list, it may be determined that the pre-mapped linked list contains the VMA to which the first virtual address belongs.

[0116] As another implementation method, the ending virtual address corresponding to the VMA to which the first virtual address belongs can be compared with the ending virtual address of the pre-mapped virtual address range corresponding to the pre-mapped virtual address information of each VMA currently stored in the pre-mapped linked list. If the comparison is successful, it means that the ending virtual address corresponding to the VMA to which the first virtual address belongs is stored in the pre-mapped linked list, and it can be determined that the VMA to which the first virtual address belongs is included in the pre-mapped linked list.

[0117] In some embodiments, a space identifier may be assigned to each VMA, and the space identifier may be used to identify the VMA. Different VMAs may correspond to different space identifiers, and the pre-mapped linked list may store the space identifier corresponding to the VMA and the pre-mapped virtual address information. After mapping the first virtual address to the physical page, the processor may compare the space identifier corresponding to the VMA to which the first virtual address belongs with the space identifiers of each VMA currently stored in the pre-mapped linked list. If the comparison is successful, it means that the space identifier corresponding to the VMA to which the first virtual address belongs and the pre-mapped virtual address information are stored in the pre-mapped linked list, and it can be determined that the pre-mapped linked list contains the VMA to which the first virtual address belongs.

[0118] Step 340: store the pre-mapped virtual address information of the VMA into a pre-mapped linked list.

[0119] When the pre-mapped linked list does not include the VMA to which the first virtual address belongs, the processor may store the pre-mapped virtual address information of the VMA to which the first virtual address belongs in the pre-mapped linked list, wherein the pre-mapped virtual address range corresponding to the pre-mapped virtual address information of the VMA does not include the first virtual address.

[0120] Optionally, in the VMA to which the first virtual address belongs, the range from the next virtual address of the first virtual address to the ending virtual address can be used as the pre-mapped virtual address range corresponding to the VMA. The pre-mapped virtual address information that can be stored in the pre-mapped linked list may include the next virtual address of the first virtual address and the ending virtual address corresponding to the VMA. Then the virtual address range corresponding to the next virtual address of the first virtual address to the ending virtual address is the pre-mapped virtual address range corresponding to the VMA.

[0121] Exemplarily, the VMA to which the first virtual address belongs may be a virtual address newly assigned to the process, and the first virtual address may be the starting virtual address of the VMA, that is, the first virtual address of the VMA. Then, the pre-mapped virtual address range corresponding to the VMA to which the first virtual address belongs may be the virtual address range from the next virtual address of the first virtual address to the end virtual address.

[0122] Optionally, the pre-mapped virtual address information stored in the pre-mapped linked list may also include each virtual address from the next virtual address of the first virtual address to the end virtual address, and each virtual address within the pre-mapped virtual address range corresponding to the VMA is stored in the pre-mapped linked list.

[0123] Step 350: wake up the pre-mapping processing thread, which is used to map the second virtual address corresponding to the pre-mapping virtual address information stored in the pre-mapping linked list to the physical page.

[0124] After the processor maps the first virtual address to the physical page, it can wake up and run the pre-mapping processing thread, which can be asynchronously operated with the process that triggers the page fault exception. The processor can map the second virtual address in the pre-mapped virtual address information stored in the pre-mapping linked list to the physical page through the pre-mapping processing thread to pre-map the second virtual address. Pre-mapping refers to mapping the virtual address to the physical page in advance, that is, establishing the mapping relationship between the virtual address and the physical address in advance, rather than waiting until the page fault exception is triggered to map.

[0125] The second virtual address to be pre-mapped may be all virtual addresses in the pre-mapped virtual address range corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list, or may be a certain number of virtual addresses in the pre-mapped virtual address range corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list, which is not limited here. Furthermore, all virtual addresses in the pre-mapped virtual address range corresponding to the pre-mapped virtual address information of the VMA to which the first virtual address belongs stored in the pre-mapped linked list may be mapped to physical pages through the pre-mapped processing thread; and a target number of virtual addresses in the pre-mapped virtual address range corresponding to the pre-mapped virtual address information of the VMA to which the first virtual address belongs stored in the pre-mapped linked list may also be mapped to physical pages through the pre-mapped processing thread.

[0126] As an implementation method, the processor maps the second virtual address corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list to a physical page through a pre-mapping processing thread, and the physical pages mapped by different virtual addresses may be the same physical page. For example, a page fault exception triggered by a read access operation, since the attributes corresponding to the virtual addresses contained in the VMA are usually the same, the subsequent process using the virtual address in the VMA is likely to also perform a read access operation on the physical memory. Therefore, the virtual addresses within the pre-mapped virtual address range corresponding to the pre-mapped virtual address information of the VMA may be mapped to the same physical page, thereby reducing memory waste.

[0127] As another implementation, the processor maps the second virtual address in the pre-mapped virtual address range corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list to a physical page through a pre-mapped processing thread, and different virtual addresses can be mapped to different physical pages. For example, in order to avoid the accurate execution of the write access operation, different virtual addresses can be mapped to different physical pages with write access attributes to improve the accuracy of memory access.

[0128] After the processor maps the second virtual address corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list to the physical page through the pre-mapped processing thread, if the subsequent process uses the pre-mapped virtual address to access the memory, at least the page fault exception will no longer be triggered because the virtual address has no mapped physical address, which can effectively reduce the number of page fault exception triggering times, thereby reducing the number of interrupt signals sent by the MMU to the processor, and can reduce the number of times the processor is interrupted by the interrupt signal, thereby improving the performance of the processor. In addition, the solution does not require reserved memory space, which can avoid unnecessary memory waste.

[0129] Optionally, after the processor maps the second virtual address corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list to the physical page through the pre-mapping processing thread, it can delete the mapped virtual address from the pre-mapped virtual address range corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list, and update the pre-mapped virtual address information stored in the pre-mapped linked list, thereby ensuring the accuracy of the pre-mapped virtual address information stored in the pre-mapped linked list and improving the accuracy of subsequent memory allocation.

[0130] In an embodiment of the present application, for a page fault exception triggered by accessing physical memory through a first virtual address, the first virtual address can be mapped to a physical page to resolve the triggered page fault exception, the VMA that needs to be pre-mapped can be managed through a pre-mapped linked list, and when the VMA to which the first virtual address belongs does not exist in the pre-mapped linked list, the VMA is added to the pre-mapped linked list, which can ensure the accuracy of the information stored in the pre-mapped linked list, and the second virtual address corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list can be pre-mapped through a pre-mapped processing thread, and the second virtual address corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list can be mapped to a physical page in advance, without waiting until a page fault exception is triggered by accessing physical memory through the second virtual address, and then mapping, when the physical memory is subsequently accessed through the second virtual address, at least the page fault exception will not be triggered because the second virtual memory is not mapped to the physical memory, which can effectively reduce the number of page fault exceptions triggered and reduce the waste of processor resources. Moreover, the use of an asynchronous pre-mapped processing thread to pre-map the virtual address can avoid the pre-mapping process from having a significant impact on the current process and ensure the normal operation of the current process.

[0131] like Figure 4 As shown, in another embodiment, a method for processing a page fault exception is provided, and the method may include the following steps:

[0132] Step 402: In response to a triggered page fault exception, determine a VMA to which a first virtual address corresponding to the page fault exception belongs.

[0133] Step 404: Map the first virtual address to a physical page.

[0134] Step 406 , determining whether the pre-mapped linked list includes the VMA, if not, executing step 408 , if yes, executing step 410 .

[0135] Step 408: Store the pre-mapped virtual address information of the VMA into a pre-mapped linked list.

[0136] The description of steps 402 to 408 may refer to the description of steps 310 to 340 in the above embodiment, and will not be repeated here.

[0137] In some embodiments, if the pre-mapped linked list does not include the VMA to which the first virtual address belongs, the pre-mapped virtual address information of the VMA and the pre-mapped virtual address information of one or more VMAs after the VMA may be stored in the pre-mapped linked list.

[0138] The processor can store the pre-mapped virtual address information corresponding to multiple VMAs in the pre-mapped linked list at one time. When the pre-mapped linked list does not include the VMA to which the first virtual address belongs, the processor can add the VMA to which the first virtual address belongs to the pre-mapped linked list and also add one or more VMAs after the VMA to the pre-mapped linked list.

[0139] Exemplarily, in the VMA to which the first virtual address belongs, the next virtual address and the ending virtual address of the first virtual address can be used as the pre-mapped virtual address information of the VMA and stored in the pre-mapped linked list. One or more VMAs after the VMA to which the first virtual address belongs can be obtained, and the starting virtual address and the ending virtual address corresponding to each VMA can be used as the pre-mapped virtual address information corresponding to each VMA and stored in the pre-mapped linked list.

[0140] Optionally, the number of VMAs added to the pre-mapped linked list (e.g., X) may be preset, and the number of VMAs may be greater than 1, but the number of VMAs should not be too large to avoid waste of resources due to too many pre-mapped VMAs. For example, the number of VMAs may be 2, 3, 4, etc., but is not limited thereto. In the case where the pre-mapped linked list does not include the VMA to which the first virtual address belongs, the processor may store the VMA to which the first virtual address belongs, and the pre-mapped virtual address information corresponding to each of the X-1 VMAs after the VMA, in the pre-mapped linked list.

[0141] In some embodiments, when the pre-mapping linked list does not include the VMA to which the first virtual address belongs, if the process corresponds to multiple VMAs, the pre-mapped virtual address information corresponding to all the VMAs of the process can be stored in the pre-mapping linked list. In this way, during the running of the process, only one operation of storing the pre-mapped virtual address information of the VMA in the pre-mapping linked list is required, which can reduce overhead and improve processor performance.

[0142] The pre-mapped virtual address information corresponding to each of the multiple VMAs can be stored in a pre-mapped linked list, so that the multiple VMAs can be pre-mapped in batches, which can greatly reduce the triggered page fault exceptions and improve the performance of the process and user program.

[0143] Step 410: remove the first virtual address from the pre-mapped virtual address range corresponding to the pre-mapped virtual address information of the VMA stored in the pre-mapped linked list.

[0144] When the pre-mapping linked list includes the VMA to which the first virtual address belongs, the processor may remove the first virtual address from the pre-mapped virtual address range corresponding to the pre-mapped virtual address information of the VMA stored in the pre-mapping linked list to update the pre-mapped virtual address information of the VMA (i.e., the pre-mapped virtual address range).

[0145] Exemplarily, the pre-mapped virtual address range corresponding to the pre-mapped virtual address information of the VMA to which the first virtual address currently stored in the pre-mapped linked list belongs is virtual address A to virtual address B, wherein the first virtual address may be the virtual address A, then the virtual address A can be removed from the pre-mapped virtual address range corresponding to the pre-mapped virtual address information of the VMA, and the pre-mapped virtual address range corresponding to the pre-mapped virtual address information of the VMA to which the first virtual address stored in the pre-mapped linked list is updated to be virtual address A1 to virtual address B, wherein virtual address A1 is the next virtual address of virtual address A (i.e., the first virtual address).

[0146] When the VMA to which the first virtual address belongs already exists in the pre-mapping linked list, the first virtual address is removed from the pre-mapping virtual address range corresponding to the pre-mapping virtual address information of the VMA stored in the pre-mapping linked list. This can avoid the pre-mapping processing thread from repeatedly mapping the first virtual address, thereby improving the accuracy of memory allocation.

[0147] Step 412: wake up the pre-mapping processing thread, which is used to map the second virtual address corresponding to the pre-mapping virtual address information stored in the pre-mapping linked list to the physical page.

[0148] In some embodiments, when the electronic device is started, a pre-mapping linked list may be created, and a pre-mapping processing thread may be created. After the pre-mapping processing thread is created, it may enter a dormant state, in which the pre-mapping processing thread will not run, that is, will not execute tasks. The processor may wake up the pre-mapping processing thread after mapping the first virtual address to the physical page in response to a triggered page fault exception, and pre-map the virtual address through the pre-mapping processing thread.

[0149] Exemplarily, the processor may create a pre-mapping processing thread when the operating system is started, and the pre-mapping processing thread is mainly used to perform the task of pre-mapping the virtual address; Exemplarily, the processor may also create a pre-mapping processing thread when the process is first created and run after the operating system is started; Exemplarily, the pre-mapping processing thread creator may also create a pre-mapping processing thread when the interrupt signal corresponding to the triggered page fault exception is first received after the operating system is started. The embodiment of the present application does not limit the timing of the processor creating the pre-mapping processing thread.

[0150] In some embodiments, after the processor maps the first virtual address to the physical page, the pre-mapping processing thread may be awakened if the awakening condition is met. The awakening condition may be a pre-set condition for determining whether to wake up the pre-mapping processing thread. Optionally, the awakening condition may include but is not limited to one or more of the following conditions:

[0151] (1) Complete the update of the pre-mapped virtual address information stored in the pre-mapped linked list.

[0152] Among them, updating the pre-mapped virtual address information stored in the pre-mapped linked list may include storing the pre-mapped virtual address information of the VMA to which the first virtual address belongs in the pre-mapped linked list, or removing the first virtual address from the pre-mapped virtual address range corresponding to the pre-mapped virtual address information of the VMA stored in the pre-mapped linked list.

[0153] After the processor stores the pre-mapped virtual address information of the VMA to which the first virtual address belongs in the pre-mapped linked list, or removes the first virtual address from the pre-mapped virtual address range corresponding to the pre-mapped virtual address information of the VMA stored in the pre-mapped linked list, that is, after the processor completes updating the pre-mapped virtual address information stored in the pre-mapped linked list, the pre-mapped processing thread can be awakened to pre-map the second virtual address corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list.

[0154] (2) The time from the current moment to the time when the processor maps the first virtual address to the physical page reaches the target time.

[0155] After the processor maps the first virtual address to the physical page, it can wait for the target time length and then wake up the pre-mapping processing thread to pre-map the second virtual address corresponding to the pre-mapped virtual address information stored in the pre-mapping linked list. By delaying the pre-mapping processing thread for a certain period of time before pre-mapping the second virtual address, the impact on the process can be reduced to ensure the normal operation of the process.

[0156] (3) The usage rate of the processor that handles the page fault exception is less than the usage rate threshold.

[0157] After the processor maps the first virtual address to the physical page, the processor usage rate can be obtained, and it can be determined whether the processor usage rate is less than the usage rate threshold. If the processor usage rate is less than the usage rate threshold, it means that the processor load is small, then the pre-mapping processing thread can be awakened to pre-map the second virtual address corresponding to the pre-mapped virtual address information stored in the pre-mapping linked list. When the processor load is small, waking up the pre-mapping processing thread to pre-map the virtual address can reduce the processing pressure of the processor and avoid the adverse effects on the operation of the process caused by the pre-mapping of the virtual address by the pre-mapping processing thread.

[0158] In the above-mentioned embodiment, after the processor maps the first virtual address to the physical page, it can wake up the pre-mapping processing thread if the wake-up condition is met, and pre-map the second virtual address corresponding to the pre-mapped virtual address information stored in the pre-mapping linked list through the pre-mapping processing thread. The operation of the pre-mapping processing thread can be flexibly controlled, reducing the impact of pre-mapping of the virtual address through the pre-mapping processing thread on the process, thereby ensuring the normal operation of the process.

[0159] After waking up the pre-mapping processing thread, the pre-mapping processing thread can obtain one or more virtual addresses that need to be pre-mapped according to the pre-mapping virtual address information stored in the pre-mapping linked list, and map the one or more virtual addresses to the same or different physical pages.

[0160] In an embodiment of the present application, after mapping the first virtual address to a physical page, it can be determined whether the VMA to which the first virtual address belongs exists in the pre-mapping linked list. If so, the first virtual address can be deleted from the pre-mapped virtual address range corresponding to the pre-mapped virtual address information of the VMA. If not, the VMA can be added to the pre-mapping linked list, thereby ensuring the accuracy of the information stored in the pre-mapping linked list, thereby ensuring the accuracy of the virtual address pre-mapping performed by the subsequent pre-mapping processing thread.

[0161] like Figure 5 As shown, in some embodiments, a method for processing a page fault exception is provided, and the method may include the following steps:

[0162] Step 502, the operating system starts.

[0163] Exemplarily, when the operating system of the electronic device is started, functions such as mm_init() may be called to initialize memory-related modules.

[0164] Step 504: Create an asynchronous pre-mapping management structure.

[0165] Exemplarily, the asynchronous pre-mapping management structure may be a data structure for storing pre-mapping related data.

[0166] Step 506: Create a pre-mapping linked list for the asynchronous pre-mapping management structure.

[0167] Exemplarily, the pre-mapped linked list can be used to store the pre-mapped virtual address range corresponding to the VMA that needs to be pre-mapped. Optionally, the pre-mapped linked list can also be used to store the virtual address that triggers the page fault exception, the VMA to which the virtual address belongs, and the process descriptor corresponding to the process to which it belongs.

[0168] Step 508: Create a pre-mapping processing thread.

[0169] Step 510: The CPU accesses the physical memory through the first virtual address.

[0170] Exemplarily, the user program accesses the physical memory through the first virtual address.

[0171] Step 512: The first virtual address has no page table entry or the page table entry content is empty.

[0172] Step 514, triggering a page fault exception.

[0173] Step 516, searching for the VMA corresponding to the first virtual address.

[0174] Step 518: Map the first virtual address to a physical page.

[0175] Step 520, determine whether the VMA is in the pre-mapped linked list, if yes, execute step 526, if not, execute step 522.

[0176] Step 522: Add the VMA to the pre-mapped linked list.

[0177] Step 524: Add the N VMAs following the VMA to the pre-mapped linked list according to the configuration.

[0178] For example, N may be a positive integer.

[0179] Step 526: Delete the first virtual address from the pre-mapped virtual address range of the VMA.

[0180] Step 528, wake up the pre-mapping processing thread.

[0181] Step 530: Obtain the second virtual address that needs to be pre-mapped according to the pre-mapping linked list.

[0182] Exemplarily, the pre-mapped virtual address range corresponding to the pre-mapped virtual address information of the VMA may be obtained from the pre-mapped linked list by the pre-mapped processing thread to obtain the pre-mapped second virtual address.

[0183] Exemplarily, the pre-mapping linked list may be traversed by a pre-mapping processing thread to obtain all virtual addresses included in the pre-mapped virtual address range corresponding to the pre-mapped virtual address information of each VMA stored in the pre-mapping linked list as the second virtual address.

[0184] Step 532: pre-map the acquired second virtual address.

[0185] In an embodiment of the present application, the second virtual address corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list can be pre-mapped through a pre-mapping processing thread, which can effectively reduce the number of times a page fault exception is triggered and reduce the waste of processor resources; moreover, the pre-mapping processing thread is used to pre-map the virtual address, which can avoid the pre-mapping processing from having a greater impact on the current process and ensure the normal operation of the current process.

[0186] In some embodiments, the pre-mapped linked list may store a pre-mapped virtual address range corresponding to the VMA and an operation identifier corresponding to the VMA, where the operation identifier is used to indicate an access page type and / or a memory access operation corresponding to a page fault exception.

[0187] After determining whether the pre-mapping linked list includes the VMA to which the first virtual address belongs, if the pre-mapping linked list does not include the VMA, the operation identifier corresponding to the VMA may be stored in the pre-mapping linked list; or, if the pre-mapping linked list includes the VMA, but the operation identifier corresponding to the VMA stored in the pre-mapping linked list does not match the access page type and / or memory access operation corresponding to the page fault exception, the operation identifier corresponding to the VMA in the pre-mapping linked list is updated to an operation identifier that matches the access page type and / or memory access operation corresponding to the page fault exception.

[0188] If the processor receives an interrupt signal corresponding to a page fault exception sent by the MMU, the access page type corresponding to the page fault exception can be obtained, and the access page type can refer to the type of memory page accessed by the process using the first virtual address, and the access page type can include anonymous pages or file pages, etc. Further, since the access page types corresponding to the virtual page and the physical page accessed by the process are the same, the access page type corresponding to the obtained page fault exception can refer to the access page type of the virtual page corresponding to the first virtual address accessed, or can refer to the access page type of the physical page mapped to the first virtual address accessed.

[0189] Furthermore, the processor may also obtain a memory access operation corresponding to the page fault exception. The memory access operation may refer to an operation performed by the process on the accessed physical memory. The memory access operation may include a read access operation or a write access operation, etc.

[0190] After determining the access page type and / or memory access operation corresponding to the page fault exception, the operation identifier corresponding to the access page type and / or memory access operation can be stored in the pre-mapped linked table, and the operation identifiers corresponding to different access page types and / or memory access operations can be different. Optionally, the operation identifier can be composed of one or more of numbers, symbols, letters, etc.

[0191] For example, the operation identifier may include a first operation identifier, which may be used to indicate that the access page type corresponding to the page fault exception is an anonymous page, and the memory access operation corresponding to the page fault exception is a read access operation.

[0192] For another example, the operation identifier may include a second operation identifier, and the second operation identifier may be used to indicate that the memory access operation corresponding to the page fault exception is a write access operation.

[0193] As an implementation mode, after the processor determines whether the pre-mapping linked list includes the VMA to which the first virtual address belongs, if the pre-mapping linked list does not include the VMA, the pre-mapped virtual address information of the VMA and the corresponding operation identifier may be stored in the pre-mapping linked list.

[0194] As an implementation method, after the processor determines whether the pre-mapped linked list includes the VMA to which the first virtual address belongs, if the pre-mapped linked list includes the VMA, the first virtual address may be removed from the pre-mapped virtual address range corresponding to the pre-mapped virtual address information of the VMA stored in the pre-mapped linked list, and it may also be determined whether the operation identifier corresponding to the VMA stored in the pre-mapped linked list matches the access page type and / or memory access operation corresponding to the page fault exception. If the operation identifier corresponding to the VMA stored in the pre-mapped linked list does not match the access page type and / or memory access operation corresponding to the page fault exception, the operation identifier corresponding to the VMA in the pre-mapped linked list may be updated to an operation identifier that matches the access page type and / or memory access operation corresponding to the page fault exception, thereby ensuring the accuracy of the information stored in the pre-mapped linked list.

[0195] When performing pre-mapping processing, the pre-mapping processing thread can execute different pre-mapping strategies according to the operation identifier corresponding to the VMA stored in the pre-mapping linked list, that is, different pre-mapping strategies can be used for pre-mapping processing for different access page types and / or virtual addresses of memory access operations.

[0196] The pre-mapping strategy refers to a method of pre-mapping the second virtual address corresponding to the pre-mapped virtual address information stored in the pre-mapping linked list. Optionally, the difference in pre-mapping strategy may be a different number of pre-mapped virtual addresses or a different physical page to which the virtual address is mapped.

[0197] In an embodiment of the present application, the pre-mapping linked list can store the pre-mapped virtual address information of the VMA and the corresponding operation identifier, so that the pre-mapping processing thread can pre-map the second virtual address in the pre-mapping linked list more accurately based on the operation identifier, thereby improving the flexibility and accuracy of virtual address pre-mapping.

[0198] like Figure 6 As shown, in some embodiments, a method for processing a page fault exception is provided, and the method may include the following steps:

[0199] Step 602: In response to a triggered page fault exception, determine a VMA to which a first virtual address corresponding to the page fault exception belongs.

[0200] The description of step 602 may refer to the relevant description in the above embodiments, and will not be repeated here.

[0201] Step 604: When the access page type corresponding to the page fault exception is an anonymous page and the memory access operation corresponding to the page fault exception is a read access operation, map the first virtual address to the target physical page.

[0202] The processor can determine whether the access page type corresponding to the page fault exception is an anonymous page, that is, whether the page fault exception is triggered by accessing the anonymous page. In the related art, when a process first applies for anonymous page allocation, the operating system (i.e., the kernel) usually only allocates virtual memory, but not physical memory. When the process first accesses the allocated anonymous page, a page fault exception is triggered, a physical page is allocated, and a mapping relationship between the virtual page and the physical page is established. Therefore, when the process first accesses each virtual address, a page fault exception is triggered.

[0203] In an embodiment of the present application, when it is determined that the access page type corresponding to the page fault exception is an anonymous page, the VMA to which the first virtual address belongs can be pre-mapped. When subsequent processes access the physical memory through other virtual addresses of the VMA, at least the page fault exception will not be triggered due to the virtual memory not being mapped to the physical memory, thereby effectively reducing the number of page fault exceptions being triggered.

[0204] Furthermore, it can be determined whether the access page type corresponding to the page fault exception is a private anonymous page. The private anonymous page refers to an anonymous page that belongs only to a process and can only be accessed by the process. When it is determined that the access page type corresponding to the page fault exception is a private anonymous page, the VMA to which the first virtual address belongs is pre-mapped. The number of page fault exception triggering times can be reduced without making too many modifications to the memory allocation process in the related art.

[0205] It should be noted that the processor can first obtain the access page type corresponding to the page fault exception, and when determining that the access page type is an anonymous page, determine the VMA to which the first virtual address corresponding to the page fault exception belongs. It can also obtain the access page type corresponding to the page fault exception after determining the VMA to which the first virtual address corresponding to the page fault exception belongs. The embodiment of the present application does not specifically limit the execution order between the two steps.

[0206] In an embodiment of the present application, since the operating system does not allocate physical memory when allocating an anonymous page corresponding to a process, when the process accesses the anonymous page and triggers a page fault exception, the second virtual address corresponding to the pre-mapped virtual address information stored in the pre-mapping linked list can be pre-mapped, and the second virtual address can be mapped to the physical page in advance without waiting until the physical memory is accessed through the second virtual address and a page fault exception is triggered. This can effectively reduce the number of times a page fault exception is triggered and reduce the waste of processor resources.

[0207] In an embodiment of the present application, the processor may also obtain a memory access operation corresponding to the page fault exception. The memory access operation may refer to an operation performed by the process on the accessed physical memory. The memory access operation may include a read access operation or a write access operation, etc.

[0208] When the access page type corresponding to the page fault exception is an anonymous page, and the memory access operation corresponding to the page fault exception is a read access operation, the processor may map the first virtual address to the target physical page.

[0209] Optionally, the target physical page may include a physical zero page. When the memory access operation is a read access operation, the first virtual address may be mapped to the physical zero page. The physical zero page is a physical page allocated during the initialization of the operating system. The physical zero page will not change during use, that is, the physical address corresponding to the physical zero page is fixed, and it may change unless the operating system is reinitialized (such as reinstalling the operating system, etc.). Furthermore, the physical zero page has a read access attribute, so the processor can map the first virtual address to the physical zero page, so that the process can correctly access the physical memory through the first virtual address to read data.

[0210] Step 606, determine whether the pre-mapped linked list contains the VMA, if so, execute step 608, if not, execute step 610.

[0211] Step 608: remove the first virtual address from the pre-mapped virtual address range corresponding to the pre-mapped virtual address information of the VMA stored in the pre-mapped linked list.

[0212] Step 610: Store the pre-mapped virtual address information of the VMA into a pre-mapped linked list.

[0213] The description of steps 606 to 610 may refer to the relevant description in the above embodiment, and will not be repeated here.

[0214] Step 612: Store the operation identifier corresponding to the VMA into the pre-mapped linked list, where the operation identifier is used to indicate that the access page type corresponding to the page fault exception is an anonymous page, and the memory access operation corresponding to the page fault exception is a read access operation.

[0215] Exemplarily, after mapping the first virtual address to the target physical page, the operation identifier corresponding to the VMA may be set as the first operation identifier in the pre-mapping linked list, indicating that the page fault exception corresponding to the VMA is triggered by a read access operation of an anonymous page.

[0216] Step 614, waking up the pre-mapping processing thread, the pre-mapping processing thread is used to map the second virtual address corresponding to the pre-mapping virtual address information stored in the pre-mapping linked list to the target physical page.

[0217] The second virtual address includes all virtual addresses within the pre-mapped virtual address range corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list.

[0218] The processor can determine, through the pre-mapping processing thread, the second virtual address corresponding to the access page type and / or memory access operation indicated by the operation identifier stored in the pre-mapping linked list in the pre-mapping virtual address information stored in the pre-mapping linked list. Exemplarily, since the read access operation only involves reading data from the physical memory, and the write access operation involves writing data to the physical memory and storing it, which is more complicated, the number of pre-mapped virtual addresses corresponding to the read access operation can be greater than the number of pre-mapped virtual addresses corresponding to the write access operation, which can avoid unnecessary waste of memory space.

[0219] In some embodiments, the second virtual address corresponding to the read access operation may be all virtual addresses included in the pre-mapped virtual address range corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list. The pre-mapped virtual address range corresponding to the pre-mapped virtual address information of each VMA stored in the pre-mapped linked list may be traversed to obtain all virtual addresses included in the pre-mapped virtual address range corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list.

[0220] When the access page type corresponding to the page fault exception is an anonymous page, and the memory access operation corresponding to the page fault exception is a read access operation, the processor can map all virtual addresses contained in the pre-mapped virtual address range corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list to the same target physical page through the pre-mapped processing thread. The pre-mapped linked list can at least store the pre-mapped virtual address information of the VMA to which the first virtual address belongs, and optionally, the pre-mapped linked list can also include pre-mapped virtual address information corresponding to one or more VMAs after the VMA to which the first virtual address belongs.

[0221] Further, when the operation identifier corresponding to the VMA stored in the pre-mapping linked list is the first operation identifier, that is, the operation identifier corresponding to the VMA stored in the pre-mapping linked list indicates that the access page type corresponding to the page fault exception is an anonymous page, and the memory access operation corresponding to the page fault exception is a read access operation, the pre-mapping processing thread can map all virtual addresses contained in the pre-mapped virtual address range corresponding to the pre-mapped virtual address information stored in the pre-mapping linked list to the physical zero page based on the operation identifier corresponding to the VMA stored in the pre-mapping linked list. By mapping all virtual addresses contained in the pre-mapped virtual address range corresponding to the pre-mapped virtual address information stored in the pre-mapping linked list to the physical zero page in advance through the pre-mapping processing thread, the number of page fault exception triggering can be effectively reduced, and the occupied physical memory can be reduced. Moreover, since the mapping process does not involve the allocation of physical memory, it takes very little time and causes very little overhead. When the subsequent process first accesses the virtual address in the VMA, the page fault exception will no longer be triggered because the virtual address is not mapped to the physical page, which can further reduce the number of page fault exceptions triggered, reduce the waste of processor resources, and will not cause additional overhead.

[0222] In an embodiment of the present application, when the access page type corresponding to the page fault exception is an anonymous page, and the memory access operation corresponding to the page fault exception is a read access operation, the first virtual address can be mapped to the target physical page, and the pre-mapping processing thread can map all virtual addresses contained in the pre-mapped virtual address range corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list to the target physical page based on the operation identifier corresponding to the VMA stored in the pre-mapped linked list. Pre-mapping all virtual address mappings contained in the pre-mapped virtual address range corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list can effectively reduce the number of page fault exceptions triggered, avoid the processor being frequently interrupted by interrupt signals, and improve the performance of the processor. Moreover, the method of pre-mapping all virtual addresses in the pre-mapped linked list by the pre-mapping processing thread can avoid the pre-mapping process from having a greater impact on the current process and ensure the normal operation of the current process.

[0223] like Figure 7 As shown, in some embodiments, a method for processing a page fault exception is provided, and the method may include the following steps:

[0224] Step 702: In response to a triggered page fault exception, determine a VMA to which a first virtual address corresponding to the page fault exception belongs.

[0225] Step 704: When the memory access operation corresponding to the page fault exception is a write access operation, map the first virtual address to a physical page.

[0226] If the processor receives an interrupt signal corresponding to a page fault exception sent by the MMU, the memory access operation corresponding to the page fault exception can be obtained. Optionally, the memory access operation can be a write access operation, and the first virtual address can be a virtual address that is not mapped to a physical page, or a mapped physical page that does not have a write access attribute (i.e., does not have write permission, such as a physical page mapped by the first virtual address is only a write access operation).

[0227] When the memory access operation corresponding to the page fault exception is a write access operation, the processor can map the first virtual address to a physical page, which can be a physical page with a write access attribute (i.e., with write permission). The process can then access the physical memory normally through the physical page and perform write operations on the data in the physical memory.

[0228] Step 706, determine whether the pre-mapped linked list contains the VMA, if so, execute step 708, if not, execute step 710.

[0229] Step 708: remove the first virtual address from the pre-mapped virtual address range corresponding to the pre-mapped virtual address information of the VMA stored in the pre-mapped linked list.

[0230] Step 710: store the pre-mapped virtual address information of the VMA into a pre-mapped linked list.

[0231] The description of steps 706 to 710 may refer to the relevant description in the above embodiment, and will not be repeated here.

[0232] Step 712: Store the operation identifier corresponding to the VMA into the pre-mapped linked list, where the operation identifier is used to indicate that the memory access operation corresponding to the page fault exception is a write access operation.

[0233] Exemplarily, after the first virtual address is mapped to the physical page, the operation identifier corresponding to the VMA may be set as the second operation identifier in the pre-mapping linked list, which may indicate that the page fault exception corresponding to the VMA is triggered by a write access operation.

[0234] Step 714, waking up the pre-mapping processing thread, the pre-mapping processing thread is used to map the second virtual address corresponding to the pre-mapping virtual address information stored in the pre-mapping linked list to different physical pages respectively.

[0235] The second virtual address includes a target number of virtual addresses within a pre-mapped virtual address range corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list.

[0236] When the memory access operation corresponding to the page fault exception is a write access operation, the processor may pre-map part of the virtual addresses within the pre-mapped virtual address range corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list through a pre-mapping processing thread. Optionally, the part of the virtual addresses may be virtual addresses that are not mapped to physical addresses, or virtual addresses for which the mapped physical pages do not have write access attributes.

[0237] If the processor has not established a mapping relationship between the virtual address in the VMA and the physical address before the process uses the first virtual address to perform a write access operation on the physical memory and triggers a page fault exception, the virtual address may be a virtual address in the VMA that is not mapped to a physical address.

[0238] If the process uses the first virtual address to perform a write access operation on the physical memory and the processor has established a mapping relationship between the virtual address in the VMA and the physical address before triggering the page fault exception, the virtual address can also be a virtual address whose mapped physical page does not have a write access attribute. For example, the physical page mapped by the virtual address in the VMA is a read-only page and does not have write permission, so the physical page does not have a write access attribute.

[0239] For page fault exceptions triggered by write access operations, regardless of whether the second virtual address corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list has been mapped to a physical page before, it can be mapped in advance, thereby reducing the number of page fault exceptions triggered in different situations and expanding the applicable scenarios and scope.

[0240] In the case where the memory access operation corresponding to the triggered page fault exception is a write access operation, the processor can obtain the target number of virtual addresses within the pre-mapped virtual address range corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list as the second virtual address through the pre-mapped processing thread based on the operation identifier corresponding to the VMA stored in the pre-mapped linked list, and pre-map the target number of virtual addresses. The target number can be set according to actual needs, and the target number should not be too large, so as to avoid the problem of physical memory waste caused by too many pre-mapped physical pages. For example, the target number can be 4, 3, 5, etc., but is not limited to this.

[0241] As an implementation method, the target number of virtual addresses may be continuous virtual addresses, and further, the target number of virtual addresses may be the target number of virtual addresses that are continuous after the first virtual address in the VMA to which the first virtual address belongs. The method of obtaining the second virtual address is simpler, and there is no need to look up the page table, which reduces the overhead. Moreover, since each pre-mapped second virtual address is a continuous virtual address, it can also ensure that the virtual address after the first virtual address that triggers the page fault exception will not trigger the page fault exception due to the same reason, and the accuracy of memory allocation can be guaranteed.

[0242] In the case where the memory access operation is a write access operation, since the write access operation needs to write data to the physical memory and store it, in order to avoid data erasure when writing data (such as overwriting the data previously written to the physical page), for the target number of virtual addresses, the pre-mapping processing thread can map the target number of virtual addresses to different physical pages respectively, and the different physical pages can be physical pages with write access attributes, that is, the target number of virtual addresses can be assigned different physical pages with write access attributes. Furthermore, the physical page pre-mapped by the second virtual address is different from the physical page mapped by the first virtual address, which can ensure the accuracy of memory access.

[0243] In some embodiments, the target number may be less than a number threshold, which may be set according to actual needs, for example, the number threshold may be 6, 5, 7, etc., but is not limited thereto. Unnecessary overhead and physical memory waste may be reduced, thereby reducing overhead and physical memory waste.

[0244] In some embodiments, the target number may be a preset number, that is, a fixed number; or, the target number may be determined according to the triggering number and / or triggering frequency of page fault exceptions triggered by write access operations.

[0245] The number of page fault exceptions triggered by write access operations may refer to the total number of page fault exceptions triggered by a process using a virtual address to perform write access operations on physical memory. The triggering frequency of page fault exceptions triggered by write access operations may refer to the number of page fault exceptions triggered by a process using a virtual address to perform write access operations on physical memory per unit time.

[0246] Further, the target number may be positively correlated with the triggering number and / or triggering frequency of the page fault exception triggered by the write access operation.

[0247] If the number of page fault exceptions triggered by write access operations is greater and / or the triggering frequency is higher, it means that the probability of the process triggering a page fault exception when performing a write access operation is very high, then the target number can be larger, so that more second virtual addresses can be pre-mapped to effectively reduce the number of page fault exceptions triggered by the process performing a write access operation.

[0248] The smaller the number of page fault exceptions triggered by write access operations and / or the lower the triggering frequency, the smaller the probability of the process triggering a page fault exception during write access operations. The target number can be smaller, thereby pre-mapping fewer second virtual addresses to reduce unnecessary waste of physical memory.

[0249] By dynamically adjusting the target number, we can better balance the need to reduce physical memory waste and reduce the number of triggered page fault exceptions, and further optimize the page fault exception processing mechanism.

[0250] In some embodiments, the second virtual addresses are mapped to different physical pages respectively, and the physical pages may be physical pages with write access attributes and filled with data of 0.

[0251] The physical page can be understood as a new physical page in the physical memory, and the permission of the new physical page can be configured as write permission, and the data of the new physical page can be filled with 0. It should be noted that the new physical page is different from the physical zero page, and the new physical page changes dynamically. For example, the new physical page can be a physical page released by releasing the mapping of the old physical page originally mapped to the virtual address, etc., but it is not limited to this.

[0252] Through the pre-mapping processing thread, the target number of virtual addresses within the pre-mapped virtual address range corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list are mapped to different physical pages respectively, and the physical page can be a physical page with write access attributes and filled with data of 0, which can further reduce the occupied physical memory and reduce unnecessary waste of physical memory.

[0253] In the embodiment of the present application, the target number of virtual addresses within the pre-mapped virtual address range corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list are mapped to different physical pages with write access attributes in advance through the pre-mapped processing thread. When the subsequent process uses the virtual address to perform write access operations on the physical memory, the page fault exception will no longer be triggered, thereby reducing the number of page fault exceptions triggered. In addition, the situation where too much memory is occupied due to too many pre-mapped physical pages can be avoided, thereby improving the rationality of memory allocation.

[0254] In some embodiments, after the processor maps the first virtual address to the physical page, a page table entry corresponding to the first virtual address and the mapped physical page may be created. Further, after the second virtual address corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list is mapped to the physical page through the pre-mapping processing thread, a page table entry corresponding to each pre-mapped virtual address and the mapped physical page may be created through the pre-mapping processing thread.

[0255] After the processor maps the first virtual address to the physical page, a page table entry corresponding to the first virtual address may be generated according to the first virtual address and page information of the mapped physical page, and the generated page table entry may be saved in a page table corresponding to the process.

[0256] The page information of the physical page may include but is not limited to the physical address corresponding to the physical page, access attributes (i.e., access permissions), page size, etc. The page table entry corresponding to the generated first virtual address may be used to describe the mapping relationship between the first virtual address and the physical page. The page table entry may include the first virtual address, page information of the physical page mapped by the first virtual address, etc. The MMU may convert the first virtual address into the mapped physical address by searching the page table entry, thereby realizing access to the physical memory.

[0257] Furthermore, after the processor maps the second virtual address corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list to the physical page through the pre-mapping processing thread, the pre-mapping processing thread can also generate page entries corresponding to each pre-mapped virtual address based on the page information of each pre-mapped virtual address and the mapped physical page, and save the generated page table entry in the page table corresponding to the process.

[0258] The page table entry corresponding to the generated pre-mapped virtual address can be used to describe the mapping relationship between the pre-mapped virtual address and the physical page. The page table entry may include the pre-mapped virtual address, page information of the physical page mapped by the pre-mapped virtual address, etc.

[0259] In some embodiments, since there is a high probability that subsequent processes use pre-mapped virtual addresses to access memory, the processor may store the generated page table entries in the TLB corresponding to the MMU. When subsequent processes use pre-mapped virtual addresses to access memory, the MMU may first search the TLB for the physical address corresponding to the virtual address without having to search in the page table corresponding to the process. This can further improve the efficiency of the MMU in searching for physical addresses and improve the efficiency of the process in accessing physical memory.

[0260] In an embodiment of the present application, after the processor maps the first virtual address to a physical page, a page table entry corresponding to the first virtual address and the mapped physical page can be created. After the processor maps the second virtual address corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list to the physical page through a pre-mapping processing thread, a page table entry corresponding to each pre-mapped virtual address and the mapped physical page can also be created through the pre-mapping processing thread. When a subsequent process uses the pre-mapped virtual address to access physical memory, the physical address corresponding to the virtual address can be determined through the page table entry, thereby achieving normal access to the physical memory and no longer triggering a page fault exception, thereby effectively reducing the number of page fault exceptions triggered and reducing processor resource waste.

[0261] For example, after the electronic device pre-maps the virtual address, it can use the virtual address to access the physical memory again without triggering a page fault exception. Figure 8As shown, a method for processing a page fault exception is provided, and the method may include the following steps:

[0262] Step 802: The process accesses the physical memory through the first virtual address.

[0263] Step 804, triggering a page fault exception.

[0264] Furthermore, if the page table entry corresponding to the first virtual address is not found, or the content of the page table entry corresponding to the first virtual address is empty, a page fault exception is triggered.

[0265] Step 806, mapping the first virtual address to a physical page.

[0266] Step 808, determining the VMA to which the first virtual address belongs, and N VMAs following the VMA to which the first virtual address belongs.

[0267] Further, when it is determined that the pre-mapped linked list does not store the pre-mapped virtual address information of the VMA to which the first virtual address belongs, the first virtual address is removed from the pre-mapped virtual address range corresponding to the pre-mapped virtual address information of the VMA to which the first virtual address belongs. When it is determined that the pre-mapped linked list does not contain the VMA to which the first virtual address belongs, the pre-mapped virtual address information corresponding to the VMA to which the first virtual address belongs and the N VMAs after the VMA to which the first virtual address belongs are stored in the pre-mapped linked list.

[0268] Step 810: implement pre-mapping through a pre-mapping processing thread.

[0269] Furthermore, the second virtual address corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list is pre-mapped to the physical page through the pre-mapping processing thread.

[0270] Step 812, create a page table entry.

[0271] After the processor maps the first virtual address to a physical page, a page table entry corresponding to the first virtual address can be created. After the processor pre-maps the second virtual address corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list to the physical page through a pre-mapping processing thread, the pre-mapping processing thread can create page table entries corresponding to each pre-mapped virtual address.

[0272] In step 814, the process uses the virtual address to access the physical memory again.

[0273] Step 816, determine whether the virtual address belongs to a pre-mapped VMA.

[0274] Step 818, directly find the physical address mapped to the virtual address, and access the physical memory based on the mapped physical address, without triggering a page fault exception due to the virtual address not being mapped to the physical address.

[0275] Optionally, when the physical address mapped to the virtual address is found and it is determined that the physical page mapped to the virtual address has access rights, accessing the physical memory based on the mapped physical address will not trigger a page fault exception due to the virtual address not being mapped to the physical address or the mapped physical page having no access rights.

[0276] In the embodiment of the present application, the number of times a page fault exception is triggered can be effectively reduced, the situation where the processor is frequently interrupted by an interrupt signal can be avoided, the resource waste of the processor is reduced, and the performance of the process and application is improved. Moreover, by pre-mapping the processing thread to achieve pre-mapping, a significant impact on the operation of the process can be avoided.

[0277] For example, the electronic device may perform address pre-mapping when the process performs a read access operation or a write access operation on the virtual address for the first time, or may perform address pre-mapping when the physical page mapped to the virtual address used by the process does not have access rights. Fig. 9 As shown, a method for processing a page fault exception is provided, and the method may include the following steps:

[0278] Step 902: The process accesses the physical memory through the first virtual address.

[0279] Step 904, triggering a page fault exception.

[0280] Step 906, determining that the first virtual address corresponds to a newly allocated memory.

[0281] Step 908: If a page fault exception is triggered by a read access operation to a private anonymous page, the first virtual address may be pre-mapped to a physical zero page.

[0282] Step 910, through the pre-mapping processing thread, based on the operation identifier stored in the pre-mapping linked list, pre-map all virtual addresses in the VMA to which the first virtual address stored in the pre-mapping linked list belongs and N VMAs after the VMA to the physical zero page.

[0283] Step 912: If a page fault exception is triggered by a write access operation to a private anonymous page, a physical page corresponding to the first virtual address may be allocated.

[0284] Step 914: pre-map a target number of virtual addresses in the VMA to which the first virtual address stored in the pre-map linked list belongs to different physical pages respectively through the pre-mapping processing thread based on the operation identifier stored in the pre-mapping linked list.

[0285] Step 916: Determine whether the physical page corresponding to the first virtual address has no access permission.

[0286] Step 918: allocate a physical page with access rights to the first virtual address, and establish a mapping between the first virtual address and the physical page.

[0287] Step 920: pre-map a target number of virtual addresses in the VMA to which the first virtual address stored in the pre-mapping linked list belongs to different physical pages respectively through the pre-mapping processing thread based on the operation identifier stored in the pre-mapping linked list.

[0288] Step 922, create a page table entry.

[0289] Step 924: Determine whether the data corresponding to the first virtual address is not in the physical memory.

[0290] Step 926, process the page fault exception.

[0291] For example, if the data corresponding to the first virtual address is not in the physical memory, the data corresponding to the first virtual address may be loaded into the physical memory.

[0292] In the embodiment of the present application, the number of times a page fault exception is triggered can be effectively reduced, the situation where the processor is frequently interrupted by an interrupt signal can be avoided, the resource waste of the processor is reduced, and the performance of the process and application is improved. Moreover, the method of pre-mapping the virtual address by the pre-mapping processing thread can avoid the pre-mapping processing from having a greater impact on the current process, and ensure the normal operation of the current process.

[0293] like Fig.10 As shown, in one embodiment, a device 1000 for processing a page fault exception is provided, which can be applied to the above-mentioned electronic device. The device 1000 for processing a page fault exception may include a VMA determination module 1010, a mapping module 1020 and a pre-mapping module 1230.

[0294] The VMA determination module 1010 is used to determine the virtual memory space VMA to which the first virtual address corresponding to the page fault exception belongs in response to the triggered page fault exception.

[0295] The mapping module 1020 is used to map the first virtual address to a physical page.

[0296] The determination module 1030 is used to determine whether the pre-mapped linked list contains a VMA.

[0297] The storage module 1040 is used to store the pre-mapped virtual address information of the VMA into the pre-mapped linked list if the pre-mapped linked list does not include the VMA; the pre-mapped virtual address range corresponding to the pre-mapped virtual address information of the VMA does not include the first virtual address.

[0298] The wake-up module 1050 is used to wake up the pre-mapping processing thread, and the pre-mapping processing thread is used to map the second virtual address corresponding to the pre-mapping virtual address information stored in the pre-mapping linked list to the physical page.

[0299] In one embodiment, the page fault exception processing device 1000 further includes a culling module.

[0300] The removing module is used for removing the first virtual address from the pre-mapped virtual address range corresponding to the pre-mapped virtual address information of the VMA stored in the pre-mapped linked list if the pre-mapped linked list includes the VMA.

[0301] In one embodiment, the storage module 1040 is further configured to store the pre-mapped virtual address information of the VMA and the pre-mapped virtual address information of one or more VMAs after the VMA into the pre-mapped linked list if the pre-mapped linked list does not include the VMA.

[0302] In one embodiment, the wake-up module 1050 is used to wake up the pre-mapping processing thread when the wake-up condition is met;

[0303] The wake-up conditions include one or more of the following:

[0304] Complete the update of the pre-mapped virtual address information stored in the pre-mapped linked list; or,

[0305] The time from the current moment to the time for mapping the first virtual address to the physical page reaches the target time; or,

[0306] The usage of the processor that handles page faults is less than the usage threshold.

[0307] In one embodiment, the storage module 1040 is also used to store the operation identifier corresponding to the VMA in the pre-mapping linked list if the pre-mapping linked list does not include the VMA, and the operation identifier is used to indicate the access page type and / or memory access operation corresponding to the page fault exception; or, if the pre-mapping linked list includes the VMA, but the operation identifier corresponding to the VMA stored in the pre-mapping linked list does not match the access page type and / or memory access operation corresponding to the page fault exception, then the operation identifier corresponding to the VMA in the pre-mapping linked list is updated to an operation identifier that matches the access page type and / or memory access operation corresponding to the page fault exception.

[0308] In one embodiment, when the operation identifier corresponding to the VMA stored in the pre-mapping linked list indicates that the access page type corresponding to the page fault exception is an anonymous page, and the memory access operation corresponding to the page fault exception is a read access operation, the pre-mapping processing thread is further used to map the second virtual address corresponding to the pre-mapped virtual address information stored in the pre-mapping linked list to the physical zero page;

[0309] The second virtual address includes all virtual addresses within the pre-mapped virtual address range corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list.

[0310] In one embodiment, when the operation identifier corresponding to the VMA stored in the pre-mapping linked list indicates that the memory access operation corresponding to the page fault exception is a write access operation, the pre-mapping processing thread is further used to map the second virtual address corresponding to the pre-mapped virtual address information stored in the pre-mapping linked list to different physical pages respectively;

[0311] The second virtual address includes a target number of virtual addresses within a pre-mapped virtual address range corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list.

[0312] In one embodiment, the page fault exception processing device 1000 further includes a creation module.

[0313] A creation module is used to create a pre-mapping linked list and a pre-mapping processing thread when the electronic device is started.

[0314] In an embodiment of the present application, for a page fault exception triggered by accessing physical memory through a first virtual address, the first virtual address can be mapped to a physical page to resolve the triggered page fault exception, the VMA that needs to be pre-mapped can be managed through a pre-mapped linked list, and when the VMA to which the first virtual address belongs does not exist in the pre-mapped linked list, the VMA is added to the pre-mapped linked list, which can ensure the accuracy of the information stored in the pre-mapped linked list, and the second virtual address corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list can be pre-mapped through a pre-mapped processing thread, so that the second virtual address corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list can be mapped to a physical page in advance, without waiting until the page fault exception is triggered by accessing the physical memory through the second virtual address, and then mapping, when the physical memory is subsequently accessed through the second virtual address, at least the page fault exception will not be triggered because the second virtual memory is not mapped to the physical memory, which can effectively reduce the number of times the page fault exception is triggered and reduce the waste of processor resources. Moreover, the method of pre-mapping the virtual address using an asynchronous pre-mapping processing thread can avoid the pre-mapping process from having a greater impact on the current process and ensure the normal operation of the current process.

[0315] Fig.11FIG. 1 is a structural block diagram of an electronic device in an embodiment. Fig.11 As shown, the electronic device 1100 may include one or more of the following components: a processor 1100, and a memory 1120 coupled to the processor 1100, wherein the memory 1120 may store one or more computer programs, and the one or more computer programs may be configured to implement the methods described in the above embodiments when executed by one or more processors 1100.

[0316] The processor 1100 may include one or more processing cores. The processor 1100 uses various interfaces and lines to connect the various parts of the entire electronic device 1100, and executes various functions and processes data of the electronic device 1100 by running or executing instructions, programs, code sets or instruction sets stored in the memory 1120, and calling data stored in the memory 1120. Optionally, the processor 1100 can be implemented in at least one hardware form of digital signal processing (Digital Signal Processing, DSP), field programmable gate array (Field-Programmable Gate Array, FPGA), and programmable logic array (Programmable Logic Array, PLA). The processor 1100 can integrate one or a combination of a central processing unit (Central Processing Unit, CPU), a graphics processing unit (Graphics Processing Unit, GPU) and a modem. Among them, the CPU mainly processes the operating system, user interface and application programs; the GPU is responsible for rendering and drawing display content; and the modem is used to process wireless communications. It can be understood that the above-mentioned modem may not be integrated into the processor 1100, but may be implemented separately through a communication chip.

[0317] The memory 1120 may include a random access memory (RAM) or a read-only memory (ROM). The memory 1120 may be used to store instructions, programs, codes, code sets or instruction sets. The memory 1120 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for implementing at least one function (such as a touch function, a sound playback function, an image playback function, etc.), instructions for implementing the above-mentioned various method embodiments, etc. The data storage area may also store data created by the electronic device 1100 during use, etc.

[0318] It can be understood that the electronic device 1100 may include more or fewer structural elements than those in the above structural block diagram, for example, a radio frequency module, a power module, physical buttons, a WiFi (Wireless Fidelity) module, a speaker, a Bluetooth module, a sensor, etc., and no limitation is made here.

[0319] An embodiment of the present application discloses a computer-readable storage medium storing a computer program, wherein the computer program implements the methods described in the above embodiments when executed by a processor.

[0320] An embodiment of the present application discloses a computer program product, which includes a non-transitory computer-readable storage medium storing a computer program, and the computer program can be executed by a processor to implement the methods described in the above embodiments.

[0321] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiments can be implemented by instructing related hardware through a computer program, and the program can be stored in a non-volatile computer-readable storage medium, and when the program is executed, it can include the processes of the embodiments of the above-mentioned methods. The storage medium can be a disk, an optical disk, a ROM, etc.

[0322] As used herein, any reference to memory, storage, database, or other medium may include nonvolatile and / or volatile memory. Suitable nonvolatile memory may include ROM, programmable ROM (Programmable ROM, PROM), erasable PROM (Erasable PROM, EPROM), electrically erasable PROM (Electrically Erasable PROM, EEPROM), or flash memory. Volatile memory may include random access memory (RAM), which is used as an external cache memory. By way of illustration and not limitation, RAM may be in a variety of forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), memory bus direct RAM (RDRAM) and direct memory bus dynamic RAM (DRDRAM).

[0323] It should be understood that the "one embodiment" or "an embodiment" mentioned throughout the specification means that the specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present application. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. Those skilled in the art should also be aware that the embodiments described in the specification are all optional embodiments, and the actions and modules involved are not necessarily required for the present application.

[0324] In the various embodiments of the present application, it should be understood that the size of the serial numbers of the above-mentioned processes does not necessarily mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0325] The units described above as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0326] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0327] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0328] The above is a detailed introduction to a method, device and electronic device for processing a page fault exception disclosed in the embodiment of the present application. The principle and implementation method of the present application are described in detail using specific examples. The description of the above embodiments is only used to help understand the method and core idea of ​​the present application. At the same time, for those of ordinary skill in the art, according to the idea of ​​the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A method for processing a page fault exception, characterized in that: The method comprises: In response to the triggered page fault exception, determining a virtual memory space VMA to which a first virtual address corresponding to the page fault exception belongs; Mapping the first virtual address to a physical page; Determine whether the pre-mapped linked list contains the VMA; If the pre-mapped linked list does not include the VMA, storing the pre-mapped virtual address information of the VMA in the pre-mapped linked list; the pre-mapped virtual address range corresponding to the pre-mapped virtual address information of the VMA does not include the first virtual address; A pre-mapping processing thread is awakened, where the pre-mapping processing thread is used to map a second virtual address corresponding to the pre-mapping virtual address information stored in the pre-mapping linked list to a physical page.

2. The method according to claim 1, characterized in that After determining whether the pre-mapping linked list includes the VMA, the method further includes: If the pre-mapping linked list includes the VMA, the first virtual address is removed from the pre-mapped virtual address range corresponding to the pre-mapped virtual address information of the VMA stored in the pre-mapping linked list.

3. The method according to claim 1, characterized in that If the pre-mapped linked list does not include the VMA, storing the pre-mapped virtual address range corresponding to the pre-mapped virtual address information of the VMA into the pre-mapped linked list includes: If the pre-mapping linked list does not include the VMA, the pre-mapping virtual address information of the VMA and the pre-mapping virtual address information of one or more VMAs after the VMA are stored in the pre-mapping linked list.

4. The method according to claim 1, characterized in that The awakening pre-mapping processing thread includes: When the wake-up condition is met, the pre-mapping processing thread is woken up; The wake-up condition includes one or more of the following: Complete the update of the pre-mapped virtual address information stored in the pre-mapped linked list; or, The time from the current moment to the time for mapping the first virtual address to the physical page reaches the target time; or, A usage rate of a processor that processes the page fault exception is less than a usage rate threshold.

5. The method according to any one of claims 1 to 4, characterized in that: After determining whether the pre-mapping linked list includes the VMA, the method further includes: If the pre-mapped linked list does not include the VMA, then the operation identifier corresponding to the VMA is stored in the pre-mapped linked list, where the operation identifier is used to indicate the access page type and / or memory access operation corresponding to the page fault exception; or, If the pre-mapping linked list contains the VMA, but the operation identifier corresponding to the VMA stored in the pre-mapping linked list does not match the access page type and / or memory access operation corresponding to the page fault exception, then the operation identifier corresponding to the VMA in the pre-mapping linked list is updated to an operation identifier that matches the access page type and / or memory access operation corresponding to the page fault exception.

6. The method according to claim 5, characterized in that When the operation identifier corresponding to the VMA stored in the pre-mapping linked list indicates that the access page type corresponding to the page fault exception is an anonymous page, and the memory access operation corresponding to the page fault exception is a read access operation, the pre-mapping processing thread is further used to map the second virtual address corresponding to the pre-mapped virtual address information stored in the pre-mapping linked list to a physical zero page; The second virtual address includes all virtual addresses within the pre-mapped virtual address range corresponding to the pre-mapped virtual address information stored in the pre-mapped linked list.

7. The method according to claim 5, characterized in that When the operation identifier corresponding to the VMA stored in the pre-mapping linked list indicates that the memory access operation corresponding to the page fault exception is a write access operation, the pre-mapping processing thread is further used to map the second virtual address corresponding to the pre-mapped virtual address information stored in the pre-mapping linked list to different physical pages respectively; The second virtual address includes a target number of virtual addresses within a pre-mapped virtual address range corresponding to the pre-mapped virtual address information stored in the pre-mapped linked table.

8. The method according to claim 1, characterized in that The method further comprises: When the electronic device is started, a pre-mapping linked list is created, and a pre-mapping processing thread is created.

9. A device for processing a page fault exception, characterized in that: The device comprises: A VMA determination module, configured to determine, in response to a triggered page fault exception, a virtual memory space VMA to which a first virtual address corresponding to the page fault exception belongs; A mapping module, used for mapping the first virtual address to a physical page; A judging module, used for judging whether the pre-mapped linked list contains the VMA; a storage module, configured to store the pre-mapped virtual address information of the VMA into the pre-mapped linked list if the pre-mapped linked list does not include the VMA; the pre-mapped virtual address range corresponding to the pre-mapped virtual address information of the VMA does not include the first virtual address; The wake-up module is used to wake up the pre-mapping processing thread, and the pre-mapping processing thread is used to map the second virtual address corresponding to the pre-mapping virtual address information stored in the pre-mapping linked list to a physical page.

10. An electronic device, characterized in that: The method comprises a memory and a processor, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, the processor implements the method according to any one of claims 1 to 8.

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