A method for identifying PCB board defects during the automatic sorting process of PCB boards

Abstract

The present invention discloses a method for identifying PCB board defects during the automatic sorting process of PCB boards, which relates to the technical field of defect identification. Through the analysis of the divided images, based on the clarity of the patterns formed by the photoresist, the visibility coefficient Kjxs is calculated, and the etching influence coefficient Syxs is calculated in combination with the degree data after etching, and then input into the defect evaluation model. Through deep learning technology, the accurate evaluation of defects is realized. This method makes the identification of PCB board defects more intelligent and efficient, and reduces manual intervention. Based on the comparison and analysis of the defect score Qpf and the preset evaluation threshold Q, the system can automatically judge the defect situation of the PCB board to be etched and adopt the corresponding automatic sorting mechanism. This intelligent automatic sorting mechanism can ensure that qualified PCB boards enter the subsequent process flow, while defective boards are promptly removed, reducing the risk of unqualified products flowing into the subsequent production links.

Description

Technical Field

[0001] The present invention relates to the technical field of defect recognition, and particularly to a method for identifying defects on a PCB board during the automatic sorting process of the PCB board. Background Art

[0002] In modern manufacturing, automation and efficient production are key factors in enhancing productivity and reducing costs. As the most fundamental and crucial component in electronic devices, the Printed Circuit Board (PCB) is widely used in the manufacturing process of various electronic products. With the continuous progress of technology, the design and production processes of PCBs are gradually developing towards high precision and high efficiency, especially in the aspect of defect recognition and quality control of PCB boards. Defect recognition of PCB boards is a crucial link in the PCB manufacturing process, involving precise control and feedback in multiple links. Specifically, the defect recognition of PCB boards involves multiple process steps from photolithography, etching, development to final forming. Among them, the photolithography and etching processes have a decisive impact on the quality and performance of PCBs.

[0003] Existing PCB defect detection methods mostly rely on manual detection or simple image recognition technology, and these methods often fail to provide efficient and reliable defect evaluation when faced with mass production. Specifically, inaccurate alignment of the photomask may cause the offset of the exposure area, resulting in the inability to accurately replicate the circuit pattern onto the PCB board, which may cause partial disappearance or short circuit of the circuit pattern, and then lead to unqualified PCB boards flowing into the next process or the final product stage, causing production delays. During the etching process, if the clarity of the photoresist is not high, or the etching depth difference is too large, over-etching or under-etching problems will occur, resulting in unqualified circuit boards. Summary of the Invention

[0004] Aiming at the deficiencies of the existing technology, the present invention provides a method for identifying defects on a PCB board during the automatic sorting process of the PCB board, which solves the problems in the above background art.

[0005] To achieve the above objectives, the present invention is realized through the following technical solutions: A method for identifying defects on a PCB board during the automatic sorting process of the PCB board includes the following steps.

[0006] S1. First, limit the PCB board to be etched, and use a photomask to expose the standard circuit pattern on the surface of the PCB board to be etched. At the same time, monitor the alignment accuracy of the photomask to obtain relevant position distribution data. Based on the relevant position distribution data, judge whether the current photolithography alignment is qualified.

[0007] S2. When qualified, the PCB to be etched is automatically sorted to the etching process area. After the development process, a segmentation image is generated. Based on the segmentation image, the clarity of the pattern formed by the photoresist in the segmentation image is analyzed to construct a visibility coefficient Kjxs. Based on the segmentation image, the PCB to be etched is etched, and relevant etching degree data is obtained. Based on the relevant etching degree data, an etching influence coefficient Syxs is generated;

[0008] S3. Use deep learning technology to build a defect assessment model, and input the etching influence coefficient Syxs and the visibility coefficient Kjxs into the defect assessment model, and after dimensionless processing, fit and output the defect score Qpf;

[0009] S4. Preset an evaluation threshold Q, compare and analyze it with the defect score Qpf to comprehensively judge the defect situation of the current PCB board after the etching operation, and adopt a corresponding automatic sorting mechanism based on the judgment result.

[0010] Preferably, the specific steps of S1 include:

[0011] S11, placing the PCB to be etched on the workbench in advance, limiting the PCB to be etched by a clamping assembly, and establishing a plane coordinate system with a corner of the PCB to be etched as the coordinate origin, and uniformly coating the surface of the PCB to be etched with photoresist;

[0012] S12, based on step S11, using a photomask to expose the standard circuit pattern on the surface of the PCB to be etched, and during the exposure process, monitoring the position of the photomask to obtain relevant position distribution data, wherein the relevant position distribution data includes the position of the photomask position on the X-axis and the position of the photomask on the Y axis .

[0013] Preferably, the specific step S1 also includes:

[0014] S13, according to the relevant position distribution data, analyzing the position deviation between the position of the photomask and the circuit pattern texture in the standard PCB board to calculate the mask alignment error , the mask alignment error Obtained by the following formula:

[0015] ;

[0016] ;

[0017] In the formula, Expressed as the alignment error on the X-axis, Expressed as the alignment error on the Y axis, and respectively represent the standard positions of the circuit pattern lines in the standard PCB board on the X-axis and Y-axis, and respectively represent the positions of the photomask on the X-axis and Y-axis, represents the width of the PCB board to be etched, represents the length of the PCB board to be etched;

[0018] S14. Based on the mask alignment error obtained in S13 , the alignment error on the X-axis and the alignment error on the Y-axis are vectorially synthesized to construct an alignment tolerance Drc, and the alignment tolerance Drc is obtained through the following formula:

[0019] .

[0020] Preferably, the specific steps of S1 further include:

[0021] S15. Preset a safety threshold K, and compare and analyze it with the alignment tolerance Drc to determine whether the exposure area of the current PCB board to be etched during the exposure process is in a qualified state. The specific judgment steps are as follows:

[0022] S151. If the alignment tolerance Drc exceeds the safety threshold K, it is determined that the exposure area of the current PCB board to be etched during the exposure process is not in a qualified state, and at this time, an alignment instruction will be triggered outward;

[0023] S152. If the alignment tolerance Drc does not exceed the safety threshold K, it is determined that the exposure area of the current PCB board to be etched during the exposure process is in a qualified state, and at this time, the PCB board to be etched will be automatically sorted to the etching process area;

[0024] S16. After receiving the alignment instruction, manual intervention will be carried out to adjust the position of the photomask, and after the adjustment, steps S12, S13 and S14 will be repeated until the exposure area of the current PCB board to be etched during the exposure process is in a qualified state, and the repeated steps will be stopped.

[0025] Preferably, the specific steps of S2 include:

[0026] S21. When it is qualified, the PCB board to be etched is automatically sorted to the etching process area. After the PCB board to be etched undergoes the developing process, an image monitoring device is used to obtain the divided image on the surface of the PCB board to be etched. The divided area includes a non-protected area and a protected area. Among them, the Canny edge detection method is used to perform edge detection on the distinction between the non-protected area and the protected area to distinguish and extract the non-protected area and the protected area;

[0027] S22. The boundary between the protected area and the non-protected area is divided into units and marked to generate the first boundary unit , the second boundary unit , the third boundary unit ,..., the nth boundary unit ;

[0028] S23. Through an exposure intensity meter, relevant exposure data information of multiple boundary units is captured. The relevant exposure data information includes the exposure intensity difference Bqc within each boundary unit, and the maximum exposure intensity difference is extracted from the relevant exposure data information and the minimum exposure intensity difference ;

[0029] S24. Based on the divided image, relevant edge curvature data is obtained. The relevant edge curvature data includes the position coordinates P of each monitoring point at the boundary between the protected area and the non-protected area.

[0030] Preferably, the specific steps of S2 further include:

[0031] S25. According to the relevant exposure data information, analyze the exposure difference degree between each boundary unit during the lithography process to obtain the contrast Bdd. The contrast Bdd is obtained through the following formula:

[0032] ;

[0033] In the formula, represents the maximum exposure intensity difference, represents the minimum exposure intensity difference;

[0034] S26. According to the relevant edge curvature data, analyze the regularity degree of the protected area within the divided area during the lithography process to calculate and obtain the edge linearity Bxd. The edge linearity Bxd is obtained through the following formula:

[0035] ;

[0036] In the formula, m represents the number of monitoring points, i = 1, 2, 3,..., m, Denoted as the actual coordinates at the i-th monitoring point, Denoted as the preset coordinates at the i-th monitoring point, Denoted as the actual coordinates at the i-th monitoring point And the preset coordinates at the i-th monitoring point The absolute difference between them.

[0037] Preferably, the specific steps of S2 further include:

[0038] S27. By correlating the contrast Bdd and the edge linearity Bxd obtained in S25 and S26, to analyze and divide the clarity of the pattern formed by the photoresist in the image, and after dimensionless processing, construct a visibility coefficient Kjxs, and the visibility coefficient Kjxs is obtained by the following formula:

[0039] ;

[0040] In the formula, a1 and a2 respectively represent the weight values of the edge linearity Bxd and the contrast Bdd, where the specific values of a1 and a2 are set by the user according to the situation.

[0041] Preferably, the specific steps of S2 further include:

[0042] S28. After the development process, enter the etching operation on the surface of the PCB board to be etched, and after the etching operation, use an image monitoring device to obtain relevant etching degree data, where the relevant etching degree data includes the remaining copper area in the non-protected area The missing copper area in the protected area And the etching depth difference Ssd in the non-protected area; according to the relevant etching degree data, correlate the remaining copper area in the non-protected area And the missing copper area in the protected area And after dimensionless processing, obtain an etching influence coefficient Syxs, and the etching influence coefficient Syxs is obtained according to the following formula:

[0043] ;

[0044] In the formula, And Respectively represent the remaining copper area in the non-protected area And the missing copper area in the protected area The weight values of, where, And The specific values are set by the user according to the situation.

[0045] Preferably, the specific steps of S3 include:

[0046] S31. By inputting the etching influence coefficient Syxs and the visibility coefficient Kjxs into the defect evaluation model, after dimensionless processing and fitting, the defect score Qpf is output from the output end of the defect evaluation model. The defect score Qpf is obtained by the following formula:

[0047] ;

[0048] In the formula, represents the etching depth difference in the non-protected area, represents the correction constant, , and respectively represent the visibility coefficient Kjxs, the etching influence coefficient Syxs and the etching depth difference in the non-protected area of the weight values, where , and The specific values are set by the user according to the situation.

[0049] Preferably, the present invention provides a method for identifying PCB board defects during the automatic sorting process of PCB boards, having the following beneficial effects: The specific steps of S4 include:

[0050] S41. By comparing and analyzing the defect score Qpf with a preset evaluation threshold Q, to comprehensively judge the defect situation of the current PCB board after etching operation. The specific judgment content is as follows:

[0051] If the defect score Qpf exceeds the preset evaluation threshold Q, it is comprehensively judged that the current PCB board after etching operation is in an abnormal defect state. At this time, the current PCB board after etching operation is automatically sorted to the unqualified area of the production line to wait for manual intervention;

[0052] If the defect score Qpf does not exceed the preset evaluation threshold Q, it is comprehensively judged that the current PCB board after etching operation is not in an abnormal defect state. At this time, the current PCB board after etching operation is automatically sorted to the qualified area of the production line and conveyed to the next process area through the conveyor belt.

[0053] (1) In the process of pre-positioning and photomask exposure of the PCB board to be etched, the alignment accuracy of the photomask is monitored to ensure the accuracy of photolithography alignment. This process can effectively avoid PCB board defects caused by unqualified photolithography alignment, and improve the accuracy and efficiency of the sorting system. By analyzing the divided image, based on the clarity of the pattern formed by the photoresist, the visibility coefficient Kjxs is calculated. Combining with the degree data after etching, the etching influence coefficient Syxs is calculated and input into the defect evaluation model. Through deep learning technology, the accurate evaluation of defects is realized. This method makes the identification of PCB board defects more intelligent and efficient, reducing manual intervention. Based on the comparison and analysis of the defect score Qpf and the preset evaluation threshold Q, the system can automatically judge the defect situation of the PCB board to be etched and adopt the corresponding automatic sorting mechanism. This intelligent automatic sorting mechanism can ensure that qualified PCB boards enter the subsequent process flow, while defective boards are promptly removed, reducing the risk of unqualified products flowing into the subsequent production links and improving the overall production quality and efficiency. The defect identification and automatic sorting method of the present invention provides a real-time monitoring and feedback mechanism for parameters such as the defect situation and etching accuracy of each PCB board, which helps to realize data traceability and quality control in the production process. Through timely defect identification and automatic adjustment, the stability and consistency of the production process are ensured, and the overall quality of the product is further improved.

[0054] (2) Based on the quantitative calculation of the alignment tolerance Drc, the production line can real-time feedback the alignment deviation situation and adjust the process according to the tolerance data. This optimization mechanism ensures continuous self-adjustment and optimization in the production process, avoiding production stagnation and mistakes caused by alignment problems.

[0055] (3) In step S22, the multiple demarcation units divided enable the exposure area to be accurately marked and processed. The exposure differences of each demarcation unit are accurately captured and recorded. By measuring the difference between the maximum and minimum exposure intensities with an exposure intensity meter, it is possible to effectively identify possible uneven or abnormal situations during the exposure process, thereby preventing or correcting problems in the photolithography process. In step S25, based on the analysis of the difference between the maximum and minimum exposure intensities, the contrast Bdd of the exposure area is obtained. This contrast index effectively reflects the degree of exposure difference in the photolithography process, reducing defects caused by uneven exposure and improving the yield of the finished product. In step S26, by analyzing the edge curvature data, the edge linearity Bxd is calculated. This index reflects the regularity degree at the boundary between the protected area and the non-protected area. This analysis ensures the edge regularity of the circuit pattern, avoiding defect problems that may occur in the later etching process due to irregular edges during the photolithography process, thereby reducing the occurrence of circuit breakage and rework events.

[0056] (4)Efficient defect assessment and quality control: In step S3, by inputting key data such as the etching influence coefficient Syxs, the visibility coefficient Kjxs, and the etching depth difference in the non-protected area into the defect assessment model, the defect score Qpf is calculated. This defect score synthesizes multiple factors and can accurately evaluate the possible defect situations of each PCB board during the etching process. The introduction of this defect scoring model makes the quality control in the production process more precise, can timely detect and evaluate the quality of each PCB board, and reasonably sort and process it according to the scoring results, effectively reducing the risk of defective products flowing into subsequent processes. Description of the Drawings

[0057] Figure 1 It is a schematic flow chart of a method for identifying PCB board defects in the automatic sorting process of PCB boards according to the present invention. Detailed Embodiments

[0058] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0059] Embodiment 1

[0060] Please refer to Figure 1 , the present invention provides a method for identifying PCB board defects in the automatic sorting process of PCB boards, including the following steps.

[0061] S1. First, limit the PCB board to be etched, and use a photomask to expose the standard circuit pattern (the designed circuit pattern) on the surface of the PCB board to be etched. At the same time, monitor the alignment accuracy of the photomask to obtain relevant position distribution data, and judge whether the current lithography alignment is qualified based on the relevant position distribution data.

[0062] S2. When it is qualified, automatically sort the PCB board to be etched to the etching process area. After the developing process, a division image is generated. Based on the division image, analyze the clarity of the pattern formed by the photoresist in the division image to construct the visibility coefficient Kjxs, and perform etching operations on the PCB board to be etched based on the division image, and obtain relevant etching degree data. Based on the relevant etching degree data, generate the etching influence coefficient Syxs.

[0063] S3. Use deep learning technology to construct a defect assessment model, input the etching influence coefficient Syxs and the visibility coefficient Kjxs into the defect assessment model, and after dimensionless processing, fit and output the defect score Qpf.

[0064] S4. Preset an evaluation threshold Q, and through comparing and analyzing it with the defect score Qpf, comprehensively judge the defect situation of the PCB board after the current etching operation. Based on the judgment result, adopt the corresponding automatic sorting mechanism.

[0065] In this embodiment, the defect recognition accuracy is improved: The method ensures the accuracy of the lithography process by using a photomask for precise alignment, and based on the visibility coefficient Kjxs and etching influence coefficient Syxs of the divided image, evaluates the defects of the etched PCB board through deep learning technology, thereby improving the defect recognition accuracy of the PCB board. This method can accurately identify the defects caused by the subtle deviations in the lithography and etching processes, and reduce the unqualified products caused by manual inspection errors. Automation and intelligence: By combining the automatic sorting mechanism and deep learning technology, this method realizes a high degree of automation in the PCB board sorting process without manual intervention. By comparing the defect score Qpf with the evaluation threshold Q, it can automatically determine which PCB boards are qualified, which need to be reprocessed or rejected. The intelligence of this process minimizes the labor cost and optimizes the production efficiency. Improve production efficiency: Based on the alignment accuracy of the photomask and the real-time monitoring of etching data, this method can adjust the sorting strategy in a timely manner when problems are found, avoiding unqualified plates from entering the next process, thus avoiding greater losses that may occur in the subsequent processes. Overall, it improves the production efficiency of the PCB board and reduces the risk of later rework or scrapping caused by defective boards. Effectively reduce the defect rate: By implementing double detection before and after the etching process, that is, analyzing through the visibility coefficient and etching influence coefficient, and combining the deep learning model to evaluate the defect score, high-precision defect recognition and determination can be achieved, minimizing the product unqualified caused by human negligence. In short, by combining the alignment accuracy of the photomask, deep learning defect evaluation and automatic sorting mechanism, this method realizes efficient and accurate defect recognition of the PCB board during the etching process, providing a strong guarantee for improving production efficiency, reducing the defect rate and reducing manual intervention.

[0066] Embodiment 2

[0067] Please refer to Figure 1 , specifically: The specific steps of S1 include:

[0068] S11. First, place the PCB board to be etched in the workbench, perform a limiting operation on the PCB board to be etched through the clamping component, take a corner of the PCB board to be etched as the coordinate origin, establish a plane coordinate system, and at the same time evenly coat the photoresist on the surface of the PCB board to be etched to prepare for later exposure;

[0069] S12. Based on step S11, a standard circuit pattern (designed circuit pattern) is exposed on the surface of the PCB to be etched using a photomask, and during the exposure process, the position of the photomask is monitored to obtain relevant position distribution data, wherein the relevant position distribution data includes the position of the photomask on the X-axis. and the position of the photomask on the Y axis .

[0070] It should be noted that a photomask refers to a key tool used in the photolithography process to define circuit patterns in semiconductor manufacturing and microelectronics engineering. It is a transparent or translucent glass or quartz plate with a specific pattern, coated with a thin layer of photoresist material (usually metal or photosensitive material). Through photolithography technology, the pattern is transferred to the surface of the PCB board to be etched.

[0071] The main function of the photomask is to transfer the designed circuit pattern to the photoresist layer on the PCB to be etched by exposure. These patterns are the connection directions between the circuits and are used to manufacture integrated circuits (ICs) or micro-electromechanical systems (MEMS), etc. The photomask is illuminated by an exposure light source (such as an ultraviolet light source). The transparent part of the pattern allows light to pass through, while the opaque part blocks the light. Therefore, only the transparent part of the pattern on the photomask will produce an image on the photoresist, forming an exposure area corresponding to the photomask pattern.

[0072] The specific steps of S1 also include:

[0073] S13, according to the relevant position distribution data, analyzing the position deviation between the position of the photomask and the circuit pattern texture in the standard PCB board to calculate the mask alignment error , the mask alignment error Obtained by the following formula:

[0074] ;

[0075] ;

[0076] In the formula, Expressed as the alignment error on the X-axis, Expressed as the alignment error on the Y axis, and They represent the standard positions of the circuit pattern patterns on the X-axis and Y-axis in the standard PCB board. and They represent the positions of the photomask on the X-axis and Y-axis respectively. Indicates the width of the PCB to be etched. Indicated as the length of the PCB board to be etched;

[0077] The circuit pattern lines in a standard PCB refer to the circuit patterns pre-designed by designers.

[0078] S14. Based on the mask alignment error obtained in S13 , the alignment error on the X-axis and the alignment error on the Y-axis are vectorially synthesized to construct an alignment tolerance Drc, and the alignment tolerance Drc is obtained through the following formula:

[0079] .

[0080] In this embodiment, the lithography alignment accuracy is improved: The method limits the PCB to be etched by using a clamping component in step S11, and takes a corner of the PCB to be etched as the coordinate origin to establish a plane coordinate system. This measure can effectively ensure the stable positioning of the PCB to be etched during the lithography process and reduce the influence caused by the positioning error. By establishing a standardized coordinate system, the alignment accuracy during the lithography process can be improved, ensuring the accurate transfer of the circuit pattern. Real-time monitoring of the optical mask alignment position: In step S12, the present invention obtains the position distribution data of the optical mask on the X-axis and Y-axis by real-time monitoring the position information of the optical mask. This monitoring technology can accurately master the position change of the optical mask, timely detect possible deviations, and further avoid inaccurate lithography patterns caused by the offset of the optical mask position. This enables the lithography process to be carried out with high precision and consistency, reducing PCB defects caused by optical mask alignment problems, quantifying the mask alignment error, and improving the alignment accuracy control: Ensuring the lithography accuracy: In step S14, the present invention vectorially synthesizes the alignment errors on the X-axis and Y-axis to calculate the alignment tolerance Drc. The calculation of this alignment tolerance can quantify the accuracy requirements of the optical mask alignment and provide a standard for the accuracy control of subsequent processes. During the production process, if the mask alignment error exceeds the set alignment tolerance range, the system can automatically issue an alarm and take measures to further avoid the production of non-standard PCB boards during the production process, improving the overall stability and reliability of the lithography operation.

[0081] Embodiment 3

[0082] Please refer to Figure 1 , specifically: The specific steps of S1 further include:

[0083] S15. Preset a safety threshold K and compare and analyze it with the alignment tolerance Drc to determine whether the exposure area of the current PCB to be etched is in a qualified state during the exposure process. The specific judgment steps are as follows:

[0084] S151. If the alignment tolerance Drc exceeds the safety threshold K, it is determined that the exposure area of the current PCB to be etched during the exposure process is not in a qualified state. At this time, an alignment instruction will be triggered externally.

[0085] S152. If the alignment tolerance Drc does not exceed the safety threshold K, it is determined that the exposure area of the current PCB to be etched during the exposure process is in a qualified state. At this time, the PCB to be etched will be automatically sorted to the etching process area.

[0086] The above exposure area is the area where the photoresist undergoes chemical changes when the light source irradiates the surface of the photoresist (i.e., the surface of the PCB coated with the photoresist) through the photomask during the lithography process. Specifically, the exposure area refers to the part of the photoresist that is irradiated by light through the transparent part of the photomask, and then patterns or structures are formed on the photoresist layer. The definition and shape of these areas directly depend on the pattern on the photomask and the exposure process of the lithography process.

[0087] Morphology of the exposure area: In positive photoresist (i.e., when the surface of the PCB is coated with positive photoresist), the exposure area becomes more soluble and is removed during the development process, thus forming an exposed substrate area. In negative photoresist (i.e., when the surface of the PCB is coated with negative photoresist), the exposure area becomes less soluble, and the unexposed area is removed to form a protective layer, exposing the substrate beneath. Here, the protective layer refers to the part that is not removed by the photoresist, that is, the protected area in step S21.

[0088] S16. After receiving the alignment instruction, manual intervention will be used to adjust the position of the photomask. After the adjustment, steps S12, S13, and S14 will be repeated until the exposure area of the current PCB to be etched during the exposure process is in a qualified state, and the repeated steps will stop.

[0089] In this embodiment, automated alignment error control and quality assurance: In step S15, by comparing and analyzing the preset safety threshold K with the alignment tolerance Drc, it is possible to determine in real time whether the exposure area of the PCB to be etched is in a qualified state. The automated judgment in this step effectively avoids the situation of untimely or misjudged human intervention, ensuring that each PCB can meet strict alignment accuracy requirements during the exposure process, and improving the accuracy and stability of the lithography process. The introduction of automated comparison and judgment makes the entire process more efficient and reliable. Intelligent alignment judgment and anomaly detection mechanism: In step S151, if the alignment tolerance Drc exceeds the safety threshold K, the system will immediately determine that the exposure area is not in a qualified state and trigger an alignment instruction. This intelligent anomaly detection mechanism can immediately detect alignment problems during the exposure process and automatically trigger corresponding warning and correction instructions. By automatically identifying and judging the deviation by the system, it is possible to further reduce exposure failures caused by human errors or negligence and ensure that the circuit pattern accuracy of the PCB is not affected. Efficient trigger of alignment instructions and manual intervention mechanism: In step S16, once the alignment instruction is received, the system will automatically trigger manual intervention to adjust the position of the photomask. By manually adjusting the photomask and repeating the alignment process (steps S12, S13, and S14) until the exposure area of the PCB to be etched is in a qualified state, this mechanism enables the system to promptly initiate manual correction and precise adjustment when detecting anomalies, avoiding the risk of continuous exposure to misaligned states and ensuring that the final exposure quality of each PCB meets the design standards.

[0090] Embodiment 4

[0091] Please refer to Figure 1 , specifically: The specific steps of S2 include:

[0092] S21. When it is qualified, automatically sort the PCB to be etched to the etching process area. After subjecting the PCB to be etched to the developing process, use an image monitoring device to obtain the divided image on the surface of the PCB to be etched. The divided area includes a non-protected area and a protected area. Among them, use the Canny edge detection method to perform edge detection on the distinction between the non-protected area and the protected area to distinguish and extract the non-protected area and the protected area; among them, the image monitoring device includes but is not limited to a camera;

[0093] Among them, the non-protected area is the part where the photoresist is removed;

[0094] S22. Divide the boundary between the protected area and the non-protected area into units and make marking processing to generate the first boundary unit , the second boundary unit , the third boundary unit ,..., the nth boundary unit ;

[0095] S23. Capture the relevant exposure data information of the multi-component boundary unit through an exposure intensity meter. The relevant exposure data information includes the exposure intensity difference Bqc within each component boundary unit, and extract the maximum exposure intensity difference from the relevant exposure data information. and the minimum exposure intensity difference ;

[0096] S24. Based on the divided image, obtain the relevant edge curvature data. The relevant edge curvature data includes the position coordinates P of each monitoring point at the boundary between the protected area and the non-protected area.

[0097] The specific steps of S2 also include:

[0098] S25. According to the relevant exposure data information, analyze the exposure difference degree between each component boundary unit during the lithography process to obtain the contrast Bdd. The contrast Bdd is obtained through the following formula:

[0099] ;

[0100] In the formula, represents the maximum exposure intensity difference, represents the minimum exposure intensity difference;

[0101] S26. According to the relevant edge curvature data, analyze the regularity degree of the protected area within the divided area during the lithography process to calculate and obtain the edge linearity Bxd. The edge linearity Bxd is obtained through the following formula:

[0102] ;

[0103] In the formula, m represents the number of monitoring points, i = 1, 2, 3,..., m, represents the actual coordinate at the i-th monitoring point, represents the preset coordinate at the i-th monitoring point, represents the actual coordinate at the i-th monitoring point and the preset coordinate at the i-th monitoring point the absolute difference between them.

[0104] The lower the edge linearity Bxd, the higher the visibility and accuracy of the pattern.

[0105] In this embodiment, there are precise area division and edge detection: In step S21, the Canny edge detection method is used to process the divided image on the surface of the PCB to be etched, which can effectively distinguish the protected area from the non-protected area. Through precise edge detection, clear boundaries can be extracted, ensuring more accurate distinction between the non-protected area (i.e., the part where the photoresist is removed) and the protected area. This technology can effectively improve the precision of the PCB etching process and reduce process errors and defects caused by unclear division. Detailed exposure intensity analysis: In step S23, the exposure data information of the demarcation unit is captured by an exposure intensity meter, and the maximum exposure intensity difference and the minimum exposure intensity difference are extracted, which can comprehensively analyze the exposure intensity distribution within each unit area. Through the analysis of the exposure intensity difference, potential uneven exposure problems can be found during the etching process and corrected in a timely manner, avoiding the possibility of over-removing or under-removing the photoresist later. Evaluation of the edge linearity of the protected area: In step S26, by calculating the edge linearity Bxd, the regularity of the boundary between the protected area and the non-protected area and the accuracy during the lithography process can be quantitatively analyzed. This analysis provides a powerful tool for evaluating whether there are distortions, deformations, or irregular boundaries during the lithography process. By precisely measuring the edge linearity, problems during the lithography process, such as irregular pattern boundaries or uneven lithography, can be discovered in a timely manner, and then the process parameters can be adjusted to improve the accuracy and integrity of the final pattern.

[0106] Embodiment 5

[0107] Please refer to Figure 1 , specifically: The specific steps of S2 also include:

[0108] S27. By correlating the contrast Bdd and the edge linearity Bxd obtained in S25 and S26 to analyze the clarity of the pattern formed by the photoresist in the divided image, and after dimensionless processing, a visibility coefficient Kjxs is constructed. The visibility coefficient Kjxs is obtained through the following formula:

[0109] ;

[0110] In the formula, a1 and a2 respectively represent the weight values of the edge linearity Bxd and the contrast Bdd, where 0 < a1 < 1 and 0 < a2 < 1, and the specific values are set by the user according to the situation.

[0111] The specific steps of S2 also include:

[0112] S28. After the development process, enter the etching operation on the surface of the PCB to be etched, and after the etching operation, use an image monitoring device to obtain relevant etching degree data, where the relevant etching degree data includes the remaining copper area in the non-protected area , the missing copper area within the protected area and the etching depth difference Ssd within the non-protected area; according to relevant etching degree data, the remaining copper area within the non-protected area and the missing copper area within the protected area are correlated, and after dimensionless processing, an etching influence coefficient Syxs is obtained. The etching influence coefficient Syxs is obtained according to the following formula:

[0113] ;

[0114] In the formula, and respectively represent the weight values of the remaining copper area within the non-protected area and the missing copper area within the protected area, where 0 < < 1, 0 < < 1, and the specific values are set by the user according to the situation.

[0115] The above-mentioned remaining copper area within the non-protected area and the missing copper area within the protected area can be monitored by methods such as high-resolution microscopes, laser scanning microscopy, and X-ray imaging.

[0116] In this embodiment, pattern clarity analysis: In step S27, by correlatively analyzing the contrast Bdd and the edge linearity Bxd, a visibility coefficient Kjxs is constructed. This coefficient effectively reflects the clarity of the pattern formed by the photoresist. Contrast and edge linearity are important indicators affecting lithography quality and can directly reflect the resolution and clarity of the pattern. After dimensionless processing of these two indicators, a unified visibility coefficient is obtained, further enhancing the quantitative analysis ability of pattern clarity. This method can help engineers evaluate the quality of lithography patterns in real time and provide more accurate data support to ensure that the final etched pattern meets the design standards. Etching quality inspection: In step S28, by obtaining relevant etching degree data during the etching process and constructing an etching influence coefficient Syxs after dimensionless processing, this etching influence coefficient comprehensively considers the etching effects of the non-protected area and the protected area and quantifies the influence degree during the etching process. The calculation of the etching influence coefficient Syxs can effectively reflect the differences in etching quality in different areas, help engineers monitor and adjust the etching process in real time, and avoid problems such as circuit short circuits, open circuits, or signal interference caused by uneven etching.

[0117] Embodiment 6

[0118] Please refer to Figure 1 , specifically: The specific steps of S3 include:

[0119] S31. By inputting the etching influence coefficient Syxs and the visibility coefficient Kjxs into the defect evaluation model, after dimensionless processing and fitting, a defect score Qpf is output from the output end of the defect evaluation model. The defect score Qpf is obtained through the following formula:

[0120] ;

[0121] In the formula, represents the etching depth difference in the non-protected area, represents a correction constant, , and respectively represent the weight values of the visibility coefficient Kjxs, the etching influence coefficient Syxs, and the etching depth difference in the non-protected area , where 0 < < 1, 0 < < 1, 0 < < 1, and the specific values are set by the user according to the situation.

[0122] The etching depth difference in the non-protected area can be monitored and obtained by a profilometer or a white light interferometer;

[0123] The specific steps of S4 include:

[0124] S41. By comparing and analyzing the defect score Qpf with a preset evaluation threshold Q, the defect situation of the PCB board after the current etching operation is comprehensively judged. The specific judgment content is as follows:

[0125] If the defect score Qpf exceeds the preset evaluation threshold Q, it is comprehensively judged that the PCB board after the current etching operation is in an abnormal defect state. At this time, the PCB board after the current etching operation is automatically sorted into the unqualified area of the production line to wait for manual intervention;

[0126] If the defect score Qpf does not exceed the preset evaluation threshold Q, it is comprehensively judged that the PCB board after the current etching operation is not in an abnormal defect state. At this time, the PCB board after the current etching operation is automatically sorted into the qualified area of the production line and conveyed to the next process area through a conveyor belt.

[0127] In this embodiment, the intelligent evaluation and real-time feedback of defect scores: In step S3, the etching influence coefficient Syxs and the visibility coefficient Kjxs are input into the defect evaluation model. Through dimensionless processing and fitting calculations, the defect score Qpf is obtained. This score combines the etching depth difference in the non-protected area, the visibility coefficient, and the weight value of the etching influence coefficient, effectively comprehensively evaluating multiple process parameters into a comprehensive defect score. This score can reflect the quality of the PCB board after etching, especially the differences in the lithography pattern and the etching degree. Through this intelligent evaluation system, process personnel can obtain the defect situation in real time, avoid human negligence and errors in manual inspection, and improve production efficiency. The calculation of the defect score not only helps to compare the quality differences of different production batches but also provides a quantitative basis for process optimization. The automated evaluation of the system greatly reduces the frequency and cost of manual inspection and improves the automation level of the production line. Automatic sorting and process optimization based on the score: In step S4, by comparing with the pre-set evaluation threshold Q, the defect score Qpf determines the destination of the PCB board. This automated defect judgment and sorting mechanism ensure that unqualified products do not enter the next process, thus effectively avoiding subsequent process waste and losses caused by quality problems.

[0128] Although the embodiments of the present invention have been shown and described, those of ordinary skill in the art can understand that various changes, modifications, substitutions, and variations can be made to these embodiments without departing from the principles and spirit of the present invention. The scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A method for identifying PCB board defects during automatic PCB board sorting, characterized in that: The following steps are included: S1. Pre-position the PCB to be etched, and use a photomask to expose a standard circuit pattern on the surface of the PCB to be etched, while monitoring the alignment accuracy of the photomask to obtain relevant position distribution data, and based on the relevant position distribution data, determine whether the current photolithography alignment is qualified; S2. When qualified, the PCB to be etched is automatically sorted to the etching process area. After the development process, a segmentation image is generated. Based on the segmentation image, the clarity of the pattern formed by the photoresist in the segmentation image is analyzed to construct a visibility coefficient Kjxs. Based on the segmentation image, the PCB to be etched is etched, and relevant etching degree data is obtained. Based on the relevant etching degree data, an etching influence coefficient Syxs is generated; S3. Use deep learning technology to build a defect assessment model, and input the etching influence coefficient Syxs and the visibility coefficient Kjxs into the defect assessment model, and after dimensionless processing, fit and output the defect score Qpf; S4. Preset an evaluation threshold Q, compare and analyze it with the defect score Qpf to comprehensively judge the defect situation of the current PCB board after the etching operation, and adopt a corresponding automatic sorting mechanism based on the judgment result.

2. The method for identifying PCB board defects in the process of automatic PCB board sorting according to claim 1 is characterized in that: The specific steps of S1 include: S11, placing the PCB to be etched on the workbench in advance, limiting the PCB to be etched by a clamping assembly, and establishing a plane coordinate system with a corner of the PCB to be etched as the coordinate origin, and uniformly coating the surface of the PCB to be etched with photoresist; S12, based on step S11, using a photomask to expose the standard circuit pattern on the surface of the PCB to be etched, and during the exposure process, monitoring the position of the photomask to obtain relevant position distribution data, wherein the relevant position distribution data includes the position of the photomask position on the X-axis and the position of the photomask on the Y axis .

3. The method for identifying PCB board defects in the process of automatic PCB board sorting according to claim 2 is characterized in that: The specific steps of S1 also include: S13, according to the relevant position distribution data, analyzing the position deviation between the position of the photomask and the circuit pattern texture in the standard PCB board to calculate the mask alignment error , the mask alignment error Obtained by the following formula: ； ； In the formula, Expressed as the alignment error on the X-axis, Expressed as the alignment error on the Y axis, and They represent the standard positions of the circuit pattern patterns on the X-axis and Y-axis in the standard PCB board. and They represent the positions of the photomask on the X-axis and Y-axis respectively. Indicates the width of the PCB to be etched. Indicated as the length of the PCB board to be etched; S14, based on the mask alignment error obtained in S13 , the alignment error on the X-axis and the alignment error on the Y axis Vector synthesis is performed to construct the alignment tolerance Drc, which is obtained by the following formula: 。 4. The method for identifying PCB board defects in the process of automatic PCB board sorting according to claim 3 is characterized in that: The specific steps of S1 also include: S15, pre-set a safety threshold K, and compare and analyze it with the alignment tolerance Drc to determine whether the exposure area of ​​the current PCB board to be etched is in a qualified state during the exposure process. The specific judgment steps are as follows: S151, if the alignment tolerance Drc exceeds the safety threshold K, it is determined that the exposure area of ​​the current PCB board to be etched is not in a qualified state during the exposure process, and an alignment instruction is triggered outwardly; S152, if the alignment tolerance Drc does not exceed the safety threshold K, it is determined that the exposure area of ​​the current PCB board to be etched is in a qualified state during the exposure process, and the PCB board to be etched is automatically sorted to the etching process area; S16. After receiving the alignment instruction, the photomask position is adjusted through manual intervention. After the adjustment, steps S12, S13 and S14 are repeated until the exposure area of ​​the current PCB board to be etched is in a qualified state during the exposure process, and the repetitive steps are stopped.

5. The method for identifying PCB board defects in the process of automatic PCB board sorting according to claim 1, characterized in that: The specific steps of S2 include: S21, when qualified, automatically sorting the PCB board to be etched to the etching process area, and obtaining the divided image of the surface of the PCB board to be etched by using the image monitoring device after the PCB board to be etched undergoes the development process, wherein the divided area includes the non-protected area and the protected area, wherein the non-protected area and the protected area are distinguished by edge detection using the Canny edge detection method, so as to distinguish and extract the non-protected area and the protected area; S22, dividing the boundary between the protected area and the non-protected area into units and marking them to generate a No. 1 boundary unit , Boundary Unit No. 2 , Boundary Unit No. 3 ,..., nth dividing unit ; S23, using an exposure intensity meter, capturing the relevant exposure data information of the multiple groups of boundary units, wherein the relevant exposure data information includes the exposure intensity difference Bqc within each group of boundary units, and extracting the maximum exposure intensity difference from the relevant exposure data information and minimum exposure intensity difference ; S24. Based on the divided image, obtain relevant edge curvature data, wherein the relevant edge curvature data includes the position coordinates P of each monitoring point at the boundary between the protection area and the non-protection area.

6. The method for identifying PCB board defects in the process of automatic PCB board sorting according to claim 5 is characterized in that: The specific steps of S2 also include: S25. Analyze the exposure difference between the boundary units of each group during the photolithography process according to the relevant exposure data information to obtain a contrast ratio Bdd. The contrast ratio Bdd is obtained by the following formula: ； In the formula, Expressed as the maximum exposure intensity difference, Expressed as the minimum exposure intensity difference; S26, analyzing the regularity of the protection area in the divided area during the photolithography process according to the relevant edge curvature data, so as to calculate and obtain the edge linearity Bxd, wherein the edge linearity Bxd is obtained by the following formula: ； In the formula, m represents the number of monitoring points, i=1, 2, 3, ..., m, Represented as the actual coordinates of the i-th monitoring point, Represented as the preset coordinates of the i-th monitoring point, Represented as the actual coordinates of the i-th monitoring point and the preset coordinates at the i-th monitoring point The absolute difference between .

7. The method for identifying PCB board defects in the process of automatic PCB board sorting according to claim 6 is characterized in that: The specific steps of S2 also include: S27, by correlating the contrast Bdd and edge linearity Bxd obtained in S25 and S26, to analyze the clarity of the pattern formed by the photoresist in the divided image, and after dimensionless processing, construct a visibility coefficient Kjxs, the visibility coefficient Kjxs is obtained by the following formula: ； In the formula, a1 and a2 represent the weight values ​​of edge linearity Bxd and contrast Bdd respectively, and the specific values ​​of a1 and a2 are set by the user according to the situation.

8. The method for identifying PCB board defects in the process of automatic PCB board sorting according to claim 7 is characterized in that: The specific steps of S2 also include: S28, after the development process, the PCB surface to be etched is etched, and after the etching process, the image monitoring device is used to obtain relevant etching degree data, wherein the relevant etching degree data includes the remaining copper area in the non-protected area , missing copper area within the protection area and the etching depth difference Ssd in the non-protected area; according to the relevant etching degree data, the remaining copper area in the non-protected area and the missing copper area within the protection area The etching influence coefficient Syxs is obtained by correlating and dimensionless processing. The etching influence coefficient Syxs is obtained according to the following formula: ； In the formula, and Respectively represents the remaining copper area in the non-protected area and the missing copper area within the protected area The weight value of and The specific value is set by the user according to the situation.

9. The method for identifying PCB board defects in the process of automatic PCB board sorting according to claim 1, characterized in that: The specific steps of S3 include: S31, by inputting the etching influence coefficient Syxs and the visibility coefficient Kjxs into the defect assessment model, after dimensionless processing and fitting, outputting the defect score Qpf from the output end of the defect assessment model, the defect score Qpf is obtained by the following formula: ； In the formula, Expressed as the etching depth difference in the unprotected area, Expressed as a correction constant, , and They are respectively expressed as the visibility coefficient Kjxs, the etching influence coefficient Syxs and the etching depth difference in the unprotected area The weight value of , and The specific value is set by the user according to the situation.

10. The method for identifying PCB board defects in the process of automatic PCB board sorting according to claim 1, characterized in that: The specific steps of S4 include: S41, by comparing and analyzing the defect score Qpf with the preset evaluation threshold Q, a comprehensive judgment is made on the defect situation of the PCB board after the etching operation, and the specific judgment content is as follows: If the defect score Qpf exceeds the preset evaluation threshold Q, it is comprehensively judged that the current PCB board after the etching operation is in an abnormal defect state. At this time, the current PCB board after the etching operation is automatically sorted to the unqualified area of ​​the production line to wait for manual intervention; If the defect score Qpf does not exceed the preset evaluation threshold Q, it is comprehensively judged that the current PCB board after the etching operation is not in an abnormal defect state. At this time, the current PCB board after the etching operation is automatically sorted to the qualified area of ​​the production line and transported to the next process area via a conveyor belt.

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