Vertical silicon carbide deep PN junction groove structure and preparation method thereof

Abstract

The invention discloses a vertical type silicon carbide deep PN junction groove structure and a preparation method thereof, and the preparation method comprises the steps: selecting a first conductive type silicon carbide substrate, and carrying out the cleaning; depositing a first mask layer on the cleaned first conductive type silicon carbide substrate; etching the first mask layer and the first conductive type silicon carbide substrate to form a plurality of deep trenches on the first conductive type silicon carbide substrate; completely backfilling the deep trench by using a second conductive type silicon carbide material to form a second conductive type silicon carbide epitaxial layer; and etching on the second conductive type silicon carbide epitaxial layer to form a plurality of shallow trenches so as to obtain the vertical deep silicon carbide PN junction trench structure. According to the method, a deep etching-epitaxial backfilling-etching process is adopted, the preparation of a silicon carbide deep PN junction groove structure is realized, the shape, size and height of the junction are controllable, the junction depth is improved, and the problems of high difficulty of a side wall anisotropic epitaxial process, defects generated by high-energy ion implantation and high-temperature annealing and surface roughness are avoided.

Description

Technical Field

[0001] The invention belongs to the technical field of semiconductors, and in particular relates to a vertical silicon carbide deep PN junction trench structure and a preparation method thereof. Background Art

[0002] As semiconductors gradually come into people's view, the family of semiconductor materials is also gradually expanding. The current semiconductor iteration has reached the third generation represented by silicon carbide (SiC) and gallium nitride (GaN). Among them, silicon carbide materials are widely used in higher-order high-voltage power devices in the fields of electric vehicles, solar energy, etc. due to their characteristics of high voltage resistance, high temperature resistance, and high frequency resistance.

[0003] At present, ion implantation is mostly used to prepare PN junctions in the preparation of common power devices. Although ion implantation is relatively simple, there are many problems in the preparation of silicon carbide pn junctions. On the one hand, due to the lattice characteristics of silicon carbide, silicon carbide is difficult to thermally diffuse, so high energy is required during implantation. Therefore, silicon carbide will produce many crystal defect problems when high-concentration implantation is performed, and these defects cannot be eliminated even by high-temperature annealing. At the same time, because the activation range of silicon carbide is between 1600 and 1800 degrees Celsius, Si shedding will occur, which will further cause surface roughness. On the other hand, due to the limited ion implantation energy and limited implantation depth, a deep trench PN junction structure cannot be achieved, and the prepared pn junction depth is shallow. The method of lateral epitaxial backfilling is difficult to process, the lateral epitaxial depth is small, and a deep silicon carbide PN junction trench structure cannot be achieved. Summary of the invention

[0004] In order to solve the above problems existing in the prior art, the present invention provides a vertical silicon carbide deep PN junction trench structure and a preparation method thereof. The technical problem to be solved by the present invention is achieved by the following technical solutions:

[0005] In a first aspect, the present invention provides a method for preparing a vertical silicon carbide deep PN junction trench structure, comprising:

[0006] Step 1: Select a first conductivity type silicon carbide substrate and clean it to obtain a first conductivity type silicon carbide substrate with a clean surface;

[0007] Step 2: depositing a first mask layer on a first conductivity type silicon carbide substrate;

[0008] Step 3: etching the first mask layer and the first conductive type silicon carbide substrate to form a plurality of deep trenches on the first conductive type silicon carbide substrate;

[0009] Step 4: completely backfilling the deep trench with a second conductivity type silicon carbide material to form a second conductivity type silicon carbide epitaxial layer;

[0010] Step 5: Etching a plurality of shallow trenches on the second conductive type silicon carbide epitaxial layer to obtain a vertical deep silicon carbide PN junction trench structure.

[0011] In one embodiment of the present invention, in step 1, a first conductivity type silicon carbide substrate is cleaned by using a standard RCA wet chemical cleaning process to obtain a first conductivity type silicon carbide substrate with a clean surface.

[0012] In one embodiment of the present invention, step 2 comprises:

[0013] Depositing silicon dioxide with a thickness of 4 μm or more on a first conductive type silicon carbide substrate to form a first mask layer;

[0014] Alternatively, a silicon nitride film having a thickness of 1.2 μm or more is deposited on the first conductive type silicon carbide substrate to form a first mask layer.

[0015] In one embodiment of the present invention, step 2 comprises:

[0016] A metal film with a thickness of 0.8-1 μm is deposited on a first conductive type silicon carbide substrate to form a first mask layer; wherein the material of the metal film includes nickel or chromium.

[0017] In one embodiment of the present invention, step 3 comprises:

[0018] 31) coating a photoresist on the first mask layer, and using the photoresist as a mask, etching the first mask layer using a wet etching process until the surface of the first conductive type silicon carbide substrate is exposed, and patterning the first mask layer;

[0019] 32) removing the photoresist and performing plasma etching based on the patterned first mask layer to form a plurality of deep trenches on the first conductive type silicon carbide substrate.

[0020] In one embodiment of the present invention, step 4 comprises:

[0021] 41) depositing a second conductive type silicon carbide material in the deep trench until the trench is completely backfilled and the first conductive type silicon carbide substrate is covered;

[0022] 42) Thinning the silicon carbide substrate obtained in step 41) until the first conductivity type silicon carbide substrate is exposed, so as to form a second conductivity type silicon carbide epitaxial layer in the deep trench.

[0023] In one embodiment of the present invention, step 5 comprises:

[0024] 51) depositing a second mask layer on the first conductivity type silicon carbide substrate and the second conductivity type silicon carbide epitaxial layer;

[0025] 52) coating a photoresist on the second mask layer, and using the photoresist as a mask, etching the second mask layer using a wet etching process until the surface of the second conductive type silicon carbide epitaxial layer is exposed, and patterning the second mask layer;

[0026] 53) removing the photoresist, and performing plasma etching based on the patterned second mask layer to form a plurality of shallow trenches on the second conductive type silicon carbide epitaxial layer;

[0027] 54) The second mask layer is removed by a wet etching process to obtain a vertical deep silicon carbide PN junction trench structure.

[0028] In one embodiment of the present invention, step 51) includes:

[0029] Depositing silicon dioxide with a thickness of 4 μm or more on the first conductive type silicon carbide substrate and the second conductive type silicon carbide epitaxial layer to form a second mask layer;

[0030] Alternatively, a silicon nitride film having a thickness of 1.2 μm or more is deposited on the first conductive type silicon carbide substrate and the second conductive type silicon carbide epitaxial layer to form a second mask layer.

[0031] In one embodiment of the present invention, step 51) includes:

[0032] A metal film with a thickness of 0.8-1 μm is deposited on the first conductive type silicon carbide substrate and the second conductive type silicon carbide epitaxial layer to form a second mask layer; wherein the material of the metal film includes nickel or chromium.

[0033] In a second aspect, the present invention provides a vertical silicon carbide deep PN junction trench structure, comprising a first conductivity type silicon carbide substrate and a second conductivity type silicon carbide epitaxial layer;

[0034] A plurality of deep trenches are provided on the first conductive type silicon carbide substrate, the second conductive type silicon carbide epitaxial layer is completely filled in the deep trenches, and a plurality of shallow trenches are provided on the second conductive type silicon carbide epitaxial layer, the depth of the shallow trenches is less than the depth of the deep trenches; the second conductive type silicon carbide epitaxial layer and the first conductive type silicon carbide substrate together form a vertical deep PN junction trench structure.

[0035] Beneficial effects of the present invention:

[0036] The invention provides a method for preparing a vertical silicon carbide deep PN junction trench structure, firstly depositing a first mask layer on a cleaned first conductivity type silicon carbide substrate, then etching the first mask layer and the first conductivity type silicon carbide substrate to form a plurality of deep trenches on the first conductivity type silicon carbide substrate; then backfilling the second conductivity type silicon carbide material in the deep trenches to form a second conductivity type silicon carbide epitaxial layer; finally etching the second conductivity type silicon carbide epitaxial layer to form a plurality of shallow trenches, thereby realizing a vertical silicon carbide deep PN junction. The method adopts a deep etching-epitaxial backfilling-etching process to realize the preparation of a silicon carbide deep PN junction trench structure, effectively improves the junction depth, makes the shape and size of the junction highly controllable, avoids the problem of high difficulty in the process of sidewall anisotropy (different conductivity types) epitaxy, and at the same time, can avoid the defects and surface roughness problems caused by high energy ion implantation and high temperature annealing, as well as the problem of high difficulty in the lateral epitaxial backfilling process, and provides a new implementation scheme for the design and manufacture of silicon carbide PN junction-based devices.

[0037] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1 It is a schematic flow chart of a method for preparing a vertical silicon carbide deep PN junction trench structure provided by an embodiment of the present invention;

[0039] Figure 2a-2e It is a schematic diagram of a process for preparing a vertical silicon carbide deep PN junction trench structure provided by an embodiment of the present invention;

[0040] Figure 3 It is a schematic diagram of a vertical silicon carbide deep PN junction trench structure provided by an embodiment of the present invention.

[0041] Description of reference numerals:

[0042] 1-a first conductive type silicon carbide substrate, 2-a first mask layer, 3-a second conductive type silicon carbide epitaxial layer. DETAILED DESCRIPTION

[0043] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0044] The first aspect of the present invention provides a method for preparing a vertical silicon carbide deep PN junction trench structure. Figure 1 , Figure 11 is a flow chart of a method for preparing a vertical silicon carbide deep PN junction trench structure provided by an embodiment of the present invention. The method mainly comprises the following steps:

[0045] Step 1: Select a first conductivity type silicon carbide substrate 1 and clean it to obtain a first conductivity type silicon carbide substrate 1 with a clean surface.

[0046] Optionally, in this embodiment, an n-type silicon carbide substrate or an epitaxial wafer can be selected as the first conductive type silicon carbide substrate, and the first conductive type silicon carbide substrate can be cleaned using a standard RCA wet chemical cleaning process to obtain a first conductive type silicon carbide substrate with a clean surface.

[0047] Step 2: depositing a first mask layer 2 on a first conductivity type silicon carbide substrate 1 .

[0048] See also Figure 2a-2e , Figure 2a-2e It is a schematic diagram of a process for preparing a vertical silicon carbide deep PN junction trench structure provided in an embodiment of the present invention.

[0049] Optionally, in this embodiment, step 2 may be implemented in the following manner:

[0050] Silicon dioxide is deposited with a thickness of 4 μm or more on the first conductive type silicon carbide substrate 1 to form a first mask layer 2 .

[0051] In another embodiment of the present invention, step 2 may also be implemented as follows:

[0052] A silicon nitride film with a thickness of 1.2 μm or more is deposited on the first conductive type silicon carbide substrate 1 to form a first mask layer 2 .

[0053] In another embodiment of the present invention, step 2 may also be implemented as follows:

[0054] A metal film with a thickness of 0.8-1 μm is deposited on the first conductive type silicon carbide substrate 1 to form a first mask layer; wherein the material of the metal film includes but is not limited to metals such as nickel (Ni) and chromium (Cr).

[0055] After step 2, the substrate obtained is as follows Figure 2a shown.

[0056] Step 3: Etching the first mask layer 2 and the first conductive type silicon carbide substrate 1 to form a plurality of deep trenches on the first conductive type silicon carbide substrate 1 .

[0057] Specifically, step 3 may include the following sub-steps:

[0058] 31) Apply photoresist on the first mask layer 2, and use the photoresist as a mask to etch the first mask layer 2 using a wet etching process until the surface of the first conductive type silicon carbide substrate 1 is exposed, and the first mask layer 2 is patterned.

[0059] 32) removing the photoresist, and performing plasma etching based on the patterned first mask layer 2 to form a plurality of deep trenches on the first conductive type silicon carbide substrate 1.

[0060] After step 2, the substrate obtained is as follows Figure 2b shown.

[0061] Step 4: Use the second conductivity type silicon carbide material to completely backfill the deep trench to form a second conductivity type silicon carbide epitaxial layer 3.

[0062] Specifically, step 4 may include the following sub-steps:

[0063] 41) Depositing a second conductive type silicon carbide material in the deep trench until the trench is completely backfilled and the first conductive type silicon carbide substrate 1 is covered.

[0064] Optionally, in this embodiment, the second conductive type silicon carbide material is a p-type silicon carbide material.

[0065] It can be understood that in this embodiment, the first conductive type silicon carbide substrate can also be selected as a p-type silicon carbide substrate, and accordingly, the second conductive type silicon carbide material here is an n-type silicon carbide material.

[0066] Specifically, the etched silicon carbide substrate can be backfilled with a certain doping concentration of p-type silicon carbide material through epitaxial equipment, such as Figure 2c shown.

[0067] 42) The silicon carbide substrate obtained in step 41) is thinned until the first conductive type silicon carbide substrate 1 is exposed, so as to form a second conductive type silicon carbide epitaxial layer 3 in the deep trench.

[0068] Optionally, the epitaxial silicon carbide substrate can be thinned with the help of thinning equipment (such as a polishing machine, a surface flattening machine, etc.). The details are as follows:

[0069] First, coarse grinding is performed at a speed of 3 μm per second; then fine grinding is performed at a speed less than 1 μm per second until the surface of the first conductive type silicon carbide substrate 1 is exposed, and the grinding is terminated.

[0070] After thinning, the silicon carbide substrate is Figure 2d shown.

[0071] Step 5: Etching a plurality of shallow trenches on the second conductivity type silicon carbide epitaxial layer 3 to obtain a vertical deep silicon carbide PN junction trench structure.

[0072] Specifically, step 5 may include the following sub-steps:

[0073] 51) Depositing a second mask layer on the first conductivity type silicon carbide substrate 1 and the second conductivity type silicon carbide epitaxial layer 3.

[0074] Optionally, similar to preparing the first mask layer 2 in step 2, the present embodiment may adopt any one of the following schemes to prepare the second mask layer, namely:

[0075] Depositing silicon dioxide with a thickness of 4 μm or more on the first conductive type silicon carbide substrate 1 and the second conductive type silicon carbide epitaxial layer 3 to form a second mask layer;

[0076] Alternatively, a silicon nitride film with a thickness of 1.2 μm is deposited on the first conductive type silicon carbide substrate 1 and the second conductive type silicon carbide epitaxial layer 3 to form a second mask layer;

[0077] Alternatively, a metal film with a thickness of 0.8-1 μm is deposited on the first conductive type silicon carbide substrate 1 and the second conductive type silicon carbide epitaxial layer 3 to form a second mask layer; wherein the material of the metal film includes nickel or chromium.

[0078] It is understandable that, in addition to the above-mentioned silicon dioxide and silicon nitride films, this embodiment may also use other materials as the materials of the first mask layer and the second mask layer.

[0079] 52) A photoresist is coated on the second mask layer, and the photoresist is used as a mask to etch the second mask layer using a wet etching process until the surface of the second conductivity type silicon carbide epitaxial layer 3 is exposed, and the second mask layer is patterned.

[0080] 53) removing the photoresist, and performing plasma etching based on the patterned second mask layer to form a plurality of shallow trenches on the second conductivity type silicon carbide epitaxial layer.

[0081] It is understandable that the depth of the shallow trench on the second conductivity type silicon carbide epitaxial layer is less than the depth of the deep trench on the first conductivity type silicon carbide substrate. In addition, the size, depth, etc. of the shallow trench can be changed according to the requirements of subsequent further device manufacturing to adapt to the structure of the target device.

[0082] 54) The second mask layer is removed by a wet etching process to obtain a vertical deep silicon carbide PN junction trench structure.

[0083] The resulting vertical deep silicon carbide PN junction trench structure is as follows: Figure 2e shown.

[0084] After obtaining the vertical deep silicon carbide PN junction trench structure, the shallow trench on the second conductive type silicon carbide epitaxial layer can be further backfilled on this basis to prepare a BJT or PN junction-heterojunction structure device, or after further backfilling the shallow trench on the second conductive type silicon carbide epitaxial layer, the lead is etched to prepare a buried layer structure.

[0085] It should be noted that the specific implementation parameters of the cleaning, epitaxy, wet etching, plasma etching, thinning and other processes designed in the above preparation method can refer to the existing process implementation, and this embodiment will not provide a detailed introduction to this.

[0086] The present invention adopts the deep etching-epitaxial backfilling process to prepare the vertical silicon carbide deep PN junction trench structure, which has the following beneficial effects:

[0087] 1. No defects will be caused on the surface of the substrate.

[0088] The present invention adopts a deep etching-epitaxial backfilling-etching process to solve the problem of a large number of lattice defects caused by ion implantation due to high energy implantation of silicon carbide when making high-concentration doped pn junctions, and the problem of surface roughness caused by high-temperature annealing.

[0089] 2. Deep junction, excellent performance of power devices.

[0090] The present invention adopts a deep etching-epitaxial backfilling process to solve the problem of shallow junction depth caused by limited ion implantation energy and limited implantation depth when preparing silicon carbide pn junction, as well as the problem of great difficulty in the lateral epitaxial backfilling process and small lateral epitaxial depth, and can greatly improve the junction depth.

[0091] 3. The junction depth, junction area and morphology are controllable.

[0092] Compared with the ion implantation process, the deep etching-epitaxial backfilling process adopted in the present invention can better control the junction shape and junction area. Since the etching morphology is controllable, the pn junction morphology produced after backfilling is controllable, which provides more feasibility for device design and plays a guiding role in the unity of simulation and actual device performance.

[0093] In summary, the present invention adopts the process of deep etching-epitaxial backfilling-etching to realize the preparation of deep PN junction trench structure of silicon carbide, effectively improve the junction depth, make the shape and size of the junction highly controllable, avoid the process difficulty of sidewall anisotropic (different conductivity type) epitaxy, and at the same time, avoid the defects and surface roughness caused by high-energy ion implantation and high-temperature annealing, as well as the difficulty of lateral epitaxial backfilling process, and provide a new implementation plan for the design and manufacture of silicon carbide PN junction-based devices.

[0094] Based on the same inventive concept, the second aspect of the present invention also provides a vertical silicon carbide deep PN junction structure. Figure 3 , Figure 3 Schematic diagram of a vertical silicon carbide deep PN junction structure provided by an embodiment of the present invention. The structure includes a first conductive type silicon carbide substrate 1 and a second conductive type silicon carbide epitaxial layer 3;

[0095] A plurality of deep trenches are provided on the first conductive type silicon carbide substrate 1, the second conductive type silicon carbide epitaxial layer 3 is completely filled in the deep trenches, and a plurality of shallow trenches are provided on the second conductive type silicon carbide epitaxial layer 3; the depth of the shallow trenches is less than the depth of the deep trenches; the second conductive type silicon carbide epitaxial layer 3 and the first conductive type silicon carbide substrate 1 together form a vertical deep PN junction structure.

[0096] The vertical silicon carbide deep PN junction trench structure provided in this embodiment is prepared by using the preparation method provided in the first aspect above. Therefore, the structure also has good surface quality.

[0097] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0098] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0099] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.

[0100] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification.

[0101] The above contents are further detailed descriptions of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions or substitutions can be made without departing from the concept of the present invention, which should be regarded as falling within the protection scope of the present invention.

Claims

1. A method for preparing a vertical silicon carbide deep PN junction trench structure, characterized in that: include: Step 1: Select a first conductivity type silicon carbide substrate and clean it to obtain a first conductivity type silicon carbide substrate with a clean surface; Step 2: depositing a first mask layer on the first conductive type silicon carbide substrate; Step 3: etching the first mask layer and the first conductive type silicon carbide substrate to form a plurality of deep trenches on the first conductive type silicon carbide substrate; Step 4: completely backfilling the deep trench with a second conductivity type silicon carbide material to form a second conductivity type silicon carbide epitaxial layer; Step 5: Etching a plurality of shallow trenches on the second conductive type silicon carbide epitaxial layer to obtain a vertical deep silicon carbide PN junction trench structure.

2. The method for preparing a vertical silicon carbide deep PN junction trench structure according to claim 1, characterized in that: In step 1, the first conductivity type silicon carbide substrate is cleaned by using a standard RCA wet chemical cleaning process to obtain a first conductivity type silicon carbide substrate with a clean surface.

3. The method for preparing a vertical silicon carbide deep PN junction trench structure according to claim 1, characterized in that: Step 2 includes: Depositing silicon dioxide with a thickness of 4 μm or more on the first conductive type silicon carbide substrate to form a first mask layer; Alternatively, a silicon nitride film having a thickness of 1.2 μm or more is deposited on the first conductive type silicon carbide substrate to form a first mask layer.

4. The method for preparing a vertical silicon carbide deep PN junction trench structure according to claim 1, characterized in that: Step 2 includes: A metal film with a thickness of 0.8-1 μm is deposited on the first conductive type silicon carbide substrate to form a first mask layer; wherein the material of the metal film includes nickel or chromium.

5. The method for preparing a vertical silicon carbide deep PN junction trench structure according to claim 1, characterized in that: Step 3 includes: 31) applying photoresist on the first mask layer, and using the photoresist as a mask, etching the first mask layer using a wet etching process until the surface of the first conductive type silicon carbide substrate is exposed, and patterning the first mask layer; 32) removing the photoresist and performing plasma etching based on the patterned first mask layer to form a plurality of deep trenches on the first conductive type silicon carbide substrate.

6. The method for preparing a vertical silicon carbide deep PN junction trench structure according to claim 1, characterized in that: Step 4 includes: 41) depositing a second conductive type silicon carbide material in the deep trench until the trench is completely backfilled and the first conductive type silicon carbide substrate is covered; 42) Thinning the silicon carbide substrate obtained in step 41) until the first conductive type silicon carbide substrate is exposed, so as to form a second conductive type silicon carbide epitaxial layer in the deep trench.

7. The method for preparing a vertical silicon carbide deep PN junction trench structure according to claim 1, characterized in that: Step 5 includes: 51) depositing a second mask layer on the first conductive type silicon carbide substrate and the second conductive type silicon carbide epitaxial layer; 52) coating a photoresist on the second mask layer, and using the photoresist as a mask, etching the second mask layer using a wet etching process until the surface of the second conductive type silicon carbide epitaxial layer is exposed, and patterning the second mask layer; 53) removing the photoresist, and performing plasma etching based on the patterned second mask layer to form a plurality of shallow trenches on the second conductive type silicon carbide epitaxial layer; the depth of the shallow trenches is less than the depth of the deep trenches; 54) Using a wet etching process to remove the second mask layer, a vertical deep silicon carbide PN junction trench structure is obtained.

8. The method for preparing a vertical silicon carbide deep PN junction trench structure according to claim 7, characterized in that: Step 51) comprises: Depositing silicon dioxide with a thickness of 4 μm or more on the first conductive type silicon carbide substrate and the second conductive type silicon carbide epitaxial layer to form a second mask layer; Alternatively, a silicon nitride film having a thickness of 1.2 μm or more is deposited on the first conductive type silicon carbide substrate and the second conductive type silicon carbide epitaxial layer to form a second mask layer.

9. The method for preparing a vertical silicon carbide deep PN junction trench structure according to claim 7, characterized in that: Step 51) comprises: A metal film with a thickness of 0.8-1 μm is deposited on the first conductive type silicon carbide substrate and the second conductive type silicon carbide epitaxial layer to form a second mask layer; wherein the material of the metal film includes nickel or chromium.

10. A vertical silicon carbide deep PN junction trench structure, characterized in that: It includes a first conductivity type silicon carbide substrate and a second conductivity type silicon carbide epitaxial layer; A plurality of deep trenches are provided on the first conductive type silicon carbide substrate, the second conductive type silicon carbide epitaxial layer completely fills the deep trenches, and a plurality of shallow trenches are provided on the second conductive type silicon carbide epitaxial layer, the depth of the shallow trenches is less than the depth of the deep trenches; the second conductive type silicon carbide epitaxial layer and the first conductive type silicon carbide substrate together form a vertical deep PN junction trench structure.

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