Method for manufacturing heat dissipation substrate and method for manufacturing power semiconductor module

Abstract

The invention relates to a manufacturing method of a heat dissipation substrate and a manufacturing method of a power semiconductor module. A method of manufacturing a heat dissipation substrate for a power semiconductor according to an embodiment includes: a loading step of a ceramic substrate including an active region AA of the ceramic substrate and a dummy region DA of the ceramic substrate provided outside the active region AA; and marking the unique code UC on the dummy region DA of the ceramic substrate. In addition, the embodiment can also comprise a step of cleaning the ceramic substrate and a step of measuring the thickness of the cleaned ceramic substrate. The unique code is stored in a predetermined central server, and the unique code may include thickness information of the ceramic substrate.

Description

Technical Field

[0001] Embodiments relate to a ceramic substrate for a heat dissipation substrate, a heat dissipation substrate for a power semiconductor module, a power semiconductor module including the heat dissipation substrate, a power converter including the power semiconductor module, and a method of manufacturing the same.

[0002] Specifically, embodiments include a ceramic substrate for a heat dissipation substrate with a unique code, a heat dissipation substrate for a power semiconductor module with a unique code, a power semiconductor module including a heat dissipation substrate with a unique code, and a power converter including a power semiconductor module with a unique code and a manufacturing method thereof. Background Art

[0003] A power converter module is a device that performs power conversion (AC→DC, DC→AC), power transformation (step-down, step-up), power distribution, or power control. A power converter module is a key component that improves energy efficiency during power transmission and control and provides system stability and reliability by controlling voltage changes. A power converter module is called a power module or a power system.

[0004] The power converter module includes various components such as power semiconductor devices, a heat sink substrate, a base plate, molded silicon, a housing and cover, and terminals.

[0005] Recently, environmentally friendly vehicles based on electricity or hydrogen have become the focus of public attention instead of internal combustion engine vehicles based on fossil fuels, and many power semiconductor devices are used in these environmentally friendly vehicles. Environmentally friendly vehicles include hybrid electric vehicles (HEV), plug-in hybrid electric vehicles (PHEV), electric vehicles (EV), and fuel cell vehicles (PCEV).

[0006] In addition, power semiconductors are used in various electric and electronic devices such as electric vehicle chargers, energy storage devices, power supply devices, and railways in addition to environmentally friendly vehicles.

[0007] Previously, silicon (Si) power semiconductor devices have been widely used, but as Si power semiconductors have reached their physical limits, research on WBG (wide bandgap) power semiconductors such as silicon carbide (SiC) or gallium nitride (GaN) is being actively conducted to replace them.

[0008] WBG power semiconductor devices have a bandgap energy about 3 times higher than that of Si power semiconductor devices, a breakdown field about 10 times higher than that of Si power semiconductor devices, and a thermal conductivity about 3 times higher than that of Si power semiconductor devices. Due to these excellent characteristics, WBG power semiconductor devices can operate in high temperature and high voltage environments, and have the advantages of high switching speed and low switching loss.

[0009] For example, it is used to perform power conversion in conventional electric vehicles, hybrid electric vehicles, etc. Si-based power semiconductor modules for motor drive switching and control operate in a temperature environment of about 150° C. In response to recent demands for increased switching performance and power density, wide bandgap (WBG)-based power semiconductor devices (such as SiC or GaN) that can operate at an operating temperature higher than about 300° C. (e.g., about 300-700° C.) have been actively studied.

[0010] At this time, the heat generated by the power semiconductor generates thermomechanical stress in various parts of the power semiconductor module, and the life of the junction and the power semiconductor device may be deteriorated due to thermal fatigue of the junction. Therefore, it is very important to design the reliability of the power semiconductor module to appropriately dissipate the heat generated from the power semiconductor device through the heat dissipation substrate, thereby maintaining the junction temperature of the power semiconductor device below an appropriate temperature.

[0011] At this time, the heat dissipation substrate for power semiconductors has not only a function of transferring heat generated during operation of the power semiconductor device to the outside but also an important function of electrically connecting the power semiconductor device by forming a wiring pattern on one side of the heat dissipation substrate.

[0012] Conventional heat dissipation substrates for power semiconductors can be classified into a direct copper bonding (DBC) method and an active metal brazing (AMB) method according to the bonding method. The DBC method is a method of forming an oxide film on a copper (Cu) layer and then bonding it directly to a ceramic. The AMB method is a method of performing brazing by inserting a paste containing metal particles with a relatively low melting point as an intermediate material between a base metal and a ceramic.

[0013] Furthermore, in the current field of heat dissipation substrates, the thickness of the supplied ceramic substrates is not constant, and the thickness of the supplied metal plates (such as copper plates) is also not constant. In this case, the final heat dissipation substrate must meet the strict specifications of the heat dissipation substrate delivery standard, but there are many difficulties in producing heat dissipation substrates that can meet the strict thickness specifications.

[0014] In addition, in the conventional heat dissipation substrate industry, for each "individual heat dissipation substrate", all production and quality information and history (such as ceramic substrate thickness information, inspection information, copper plate thickness information, surface information, and interface information after the bonding process) cannot be accurately matched and managed.

[0015] In addition, in particular, when metal is sputtered on a ceramic substrate and then a copper plate and hot press process is performed, even if a predetermined code is marked on the ceramic substrate, the code is obscured by the sputtering process and the hot press process, so it is impossible to attempt to mark a separate code for each "separate heat dissipation substrate".

[0016] At this time, the internal technology relies on manual work of the ceramic substrate and metal plate lamination process. In addition, when the lamination process is performed manually, it is difficult to consider matching the thickness of each ceramic substrate and metal plate, and it is not even easy to control the placement of the metal plate on the upper and lower sides of the ceramic substrate.

[0017] In particular, in the internal technology, the stacking group of the heat dissipation substrate includes a ceramic substrate and a metal plate arranged on the top and bottom, and in achieving a high stacking density of several tens to nearly 100 groups, the alignment of the ceramic substrate and the metal plate is studied as a difficult technical challenge. Summary of the invention

[0018] One of the technical purposes of the present embodiment is to solve the problem that it is difficult to meet the strict thickness specification of the final heat dissipation substrate when the thickness of the technical challenge ceramic substrate is not constant and the thickness of the technical challenge metal plate is not constant.

[0019] In addition, one of the technical objectives of the present embodiment is to accurately match all production and quality information and history, such as ceramic substrate thickness information, inspection information, copper plate thickness information, surface information, and bonding interface information after the bonding process, for each "individual heat dissipation substrate".

[0020] The technical objectives of the embodiment are not limited to the technical objectives described in this section, but include technical objectives that can be understood through the description of the present invention.

[0021] The method of manufacturing a heat dissipation substrate for a power semiconductor according to an embodiment may include loading a ceramic substrate including an active area AA of the ceramic substrate and a dummy area DA of the ceramic substrate disposed outside the active area AA, and marking a unique code UC on the dummy area DA of the ceramic substrate.

[0022] Additionally, the embodiment may further include cleaning the ceramic substrate and measuring the thickness of the cleaned ceramic substrate.

[0023] The unique code may be stored in a predetermined central server, and the unique code may include thickness information of the ceramic substrate.

[0024] The method may further include marking a unique ID on the dummy area DA of the ceramic substrate.

[0025] The unique ID may include a combination of numbers, letters, or a combination of numbers and letters.

[0026] The unique code UC has a rectangular or square shape, and may be arranged such that a vertex of the unique code and a vertex of the active area face each other.

[0027] The unique code UC may have a rectangular or square shape, and the minimum distance between the unique code and the active area AA of the ceramic substrate may be the distance between the vertex of the unique code and the vertex of the active area.

[0028] The unique code UC may have a rectangular or square shape, and the corners of the unique code UC may be arranged to face the vertices of the unique code closest to the active area.

[0029] In addition, the embodiment may further include the steps of classifying the ceramic substrates into a plurality of groups according to the measured thicknesses, and loading the classified ceramic substrates into different substrate boxes.

[0030] Each substrate cassette may be labeled with a predetermined unique ID or unique code.

[0031] In addition, the embodiment may include the steps of mounting the loaded ceramic substrate on a predetermined sputtering device and performing sputtering on the mounted ceramic substrate.

[0032] In the sputtering step, sputtering may not occur on the unique code.

[0033] In addition, the embodiment may include the following steps: stacking a first metal plate and a second metal plate on the lower side and the upper side of the sputtered ceramic substrate, respectively; performing a hot pressing process on the stacked ceramic substrate, the first metal plate and the second metal plate; and removing a portion of the second metal plate to open the unique code.

[0034] In addition, the embodiment may include the steps of forming a wiring pattern by etching the second metal plate of the ceramic substrate and marking the second unique code on the first metal plate.

[0035] The thickness of the first metal plate and the thickness of the second metal plate may be different from each other.

[0036] Furthermore, the method of manufacturing a power semiconductor module according to an embodiment may include the steps of providing a power semiconductor device and bonding a first heat dissipation substrate and a second heat dissipation substrate to a lower side and an upper side of the power semiconductor device, respectively.

[0037] The method of manufacturing the first heat dissipation substrate or the second heat dissipation substrate may include any one of methods of manufacturing a heat dissipation substrate for a power semiconductor module.

[0038] The ceramic substrate for a heat dissipation substrate according to an embodiment may include an active area AA of the ceramic substrate, a dummy area DA of the ceramic substrate disposed outside the active area AA, and a unique code UC marked on the dummy area DA of the ceramic substrate.

[0039] The unique code UC may include one or more of a digital matrix code (DMC), a QR code, or a barcode.

[0040] The embodiment may further include a unique ID marked on the dummy area DA of the ceramic substrate.

[0041] The unique ID may include a combination of numbers, letters, or a combination of numbers and letters.

[0042] The unique code UC may comprise a rectangular or square shape.

[0043] The vertices of the unique code and the vertices of the active area may be arranged to face each other.

[0044] The minimum distance between the unique code and the active area AA of the ceramic substrate may be the distance between a vertex of the unique code and a vertex of the active area.

[0045] The corners of the unique code UC may be arranged to face the vertices of the active area that are closest to the unique code.

[0046] A heat dissipation substrate according to an embodiment may include a first metal plate, a ceramic substrate bonded to the first metal plate, and a second metal plate bonded to the ceramic substrate.

[0047] A unique code may be included that is marked on the first metal plate or the second metal plate.

[0048] The second metal plate may be electrically connected to a predetermined power semiconductor device.

[0049] A unique code may be provided on the first metal plate.

[0050] The thickness of the first metal plate and the thickness of the second metal plate may be different from each other.

[0051] In addition, the power semiconductor module according to the present embodiment may include a first heat dissipation substrate, a power semiconductor device provided on the first heat dissipation substrate, and a second heat dissipation substrate provided on the power semiconductor device.

[0052] The first heat dissipation substrate or the second heat dissipation substrate may include one of heat dissipation substrates for a power semiconductor module.

[0053] The second metal plate is electrically connected to the power semiconductor device, and a unique code may be provided on the first metal plate.

[0054] The thickness of the first metal plate and the thickness of the second metal plate may be different from each other.

[0055] In addition, the power converter according to the embodiment may include any one of the above-mentioned power semiconductor modules.

[0056] According to this embodiment, for each "separate heat dissipation substrate", there is a technical effect of managing the heat dissipation substrate by accurately matching and updating all production and quality information and history (such as thickness information of the ceramic substrate, inspection information, thickness information of the copper plate, surface information, bonding interface information after the bonding process, etc.).

[0057] For example, according to one embodiment, unique information can be marked on a dummy area of ​​an initial ceramic substrate during the heat dissipation substrate manufacturing process, and the unique information can be stored and managed on a central server to store all production, so that there is a special technical effect that all production and quality information and history can be accurately matched and updated during the heat dissipation substrate manufacturing process through "separate ceramic substrates", "separate metal plates" and "separate heat dissipation substrates".

[0058] Furthermore, according to this embodiment, even if the position or arrangement of the ceramic substrate is changed during the manufacturing process due to an operator's error, the unique information of the individual ceramic substrate can be checked in all processes by applying the embodiment. And the unique information of the ceramic substrate is verified, so there is a technical effect that the history of all processes including the initial reception of a single ceramic substrate, the cleaning stage, and the heat pressing can be completely updated and managed.

[0059] In addition, according to one embodiment, unique information that can confirm the history of all processes in the initial warehousing stage of a product can be fully matched with the final product and delivered to the customer, and the customer can also accurately understand and use the product quality and production history through this unique information, or request after-sales service quickly and accurately when necessary.

[0060] Furthermore, simply marking product information on the heat dissipation substrate of the final product cannot fully match and manage film formation information such as thickness information of the ceramic substrate constituting the product, thickness information of the metal plate, and bonding interface information.

[0061] In addition, according to the embodiment, there is a technical effect of minimizing thickness distribution by classifying the individual ceramic substrates and metal plates by thickness and matching them by thickness grades.

[0062] For example, according to an embodiment, ceramic substrates may be classified and loaded into the first substrate box CM1, the second substrate box CM2, and the third substrate box CM3 according to thickness, and the thickness and classification loading information of the "individual ceramic substrates" and the "individual substrate boxes" may be stored and managed on the upper server. In addition, the unique information UC of each ceramic substrate SS may be accurately updated and managed using information about which substrate box the ceramic substrate is loaded into.

[0063] Therefore, in the stacking process performed after the sputtering process, by reading the unique IDs of the first substrate box CM1, the second substrate box CM2 and the third substrate box CM3, there is a technical effect of optimizing the thickness quality of the heat dissipation substrate by matching the stacking and bonding processes for each thickness with the metal plate.

[0064] In addition, the embodiment closely measures and manages the thickness of ceramic substrates and copper plates delivered in various thicknesses to perfectly manage the thickness information so that it can be matched with each product through unique information, and there is a technical effect that the thickness distribution can be minimized based on the unique information.

[0065] The technical effects of the embodiment are not limited to the technical effects described in this section, and include those that can be understood through the description of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0066] Figure 1 is a cross-sectional view of a power semiconductor module 500 including a heat dissipation substrate for a power semiconductor according to an embodiment.

[0067] Figure 2 is a process flow chart of a process for manufacturing a heat dissipation substrate for a power semiconductor according to an embodiment.

[0068] Figures 3 to 6 , Fig. 7A and Figure 7B , Figure 8 and Fig. 9 is a diagram of a pretreatment process for a ceramic substrate.

[0069] Fig.10 and Fig.11 , Fig. 12A and Fig. 12B as well as Fig.13 is a diagram of a sputtering process for a ceramic substrate according to an example.

[0070] Fig.14 is a diagram of a metal box (MM) in which metal plates classified by thickness are loaded.

[0071] Fig.15 This is a conceptual diagram of a stacking group stacked in a stacking unit.

[0072] Fig.16 and Fig.17 is a diagram of a thermocompression bonding process according to an embodiment.

[0073] Fig.18 is an exemplary diagram of a heat dissipation substrate after an inspection process and an etching process.

[0074] Figures 19 to 21 It is a diagram of the laser scribing process, inspection process, and cutting process for a heat dissipation substrate.

[0075] Fig. 22 is a circuit diagram of a power converter according to an embodiment. DETAILED DESCRIPTION

[0076] Hereinafter, embodiments are described in detail with reference to the accompanying drawings.

[0077] The suffixes "module" and "unit" for the elements used in the following description are simply given in consideration of ease of writing this specification, and they themselves do not give particularly important meanings or roles. Therefore, "module" and "unit" can be used interchangeably.

[0078] Terms including ordinal numbers such as first and second may be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another element.

[0079] Unless the context clearly indicates otherwise, a singular expression includes a plural expression.

[0080] In the present application, terms such as “include,” “have,” or “comprises” are intended to specify the presence of features, quantities, steps, operations, components, parts, or combinations thereof described in the specification, and do not exclude the absence of one or other features, quantities, steps, operations, components, parts, or combinations thereof, or any combination thereof.

[0081] In an embodiment, the power semiconductor module and the heat dissipation substrate for power semiconductors can be used in inverters or converters such as automobiles, computers, home appliances, solar energy, and smart grids. In addition, in addition to environmentally friendly vehicles, the power semiconductor module and the heat dissipation substrate for power semiconductors according to the embodiments can also be applied to various electrical and electronic devices such as electric differential vehicle chargers, power supply devices, or railways.

[0082] In an embodiment, the power semiconductor device may include one power semiconductor module or a plurality of power semiconductor modules. In addition, the power semiconductor module may include a plurality of power semiconductor devices.

[0083] In the following embodiments, the power semiconductor device describes an automotive inverter for driving an electric motor, but the power semiconductor device of the embodiment can be applied to an inverter or a converter in the above-mentioned various technical fields. Here, the vehicle includes a hybrid electric vehicle (HEV), a plug-in hybrid electric vehicle (PHEV), an electric vehicle (EV), and a fuel cell vehicle (PCEV). In the description of the following embodiments, a switching device and a power semiconductor device can be used interchangeably.

[0084] <Power semiconductor module including heat dissipation substrate>

[0085] Figure 1 is a cross-sectional view of a power semiconductor module 500 including a heat dissipation substrate for a power semiconductor according to an embodiment. Figure 1 According to the embodiment, the power semiconductor module 500 may include: a first heat dissipation substrate 410, a second heat dissipation substrate 420, a power semiconductor device 100, a first lead frame 310, a second lead frame 320, and may be packaged by a mold 201, but is not limited thereto. The power semiconductor device 100 may include a first power semiconductor device 100a and a second power semiconductor device 100b.

[0086] The first and second heat dissipation substrates 410 and 420 may include a first metal plate MP1 , a ceramic substrate SS, and a second metal plate MP2 .

[0087] One side of each of the first lead frame 310 and the second lead frame 320 may be electrically connected to the power semiconductor device 100, and the other side of each may be connected to an external connection terminal. The external connection terminal may include an input power source, a motor, or an inverter controller.

[0088] For example, the first lead frame 310 may include a first-first lead frame 310 a and a first-second lead frame 310 b .

[0089] In addition, the second lead frame 320 may include a second-first lead frame 320 a and a second-second lead frame 320 b .

[0090] <Manufacturing process of heat dissipation substrate for power semiconductor>

[0091] Figure 2 is a schematic process flow chart of a manufacturing process of a heat dissipation substrate for a power semiconductor according to an embodiment.

[0092] According to the embodiment, the manufacturing process of the heat dissipation substrate for power semiconductors may include the following steps: ① pretreatment process of ceramic substrate, ② sputtering process, ③ metal plate pretreatment process, ④ lamination process of ceramic substrate and metal plate, ⑤ hot pressing process of ceramic substrate and metal plate, ⑥ etching process of heat dissipation substrate, ⑦ inspection and cutting process of heat dissipation substrate, etc.

[0093] The overall manufacturing process of the heat dissipation substrate for power semiconductor according to the embodiment may be controlled by a control unit (not shown) of a central server, and the central server may include a data storage unit (not shown).

[0094] Hereinafter, main manufacturing processes of a heat dissipation substrate for a power semiconductor according to an embodiment will be described with reference to the accompanying drawings.

[0095] (Pretreatment process of ceramic substrate)

[0096] In the following, reference will be made to Figures 3 to 9 To describe the pretreatment process of ceramic substrates.

[0097] In an embodiment, a “pre-treatment process of the ceramic substrate” may be performed in a substrate cleaning apparatus (not shown) before a “lamination process” of the ceramic substrate and the metal plate.

[0098] The pretreatment process of the ceramic substrate may include: ① a loading step of the ceramic substrate, ② a unique code UC marking process, ③ a cleaning process of the ceramic substrate, ④ a thickness measurement process of the ceramic substrate, and ⑤ a loading process into a box for each thickness of the ceramic substrate.

[0099] ①Ceramic substrate loading steps

[0100] First, if Figure 3 As shown, a predetermined ceramic substrate SS may be prepared and loaded into a ceramic cleaning device (not shown). The ceramic substrate SS may be AlN, Si3N4, or Al2O3, but is not limited thereto. The ceramic substrate SS may have irregularities R on its surface, but is not limited thereto.

[0101] ② Unique code UC marking process

[0102] In the conventional heat dissipation substrate industry, it is difficult to accurately match the overall production and quality history, such as ceramic substrate thickness information, copper plate thickness information, and product information after the bonding process, "for each heat dissipation substrate".

[0103] In particular, when metal sputtering is performed on the ceramic substrate to which the present invention is applied, followed by copper plate and hot pressing processes, even if a code is marked on the ceramic substrate, the code is obscured by the sputtering process and the hot pressing process. Therefore, no attempt is made to mark individual codes for each "individual heat dissipation substrate".

[0104] Reference Figure 4 , a unique code UC can be marked on the ceramic substrate SS loaded in the substrate cleaning device. Thereafter, the unique code UC is read, transmitted and stored to the data storage unit of the server by wire or wireless, and detailed information related to the "separate heat dissipation substrate" including the "separate ceramic substrate" in subsequent processes can be accurately updated and managed.

[0105] Reference Figure 4 , the ceramic substrate SS may include an active area AA and a dummy area DA. The outermost edge of the active area AA may be a boundary (B) between the active area AA and the dummy area DA.

[0106] The active area AA is an area to be used in a final heat dissipation substrate product in the future, and the dummy area DA is an area to be removed. A unique code UC may be marked on the dummy area DA of the ceramic substrate SS.

[0107] The unique code UC may include, but is not limited to, a digital matrix code (DMC), a QR code, or a barcode. For example, the unique code UC may include a unique code marked or annotated by a unique code technology that may appear through technical development after applying the present invention.

[0108] In addition, the unique code UC may be marked by a laser marking (LM) technique, but is not limited thereto.

[0109] Figure 5 is a photograph of a ceramic substrate SS marked with a unique code UC in a dummy area DA according to an embodiment.

[0110] In the present embodiment, the unique code UC may be marked on the dummy area DA, which is removed by scribing the ceramic substrate SS and may be spaced apart from the active area AA by a predetermined distance.

[0111] In this embodiment, in addition to the unique code UC, a unique ID may be marked in the dummy area DA of the ceramic substrate SS. The unique ID may include a combination of numbers or letters and may include but is not limited to a serial number that can be identified by an operator or imaging device.

[0112] According to an embodiment, after marking the unique code UC and the unique ID for the entire inserted ceramic substrate SS, it can be sent to the data storage device of the upper server and managed, and detailed information related to the "separate ceramic substrate" and the "separate heat dissipation substrate" including the "separate ceramic substrate" can be accurately updated and managed, and there is also a special technical effect that enables post-management between processes.

[0113] also, Figure 6 This is a photograph of a technical problem that occurred when a unique code UCr was marked on a ceramic substrate SSr of a comparative example.

[0114] In the heat sink substrate industry, there has been no focus or attempt to manage the process history of heat sink substrate manufacturing processes for individual ceramic substrates.

[0115] In addition, the inventors of the present application discovered that in a new research process for process history management of a manufacturing process for a "separate ceramic substrate" in the field of heat dissipation substrates, when a unique code UCr of a comparative example was marked on a ceramic substrate, a unique problem was discovered in which burning HR occurred and spread beyond the dummy area DA to reach the active area AA.

[0116] This unique technical problem was studied: Burning HR will cause sputtering defects in the subsequent sputtering process, which is directly related to the quality of the heat dissipation substrate itself, and can further cause bonding defects in the metal plate and hot pressing process.

[0117] Therefore, not only is it difficult to imagine marking a specific unique code on the ceramic substrate itself, but there are also significant technical difficulties in realizing the unique code.

[0118] However, if Figure 5 As shown, the inventors of the present application independently studied the point at which burning does not affect the active area when marking the unique code UC, and accurately marking the unique code UC in the dummy area DA without burning.

[0119] Furthermore, in the present invention, marking a unique code on a ceramic substrate causes the unique code to be masked during a sputtering process and a hot pressing process, and thus attempts to mark a unique code on a separate ceramic substrate are technically difficult.

[0120] Next, Fig. 7A is a signature diagram of the first unique code UC1 according to the first embodiment, and Figure 7B : is a marking diagram of the second unique code UC2 according to the second embodiment.

[0121] The unique code in an embodiment may include a square or rectangular pattern, and may include four corners and four vertices.

[0122] Reference Fig. 7A , the first unique code UC1 and the active area vertices AE of the adjacent ceramic substrates may be spaced apart by a first distance D1. At this time, the vertices of the first unique code CE1 and the vertices of the active area AE may face each other.

[0123] According to this embodiment, a special technical effect is that the production history and product information of each individual ceramic substrate product can be traced by marking the unique code UC on the ceramic substrate SS.

[0124] For example, according to the embodiment, a unique code UC and a unique ID can be marked for the entire inserted ceramic substrate SS, and then transmitted to the data storage device of the upper server and managed, and detailed information about the "separate ceramic substrate" and the "separate heat dissipation substrate" containing the "separate ceramic substrate" can be accurately updated and managed. In addition, there is a special technical effect that enables post-management between processes.

[0125] However, referring to Figure 7B Through additional research, the inventors of the present application placed the second unique code vertex CE2 and the vertex of the active area AE at a certain distance apart from each other, so that even if burning occurs, the possibility of burning spreading to the active area AA is significantly reduced by placing the second unique code vertex CE2 and the vertex of the active area AE far apart.

[0126] For example, by arranging the side edge of the second unique code UC2 and the vertex AE of the active area to face each other, even if burning occurs, there is a technical effect of significantly reducing the possibility of burning spreading to the active area AA.

[0127] ③Ceramic substrate cleaning process and ④Thickness measurement process

[0128] Next, if Figure 8 As shown, after the ceramic substrate SS is cleaned using the cleaning device CL, the thickness of the ceramic substrate SS can be measured by the thickness measuring device TM. The thickness of the ceramic substrate SS can be 200 μm to 1,000 μm, but is not limited thereto. Preferably, the thickness of the ceramic substrate SS can be 300 μm to 800 μm, but is not limited thereto.

[0129] The ceramic substrates SS can be divided into a plurality of groups according to their thickness. For example, according to the thickness of the ceramic substrates SS, the ceramic substrates SS can be divided into a first group of ceramic substrates to a third group of ceramic substrates, but the present invention is not limited thereto.

[0130] ⑤ Loading process according to the thickness of the ceramic substrate

[0131] Fig. 9is a diagram of a substrate cassette CM in which ceramic substrates sorted by thickness after cleaning are loaded according to an embodiment.

[0132] For example, the ceramic substrates may be classified into first to third group ceramic substrates SS1 to SS3 according to first to third thicknesses T1 to T3 .

[0133] For example, the thicknesses of the first group ceramic substrate SS1 , the second group ceramic substrate SS2 , and the third group ceramic substrate SS3 may become thicker in this order, but the thicknesses are not limited thereto.

[0134] The first to third groups of ceramic substrates SS1 to SS3 may be loaded into first to third substrate boxes CM1 to CM3, respectively, and then transferred to a predetermined lamination device. The first to third groups of ceramic substrates may be referred to as first to third batches.

[0135] In an embodiment, each of the first to third substrate boxes CM1 to CM3 may also be marked with a predetermined unique ID or a unique code.

[0136] According to an embodiment, ceramic substrates may be classified and loaded into first to third substrate boxes CM1 to CM3 according to thickness, and thickness and classified loading information for “individual ceramic substrates” and “individual substrate boxes” may be stored and managed on an upper server.

[0137] In addition, the unique code UC of each ceramic substrate SS can be accurately updated and managed using information on which substrate cassette the ceramic substrate is loaded into.

[0138] Therefore, in the lamination process performed after the sputtering process, by reading the unique IDs of the first to third substrate boxes CM1 to CM3, the thickness quality of the heat dissipation substrate can be optimized by matching the lamination and bonding processes for each thickness with the metal plate.

[0139] According to an embodiment, there is a technical effect of minimizing thickness distribution by classifying the individual ceramic substrates and metal plates by thickness and matching them by thickness grade.

[0140] Currently, in the field of heat dissipation substrates, the thickness of supplied ceramic substrates is not constant, and the thickness of supplied metal plates (such as copper plates) is also not constant.

[0141] In this case, the final heat sink substrate must meet the strict specifications of the heat sink substrate delivery standard, but there are many difficulties in producing a heat sink substrate that can meet the strict thickness specifications.

[0142] Therefore, the inventors of the present invention have invented a lamination system for ceramic substrates and copper substrates, which precisely measures and manages the thicknesses of ceramic substrates and copper plates delivered in various thicknesses and perfectly manages the thickness information so that it can be matched with each product through unique information (UC), and based on the unique information UC, the thickness distribution can be minimized.

[0143] (Sputtering process)

[0144] As described above, the ceramic substrates classified by thickness may be transferred to the sputtering device while being loaded into the first to third substrate boxes CM1 to CM3 and unloaded for each individual ceramic substrate, which may then be mounted on the sputtering device and a sputtering process may be performed.

[0145] In the following, reference is made to Figures 10 to 13 , the “sputtering process for ceramic substrate” of the embodiment will be described.

[0146] Reference Fig.10 , a bonding metal layer 411 having a first thickness may be formed on one surface of the ceramic substrate SS by sputtering.

[0147] At this time, sputtering may not be performed in the unique code UC and unique ID regions. For example, in the sputtering process, the unique code UC and unique ID regions are covered and protected by the sprayed part of PS, etc., and then sputtering may be controlled not to be performed in the unique code UC and unique ID regions.

[0148] For example, refer to Fig.11 The ceramic substrate SS is mounted on the anode of the PVD device 700, and a bonding metal layer 411 including Ti or TiW may be deposited in an inert atmosphere such as Ar gas. to The first thickness.

[0149] For example, the bonding metal layer 411 may be deposited to about to The thickness may be, but not limited to, .

[0150] Next, refer to Fig. 12A The bonding metal layer 411 and the diffusion metal layer 412 may be formed by sputtering. The diffusion metal layer 412 may be deposited to a second thickness thinner than the first thickness of the bonding metal layer 411 by sputtering.

[0151] For example, the second thickness of the diffusion metal layer 412 may be in the range of ¼ to ½ of the first thickness of the bonding metal layer 411 .

[0152] For example, the second thickness of the diffusion metal layer 412 may be about to Preferably, the second thickness of the diffusion metal layer 412 may be about to But it is not limited to this.

[0153] The diffusion metal layer 412 may have a melting point lower than the temperature of the hot pressing process for bonding. For example, the temperature of the hot pressing may be in the range of about 900° C. to 1100° C., and the diffusion metal layer 412 may be a material having a melting point less than 900° C. and having excellent diffusion characteristics. For example, the diffusion metal layer 412 may be any one or more of Al, Ag, Au, and Sn, but is not limited thereto.

[0154] According to the present embodiment, since the diffusion metal layer 412 is formed by sputtering to a second thickness thinner than the first thickness of the bonding metal layer 411 , there is a technical effect of preventing micro voids from occurring in a subsequent thermal compression bonding process.

[0155] For example, a technical effect is that a metal material of the diffusion metal layer 412 formed thinly in a hot pressing process may be diffused into the second metal plate (MP2) such as a copper plate to increase bonding strength and prevent occurrence of micro voids.

[0156] In addition, refer to Fig. 12B In this embodiment, the diffusion metal region 412a may be formed in the form of islands or dots spaced apart from each other, rather than in the form of a layer, on the bonding metal layer 411. For example, the diffusion metal region 412a may be formed in the form of islands or dots spaced apart from each other while partially filling the concave portion of the surface irregularity of the bonding metal layer 411.

[0157] For example, the diffusion metal region 412 a may be formed in the form of islands or dots spaced apart from each other, which have a relatively high energy state or surface area, by first filling concave portions of the surface irregularities of the bonding metal layer 411 .

[0158] In addition, in an embodiment, it is possible to Fig.11 Sputtering is performed with the anode electrode plate in a tilted state. In this way, the diffusion metal region 412a can be controlled to be formed in the form of islands spaced apart from each other while first filling the bottom and side of the concave portion of the surface irregularity of the bonding metal layer 411.

[0159] The diffusion metal region 412a may be formed to have a third thickness that is much thinner than the first thickness of the bonding metal layer 411, and the third thickness is 1 / 10 to 1 / 4 of the first thickness. For example, the third thickness of the diffusion metal region 412a may be about to Preferably, the third thickness of the diffusion metal region 412a may be about to But it is not limited to this.

[0160] Since the diffusion metal regions 412 a are formed on the bonding metal layer 411 in the form of islands or dots spaced apart from each other rather than in the form of a layer, the occurrence of micro voids in a subsequent thermal compression bonding process is more effectively prevented.

[0161] For example, the metal material in the diffusion metal region 412 a , which is deposited in the form of islands or dots during the hot pressing process, diffuses into the metal plate to increase bonding strength and prevent micro voids.

[0162] Next, refer to Fig.13 After the ceramic substrate SS on which the diffusion metal layer 412 has been deposited on one surface is turned over, the bonding metal layer 411 and the diffusion metal layer 412 may be sequentially formed on the opposite surface by sputtering.

[0163] In an embodiment, the thickness of the bonding metal layer 411 and the diffusion metal layer 412 of each individual ceramic substrate SS is measured after sputtering, and the thickness data of each unique code UC is sent to a server for update management.

[0164] For example, in an embodiment, the thickness of the deposited bonding metal layer 411 and the diffusion metal layer 412 may be measured by measuring a sheet resistance of a separate ceramic substrate SS, but the present invention is not limited thereto.

[0165] The individual ceramic substrates whose thicknesses of the bonding metal layer 411 and the diffusion metal layer 412 have been measured can be transferred to a stacking device, which is again loaded into the first substrate box CM1 to the third substrate box CM3, and the thicknesses of the individual ceramic substrates and the individual metal plates can be matched and then stacked in the stacking device.

[0166] (Metal plate pretreatment process)

[0167] Fig.14 is a diagram of a metal box MM in which metal plates sorted by thickness after cleaning are loaded according to an embodiment.

[0168] The metal plate pretreatment process may be performed separately from the ceramic substrate pretreatment process. For example, the metal plate pretreatment process may be performed before, after, or simultaneously with the ceramic substrate pretreatment process.

[0169] The metal plate may be a metal plate having excellent electrical conductivity and thermal conductivity. For example, the metal plate may be a Cu plate or a Cu alloy plate, but is not limited thereto. The metal plate may also be referred to as a metal substrate.

[0170] The metal plate preprocessing process may include a cleaning process and a thickness measuring process of the metal plate, and then the metal plates classified by respective thickness categories may be sorted and loaded into a metal box.

[0171] For example, a CDA (clean dry air) cleaning process and a particle exhaust process of the metal plate may be performed.

[0172] In addition, in an embodiment, after cleaning the metal plate, the top / bottom thickness of the metal plate may be measured using a displacement sensor, etc. For example, the thickness of 9 points of the metal plate may be measured, but the method is not limited thereto.

[0173] At this time, an embodiment may transmit information about the thickness of the metal plate to an upper server so that information about the individual metal plates may be accurately updated and managed.

[0174] Additionally, in an embodiment, a marking process for metal specific information (not shown) may be performed on a dummy area of ​​the metal plate before cleaning, but the process is not limited thereto.

[0175] In an embodiment, the thickness of the metal plate may be 200 μm to 500 μm, but is not limited thereto. Preferably, the thickness of the metal plate may be 250 μm to 350 μm, but is not limited thereto.

[0176] The metal plates may be classified into a plurality of groups according to their thickness. For example, the metal plates may be classified into first to third metal plates MP1 to MP3 according to their thickness, but are not limited thereto. The thicknesses of the first metal plate MP1, the second metal plate MP2, and the third metal plate MP3 may increase in this order, but are not limited thereto.

[0177] For example, refer to Fig.14 , the first group of metal plates MP1 to the third group of metal plates MP3 classified into the first thickness T1 to the third thickness T3 are respectively loaded into the first metal boxes MM1 to the third MM3, and then transferred to the predetermined lamination device. The first group of metal plates to the third group of metal plates can be called the first batch to the third batch.

[0178] In an embodiment, each of the metal boxes MM1, MM2, and MM3 may be marked with a predetermined unique ID or a unique code.

[0179] According to an embodiment, the metal plates may be classified and loaded into the first to third metal boxes MM1 to MM3 according to thickness, and thickness and classified loading information for individual metal plates and metal boxes may be stored and managed on an upper server.

[0180] In addition, unique information of each metal plate can be accurately updated and managed using information about which metal box the metal plate is loaded into.

[0181] Therefore, in a subsequent lamination process, the unique IDs of the metal boxes MM1, MM2, and MM3 can be read, and the thickness quality can be optimized by matching the respective thicknesses with the ceramic substrate.

[0182] According to the embodiment, there is a technical effect of classifying not only the individual ceramic substrates but also the metal plates by thickness and minimizing the thickness distribution by matching the respective thickness grades.

[0183] Currently, in the field of heat dissipation substrates, the thickness of not only supplied ceramic substrates but also supplied metal plates (such as copper plates) is inconsistent. In this case, the final heat dissipation substrate must meet the strict specifications of the heat dissipation substrate delivery standard, but there are many difficulties in producing heat dissipation substrates that can meet the strict thickness specifications.

[0184] Therefore, the inventors of the present invention precisely measured and managed the thickness of ceramic substrates and copper plates delivered in various thicknesses to perfectly manage the thickness information so that it can be matched with each product through unique information. Based on this unique information, a lamination system of ceramic substrates and copper substrates that can minimize thickness distribution was invented.

[0185] (Lamination process of ceramic substrate and metal plate)

[0186] Next, a lamination process of the ceramic substrate and the metal plate may be performed.

[0187] In an embodiment, the stacking process of the ceramic substrate and the metal plate may include ① a loading process of a carbon spacer, ② a loading process of a lower metal plate, ③ a loading process of a ceramic substrate, ④ a loading process of an upper metal plate, ⑤ a loading process of a carbon spacer, and ⑩ a loading process of graphite.

[0188] Fig.15 is a conceptual diagram of a stacking group including a first stacking group ST1 and a second stacking group ST2 stacked in a stacking unit according to an embodiment. Fig.17 The first stack group ST1 of the embodiment may include a first spacer 415a, a second metal plate MP2, a second ceramic substrate SS2, and a second spacer 415b stacked in sequence. Fig.17 ) may include a second stack group ST2 of the embodiment of the present invention may include a second spacer 415b, a first metal plate MP1, a ceramic substrate SS1, a third metal plate MP3, and a third spacer 415c, which are sequentially stacked.

[0189] In an embodiment, the graphite 480 may be stacked after performing 10 stacked groups, but the method is not limited thereto.

[0190] According to an embodiment, a stacked group stacked by an automatic alignment stacking system device may be fastened to a predetermined carrier fixture, and by inserting a predetermined guide transfer device into the stacking carrier, the precisely aligned stacked group may be placed in a heat press while maintaining alignment.

[0191] (Hot pressing process)

[0192] Next, we will refer to Figure 16 to Figure 17 A thermocompression bonding process of the embodiment is described.

[0193] Reference Fig.16 , a hot pressing process can be performed on the stacked group placed in a hot pressing device (not shown) under a vacuum state, so that the stacked group can be manufactured as shown in FIG. Fig.17 Heat dissipation substrates 410 and 420 are shown.

[0194] For example, a first stacked group ST1 including the second metal plate MP2 , the second ceramic substrate SS2 , and the second metal plate MP2 may be manufactured as the first heat dissipation substrate 410 .

[0195] Additionally, a second stacked stack ST2 including the first metal plate MP1 , the first ceramic substrate SS1 , and the third metal plate MP3 may be manufactured as the second heat dissipation substrate 420 .

[0196] The temperature of the hot pressing process may be about 900° C. to 1,100° C. Preferably, the temperature of the hot pressing process may be about 950° C. to 1,000° C., but is not limited thereto.

[0197] The vacuum degree of hot pressing process can be 1.0×10 -1 torr or higher, but not limited thereto. In addition, the pressure of the hot pressing process may be about 10 MPa to about 100 MPa, but not limited thereto.

[0198] (Inspection and etching process of heat dissipation substrate)

[0199] Fig.18 yes Fig.19 An exemplary diagram of a heat dissipation substrate after an inspection process and an etching process.

[0200] Reference Fig.18 , a cleaning process, an inspection process, and an etching process may be performed on each heat dissipation substrate manufactured through the thermocompression bonding process.

[0201] Fig.18 The illustrated first heat dissipation substrate 410 may have a structure including a first metal plate MP1 , a second ceramic substrate SS2 , and a second metal plate MP2 , but is not limited thereto.

[0202] For example, the first heat dissipation substrate 410 manufactured by the thermocompression bonding process may be subjected to a cleaning process, such as brush cleaning, water washing, and drying, but is not limited thereto.

[0203] In addition, in this embodiment, the ultrasonic inspection of the bonding interface can be performed on the heat dissipation substrate manufactured by the hot pressing process.

[0204] For example, according to an embodiment, the first bonding interface of each heat dissipating substrate may be inspected for interface thickness, presence of voids, and cracks using an ultrasonic inspection device.

[0205] According to an embodiment, after the thermocompression bonding process, a portion of the metal plate in the dummy region of each heat dissipation substrate may be removed to open the unique code UC formed in the dummy region.

[0206] This has a special technical effect of being able to accurately update and manage inspection information on interface thickness, presence of voids, and cracks of the bonding interface of each heat dissipation substrate after the thermal pressing process.

[0207] Continue to refer to Fig.18 , an etching process for forming a circuit pattern may be performed on the heat dissipation substrate determined as a good product during the inspection process.

[0208] For example, the wiring pattern may be formed by an etching process on the first heat dissipation substrate 410 on which the thermal pressing process has been performed. For example, the wiring pattern may be formed by partially removing the second metal plate MP2 of the first heat dissipation substrate 410. The bonding metal layer 411 and the bonding layer 413 on the second ceramic substrate SS2 may also be removed.

[0209] The embodiment has a special technical effect in that etching information (etchant, etching process conditions, etc.) for each heat dissipation substrate can be accurately updated and managed after the hot pressing process.

[0210] (Inspection and cutting process)

[0211] Next, we will refer to Figures 19 to 21 To describe the laser scribing process, inspection process, and cutting process for the heat dissipation substrate.

[0212] Reference Fig.19 , etching inspection can be performed on the heat dissipation substrate that has completed the etching process.

[0213] For heat dissipation substrates with good etching tests, a unique code UC can be marked on the metal plate. For example, when a heat dissipation substrate includes 9 snap areas, a unique code UC can be marked on the metal plate without a circuit pattern for each snap (for example, on each snap of the first metal plate MP1).

[0214] Marking of the unique code UC on each segmented area of ​​the first metal plate MP1 may be performed after laser scribing.

[0215] Next, refer to Fig. 20 , a laser scribing process and a breaking process may be performed.

[0216] In an embodiment, an inspection process may be performed after the laser scribing process and before the breaking process. The inspection process may include ultrasonic testing (SAT), which uses ultrasonic waves to assist in inspecting voids or cracks at the bonding interface.

[0217] In addition, the inspection process after the laser scribing process may include a process of analyzing surface information such as surface roughness, surface pinhole inspection, protrusion inspection, and foreign matter inspection through an automatic appearance inspection process.

[0218] The implementation has a special technical effect in that secondary bonding interface inspection information and automatic appearance inspection information for a separate heat dissipation substrate can be accurately updated and managed after the etching process.

[0219] Afterwards, if Fig.21 As shown, individual heat dissipation substrates for final qualified products can be manufactured through cutting and separation processes. Fig.21 The first metal plate MP1 of the first heat dissipation substrate 410 shown in FIG. Fig.19 The photos show the markings with the unique code UC to be delivered.

[0220] Therefore, according to an embodiment, it can be confirmed that unique information related to the history of all processes starting from the initial warehousing stage of the product can be perfectly matched with the final product and delivered to the customer, and the customer can also accurately understand and use the product quality and production history through this unique information, or request after-sales service quickly and accurately when necessary.

[0221] Furthermore, simply marking product information on the heat dissipation substrate of the final product cannot perfectly match and manage film formation information such as thickness information of the ceramic substrate constituting the product, thickness information of the metal plate, and bonding interface information.

[0222] <Power converter including heat dissipation substrate>

[0223] Fig. 221 is a circuit diagram of a power converter 1000 to which a power semiconductor module according to an embodiment is applied.

[0224] The power converter 1000 according to the embodiment may receive DC power from a battery or a fuel cell and convert the DC power into AC power, and supply the AC power to a predetermined load. For example, the power converter 1000 according to the embodiment may include an inverter that receives DC power from a battery, converts the DC power into three-phase AC power, and supplies the three-phase AC power to the motor M. The motor M may provide power to an electric vehicle, a fuel cell vehicle, etc.

[0225] The power converter 1000 according to the embodiment may include a power semiconductor device 100. The power semiconductor device 100 may be a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), but is not limited thereto. An IGBT (Insulated Gate Bipolar Transistor) may be included.

[0226] For example, the power converter 1000 may include a plurality of power semiconductor devices 100 a , 100 b , 100 c , 100 d , 100 e , and 100 f , and may include a plurality of diodes (not shown).

[0227] In an embodiment, a group of power semiconductor devices arranged in series on the high voltage line and the low voltage line on the input side may be referred to as an arm. For example, the first power semiconductor device 100a and the second power semiconductor device 100b include a first arm 12a, the third power semiconductor device 100c and the fourth power semiconductor device 100d include a second arm 12b, and the fifth power semiconductor device 100e and the sixth power semiconductor device 100f may include a third arm 12c.

[0228] The power semiconductor device 100 of the embodiment may be a silicon carbide (SiC) power semiconductor device, which may operate in a high temperature and high voltage environment and may have a high switching speed and low switching loss. The power semiconductor device 100 of the present embodiment may be packaged on a heat dissipation substrate for the above-mentioned power semiconductor to form a power semiconductor module (see Figure 1 ).

[0229] According to this embodiment, according to the embodiment, there is a technical effect that in terms of manufacturing heat dissipation substrates, all production and quality information and historical management of each "individual heat dissipation substrate" are accurately matched and updated, including ceramic plate thickness information, inspection information, copper plate thickness information, surface information, and bonding interface information after the bonding process.

[0230] In addition, according to the embodiment, even if the position or arrangement of the ceramic substrate is changed due to an operator's mistake during the manufacturing process, through the application of the embodiment, there is a technical effect of being able to completely update and manage the history of all processes including the initial reception, cleaning steps, and hot pressing of the individual ceramic substrate by confirming the unique information of the individual ceramic substrate.

[0231] In addition, according to an embodiment, it can be confirmed that unique information related to the history of all processes starting from the initial warehousing stage of the product can be perfectly matched with the final product and delivered to the customer, and the customer can also accurately understand and use the product quality and production history through this unique information, or request after-sales service quickly and accurately when necessary.

[0232] In addition, according to the embodiment, there is a technical effect of minimizing thickness distribution by classifying the individual ceramic substrates and metal plates by thickness and matching them by thickness grade.

[0233] Therefore, in the stacking process performed after the sputtering process, there is a technical effect that the thickness and quality of the heat dissipation substrate can be optimized by reading the unique IDs of the first to third substrate boxes CM1 to CM3 and matching the ceramic substrate and the metal plate by thickness to perform the stacking and bonding process.

[0234] In addition, in an embodiment, the thickness of ceramic substrates and copper plates delivered in various thicknesses are carefully measured and managed to perfectly manage the thickness information so that the ceramic substrates and copper plates can be matched with each product through unique information, and based on the unique information, the thickness distribution is minimized.

[0235] Although the present invention has been described above with reference to the embodiments, it will be readily apparent to those skilled in the art that various modifications and changes may be made to the present invention without departing from the spirit and scope of the present invention as set forth in the claims.

Claims

1. A method for manufacturing a heat dissipation substrate for a power semiconductor, the method comprising the following steps: a step of loading a ceramic substrate, the ceramic substrate comprising an active area and a dummy area disposed outside the active area; as well as The step of marking a unique code on the dummy area of ​​the ceramic substrate.

2. The method according to claim 1, further comprising the steps of: A cleaning process for the ceramic substrate; as well as A process for measuring the thickness of the cleaned ceramic substrate, Wherein, the unique code is stored on a central server, and the unique code includes thickness information of the ceramic substrate. 3 . The method according to claim 1 , further comprising the step of marking a unique ID on the dummy area of ​​the ceramic substrate.

4. The method according to claim 1, wherein: The unique code comprises a rectangle or a square, and Wherein, a vertex of the unique code and a vertex of the active area are arranged to face each other.

5. The method according to claim 1, wherein: The unique code includes a rectangle or a square, and an edge of the unique code is arranged to face a vertex of the active area that is closest to the unique code.

6. The method according to claim 2, further comprising the steps of: a step of classifying the ceramic substrates into a plurality of groups according to the measured thickness; as well as A loading step of loading the classified ceramic substrates into different substrate boxes.

7. The method according to claim 6, further comprising the steps of: A mounting step of mounting the loaded ceramic substrate on a predetermined sputtering device; as well as The step of sputtering the mounted ceramic substrate, Wherein, in the sputtering step, no sputtering is performed on the unique code.

8. The method according to claim 7, further comprising the steps of: a step of laminating a first metal plate and a second metal plate on the lower side and the upper side of the sputtered ceramic substrate, respectively; A step of performing a hot pressing process on the stacked ceramic substrate, the first metal plate and the second metal plate; as well as The step of opening said unique code by removing a portion of said second metal plate.

9. The method according to claim 8, further comprising the steps of: a step of forming a wiring pattern on the second metal plate of the ceramic substrate by etching; as well as The step of marking a second unique code on said first metal plate.

10. A method for manufacturing a power semiconductor module, the method comprising the following steps: Steps for placing power semiconductor devices; as well as a step of bonding a first heat dissipation substrate and a second heat dissipation substrate to the lower side and the upper side of the power semiconductor device, respectively; Wherein, the method of manufacturing the first heat dissipation substrate or the second heat dissipation substrate includes the method according to any one of claims 1 to 9.

Images