Semiconductor manufacturing apparatus

Abstract

The embodiment relates to a semiconductor manufacturing apparatus. According to one embodiment, a semiconductor manufacturing apparatus includes a stage that supports a semiconductor wafer. And the probe card is positioned above the workbench. The first electrode is formed of a conductive material, is movable on the stage from the outside toward the center of the stage, and can be in contact with the side surface of the semiconductor wafer.

Description

[0001] Related Applications

[0002] This application claims the priority of Japanese Patent Application No. 2023-145624 (filing date: September 7, 2023) as a basic application. The present application incorporates the entire contents of the basic application by reference. Technical Field

[0003] This embodiment relates to a semiconductor manufacturing apparatus. Background Art

[0004] In a semiconductor manufacturing apparatus, a stage on which a semiconductor wafer is mounted may be electrically connected to the back surface of the semiconductor wafer.

[0005] However, when an insulating layer is formed on the back side of the semiconductor wafer, the stage cannot be electrically connected to the substrate of the semiconductor wafer. In this case, the electrical characteristics of the semiconductor wafer cannot be measured in the semiconductor manufacturing apparatus.

[0006] On the other hand, when the insulating layer on the back side of the semiconductor wafer is removed, a difference between the surface stress and the back side stress of the semiconductor wafer occurs, and the semiconductor wafer is deformed. In this case, it is difficult to transport the semiconductor wafer in the semiconductor manufacturing process. Summary of the invention

[0007] The semiconductor manufacturing apparatus of this embodiment includes a worktable for supporting a semiconductor wafer. The probe card is located above the worktable. The first electrode is made of a conductive material and is movable from the outside of the worktable toward the center thereof to contact the side surface of the semiconductor wafer.

[0008] According to the present embodiment, it is possible to provide a semiconductor manufacturing apparatus capable of measuring the electrical characteristics of a semiconductor wafer even when the semiconductor wafer has an insulating layer on the back surface thereof. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 It is a diagram showing a configuration example of the probe device according to the first embodiment.

[0010] Figure 2 This is a flowchart showing an operation example of the probe device according to the first embodiment.

[0011] Figure 3 It is a cross-sectional view showing a structural example of a semiconductor wafer placed on a stage.

[0012] Figure 4 It is a cross-sectional view showing a structural example of a semiconductor wafer placed on a stage.

[0013] Figure 5The present invention is a cross-sectional view showing a manufacturing process of a semiconductor device after an inspection process of a semiconductor wafer.

[0014] Figure 6 It means next Figure 5 A cross-sectional view of a manufacturing process of a semiconductor device.

[0015] Figure 7 It means next Figure 6 A cross-sectional view of a manufacturing process of a semiconductor device.

[0016] Figure 8 It means next Figure 7 A cross-sectional view of a manufacturing process of a semiconductor device.

[0017] Fig. 9 It means next Figure 8 A cross-sectional view of a manufacturing process of a semiconductor device.

[0018] Fig.10 It is a plan view showing a configuration example of a clamp electrode according to the second embodiment.

[0019] Fig.11 It is a plan view showing a configuration example of a clamping electrode according to a third embodiment.

[0020] Fig.12 It is a cross-sectional view showing a configuration example of a clamping electrode according to a fourth embodiment.

[0021] Fig.13 It is a cross-sectional view showing a configuration example of a clamping electrode according to a fifth embodiment. DETAILED DESCRIPTION

[0022] Below, while referring to the attached Figure 1 The embodiments are described while the embodiments are described. In addition, the embodiments do not limit the present invention. The same parts in the drawings are marked with the same numbers, and their detailed descriptions are appropriately omitted, and different parts are described. Among them, the drawings are schematic diagrams or conceptual diagrams, and the relationship between the thickness and width of each part, the ratio of the size between the parts, etc. are not limited to being the same as the actual ones. In addition, even when representing the same parts, there are cases where the mutual sizes and ratios are represented differently according to the drawings.

[0023] (First Embodiment)

[0024] Figure 1This is a diagram showing a configuration example of a probe device according to the first embodiment. The probe device 1 is, for example, a semiconductor manufacturing device such as a semiconductor test device. The probe device 1 includes a worktable 10, a probe card 20, probes (Japanese: プローブ針) 21, clamping electrodes 30a and 30b, a worktable drive unit 40, a clamping drive unit 50, a probe card drive unit 52, a transfer arm drive unit 54, a control unit 60, a measurement unit 70, and a transfer arm 80.

[0025] The worktable 10 can place and support the semiconductor wafer W. The worktable 10 has a vacuum chuck function or an electrostatic chuck function for adsorbing the back surface of the semiconductor wafer. The semiconductor wafer W has, for example, a power semiconductor element such as an IGBT (Insulated Gate Bipolar Transistor), a HEMT (High Electron Mobility Transistor), a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), or a diode. Therefore, the semiconductor wafer W has not only a surface electrode but also a back electrode.

[0026] The probe card 20 is located above the worktable 10 and includes probes 21 that come into contact with the surface electrodes (electrode pads) of the semiconductor wafer W to be measured. The probe card 20 can be controlled by the control unit 60 and move in the X, Y, and Z directions. After the semiconductor wafer W is placed on the worktable 10, the probe card 20 moves so that the tips of the probes 21 come into contact with arbitrary electrode pads of the semiconductor wafer W. Alternatively, the probe card 20 can be fixed and the worktable 10 can move in the X, Y, and Z directions. Either one or both of the worktable 10 and the probe card 20 can be movable.

[0027] The clamping electrodes 30a and 30b, which serve as the first and second electrodes, are movable on the worktable 10 from the outside of the worktable 10 toward the center. The clamping electrodes 30a and 30b can approach the semiconductor wafer W from both sides of the semiconductor wafer W and come into contact with the side surfaces of the semiconductor wafer W. The clamping electrodes 30a and 30b are made of, for example, a conductive material such as copper, aluminum, or tungsten. The clamping electrodes 30a and 30b can move in the relative direction (±X direction) so that the two approach each other, or can move in such a way that only one approaches the other in one direction.

[0028] Since the clamping electrodes 30a and 30b are in contact with the side surface of the semiconductor wafer W, the clamping electrodes 30a and 30b function as back electrodes (e.g., drain electrodes) connected to the substrate of the semiconductor wafer W. Thus, even if an insulating film is provided on the back surface of the semiconductor wafer W, the substrate of the semiconductor wafer W can be electrically connected to the measuring unit 70 via the clamping electrodes 30a and 30b.

[0029] The thickness T30 of the clamping electrodes 30a, 30b in the vertical direction (Z direction) relative to the supporting surface of the workbench 10 is thinner than the thickness Tw of the semiconductor wafer W. Therefore, the clamping electrodes 30a, 30b are electrically connected only to the substrate of the semiconductor wafer W, and are not electrically connected to the semiconductor element formed in the surface area of ​​the semiconductor wafer W. When the clamping electrodes 30a, 30b are connected to the drain electrode, for example, the probe 21 may be connected to the source electrode or the gate electrode, for example. Thus, a voltage can be applied between the probe 21 and the clamping electrodes 30a, 30b to measure the electrical characteristics of the semiconductor element. In addition, as long as the clamping electrodes 30a, 30b are not short-circuited with the semiconductor element, the thickness T30 of the clamping electrodes 30a, 30b can also be greater than the thickness Tw of the semiconductor wafer W.

[0030] The table driving unit 40 is controlled by the control unit 60 to move or rotate the table 10 .

[0031] The clamp driving unit 50 is controlled by the control unit 60 to move the clamping electrodes 30a and 30b within the XY plane on the stage 10. Thus, the clamping electrodes 30a and 30b can clamp the semiconductor wafer W from both sides and be electrically connected to the semiconductor wafer W.

[0032] The probe card driving unit 52 moves the probe card 20 above the semiconductor wafer W on the stage 10 to bring the probes 21 into contact with the semiconductor elements. The probe card 20 brings the probes 21 into contact with the semiconductor elements E of the semiconductor wafer W from above the stage 10 .

[0033] The transfer arm driving unit 54 moves the transfer arm 80 . The transfer arm 80 transfers the semiconductor wafer W from the outside and places it on the stage 10 .

[0034] The control unit 60 controls the stage driving unit 40 , the clamp driving unit 50 , the probe card driving unit 52 , and the transport arm driving unit 54 .

[0035] The measuring unit 70 is electrically connected to the probe card 20 and the clamping electrodes 30a and 30b, and applies power between the probes 21 and the clamping electrodes 30a and 30b. The measuring unit 70 measures the electrical characteristics of the semiconductor device of the semiconductor wafer W through the probe card 20 and the clamping electrodes 30a and 30b.

[0036] The control unit 60 and the measurement unit 70 may be constituted by, for example, the same computer or a plurality of different computers.

[0037] Figure 2 This is a flowchart showing an operation example of the probe device according to the first embodiment.

[0038] First, the transfer arm 80 transfers the semiconductor wafer W and places it on the stage 10 ( S10 ).

[0039] Figure 3 as well as Figure 4 1 is a cross-sectional view showing a configuration example of a semiconductor wafer W placed on a worktable 10. The semiconductor wafer W includes a substrate S, a semiconductor element E, and a back insulating film I. The substrate S has a surface F1, a back surface F2 located on the opposite side of the surface F1, and a side surface F3 between the surface F1 and the back surface F2.

[0040] The substrate S is made of a semiconductor material such as silicon, GaAs, or SiC.

[0041] The semiconductor element E is disposed on the surface F1 of the substrate S. The semiconductor element E is, for example, a power semiconductor element disposed on an epitaxial layer.

[0042] The back insulating film I is provided on the back side F2 of the substrate S. The back insulating film I is a film formed on the back side F2 when the semiconductor element E is formed on the surface F1, and is removed in the subsequent back grinding process. The back insulating film I is formed on the back side F2, but is hardly formed on the side surface F3. The back insulating film I is composed of an insulating material such as a silicon oxide film, for example.

[0043] The semiconductor wafer W can be Figure 3 As shown, no bevel grinding is performed, or as shown Figure 4 Bevel grinding is performed in this way.

[0044] Next, the clamping drive unit 50 moves the clamping electrodes 30a and 30b, as shown in FIG. Figure 1 As shown, the semiconductor wafer W is clamped from the side F3 by the clamping electrode 30a and the clamping electrode 30b (S20). Thus, the clamping electrodes 30a and 30b are in direct contact with the side F3 of the semiconductor wafer W and are electrically connected to the substrate S. In addition, the clamping electrodes 30a and 30b also have the function of fixing the semiconductor wafer W in the XY plane.

[0045] Next, the probe card driving unit 52 moves the probe card 20 to above the semiconductor wafer W, and brings the probes 21 into contact with any semiconductor element E on the front surface F1 of the semiconductor wafer W ( S30 ). Thus, the probes 21 and the semiconductor element E are electrically connected.

[0046] Next, the measuring unit 70 applies power between the probe 21 and the clamping electrodes 30a, 30b. Thus, voltage is applied to the semiconductor element E and the substrate S. The measuring unit 70 measures various electrical characteristics of the semiconductor element E (S40). At this time, even if the substrate S is electrically insulated from the workbench 10 by the back insulating film I, the clamping electrodes 30a, 30b are electrically connected to the side surface F3 of the substrate S. Therefore, the measuring unit 70 can obtain the electrical characteristics of the semiconductor element E via the clamping electrodes 30a, 30b.

[0047] Thereafter, the transfer arm 80 transfers the semiconductor wafer W from the stage 10 ( S50 ), and a series of measurement processes are completed.

[0048] In this way, the probe device 1 of the present embodiment is configured to include clamping electrodes 30a and 30b, and can move on the workbench 10 from the outside toward the center in the XY plane. Thus, the clamping electrodes 30a and 30b can contact the side surface F3 of the semiconductor wafer W on the workbench 10, and function as electrodes electrically connected to the substrate S. Thus, even if the back insulating film I covers the back surface F2 of the semiconductor wafer W, the clamping electrodes 30a and 30b can function equivalent to the back surface electrodes of the semiconductor wafer W, and test the semiconductor element E on the surface F1 side of the semiconductor wafer W. In addition, the clamping electrodes 30a and 30b also function to fix the semiconductor wafer W at a predetermined position on the workbench 10.

[0049] In the probe device 1 of this embodiment, the back insulating film I covers the back surface F2 of the semiconductor wafer W. The back insulating film I is made of the same material as the silicon oxide film covering the semiconductor element E on the front surface F1 side. Thus, the warping of the semiconductor wafer W can be suppressed, and the semiconductor wafer W can be easily transported in the subsequent process.

[0050] In addition, after the inspection process of the semiconductor wafer W in the probe device 1, Figure 5 to Figure 12 In the process shown, the semiconductor wafer W is divided into semiconductor chips CH.

[0051] Figures 5 to 9 1 and 2 are cross-sectional views showing the manufacturing process of the semiconductor device after the inspection process of the semiconductor wafer W.

[0052] After the inspection process of the semiconductor wafer W, Figure 5 As shown, a support substrate SS is attached to the surface F1 side of the semiconductor wafer W. The support substrate SS is, for example, a glass substrate, and an adhesive is attached to the silicon oxide film covering the semiconductor element E. At this time, a back insulating film I is also formed on the back side F2. Therefore, the semiconductor wafer W will not be warped too much, and it is easy to carry or attach the support substrate SS.

[0053] Then, if Figure 6 As shown, the semiconductor wafer W is turned over. Next, the back insulating film I and the substrate S are polished from the back surface F2 side by using CMP (Chemical Mechanical Polishing) or etching. Thus, the back insulating film I is removed and the substrate S is thinned.

[0054] Then, if Figure 7 As shown, a material of a back surface electrode RE is deposited by sputtering or the like on the back surface F2 of the semiconductor wafer W. The back surface electrode RE is made of a low-resistance metal material such as gold, copper, or aluminum.

[0055] Next, a dicing tape DT is attached to the back surface F2 of the semiconductor wafer W. The dicing tape DT is made of, for example, a flexible resin, and is attached to the back surface electrode RE.

[0056] Then, if Figure 8 As shown in FIG. 1 , the semiconductor wafer W is turned over again. Next, the supporting substrate SS is peeled off from the semiconductor wafer W.

[0057] Then, if Fig. 9 As shown, a semiconductor wafer W is singulated into a plurality of semiconductor chips CH using a dicing blade or laser. The semiconductor chips CH are picked up by another device and packaged in an assembly process.

[0058] (Second Embodiment)

[0059] Fig.10 1 is a top view showing an example of the configuration of the clamping electrodes of the second embodiment. When viewed from the Z direction, the clamping electrodes 30a and 30b are arranged on both sides (±X directions) of the semiconductor wafer W. When the semiconductor wafer W is clamped, the clamping electrode 30a located in the +X direction of the semiconductor wafer W moves in the -X direction, and the clamping electrode 30b located in the -X direction of the semiconductor wafer W moves in the +X direction.

[0060] In addition, the clamping electrodes 30a and 30b have a shape along the outer shape of the semiconductor wafer W on the contact surface with the semiconductor wafer W. For example, the clamping electrodes 30a and 30b have a substantially arc shape on the contact surface with the semiconductor wafer W that is the same as the outer shape of the semiconductor wafer W. Thus, the clamping electrodes 30a and 30b sandwich and fix the semiconductor wafer W between them, and can be connected to the substrate S with a large area. Thus, the contact resistance between the clamping electrodes 30a and 30b and the substrate S can be reduced.

[0061] In addition, when clamping the semiconductor wafer W, both the clamping electrodes 30a and 30b may move to clamp the semiconductor wafer W. However, one of the clamping electrodes 30a and 30b may be fixed at a predetermined position, and the other may move to one side to clamp the semiconductor wafer W. In this case, the semiconductor wafer W moves in a manner of slightly sliding on the worktable 10, but the measurement of the electrical characteristics of the semiconductor element is not hindered.

[0062] (Third Embodiment)

[0063] Fig.11 1 is a top view showing an example of the configuration of the clamping electrodes of the third embodiment. The clamping electrodes 30a, 30b and 30c are pin-shaped, respectively. In a cross section parallel to the XY plane, the clamping electrodes 30a, 30b and 30c may have a shape such as a cylinder, an elliptical cylinder or a polygonal cylinder. When viewed from the Z direction, the clamping electrodes 30a, 30b and 30c are evenly arranged in three directions of the semiconductor wafer W, and the semiconductor wafer W is clamped from three directions. When the semiconductor wafer W is clamped, the clamping electrodes 30a, 30b and 30c of the semiconductor wafer W move toward the semiconductor wafer W to clamp the semiconductor wafer W.

[0064] The clamping electrodes 30 a , 30 b , and 30 c are pin-shaped and clamp the semiconductor wafer W from three directions, so that semiconductor wafers W having various sizes or shapes can be clamped.

[0065] In addition, when clamping the semiconductor wafer W, the clamping electrodes 30a, 30b, and 30c may all move to clamp the semiconductor wafer W. However, at least one of the clamping electrodes 30a, 30b, and 30c may be fixed at a predetermined position, and the other clamping electrodes may move to clamp the semiconductor wafer W. In this case, the semiconductor wafer W moves in a manner of slightly sliding on the worktable 10, but there is no problem in measuring the electrical characteristics of the semiconductor element.

[0066] In addition, the number of the clamping electrodes may be four or more. In this case, the clamping electrodes are preferably evenly arranged around the semiconductor wafer W.

[0067] (Fourth Embodiment)

[0068] Fig.12: is a cross-sectional view showing an example of the configuration of the clamping electrodes of the fourth embodiment. The thickness T30 of the clamping electrodes 30a, 30b in the Z direction is thicker than the thickness of the semiconductor wafer W or the thickness Tw of the substrate S. Thus, the clamping electrodes 30a, 30b can be in contact with the side surface of the semiconductor wafer W (the side surface of the substrate S) as a whole along the Z direction, and the contact surface between the clamping electrodes 30a, 30b and the semiconductor wafer W can be expanded. Thus, the clamping electrodes 30a, 30b can be connected to the substrate S with low resistance. The other configurations of the fourth embodiment can be the same as those of the first embodiment. Thus, the fourth embodiment can obtain the same effects as those of the first embodiment.

[0069] Furthermore, the clamping electrodes 30a and 30b of the fourth embodiment can also be applied to any of the clamping electrodes 30a and 30b or 30a to 30c of the second and third embodiments. Thus, the fourth embodiment can also obtain the effects of the second or third embodiment.

[0070] (Fifth Embodiment)

[0071] Fig.13 This is a cross-sectional view showing a configuration example of the clamping electrodes according to the fifth embodiment. When the clamping electrodes 30a and 30b are in contact with the entire side surface of the semiconductor wafer W in the Z direction, the clamping electrodes 30a and 30b may short-circuit the semiconductor element on the surface F1 side.

[0072] Therefore, in the fifth embodiment, the thickness T30 of the clamping electrodes 30a and 30b in the Z direction is thinner than the thickness of the semiconductor wafer W or the thickness Tw of the substrate S. In addition, insulating layers 31a and 31b are provided on the clamping electrodes 30a and 30b. The insulating layers 31a and 31b are made of non-conductive materials such as ceramics and resins.

[0073] In the Z direction, the thickness T30 of the clamping electrodes 30a and 30b is thinner than the thickness of the semiconductor wafer W or the thickness Tw of the substrate S. Thus, it is possible to suppress the short circuit between the clamping electrodes 30a and 30b and the semiconductor element on the surface F1 side. The other configurations of the fifth embodiment may be the same as those of the first embodiment. Thus, the fifth embodiment can obtain the same effects as those of the first embodiment.

[0074] Furthermore, the clamping electrodes 30a and 30b of the fifth embodiment can also be applied to any of the clamping electrodes 30a and 30b or 30a to 30c of the second and third embodiments. Thus, the fifth embodiment can also obtain the effects of the second or third embodiment.

[0075] In addition, Fig.12 as well as Fig.13In the figure, the clamping electrodes 30a and 30b have an L-shape in a cross section cut along the ZX plane, but the shape of the clamping electrodes 30a and 30b is not limited to this.

[0076] Several embodiments of the present invention have been described, but these embodiments are presented as examples and are not intended to limit the scope of the invention. These new embodiments can be implemented in various other ways, and various omissions, substitutions, and changes can be made without departing from the scope of the invention. These embodiments and their variations are included in the scope and spirit of the invention and are included in the invention described in the claims and their equivalents.

Claims

1. A semiconductor manufacturing device, wherein: have: a workbench, supporting the semiconductor wafer; a probe card, located above the workbench; and The first electrode is made of a conductive material and is movable on the worktable from the outside toward the center of the worktable so as to be in contact with the side surface of the semiconductor wafer.

2. The semiconductor manufacturing apparatus according to claim 1, wherein: The probe card allows a probe to contact the semiconductor wafer from above the workbench. The semiconductor manufacturing apparatus further includes a measuring unit configured to apply electric power between the probe and the first electrode to measure electrical characteristics of the semiconductor wafer.

3. The semiconductor manufacturing apparatus according to claim 1, wherein: The thickness of the first electrode in a direction perpendicular to a supporting surface of the stage on which the semiconductor wafer is placed is thinner than the thickness of the semiconductor wafer.

4. The semiconductor manufacturing apparatus according to claim 2, wherein: The thickness of the first electrode in a direction perpendicular to a supporting surface of the stage on which the semiconductor wafer is placed is thinner than the thickness of the semiconductor wafer.

5. The semiconductor manufacturing apparatus according to claim 1, wherein: The first electrode has a shape along the outer shape of the semiconductor wafer on a contact surface with the semiconductor wafer when viewed from a direction perpendicular to the support surface of the stage.

6. The semiconductor manufacturing apparatus according to claim 2, wherein: The first electrode has a shape along the outer shape of the semiconductor wafer on a contact surface with the semiconductor wafer when viewed from a direction perpendicular to the support surface of the stage.

7. The semiconductor manufacturing apparatus according to claim 5, wherein: When viewed from the vertical direction, the contact surface of the first electrode has a substantially arc shape.

8. The semiconductor manufacturing apparatus according to claim 1, wherein: A second electrode is further provided, and the semiconductor wafer is sandwiched between the second electrode and the first electrode when viewed from a vertical direction with respect to a supporting surface of the stage on which the semiconductor wafer is placed.

9. The semiconductor manufacturing apparatus according to claim 8, wherein: The thickness of the first and second electrodes in the vertical direction is thinner than the thickness of the semiconductor wafer.

10. The semiconductor manufacturing apparatus according to claim 1, wherein: An insulating layer is further provided, and the insulating layer is provided on the first electrode made of a non-conductive material.

11. The semiconductor manufacturing apparatus according to claim 1, wherein: A second electrode and a third electrode are further provided, wherein the semiconductor wafer is sandwiched between the second electrode and the third electrode and the first electrode from three directions when viewed from a vertical direction relative to a support surface of the worktable on which the semiconductor wafer is placed. The first to third electrodes have a pin shape.

12. The semiconductor manufacturing apparatus according to claim 11, wherein: The thickness of the first to third electrodes in a direction perpendicular to a supporting surface of the stage supporting the semiconductor wafer is thinner than the thickness of the semiconductor wafer.

13. The semiconductor manufacturing apparatus according to claim 8, wherein: The thickness of the first and second electrodes in the vertical direction is thicker than the thickness of the semiconductor wafer.

14. The semiconductor manufacturing apparatus according to claim 1, wherein: The workbench is electrically insulated from the semiconductor wafer.

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