LED epitaxial structure, LED chip and light-emitting device
By introducing a roughened cut-off layer of AlxGa1-xAs material into the epitaxial structure of the LED chip, the problem of unstable surface roughening process in the prior art is solved, precise control of the roughening depth is achieved, and luminous efficiency and reliability are improved.
Patent Information
- Application Number
- CN202311114944.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-08-31
- Publication Date
- 2025-03-07
AI Technical Summary
The surface roughening process of existing LED chips is unstable and it is difficult to control the roughening depth, resulting in the impact of luminous efficiency and reliability.
The LED epitaxial structure containing a roughened cutoff layer is adopted. The roughened cutoff layer is composed of AlxGa1-xAs material, 0.4≤x≤0.65. By accurately controlling the thickness of the roughened cutoff layer and the changes of Al components, precise control of the coarse depth is achieved.
It improves the luminous efficiency and reliability of the LED chip, enhances process stability, and avoids the problem of over-etching.
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Figure CN119584730A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the technical field of semiconductor devices, and in particular to an LED epitaxial structure, an LED chip and a light-emitting device. Background Art
[0002] Light Emitting Diode (LED) has the advantages of high luminous intensity, high efficiency, small size and long service life, and is considered to be one of the most promising light sources. In recent years, LED has been widely used in daily life, such as lighting, signal display, backlight, car lights and large-screen display. At the same time, these applications have also put forward higher requirements on the brightness and luminous efficiency of LED.
[0003] The luminous efficiency of a light-emitting diode is mainly determined by two efficiencies. The first is the efficiency of the radiation recombination of electrons and holes in the active region, which is usually called the internal quantum efficiency; the second is the light extraction efficiency. To improve the luminous efficiency, the following methods can be used, including improving the quality of epitaxial growth, increasing the probability of electrons and holes combining, and improving the internal quantum efficiency (IQE). On the other hand, if the light generated by the light-emitting diode cannot be effectively extracted, part of the light will be confined to the inside of the light-emitting diode due to total reflection factors and reflected or refracted back and forth, and eventually absorbed by the electrode or the light-emitting layer, making it impossible to increase the brightness. Therefore, surface roughening or changing the geometric shape of the structure is used to improve the external quantum efficiency (EQE), thereby improving the brightness and luminous efficiency of the light-emitting diode.
[0004] In order to obtain a light-emitting diode with high light extraction efficiency, a reverse polarity structure is generally used, that is, a structure with the N electrode on the top and the P electrode on the bottom, and a roughening process is used on the front side (N electrode surface) to improve the light extraction efficiency. At present, the surface roughening process commonly used in the industry is generally a wet chemical etching method, which has the problem of unstable etching process, difficult to control, and over-etching, thereby affecting the light-emitting efficiency and reliability of the light-emitting diode. Therefore, how to accurately control the roughening depth and improve the roughening effect has become the focus of technical personnel in this field. Summary of the invention
[0005] In order to solve the above technical problems, the present invention proposes an LED epitaxial structure and an LED chip to accurately control the roughening depth and improve the roughening effect, thereby improving the luminous efficiency and reliability of the LED chip and improving the process stability.
[0006] In order to achieve the above-mentioned object and other related objects, the present invention provides an LED epitaxial structure, the epitaxial structure comprising a first-type semiconductor layer, an active layer and a second-type semiconductor layer stacked in sequence, the first-type semiconductor layer comprising a first window layer, a first covering layer and a first spacer layer, characterized in that: the LED epitaxial structure comprises a roughened cut-off layer located between the first window layer and the first covering layer, the roughened cut-off layer is composed of Al x Ga 1-x As material composition, wherein 0.4≤x≤0.65.
[0007] In some optional embodiments, the roughened cut-off layer is a single-layer structure or a multi-layer structure.
[0008] In some optional embodiments, the thickness of the roughened cut-off layer is 200-400 nm.
[0009] In some optional embodiments, the Al component of the roughened stop layer remains unchanged or changes from large to small or from small to large in a direction from the first window layer to the first capping layer.
[0010] In some optional embodiments, the Al component of the roughened cut-off layer may be varied in a linear gradient, a nonlinear gradient, a stepwise variation, or any combination thereof.
[0011] In some optional embodiments, the roughened cutoff layer includes a two-layer structure consisting of a first sublayer and a second sublayer or a multi-periodic structure formed by alternating stacking of the first sublayer and the second sublayer, and the number of periods ranges from 2 to 30.
[0012] In some optional embodiments, the first sublayer is Al a Ga 1-a As, the second sublayer is Al b Ga 1-b As, where 0.4≤a≤0.65, 0.4≤b≤0.65, a<b.
[0013] In some optional embodiments, ba≥0.1.
[0014] In some optional embodiments, the thickness of the first sublayer is 10-100 nm; the thickness of the second sublayer is 10-100 nm.
[0015] In some optional embodiments, the epitaxial structure is an aluminum gallium indium phosphide-based semiconductor structure.
[0016] The present invention also provides an LED chip, comprising: an epitaxial structure, wherein the epitaxial structure comprises a first-type semiconductor layer, an active layer, and a second-type semiconductor layer stacked in sequence; the first-type semiconductor layer comprises a first window layer, a first covering layer, and a first spacer layer; the epitaxial structure further comprises a roughened cutoff layer, wherein the roughened cutoff layer is located between the first window layer and the first covering layer, and the roughened cutoff layer is composed of Al x Ga 1-x As material, wherein 0.4≤x≤0.65; a first electrode and a second electrode, respectively electrically connected to the first-type semiconductor layer and the second-type semiconductor layer; and a roughened structure, located on the upper surface of the first-type semiconductor.
[0017] In some optional embodiments, the roughened cutoff layer is a single-layer or multi-layer structure.
[0018] In some optional embodiments, the thickness of the roughened cut-off layer is 200-400 nm.
[0019] In some optional embodiments, the Al component of the roughened stop layer remains unchanged or changes from large to small or from small to large in a direction from the first window layer to the first capping layer.
[0020] In some optional embodiments, the Al component of the roughened cut-off layer may be varied in a linear gradient, a nonlinear gradient, a stepwise variation, or any combination thereof.
[0021] In some optional embodiments, the roughened cutoff layer includes a two-layer structure consisting of a first sublayer and a second sublayer or a multi-periodic structure formed by alternating stacking of the first sublayer and the second sublayer, and the number of periods ranges from 2 to 30.
[0022] In some optional embodiments, the first sublayer is Al a Ga 1-a As, the second sublayer is Al b Ga 1-b As, where 0.4≤a≤0.65, 0.4≤b≤0.65, a<b.
[0023] In some optional embodiments, ba≥0.1.
[0024] In some optional embodiments, the thickness of the first sublayer is 10-100 nm; the thickness of the second sublayer is 10-100 nm.
[0025] In some optional embodiments, the epitaxial structure is an aluminum gallium indium phosphide-based semiconductor structure.
[0026] In some optional embodiments, the present invention further proposes a light-emitting device, comprising any of the aforementioned LED chips.
[0027] Other features and advantages of the present invention will be described in the following description, and partly become apparent from the description, or understood by practicing the present invention. The purpose and other advantages of the present invention can be realized and obtained by the structures particularly pointed out in the description, claims and drawings.
[0028] Although the present invention will be described below in conjunction with some exemplary implementations and methods of use, it should be understood by those skilled in the art that it is not intended to limit the present invention to these embodiments. On the contrary, it is intended to cover all substitutes, modifications and equivalents within the spirit and scope of the present invention as defined in the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS
[0029] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In addition, the accompanying drawings are description outlines and are not drawn to scale.
[0030] Figure 1 Schematic diagram of the epitaxial structure mentioned in Example 1.
[0031] Figure 2 It is a cross-sectional schematic diagram of the LED chip mentioned in Example 1.
[0032] Figure 3~Figure 4 Schematic diagram of the method for manufacturing the LED chip mentioned in Example 2.
[0033] Figure 5 Schematic diagram of the light-emitting device mentioned in Example 3. Implementation
[0034] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.
[0035] It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and therefore the illustrations only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.
[0036] The following will describe the implementation modes of the present invention in detail with reference to the accompanying drawings and embodiments, so that the implementation process of how the present invention applies technical means to solve technical problems and achieve technical effects can be fully understood and implemented accordingly. Example 1
[0037] Figure 1 Schematic diagram of an LED epitaxial structure of a preferred embodiment, the LED epitaxial structure includes: a growth substrate 100; a semiconductor epitaxial stack, including a first window layer 104, a roughened cutoff layer 105, a first covering layer 106, a first spacer layer 107, an active layer 108, a second spacer layer 109, a second covering layer 110, a second window layer 111 and a second ohmic contact layer 112 stacked in sequence on the growth substrate 100.
[0038] Specifically, refer to Figure 1 , the material of the growth substrate 100 includes but is not limited to GaAs, and other materials may also be used, such as GaP, InP, etc. In this embodiment, a GaAs growth substrate 100 is taken as an example. Optionally, a buffer layer 101, an etching stop layer 102 and a first ohmic contact layer 103 are sequentially arranged between the growth substrate 100 and the first window layer 104; wherein, since the lattice quality of the buffer layer 101 is better than the lattice quality of the growth substrate 100, therefore, growing the buffer layer 101 on the growth substrate 100 is conducive to eliminating the influence of the lattice defects of the growth substrate 100 on the semiconductor epitaxial stack; the etching stop layer 102 is used as a stop layer for chemical etching in the later step. In some optional embodiments, the etching stop layer 102 is an n-type etching stop layer, and the material is n-GaInP. In order to facilitate the subsequent removal of the growth substrate 100, its thickness is controlled within 500nm, and more preferably within 200nm. In some optional embodiments, the ohmic contact layer 103 is made of GaAs material, with a thickness ranging from 10 to 100 nm and a doping concentration of 1 to 10E+18 / cm3, preferably 2E18 / cm3, to achieve better ohmic contact results.
[0039] The semiconductor epitaxial stack can be formed on the growth substrate 100 by physical vapor deposition (PVD), chemical vapor deposition (CVD), epitaxial growth (Epitaxy Growth Technology) and atomic beam deposition (ALD). The semiconductor epitaxial stack is a semiconductor material that can provide conventional radiation such as ultraviolet, blue, green, yellow, red, infrared light, etc., and can specifically be a material of 200-950nm, such as common nitrides, specifically gallium nitride-based semiconductor epitaxial stacks, gallium nitride-based epitaxial stacks are commonly doped with elements such as aluminum and indium, and mainly provide radiation in the 200-550nm band; or common aluminum gallium indium phosphide-based or aluminum gallium arsenic-based semiconductor epitaxial stacks, mainly providing radiation in the 550-950nm band.
[0040] The semiconductor epitaxial stack has a first surface and a second surface relative to each other, and includes a first type semiconductor layer, an active layer, and a second type semiconductor layer stacked in sequence from the first surface to the second surface. The first type semiconductor layer and the second type semiconductor layer can be respectively provided with at least electrons or holes by n-type doping or p-type doping. The n-type semiconductor layer can be doped with n-type dopants such as Si, Ge or Sn, and the p-type semiconductor layer can be doped with p-type dopants such as Mg, Zn, Ca, Sr, C or Ba. When the first type semiconductor layer is an n-type semiconductor, the second type semiconductor layer is a p-type semiconductor layer; when the first type semiconductor layer is a p-type semiconductor layer, the second type semiconductor layer is an n-type semiconductor layer. The first type semiconductor layer, the active layer, and the second conductive semiconductor layer can be made of materials such as aluminum gallium indium nitride, gallium nitride, aluminum gallium nitrogen, aluminum indium phosphorus, aluminum gallium indium phosphorus, or gallium arsenide or aluminum gallium arsenic. In this embodiment, it is preferred that the first type semiconductor layer is an n-type semiconductor layer and the second type semiconductor layer is a p-type semiconductor layer.
[0041] The first type semiconductor layer and the second type semiconductor layer respectively include a first cover layer 106 and a second cover layer 110, such as aluminum gallium indium phosphide or aluminum indium phosphide or aluminum gallium arsenic, for providing electrons or holes for the active layer 108. More preferably, when the material of the active layer 108 is aluminum gallium indium phosphide, aluminum indium phosphide is used as the first cover layer 106 and the second cover layer 110 to provide electrons and holes. In order to improve the uniformity of current expansion, the first type semiconductor layer and the second type semiconductor layer also include a first window layer 104 and a second window layer 111. In order to prevent the dopants of the first cover layer 106 and the second cover layer 110 from diffusing into the active layer 108 and affecting the crystal quality of the active layer 108, it is preferred that a first spacer layer 107 is provided between the first cover layer 106 and the active layer 108; and a second spacer layer 109 is provided between the second cover layer 110 and the active layer 108.
[0042] The first window layer 104 plays a role in current expansion, and its expansion ability is related to thickness. In this embodiment, the preferred material is Aly1Ga1-y1InP, with a thickness of 2500-4000nm, and the n-type doping concentration is 4E17-8E17 / cm3. Si doping is common for n-type doping, and doping with other equivalent elements is not excluded.
[0043] In order to improve the light extraction efficiency of the LED, the first window layer 104 needs to be roughened to improve the light extraction efficiency. At present, the surface roughening process commonly used in the industry is generally a wet chemical etching method, which has the problem of unstable etching process, difficult to control, and over-etching, thereby affecting the luminous efficiency and reliability of the light-emitting diode. In order to accurately control the roughening depth and improve the roughening effect, this embodiment inserts a roughening cutoff layer 105 in the first window layer 104 and the first covering layer, and the roughening cutoff layer 105 is composed of AlxGa1-xAs material, where 0.4≤x≤0.65. Since the first window layer 104 is composed of aluminum gallium indium phosphorus material, hydrochloric acid and phosphoric acid are generally used as chemical etching solutions, and the roughening depth cannot be accurately controlled, and there is a phenomenon of over-etching. In this embodiment, AlxGa1-xAs material is used as a roughening cutoff layer. Since the etching rate of AlxGa1-xAs material is lower than that of aluminum gallium indium phosphorus material in an acidic solution (hydrochloric acid and phosphoric acid) environment, it is conducive to better control of the roughening depth, improve process stability, and improve the luminous efficiency and reliability of the light-emitting diode. In addition, the roughened cutoff layer 105 is made of AlxGa1-xAs material. Since the AlxGa1-xAs material has good lattice matching with the substrate such as GaAs material, the crystal quality of the semiconductor epitaxial stack can be improved, thereby improving the luminous efficiency of the light-emitting diode.
[0044] The roughening cutoff layer 105 may be a single layer or a multilayer structure, and the thickness of the roughening cutoff layer 105 is 200-400 nm, preferably more than 220 nm. Within this thickness range, the roughening cutoff layer 105 can ensure that the roughening cutoff layer 105 has a sufficient effect of preventing excessive roughening. The Al component of the roughening cutoff layer may remain unchanged, or change from large to small or from small to large in the direction from the first window layer to the first covering layer. In this embodiment, it is preferred that the Al component of the roughening cutoff layer changes from small to large in the direction from the first window layer to the first covering layer, and the Al content of the smaller component is used in the direction close to the first window layer, which can reduce the etching rate of the acidic etching solution on the roughening cutoff layer. At the same time, the Al component increases, which can reduce the intrinsic wavelength of the roughening cutoff layer 105 and reduce the intrinsic absorption of the roughening cutoff layer 105, thereby improving the luminous efficiency of the light-emitting diode.
[0045] In some embodiments, the roughened cutoff layer 105 includes a two-layer structure consisting of a first sublayer and a second sublayer or a multi-periodic structure formed by alternating stacking of the first sublayer and the second sublayer, and the number of periods ranges from 2 to 30. The first sublayer is Al a Ga 1-a As, the second sublayer is Al b Ga 1-b As, wherein 0.4≤a≤0.65, 0.4≤b≤0.65, a<b. Preferably, ba≥0.1. The thickness of the first sublayer is 10-100 nm; the thickness of the second sublayer is 10-100 nm.
[0046] The first spacer layer 107 is located between the first cover layer 106 and the active layer 108, and the preferred material is Ala1Ga1-a1InP. The thickness of the first spacer layer 107 is preferably less than 300nm, and the Al component content a1 ranges from 0.3 to 1; the doping concentration is lower than 1E17 / cm3.
[0047] In this embodiment, the first cover layer 106 provides electrons for the active layer, and the preferred material is AlInP with a thickness of 300-1500 nm. Si doping is common for n-type doping, and other equivalent elements are not excluded.
[0048] The active layer 108 is a region that provides light radiation for the recombination of electrons and holes. Different materials can be selected according to different luminescent wavelengths. The active layer 106 can be a periodic structure of a single quantum well or multiple quantum wells. The active layer 106 includes a well layer and a barrier layer, wherein the barrier layer has a larger band gap than the well layer. By adjusting the composition ratio of the semiconductor material in the active layer 106, it is expected to radiate light of different wavelengths. In this embodiment, it is preferred that the active layer 108 radiates light in the 550-950nm band, such as red, yellow, orange, and infrared light. The active layer 108 is a material layer that provides electroluminescent radiation, such as aluminum gallium indium phosphide or aluminum gallium arsenic, and more preferably aluminum gallium indium phosphide, and aluminum gallium indium phosphide is a single quantum well or multiple quantum wells. In this embodiment, it is preferred that the semiconductor epitaxial stack radiates red light, and the semiconductor epitaxial stack is an aluminum gallium indium phosphide-based semiconductor structure.
[0049] The second spacer layer 109 is located on the active layer 108. The material of the second spacer layer 109 is preferably Al b2 Ga 1-b2 InP, the thickness of the second spacer layer 109 is preferably less than 300nm, the Al component content b1 of the second spacer layer 109 is in the range of 0.3 to 1, preferably the Al component content b1 is greater than 0.5 and less than or equal to 1; the doping concentration is lower than 1E17 / cm3. The second spacer layer 109 is a single-layer structure or a multi-layer structure, and its Al component content is constant or gradually increases from the first surface to the second surface.
[0050] The second type semiconductor layer includes a second covering layer 110, a second window layer 111 and a second ohmic contact layer 112; wherein the second covering layer 110 serves to provide holes for the active layer 108, and the preferred material is AlInP with a thickness of 300-1500nm; the common p-type doping is Mg doping, and other equivalent elements are not excluded.
[0051] The second window layer 111 plays a role in current expansion, and its expansion ability is related to thickness. Therefore, in this embodiment, its thickness can be selected according to the specific device size, and the preferred thickness is controlled to be above 300nm and below 12000nm. In this embodiment, the thickness of the second window layer 111 is preferably 500~10000nm. In this embodiment, the preferred material is GaP, and the p-type doping concentration is 6E17~2E18 / cm3. The common p-type doping is magnesium doping, and doping with other elements equivalently substituted is not excluded.
[0052] The second ohmic contact layer 112 is used to form an ohmic contact with the second electrode 204. The preferred material is GaP, and the doping concentration is 1E19 / cm3, more preferably 5E19 / cm3 or more, to achieve better ohmic contact. The thickness of the second ohmic contact layer 112 is preferably greater than 40nm and less than 150nm. In this embodiment, the thickness of the second ohmic contact layer 110 is preferably 60nm.
[0053] Figure 2 A schematic diagram of a light emitting diode is shown. Figure 1 The epitaxial structure in the light-emitting diode includes a substrate 200, the semiconductor epitaxial stack is bonded to the substrate 200 through a bonding layer 201, and the semiconductor epitaxial stack includes a second ohmic contact layer 112, a second window layer 111, a second cover layer 110, a second spacer layer 109, an active layer 108, a first spacer layer 107, a first cover layer 106, a roughened cutoff layer 105, a first window layer 104 and a first ohmic contact layer 103 stacked in sequence on the substrate 200.
[0054] The substrate 200 is a conductive substrate, which may be silicon, silicon carbide or a metal substrate, and the metal substrate is preferably a copper, tungsten or molybdenum substrate. In order to support the semiconductor epitaxial stack with sufficient mechanical strength, the thickness of the substrate 200 is preferably 50 μm or more. In addition, in order to facilitate mechanical processing of the substrate 200 after bonding to the semiconductor epitaxial stack, the thickness of the substrate 200 is preferably not more than 300 μm. In this embodiment, the substrate 200 is preferably a silicon substrate.
[0055] The first ohmic contact layer 103 is provided with a first electrode 203, and an ohmic contact is formed between the first electrode 203 and the first ohmic contact layer 103 to realize current flow. The first ohmic contact layer 103 only retains the part vertically below the first electrode 203. The first window layer 104 includes two parts in the horizontal direction, namely, a part P1 located below the first electrode 203, and a part P2 not located below the first electrode 203 is exposed and defined as a light-emitting surface. The light-emitting surface of the first window layer 104 can be formed around the first electrode 203. The light-emitting surface is further formed into a pattern surface or a roughened surface by an etching process, wherein the pattern surface can be a pattern obtained by etching. The roughened surface can have a regular surface structure or an arbitrary irregular surface micro-nano structure. The roughened surface or the patterned surface is essentially a light-emitting layer, which can escape more easily and improve the light extraction efficiency. Preferably, the light-emitting surface is a roughened surface, and the height difference (or height difference) of the surface structure formed by the roughening is less than 1 micron, preferably 10~300nm.
[0056] The first window layer 104 includes a second surface only located at a portion P1 below the first electrode 203, which is not roughened due to being protected by the first electrode 203. The level of the roughened surface of the first window layer 104 is substantially lower than the level of the second surface (interface) located below the first electrode 203 due to the roughening process.
[0057] Specifically, as shown in 2, in this embodiment, the first window layer 104 includes a portion P1 located below the first electrode 203 and a portion P2 not located below the first electrode 203. The first window layer 104 has a first thickness t1 in the portion P1 covered by the electrode, and the first window layer 104 not covered by the first electrode has a second thickness t2. Preferably, the first thickness t1 is 1.5 to 2.5 microns, and the second thickness t2 is 0.5 to 1.5 μm. The thickness t1 of the P1 portion is greater than the thickness t2 of the P2 portion. Preferably, the first thickness t1 is greater than the second thickness t2 by at least 0.3 μm.
[0058] A mirror layer 202 may be disposed between the semiconductor epitaxial stack and the substrate 200. The mirror layer 202 includes a P-type ohmic contact metal layer 202a and a dielectric material layer 202b. The two cooperate to form an ohmic contact with the second ohmic contact layer 110 on the one hand, and to reflect the light beam emitted by the active layer 106 to the light emitting surface of the first window layer 104 or the side wall of the semiconductor epitaxial stack for light emission on the other hand.
[0059] The light emitting diode further comprises a second electrode 204. In some embodiments, the second electrode 204 is located on the back side of the substrate 200. Alternatively, the second electrode 204 is located on the substrate 200, on the same side as the semiconductor epitaxial stack.
[0060] The first electrode 203 and the second electrode 204 include a transparent conductive material and / or a metal material. The transparent conductive material includes a transparent conductive layer, such as ITO or IZO, and the metal material includes at least one of GeAuNi, AuGe, AuZn, Au, Al, Pt, and Ti.
[0061] In this embodiment, AlxGa1-xAs material is used as the roughening cutoff layer. Since the etching rate of AlxGa1-xAs material is lower than that of aluminum gallium indium phosphide material in an acidic solution (hydrochloric acid plus phosphoric acid) environment, it is conducive to better control of the roughening depth, improve process stability, and improve the luminous efficiency and reliability of the light-emitting diode. In addition, the roughening cutoff layer 105 is composed of AlxGa1-xAs material. Since the lattice matching between AlxGa1-xAs material and substrate such as GaAs material is good, the crystal quality of the semiconductor epitaxial stack can be improved, thereby improving the luminous efficiency of the light-emitting diode. Example 2
[0062] Figure 3~Figure 4A schematic diagram of the manufacturing process of the light emitting diode according to the present embodiment 1 is shown. The manufacturing method of the light emitting diode of the present embodiment is described in detail below in conjunction with the schematic diagram.
[0063] First, if Figure 1 As shown, an epitaxial structure is provided, which specifically includes the following steps: providing a growth substrate 100, epitaxially growing a semiconductor epitaxial stack by an epitaxial process such as MOCVD, the semiconductor epitaxial stack including a buffer layer 101 and an etching stop layer 102 sequentially stacked on the surface of the growth substrate 100, for removing the epitaxial growth substrate 100, and then growing a first ohmic contact layer 103, a first window layer 104, a roughening stop layer 105, a first capping layer 106, a first spacer layer 107, an active layer 108, a second spacer layer 109, a second capping layer 110, a second window layer 111 and a second ohmic contact layer 112.
[0064] In this embodiment, the growth substrate 100 adopts a commonly used GaAs substrate, and the material of the buffer layer 101 is set according to the growth substrate 100. It should be noted that the growth substrate 100 is not limited to GaAS, and other materials, such as GaP, InP, etc., can also be used. The setting and material of the corresponding buffer layer 101 thereon can be selected according to the specific growth substrate 100. An etching stop layer 102, such as GaInP, is set on the buffer layer 101. In order to facilitate the subsequent removal of the subsequent growth substrate 100, it is preferably set to be a thinner etching stop layer 102, and its thickness is controlled within 500nm, and more preferably within 200nm.
[0065] In this embodiment, the preferred material of the first window layer 104 is Alx1Ga1-x1InP, with a thickness of 2500-4000 nm, and the n-type doping concentration is 4E17-8E17 / cm3.
[0066] The roughened stop layer 105 is made of Al x Ga 1-x As material, where 0.4≤x≤0.65, and a thickness of 200-400nm. The first cover layer 106 provides electrons for the active layer, and the preferred material is AlInP, with a thickness of 300-1500nm; Si doping is common for n-type doping, and other equivalent substitution doping elements are not excluded.
[0067] The preferred material of the first spacer layer is Ala1Ga1-a1InP. The thickness of the first spacer layer 107 is preferably less than 300 nm, the Al component content a1 is in the range of 0.3 to 1, and the doping concentration is lower than 1E17 / cm3.
[0068] The active layer 106 is a multi-quantum well, and the material is AlxGa1-xInP / AlyGa1-yInP (0≤x≤y≤1) with a structure of repeatedly stacked wells and barriers.
[0069] The material of the second spacer layer 109 is preferably Alb2Ga1-b2InP, the thickness of the second spacer layer 109 is preferably less than 300nm, the Al component content b1 of the second spacer layer 107 is in the range of 0.3 ~ 1; the doping concentration is lower than 1E17 / cm3.
[0070] The function of the second covering layer 110 is to provide holes for the quantum well, and the preferred material is AlInP with a thickness of 300-1500 nm. The common P-type doping is Mg doping, and other equivalent substitution doping elements are not excluded.
[0071] The second window layer 111 plays a role in current expansion, and its expansion ability is related to its thickness. In this embodiment, the thickness of the second window layer 111 is preferably 500-10000 nm. In this embodiment, the preferred material is GaP, and the p-type doping concentration is 6E17-2E18 / cm3. The p-type doping is commonly magnesium doping, and other elements equivalently substituted doping is not excluded.
[0072] The second ohmic contact layer 112 is used to form an ohmic contact with the second electrode 204. The preferred material is GaP, and the doping concentration is 1E19 / cm3, more preferably 5E19 / cm3 or more, to achieve better ohmic contact. The thickness of the second ohmic contact layer 109 is preferably greater than 40nm and less than 150nm. In this embodiment, the thickness of the second ohmic contact layer 110 is preferably 60nm.
[0073] Next, the semiconductor epitaxial stack is transferred to the substrate 200, and the growth substrate 100 is removed to obtain Figure 3 The structure shown specifically includes the following steps: a mirror layer 202 is formed on the second ohmic contact layer 112, which includes an ohmic contact metal layer 202a and a dielectric material layer 202b, which cooperate to form an ohmic contact with the second ohmic contact layer 112 on the one hand, and are used to reflect the light emitted from the active layer downward on the other hand; a substrate 200 is provided, a metal bonding layer 201 is set on the substrate 200, the substrate 201 is bonded to the mirror layer 202, and the growth substrate 100 is removed. When the growth substrate 100 is gallium arsenide, it can be removed by a wet etching process until the first ohmic contact layer 103 is exposed.
[0074] Then, if Figure 4As shown, a first electrode 203 is formed on the first ohmic contact layer 103, and the first electrode 203 forms a good ohmic contact with the first ohmic contact layer 103, and a second electrode 204 is formed on the back side of the substrate 200, whereby conduction current can pass between the first electrode 203, the second electrode 204 and the semiconductor epitaxial stack. The substrate 200 has a certain thickness and can support all the layers thereon.
[0075] Then, a mask is formed to cover the first electrode 203, and the first ohmic contact layer 103 around the first electrode 203 is exposed; an etching process is performed to etch away the first ohmic contact layer 103 around the first electrode 203, so that the ohmic contact layer 103 not located under the first electrode 203 is completely removed, and the first window layer 104 is exposed at the same time, and then the first window layer 104 is etched to form a patterned or roughened surface, forming a Figure 2 The structure shown. The removal process of the ohmic contact layer and the roughening treatment of the first window layer 104 can be a wet etching process of the same step or multiple steps, and the wet etching solution can be an acidic solution, such as hydrochloric acid, sulfuric acid or hydrofluoric acid or citric acid, or any other preferred chemical reagent. Due to the setting of the roughening cutoff layer, over-etching is effectively avoided, the roughening depth can be accurately controlled, and the roughening effect is improved, thereby improving the brightness and reliability of the light-emitting diode.
[0076] Finally, unitized light-emitting diodes are obtained through etching, splitting and other processes according to size requirements. Example 3
[0077] This embodiment provides a light emitting device 300. Figure 5 The light emitting device 300 includes a plurality of light emitting diodes arranged in an array as in any of the above embodiments. Figure 5 FIG. 1 schematically shows a portion of a light emitting diode 1 in an enlarged manner.
[0078] In this embodiment, the light emitting device 300 may be a plant lighting product, a military aircraft instrument panel, a stage light, or a projector or a display screen.
[0079] The light emitting diode in the light emitting device 300 adopts the light emitting diode of the present invention. The roughening cutoff layer of the present invention can accurately control the depth of roughening, prevent over-etching, and improve the luminous efficiency and reliability of the LED chip and the light emitting device.
[0080] It should be noted that the above implementation modes are only used to illustrate the present invention, and are not used to limit the present invention. Those skilled in the art can make various modifications and changes to the present invention without departing from the spirit and scope of the present invention. Therefore, all equivalent technical solutions also belong to the scope of the present invention. The scope of patent protection of the present invention should be limited to the scope of the claims.
[0081] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.
Claims
1. An LED epitaxial structure, comprising a first-type semiconductor layer, an active layer, and a second-type semiconductor layer stacked in sequence, wherein the first-type semiconductor layer comprises a first window layer, a first covering layer, and a first spacer layer, characterized in that: The LED epitaxial structure comprises a roughened cutoff layer located between the first window layer and the first cover layer. The roughened cutoff layer is made of Al x Ga 1-x As material composition, wherein 0.4≤x≤0.
65.
2. The LED epitaxial structure according to claim 1, characterized in that: The roughening cut-off layer is a single-layer structure or a multi-layer structure.
3. The LED epitaxial structure according to claim 1, characterized in that: The thickness of the roughened cut-off layer is 200-400 nm.
4. The LED epitaxial structure according to claim 1, characterized in that: The Al component of the roughened stop layer remains unchanged or changes from large to small or from small to large in a direction from the first window layer to the first cover layer.
5. The LED epitaxial structure according to claim 4, characterized in that: The Al component of the roughened cut-off layer may be varied in a linear gradient, a nonlinear gradient, a stepwise variation, or any combination thereof.
6. The LED epitaxial structure according to claim 1, characterized in that: The roughened cutoff layer includes a two-layer structure consisting of a first sublayer and a second sublayer or a multi-periodic structure formed by alternately stacking the first sublayer and the second sublayer, and the number of periods ranges from 2 to 30.
7. The LED epitaxial structure according to claim 6, characterized in that: The first sublayer is Al a Ga 1-a As, the second sublayer is Al b Ga 1-b As, where 0.4≤a≤0.65, 0.4≤b≤0.65, a<b.
8. The LED epitaxial structure according to claim 7, characterized in that: The ba≥0.
1.
9. The LED epitaxial structure according to claim 1, characterized in that: The thickness of the first sublayer is 10-100 nm; the thickness of the second sublayer is 10-100 nm.
10. The LED epitaxial structure according to claim 1, characterized in that: The epitaxial structure is an aluminum gallium indium phosphorus based semiconductor structure. 11.LED chips, including: An epitaxial structure, the epitaxial structure comprising a first-type semiconductor layer, an active layer, and a second-type semiconductor layer stacked in sequence; The first-type semiconductor layer comprises a first window layer, a first capping layer and a first spacer layer; The epitaxial structure further comprises a roughened cut-off layer, wherein the roughened cut-off layer is located between the first window layer and the first cover layer, and the roughened cut-off layer is made of Al x Ga 1-x As material composition, where 0.4≤x≤0.65; A first electrode and a second electrode are electrically connected to the first-type semiconductor layer and the second-type semiconductor layer, respectively; The roughened structure is located on the upper surface of the first-type semiconductor.
12. The LED chip according to claim 11, characterized in that: The roughening cut-off layer is a single-layer or multi-layer structure.
13. The LED chip according to claim 12, characterized in that: The thickness of the roughened cut-off layer is 200-400 nm.
14. The LED chip according to claim 12, characterized in that: The Al component of the roughened stop layer remains unchanged or changes from large to small or from small to large in a direction from the first window layer to the first cover layer.
15. The LED chip according to claim 14, characterized in that: The Al component of the roughened cut-off layer may be varied in a linear gradient, a nonlinear gradient, a stepwise variation, or any combination thereof.
16. The LED chip according to claim 11, characterized in that: The roughened cutoff layer includes a two-layer structure consisting of a first sublayer and a second sublayer or a multi-periodic structure formed by alternately stacking the first sublayer and the second sublayer, and the number of periods ranges from 2 to 30.
17. The LED chip according to claim 16, characterized in that: The first sublayer is Al a Ga 1-a As, the second sublayer is Al b Ga 1-b As, where 0.4≤a≤0.65, 0.4≤b≤0.65, a<b.
18. The LED chip according to claim 17, characterized in that: The ba≥0.
1.
19. The LED chip according to claim 17, characterized in that: The thickness of the first sublayer is 10-100 nm; the thickness of the second sublayer is 10-100 nm.
20. The LED chip according to claim 11, characterized in that: The epitaxial structure is an aluminum gallium indium phosphorus based semiconductor structure.
21. A light emitting device comprising the LED chip according to any one of claims 11 to 20.