Testing method of chip under high temperature condition
By calculating the target power consumption required by the chip under high temperature test and driving the chip to operate in this power consumption state, the chip itself heats up to the high temperature test temperature, solving the defects of relying on external heating equipment in the prior art and achieving efficient and reliable high temperature testing.
Patent Information
- Application Number
- CN202411766581.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-04
- Publication Date
- 2025-03-11
AI Technical Summary
The prior art requires relying on external heating equipment when testing chips under high temperature conditions, resulting in high testing costs, large energy consumption and uneven temperature distribution, which affects the reliability of the test results.
By calculating the target power consumption required for the chip to reach the target temperature and driving the chip to operate in this power consumption state, the chip itself heats up to a high-temperature test temperature, so that high-temperature testing is performed without relying on external heating equipment.
It avoids the use of external heating equipment, reduces testing costs and energy consumption, and improves the reliability of test results, and achieves uniform high-temperature testing through the chip's own heating.
Smart Images
Figure CN119596109A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of chip testing, and in particular to a chip testing method under high temperature conditions. Background Art
[0002] In the actual use scenarios of chips, high temperature environments are often encountered, and high temperature may have a negative impact on the performance and reliability of the chip. Many application fields have very high requirements for chip reliability, so testing the chip under high temperature conditions is an important part of ensuring the performance and reliability of the chip in high temperature environments. For example, the LED driver chip used to drive the LED backlight, usually the LED driver chip and the LED light-emitting element are arranged on the LED backlight panel, so the heat generated by the LED light-emitting element will make the entire LED backlight panel in a high temperature state, so for the LED driver chip, it is necessary to test its performance and reliability in a high temperature environment.
[0003] At present, the main testing method under high temperature conditions is to use a heating device such as a temperature chamber to heat the chip's surrounding environment, so as to heat the chip and test the chip's functions and performance under high temperature conditions. However, this testing method requires additional heating equipment. Heating the chip's surrounding environment requires special heating equipment, such as high-temperature test chambers and other equipment, which will increase the testing cost and consume a lot of energy. At the same time, the uneven temperature distribution of ordinary temperature chambers will also cause unreliable test results. In addition, the temperature stabilization time of the temperature chamber is relatively long, which also consumes a lot of test waiting time.
[0004] It can be seen that a method for testing chips under high temperature conditions is needed in the art to avoid having to rely on heating equipment to heat the ambient temperature of the chip so that the chip test can meet the conditions satisfied by high temperature testing. Summary of the invention
[0005] The present invention provides a chip testing method under high temperature conditions. The method can achieve the condition that the chip is self-heated to enter a high temperature working state without using an external heating device to heat the chip, and meet the high temperature testing conditions.
[0006] Based on the above technical objectives, the present invention provides a method for testing a chip under high temperature conditions, the method comprising:
[0007] S100, determining the target temperature T1 of the high temperature test condition of the chip to be tested, the test environment temperature T2 and the thermal resistance R of the chip th ;
[0008] S200, based on the target temperature T1, the test environment temperature T2 and the thermal resistance R of the chip thCalculate the target power consumption P required for the chip under test to achieve the target problem T1; and: P = (T1-T2) / R th ;
[0009] S300, determining the voltage value and current value of each pin of the chip under test according to the target power consumption P, so as to drive the chip under test to work at the target power consumption P;
[0010] S400, monitoring the voltage value VBE of the temperature control diode of the chip to be tested to determine whether the chip to be tested reaches the target temperature T1;
[0011] S500, when the chip under test reaches the target temperature T1, start testing various functions of the chip under test under the target temperature T1.
[0012] In one embodiment, the chip to be tested is an LED driver chip.
[0013] In one embodiment, the voltage value applied to the LED driving pin is determined according to the maximum tolerable current value of the LED driving pin of the LED driving chip and the target power consumption.
[0014] In one embodiment, the current value applied to the LED driving pin is determined according to the maximum tolerable voltage value of the LED driving pin of the LED driving chip and the target power consumption.
[0015] Compared with the prior art, one or more embodiments of the present invention may have the following advantages:
[0016] The present invention drives the chip to be tested to operate under a certain power consumption state, thereby achieving the temperature condition of high temperature test in the form of self-heating, and then tests various functions under the high temperature state, thereby avoiding the limitation of relying on external heating equipment to heat the chip to achieve high temperature test conditions.
[0017] Other features and advantages of the present invention will be described in the following description, and partly become apparent from the description, or understood by practicing the present invention. The purpose and other advantages of the present invention can be realized and obtained by the structures particularly pointed out in the description, claims and drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings:
[0019] Figure 1 It is a schematic flow chart of a chip testing method under high temperature conditions of the present invention; DETAILED DESCRIPTION
[0020] In order to make the objectives, technical solutions and advantages of the present invention more clear, the present invention is further described in detail below with reference to the accompanying drawings.
[0021] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there is no intervening element or layer. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present invention, the first element, component, region, layer or part discussed below can be represented as the second element, component, region, layer or part. And when the second element, component, region, layer or part is discussed, it does not indicate that the present invention necessarily has the first element, component, region, layer or part.
[0022] Spatially relative terms such as "under", "beneath", "below", "under", "above", "above", etc., may be used here for convenience of description to describe the relationship between an element or feature shown in the figure and other elements or features. It should be understood that in addition to the orientation shown in the figure, the spatial relationship terms are intended to also include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is turned over, then the elements or features described as "under other elements" or "under it" or "under it" will be oriented as "on" other elements or features. Therefore, the exemplary terms "under" and "under" may include both upper and lower orientations. The device can be oriented otherwise (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.
[0023] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be limiting of the present invention. When used herein, the singular forms "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "consisting of" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.
[0024] Example 1
[0025] like Figure 1 The process of the chip testing method under high temperature conditions shown in the figure includes:
[0026] S100, determining the target temperature T1 of the high temperature test condition of the chip to be tested, the test environment temperature T2 and the thermal resistance R of the chip th The target temperature T1 of the high temperature test condition refers to the specific temperature at which the chip is tested during the high temperature test. For example, if the functions of the chip need to be tested at 100°C, the target temperature T1 is set to 100°C. The test environment temperature T2 refers to the ambient temperature of the test. The thermal resistance R th It refers to the resistance encountered by the heat transferred from the inside of the chip to the external environment during the working process of the chip. It reflects the difficulty of the chip to dissipate heat. The smaller the thermal resistance, the faster the heat dissipation. The unit is usually degrees Celsius per watt (℃ / W), which means how many degrees Celsius the temperature difference between the chip node and the surrounding environment is when the chip consumes 1 watt of power. The chip thermal resistance can generally be obtained in the chip data sheet.
[0027] S200, based on the target temperature T1, the test environment temperature T2 and the thermal resistance R of the chip th Calculate the target power consumption P required for the chip under test to achieve the target problem T1. The specific calculation method is:
[0028] P=(T1-T2) / R th ;
[0029] S300, determine the voltage and current values of each pin of the chip to be tested according to the target power consumption P, so as to drive the chip to be tested to work at the target power consumption P. The chip to be tested can be a voltage or current driven chip, and the process selected by the chip can continue to work under high voltage and high current. The range of voltage and current values of the chip pins can be obtained by checking the chip data sheet. Taking the mini_LED driver chip as an example, the drive current chip of each channel can be set, such as 0~100mA, and the voltage of each channel can also be set on the periphery of the chip (as long as it does not exceed the maximum voltage value allowed by the chip), such as 0~30V.
[0030] For example: when the target temperature to be tested is 125℃, the test environment temperature is 25℃, and the chip power supply voltage is 3.3V, for a 4-channel LED driver chip, if the current range of each channel is 0~40mA, and the voltage range of the chip LED pin is 1~30V. And by consulting the chip manual, the chip thermal resistance is 80℃ / W, then the target power consumption of the chip at the temperature to be tested can be calculated to be 1.25W. According to the power calculation formula P=U*I, when all 4 channels are turned on and the current of each LED channel is set to 40mA, the peripheral voltage of the LED pin of the LED driver chip can be calculated to be about 7.8V.
[0031] That is, according to the above examples, it can be known that for the LED driver chip in the present invention, since its main power consumption is generated by the LED drive channel, a suitable current value and voltage value are applied to its LED drive pin to make the chip self-heat and reach the test temperature. The selection of the voltage value and the current value in the above examples adopts the maximum current value that the pin can withstand applied to the LED drive pin, and the corresponding voltage value is calculated according to the target power consumption. In the present invention, the maximum voltage value that the pin can withstand can also be adopted, and the current value is calculated according to the target power consumption. Similarly, other current values or voltage values can also be selected in the present invention, as long as it is ensured that the chip can work at the target power consumption.
[0032] S400 , monitoring the voltage value VBE of the temperature control diode of the chip under test to determine whether the chip under test reaches the target temperature T1 .
[0033] S500, when the chip under test reaches the target temperature T1, start testing various functions of the chip under test under the target temperature T1.
[0034] The present invention may be a system, method and / or computer program product at any possible level of integrated technical detail. The computer program product may include a computer-readable storage medium (or multiple media) having computer-readable program instructions thereon for causing a processor to perform various aspects of the present invention.
[0035] A computer readable storage medium may be a tangible device that can retain and store instructions used by an instruction execution device. The computer readable storage medium may be, for example, but not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing. A non-exhaustive list of more specific examples of computer readable storage media includes the following: a portable computer floppy disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a static random access memory (SRAM), a portable compact disk read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanical encoding device such as a punch card or a raised structure in a groove on which instructions are recorded, and any suitable combination of the above. A computer readable storage medium, as used herein, should not be interpreted as a transient signal itself, such as a radio wave or other freely propagating electromagnetic wave, an electromagnetic wave propagating through a waveguide or other transmission medium (e.g., a light pulse through a fiber optic cable), or an electrical signal transmitted by a wire.
[0036] The computer-readable program instructions described herein may be downloaded from a computer-readable storage medium to a corresponding computing / processing device, or downloaded to an external computer or external storage device via a network, such as the Internet, a local area network, a wide area network, and / or a wireless network. The network may include copper transmission cables, optical transmission fibers, wireless transmissions, routers, firewalls, switches, gateway computers, and / or edge servers. The network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions to be stored in a computer-readable storage medium within the corresponding computing / processing device.
[0037] The computer-readable program instructions for performing the operation of the present invention may be assembler instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, configuration data for integrated circuits, or source code or object code written in any combination of one or more programming languages and process programming languages. The computer-readable program instructions may be executed entirely on the user's computer, partially on the user's computer, as an independent software package, partially on the user's computer, partially on a remote computer, or entirely on a remote computer or server. In the latter case, the remote computer may be connected to the user's computer by any type of network including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., by using the Internet of an Internet service provider). In certain embodiments, the electronic circuit including, for example, a programmable logic circuit, a field programmable gate array (FPGA) or a programmable logic array (PLA) may execute the computer-readable program instructions by utilizing the state information of the computer-readable program instructions to personalize the electronic circuit, thereby performing aspects of the present invention.
[0038] Various aspects of the present invention are described herein with reference to flowcharts and / or block diagrams of methods, devices (systems) and computer program products according to embodiments of the present invention. It is understood that each block of the flowchart illustration and / or block diagram, and the combination of blocks in the flowchart illustration and / or block diagram, can be implemented by computer-readable program instructions.
[0039] These computer-readable program instructions may be provided to a processor of a computer or other programmable data processing device to produce a machine so that the instructions executed by the processor of the computer or other programmable data processing device create instructions for implementing the flowcharts and / or block diagrams. Figure 1 These computer-readable program instructions may also be stored in a computer-readable storage medium capable of booting a computer, a programmable data processing device and / or other device that operates in a specific manner, so that the computer-readable storage medium having the instructions stored therein includes a manufactured product that includes instructions that implement aspects of the functions / actions specified in the flowchart and / or block diagram blocks.
[0040] Computer readable program instructions may also be loaded into a computer, other programmable data processing device, or other device to cause a series of operating steps to be performed on the computer, other programmable devices or other devices for producing a computer-implemented process, so that the instructions executed on the computer, other programmable device or other device implement the functions / actions specified in the flowchart and / or block diagram blocks.
[0041] The flowcharts and block diagrams in the accompanying drawings illustrate the possible implementation architecture, functions and operations of the system, method and computer program product according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagram may represent a module, segment or portion of an instruction, which includes one or more executable instructions for implementing a specified logical function. In some optional implementations, the functions indicated in the block may occur outside the order indicated in the figure. For example, in fact, two blocks shown in succession can be completed as a step, and depending on the functions involved, they can be executed concurrently, substantially concurrently, in a partially or fully time-overlapping manner, or sometimes these blocks can be executed in reverse order. It will also be noted that each block of the block diagram and / or flowchart illustration, as well as the combination of blocks in the block diagram and / or flowchart illustration, can be implemented by a dedicated hardware-based system that performs a specified function or action or performs a combination of dedicated hardware and computer instructions.
[0042] The embodiments of the present application are described with reference to the flowcharts and / or block diagrams of the methods, apparatuses (devices) and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.
[0043] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.
[0044] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.
Claims
1. A chip testing method under high temperature conditions, characterized in that: The method comprises: S100, determining the target temperature T1 of the high temperature test condition of the chip to be tested, the test environment temperature T2 and the thermal resistance R of the chip th ; S200, based on the target temperature T1, the test environment temperature T2 and the thermal resistance R of the chip th Calculate the target power consumption P required for the chip under test to achieve the target problem T1; and: P = (T1-T2) / R th ; S300, determining the voltage value and current value of each pin of the chip under test according to the target power consumption P, so as to drive the chip under test to work at the target power consumption P; S400, monitoring the voltage value VBE of the temperature control diode of the chip to be tested to determine whether the chip to be tested reaches the target temperature T1; S500, when the chip under test reaches the target temperature T1, start testing various functions of the chip under test under the target temperature T1.
2. The testing method according to claim 1, characterized in that: The chip to be tested is an LED driver chip.
3. The testing method according to claim 2, characterized in that: The voltage value applied to the LED driving pin is determined according to the maximum tolerable current value of the LED driving pin of the LED driving chip and the target power consumption.
4. The testing method according to claim 2, characterized in that: The current value applied to the LED driving pin is determined according to the maximum tolerable voltage value of the LED driving pin of the LED driving chip and the target power consumption.
5. A computer-readable storage medium having computer instructions stored thereon, wherein: When the computer instructions are executed by a processor, the steps of the method according to any one of claims 1 to 4 are implemented.